subject:"\[PATCH libdrm\] test\/amdgpu\: fix test failure for SI"

RE: [PATCH libdrm] test/amdgpu: fix test failure for SI

2017-07-18 Thread Deucher, Alexander

> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Flora Cui
> Sent: Tuesday, July 18, 2017 10:53 PM
> To: amd-...@lists.freedesktop.org; dri-devel@lists.freedesktop.org
> Cc: Cui, Flora
> Subject: [PATCH libdrm] test/amdgpu: fix test failure for SI
> 
> Change-Id: I646f1bf844bd92962b9f71aa287f90173ae233c6
> Signed-off-by: Flora Cui <flora@amd.com>

Reviewed-by: Alex Deucher <alexander.deuc...@amd.com>

> ---
>  tests/amdgpu/basic_tests.c | 273 ++
> ---
>  tests/amdgpu/cs_tests.c|  41 +++
>  tests/amdgpu/vce_tests.c   |  41 +++
>  3 files changed, 229 insertions(+), 126 deletions(-)
> 
> diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu/basic_tests.c
> index 1807538..c767f7e 100644
> --- a/tests/amdgpu/basic_tests.c
> +++ b/tests/amdgpu/basic_tests.c
> @@ -40,6 +40,7 @@
>  static  amdgpu_device_handle device_handle;
>  static  uint32_t  major_version;
>  static  uint32_t  minor_version;
> +static  uint32_t  family_id;
> 
>  static void amdgpu_query_info_test(void);
>  static void amdgpu_memory_alloc(void);
> @@ -206,22 +207,56 @@ CU_TestInfo basic_tests[] = {
>  #  define PACKET3_DMA_DATA_CMD_DAIC(1 << 29)
>  #  define PACKET3_DMA_DATA_CMD_RAW_WAIT  (1 << 30)
> 
> +#define SDMA_PACKET_SI(op, b, t, s, cnt) op) & 0xF) << 28) | \
> + (((b) & 0x1) << 26) |
>   \
> + (((t) & 0x1) << 23) |
>   \
> + (((s) & 0x1) << 22) |
>   \
> + (((cnt) & 0xF) << 0))
> +#define  SDMA_OPCODE_COPY_SI 3
> +#define SDMA_OPCODE_CONSTANT_FILL_SI 13
> +#define SDMA_NOP_SI  0xf
> +#define GFX_COMPUTE_NOP_SI 0x8000
> +#define  PACKET3_DMA_DATA_SI 0x41
> +#  define PACKET3_DMA_DATA_SI_ENGINE(x) ((x) << 27)
> + /* 0 - ME
> +  * 1 - PFP
> +  */
> +#  define PACKET3_DMA_DATA_SI_DST_SEL(x)  ((x) << 20)
> + /* 0 - DST_ADDR using DAS
> +  * 1 - GDS
> +  * 3 - DST_ADDR using L2
> +  */
> +#  define PACKET3_DMA_DATA_SI_SRC_SEL(x)  ((x) << 29)
> + /* 0 - SRC_ADDR using SAS
> +  * 1 - GDS
> +  * 2 - DATA
> +  * 3 - SRC_ADDR using L2
> +  */
> +#  define PACKET3_DMA_DATA_SI_CP_SYNC (1 << 31)
> +
>  int suite_basic_tests_init(void)
>  {
> + struct amdgpu_gpu_info gpu_info = {0};
>   int r;
> 
>   r = amdgpu_device_initialize(drm_amdgpu[0], _version,
>  _version, _handle);
> 
> - if (r == 0)
> - return CUE_SUCCESS;
> - else {
> + if (r) {
>   if ((r == -EACCES) && (errno == EACCES))
>   printf("\n\nError:%s. "
>   "Hint:Try to run this test program as root.",
>   strerror(errno));
>   return CUE_SINIT_FAILED;
>   }
> +
> + r = amdgpu_query_gpu_info(device_handle, _info);
> + if (r)
> + return CUE_SINIT_FAILED;
> +
> + family_id = gpu_info.family_id;
> +
> + return CUE_SUCCESS;
>  }
> 
>  int suite_basic_tests_clean(void)
> @@ -308,7 +343,7 @@ static void
> amdgpu_command_submission_gfx_separate_ibs(void)
>   uint32_t expired;
>   amdgpu_bo_list_handle bo_list;
>   amdgpu_va_handle va_handle, va_handle_ce;
> - int r;
> + int r, i = 0;
> 
>   r = amdgpu_cs_ctx_create(device_handle, _handle);
>   CU_ASSERT_EQUAL(r, 0);
> @@ -333,12 +368,14 @@ static void
> amdgpu_command_submission_gfx_separate_ibs(void)
> 
>   /* IT_SET_CE_DE_COUNTERS */
>   ptr = ib_result_ce_cpu;
> - ptr[0] = 0xc0008900;
> - ptr[1] = 0;
> - ptr[2] = 0xc0008400;
> - ptr[3] = 1;
> + if (family_id != AMDGPU_FAMILY_SI) {
> + ptr[i++] = 0xc0008900;
> + ptr[i++] = 0;
> + }
> + ptr[i++] = 0xc0008400;
> + ptr[i++] = 1;
>   ib_info[0].ib_mc_address = ib_result_ce_mc_address;
> - ib_info[0].size = 4;
> + ib_info[0].size = i;
>   ib_info[0].flags = AMDGPU_IB_FLAG_CE;
> 
>   /* IT_WAIT_ON_CE_COUNTER */
> @@ -397,7 +434,7 @@ static void
> amdgpu_command_submission_gfx_shared_ib(void)
>   uint32_t expired;
>   amdgp

[PATCH libdrm] test/amdgpu: fix test failure for SI

2017-07-18 Thread Flora Cui

Change-Id: I646f1bf844bd92962b9f71aa287f90173ae233c6
Signed-off-by: Flora Cui 
---
 tests/amdgpu/basic_tests.c | 273 ++---
 tests/amdgpu/cs_tests.c|  41 +++
 tests/amdgpu/vce_tests.c   |  41 +++
 3 files changed, 229 insertions(+), 126 deletions(-)

diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu/basic_tests.c
index 1807538..c767f7e 100644
--- a/tests/amdgpu/basic_tests.c
+++ b/tests/amdgpu/basic_tests.c
@@ -40,6 +40,7 @@
 static  amdgpu_device_handle device_handle;
 static  uint32_t  major_version;
 static  uint32_t  minor_version;
+static  uint32_t  family_id;
 
 static void amdgpu_query_info_test(void);
 static void amdgpu_memory_alloc(void);
@@ -206,22 +207,56 @@ CU_TestInfo basic_tests[] = {
 #  define PACKET3_DMA_DATA_CMD_DAIC(1 << 29)
 #  define PACKET3_DMA_DATA_CMD_RAW_WAIT  (1 << 30)
 
+#define SDMA_PACKET_SI(op, b, t, s, cnt)   op) & 0xF) << 28) | \
+   (((b) & 0x1) << 26) |   
\
+   (((t) & 0x1) << 23) |   
\
+   (((s) & 0x1) << 22) |   
\
+   (((cnt) & 0xF) << 0))
+#defineSDMA_OPCODE_COPY_SI 3
+#define SDMA_OPCODE_CONSTANT_FILL_SI   13
+#define SDMA_NOP_SI  0xf
+#define GFX_COMPUTE_NOP_SI 0x8000
+#definePACKET3_DMA_DATA_SI 0x41
+#  define PACKET3_DMA_DATA_SI_ENGINE(x) ((x) << 27)
+   /* 0 - ME
+* 1 - PFP
+*/
+#  define PACKET3_DMA_DATA_SI_DST_SEL(x)  ((x) << 20)
+   /* 0 - DST_ADDR using DAS
+* 1 - GDS
+* 3 - DST_ADDR using L2
+*/
+#  define PACKET3_DMA_DATA_SI_SRC_SEL(x)  ((x) << 29)
+   /* 0 - SRC_ADDR using SAS
+* 1 - GDS
+* 2 - DATA
+* 3 - SRC_ADDR using L2
+*/
+#  define PACKET3_DMA_DATA_SI_CP_SYNC (1 << 31)
+
 int suite_basic_tests_init(void)
 {
+   struct amdgpu_gpu_info gpu_info = {0};
int r;
 
r = amdgpu_device_initialize(drm_amdgpu[0], _version,
   _version, _handle);
 
-   if (r == 0)
-   return CUE_SUCCESS;
-   else {
+   if (r) {
if ((r == -EACCES) && (errno == EACCES))
printf("\n\nError:%s. "
"Hint:Try to run this test program as root.",
strerror(errno));
return CUE_SINIT_FAILED;
}
+
+   r = amdgpu_query_gpu_info(device_handle, _info);
+   if (r)
+   return CUE_SINIT_FAILED;
+
+   family_id = gpu_info.family_id;
+
+   return CUE_SUCCESS;
 }
 
 int suite_basic_tests_clean(void)
@@ -308,7 +343,7 @@ static void amdgpu_command_submission_gfx_separate_ibs(void)
uint32_t expired;
amdgpu_bo_list_handle bo_list;
amdgpu_va_handle va_handle, va_handle_ce;
-   int r;
+   int r, i = 0;
 
r = amdgpu_cs_ctx_create(device_handle, _handle);
CU_ASSERT_EQUAL(r, 0);
@@ -333,12 +368,14 @@ static void 
amdgpu_command_submission_gfx_separate_ibs(void)
 
/* IT_SET_CE_DE_COUNTERS */
ptr = ib_result_ce_cpu;
-   ptr[0] = 0xc0008900;
-   ptr[1] = 0;
-   ptr[2] = 0xc0008400;
-   ptr[3] = 1;
+   if (family_id != AMDGPU_FAMILY_SI) {
+   ptr[i++] = 0xc0008900;
+   ptr[i++] = 0;
+   }
+   ptr[i++] = 0xc0008400;
+   ptr[i++] = 1;
ib_info[0].ib_mc_address = ib_result_ce_mc_address;
-   ib_info[0].size = 4;
+   ib_info[0].size = i;
ib_info[0].flags = AMDGPU_IB_FLAG_CE;
 
/* IT_WAIT_ON_CE_COUNTER */
@@ -397,7 +434,7 @@ static void amdgpu_command_submission_gfx_shared_ib(void)
uint32_t expired;
amdgpu_bo_list_handle bo_list;
amdgpu_va_handle va_handle;
-   int r;
+   int r, i = 0;
 
r = amdgpu_cs_ctx_create(device_handle, _handle);
CU_ASSERT_EQUAL(r, 0);
@@ -416,12 +453,14 @@ static void amdgpu_command_submission_gfx_shared_ib(void)
 
/* IT_SET_CE_DE_COUNTERS */
ptr = ib_result_cpu;
-   ptr[0] = 0xc0008900;
-   ptr[1] = 0;
-   ptr[2] = 0xc0008400;
-   ptr[3] = 1;
+   if (family_id != AMDGPU_FAMILY_SI) {
+   ptr[i++] = 0xc0008900;
+   ptr[i++] = 0;
+   }
+   ptr[i++] = 0xc0008400;
+   ptr[i++] = 1;
ib_info[0].ib_mc_address = ib_result_mc_address;
-   ib_info[0].size = 4;
+   ib_info[0].size = i;
ib_info[0].flags = AMDGPU_IB_FLAG_CE;
 
ptr = (uint32_t *)ib_result_cpu + 4;
@@ -502,12 +541,21 @@ static void amdgpu_semaphore_test(void)
struct amdgpu_cs_fence fence_status = {0};
uint32_t *ptr;
uint32_t

RE: [PATCH libdrm] test/amdgpu: fix test failure for SI

[PATCH libdrm] test/amdgpu: fix test failure for SI

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