RE: [PATCH v11 1/4] dt-bindings: display: Document Renesas RZ/G2L DU bindings

2023-10-02 Thread Biju Das
Hi Rob,

> Subject: Re: [PATCH v11 1/4] dt-bindings: display: Document Renesas RZ/G2L
> DU bindings
> 
> 
> On Mon, 02 Oct 2023 13:27:37 +0100, Biju Das wrote:
> > The RZ/G2L LCD controller is composed of Frame Compression Processor
> > (FCPVD), Video Signal Processor (VSPD), and Display Unit (DU).
> >
> > The DU module supports the following hardware features − Display
> > Parallel Interface (DPI) and MIPI LINK Video Interface − Display
> > timing master − Generates video timings − Selecting the polarity of
> > output DCLK, HSYNC, VSYNC, and DE − Supports Progressive − Input data
> > format (from VSPD): RGB888, RGB666 − Output data format: same as Input
> > data format − Supporting Full HD (1920 pixels x 1080 lines) for
> > MIPI-DSI Output − Supporting WXGA (1280 pixels x 800 lines) for
> > Parallel Output
> >
> > This patch documents the DU module found on RZ/G2L LCDC.
> >
> > Signed-off-by: Biju Das 
> > Reviewed-by: Rob Herring 
> > Reviewed-by: Laurent Pinchart
> > 
> > ---
> > v10->v1:
> >  * No change
> > v9->v10:
> >  * Added Rb tag from Laurent
> >  * Updated the commit description.
> >  * Updated description of the port by dropping the text "specified in
> >Documentation/devicetree/bindings/graph.txt."
> >  * Dropped empty endpoint from example.
> > v8->v9:
> >  * No change
> > v7->v8:
> >  * No change
> > v6->v7:
> >  * No change
> > v5->v6:
> >  * No change.
> > v4->v5:
> >  * Added Rb tag from Rob.
> > v3->v4:
> >  * Changed compatible name from
> > renesas,du-r9a07g044->renesas,r9a07g044-du
> >  * started using same compatible for RZ/G2{L,LC}
> > v3: New patch
> > ---
> >  .../bindings/display/renesas,rzg2l-du.yaml| 121 ++
> >  1 file changed, 121 insertions(+)
> >  create mode 100644
> > Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml
> >
> 
> My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
> on your patch (DT_CHECKER_FLAGS is new in v5.13):
> 
> yamllint warnings/errors:
> ./Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml:64:11:
> [error] string value is redundantly quoted with any quotes (quoted-strings)
> 
> dtschema/dtc warnings/errors:
> 
> doc reference errors (make refcheckdocs):
> 
> See
> 
> The base for the series is generally the latest rc1. A different dependency
> should be noted in *this* patch.
> 
> If you already ran 'make dt_binding_check' and didn't see the above
> error(s), then make sure 'yamllint' is installed and dt-schema is up to
> date:
> 
> pip3 install dtschema --upgrade
> 
> Please check and re-submit after running the above command yourself. Note
> that DT_SCHEMA_FILES can be set to your schema file to speed up checking
> your schema. However, it must be unset to test all examples with your
> schema.

I will send V12 dropping quotes 
"/schemas/types.yaml#/definitions/phandle-array" after
the driver review.

Cheers,
Biju



Re: [PATCH v11 1/4] dt-bindings: display: Document Renesas RZ/G2L DU bindings

2023-10-02 Thread Rob Herring


On Mon, 02 Oct 2023 13:27:37 +0100, Biju Das wrote:
> The RZ/G2L LCD controller is composed of Frame Compression Processor
> (FCPVD), Video Signal Processor (VSPD), and Display Unit (DU).
> 
> The DU module supports the following hardware features
> − Display Parallel Interface (DPI) and MIPI LINK Video Interface
> − Display timing master
> − Generates video timings
> − Selecting the polarity of output DCLK, HSYNC, VSYNC, and DE
> − Supports Progressive
> − Input data format (from VSPD): RGB888, RGB666
> − Output data format: same as Input data format
> − Supporting Full HD (1920 pixels x 1080 lines) for MIPI-DSI Output
> − Supporting WXGA (1280 pixels x 800 lines) for Parallel Output
> 
> This patch documents the DU module found on RZ/G2L LCDC.
> 
> Signed-off-by: Biju Das 
> Reviewed-by: Rob Herring 
> Reviewed-by: Laurent Pinchart 
> ---
> v10->v1:
>  * No change
> v9->v10:
>  * Added Rb tag from Laurent
>  * Updated the commit description.
>  * Updated description of the port by dropping the text "specified in
>Documentation/devicetree/bindings/graph.txt."
>  * Dropped empty endpoint from example.
> v8->v9:
>  * No change
> v7->v8:
>  * No change
> v6->v7:
>  * No change
> v5->v6:
>  * No change.
> v4->v5:
>  * Added Rb tag from Rob.
> v3->v4:
>  * Changed compatible name from renesas,du-r9a07g044->renesas,r9a07g044-du
>  * started using same compatible for RZ/G2{L,LC}
> v3: New patch
> ---
>  .../bindings/display/renesas,rzg2l-du.yaml| 121 ++
>  1 file changed, 121 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml
> 

My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):

yamllint warnings/errors:
./Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml:64:11: 
[error] string value is redundantly quoted with any quotes (quoted-strings)

dtschema/dtc warnings/errors:

doc reference errors (make refcheckdocs):

See 
https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20231002122740.220177-2-biju.das...@bp.renesas.com

The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.



[PATCH v11 1/4] dt-bindings: display: Document Renesas RZ/G2L DU bindings

2023-10-02 Thread Biju Das
The RZ/G2L LCD controller is composed of Frame Compression Processor
(FCPVD), Video Signal Processor (VSPD), and Display Unit (DU).

The DU module supports the following hardware features
− Display Parallel Interface (DPI) and MIPI LINK Video Interface
− Display timing master
− Generates video timings
− Selecting the polarity of output DCLK, HSYNC, VSYNC, and DE
− Supports Progressive
− Input data format (from VSPD): RGB888, RGB666
− Output data format: same as Input data format
− Supporting Full HD (1920 pixels x 1080 lines) for MIPI-DSI Output
− Supporting WXGA (1280 pixels x 800 lines) for Parallel Output

This patch documents the DU module found on RZ/G2L LCDC.

Signed-off-by: Biju Das 
Reviewed-by: Rob Herring 
Reviewed-by: Laurent Pinchart 
---
v10->v1:
 * No change
v9->v10:
 * Added Rb tag from Laurent
 * Updated the commit description.
 * Updated description of the port by dropping the text "specified in
   Documentation/devicetree/bindings/graph.txt."
 * Dropped empty endpoint from example.
v8->v9:
 * No change
v7->v8:
 * No change
v6->v7:
 * No change
v5->v6:
 * No change.
v4->v5:
 * Added Rb tag from Rob.
v3->v4:
 * Changed compatible name from renesas,du-r9a07g044->renesas,r9a07g044-du
 * started using same compatible for RZ/G2{L,LC}
v3: New patch
---
 .../bindings/display/renesas,rzg2l-du.yaml| 121 ++
 1 file changed, 121 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml

diff --git a/Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml 
b/Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml
new file mode 100644
index ..9ffe5be04c23
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml
@@ -0,0 +1,121 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/renesas,rzg2l-du.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Renesas RZ/G2L Display Unit (DU)
+
+maintainers:
+  - Biju Das 
+  - Laurent Pinchart 
+
+description: |
+  These DT bindings describe the Display Unit embedded in the Renesas RZ/G2L
+  and RZ/V2L SoCs.
+
+properties:
+  compatible:
+enum:
+  - renesas,r9a07g044-du # RZ/G2{L,LC}
+
+  reg:
+maxItems: 1
+
+  interrupts:
+maxItems: 1
+
+  clocks:
+items:
+  - description: Main clock
+  - description: Register access clock
+  - description: Video clock
+
+  clock-names:
+items:
+  - const: aclk
+  - const: pclk
+  - const: vclk
+
+  resets:
+maxItems: 1
+
+  power-domains:
+maxItems: 1
+
+  ports:
+$ref: /schemas/graph.yaml#/properties/ports
+description: |
+  The connections to the DU output video ports are modeled using the OF
+  graph bindings. The number of ports and their assignment are
+  model-dependent. Each port shall have a single endpoint.
+
+patternProperties:
+  "^port@[0-1]$":
+$ref: /schemas/graph.yaml#/properties/port
+unevaluatedProperties: false
+
+required:
+  - port@0
+
+unevaluatedProperties: false
+
+  renesas,vsps:
+$ref: "/schemas/types.yaml#/definitions/phandle-array"
+items:
+  items:
+- description: phandle to VSP instance that serves the DU channel
+- description: Channel index identifying the LIF instance in that VSP
+description:
+  A list of phandle and channel index tuples to the VSPs that handle the
+  memory interfaces for the DU channels.
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - clocks
+  - clock-names
+  - resets
+  - power-domains
+  - ports
+  - renesas,vsps
+
+additionalProperties: false
+
+examples:
+  # RZ/G2L DU
+  - |
+#include 
+#include 
+
+display@1089 {
+compatible = "renesas,r9a07g044-du";
+reg = <0x1089 0x1>;
+interrupts = ;
+clocks = <&cpg CPG_MOD R9A07G044_LCDC_CLK_A>,
+ <&cpg CPG_MOD R9A07G044_LCDC_CLK_P>,
+ <&cpg CPG_MOD R9A07G044_LCDC_CLK_D>;
+clock-names = "aclk", "pclk", "vclk";
+resets = <&cpg R9A07G044_LCDC_RESET_N>;
+power-domains = <&cpg>;
+
+renesas,vsps = <&vspd0 0>;
+
+ports {
+#address-cells = <1>;
+#size-cells = <0>;
+
+port@0 {
+reg = <0>;
+endpoint {
+remote-endpoint = <&dsi0_in>;
+};
+};
+port@1 {
+reg = <1>;
+};
+};
+};
+
+...
-- 
2.25.1