Currently, hdisplay is being divided by 3 for DSC. However, this
calculation only works for cases where BPP = 8.
Update hdisplay calculation to be bytes_per_line / 3, so that it
accounts for cases where BPP != 8.
Reviewed-by: Dmitry Baryshkov <dmitry.barysh...@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suij...@somainline.org>
Signed-off-by: Jessica Zhang <quic_jessz...@quicinc.com>
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c
b/drivers/gpu/drm/msm/dsi/dsi_host.c
index 5526a51b3d97..9223d7ec5a73 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_host.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
@@ -952,7 +952,7 @@ static void dsi_timing_setup(struct msm_dsi_host *msm_host,
bool is_bonded_dsi)
* pulse width same
*/
h_total -= hdisplay;
- hdisplay /= 3;
+ hdisplay = msm_dsc_get_bytes_per_line(msm_host->dsc) / 3;
h_total += hdisplay;
ha_end = ha_start + hdisplay;
}
--
2.40.1
