Re: [PATCH v2 01/12] dt-bindings: display: msm: Add qcom,sm8350-dpu binding
On Tue, 15 Nov 2022 14:30:54 +0100, Robert Foss wrote: > Mobile Display Subsystem (MDSS) encapsulates sub-blocks > like DPU display controller, DSI etc. Add YAML schema for DPU device > tree bindings > > Signed-off-by: Robert Foss > --- > .../bindings/display/msm/qcom,sm8350-dpu.yaml | 120 ++ > 1 file changed, 120 insertions(+) > create mode 100644 > Documentation/devicetree/bindings/display/msm/qcom,sm8350-dpu.yaml > Reviewed-by: Rob Herring
Re: [PATCH v2 01/12] dt-bindings: display: msm: Add qcom,sm8350-dpu binding
On Tue, Nov 15, 2022 at 12:17:10PM +0100, Robert Foss wrote: > Mobile Display Subsystem (MDSS) encapsulates sub-blocks > like DPU display controller, DSI etc. Add YAML schema for DPU device > tree bindings > > Signed-off-by: Robert Foss > --- > .../bindings/display/msm/qcom,sm8350-dpu.yaml | 120 ++ > 1 file changed, 120 insertions(+) > create mode 100644 > Documentation/devicetree/bindings/display/msm/qcom,sm8350-dpu.yaml Reviewed-by: Rob Herring But since there is a dependency, no idea if this passes validation.
Re: [PATCH v2 01/12] dt-bindings: display: msm: Add qcom, sm8350-dpu binding
On Tue, 15 Nov 2022 12:17:10 +0100, Robert Foss wrote:
> Mobile Display Subsystem (MDSS) encapsulates sub-blocks
> like DPU display controller, DSI etc. Add YAML schema for DPU device
> tree bindings
>
> Signed-off-by: Robert Foss
> ---
> .../bindings/display/msm/qcom,sm8350-dpu.yaml | 120 ++
> 1 file changed, 120 insertions(+)
> create mode 100644
> Documentation/devicetree/bindings/display/msm/qcom,sm8350-dpu.yaml
>
My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):
yamllint warnings/errors:
dtschema/dtc warnings/errors:
./Documentation/devicetree/bindings/display/msm/qcom,sm8350-dpu.yaml: Unable to
find schema file matching $id:
http://devicetree.org/schemas/display/msm/dpu-common.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/display/msm/qcom,sm8350-dpu.example.dtb:
display-controller@ae01000: False schema does not allow {'compatible':
['qcom,sm8350-dpu'], 'reg': [[182456320, 585728], [183173120, 8200]],
'reg-names': ['mdp', 'vbif'], 'clocks': [[4294967295, 27], [4294967295, 28],
[4294967295, 0], [4294967295, 34], [4294967295, 32], [4294967295, 44]],
'clock-names': ['bus', 'nrt_bus', 'iface', 'lut', 'core', 'vsync'],
'assigned-clocks': [[4294967295, 44]], 'assigned-clock-rates': [[1920]],
'operating-points-v2': [[1]], 'power-domains': [[4294967295, 6]], 'interrupts':
[[0]], 'ports': {'#address-cells': [[1]], '#size-cells': [[0]], 'port@0':
{'reg': [[0]], 'endpoint': {'remote-endpoint': [[4294967295]]}}}, 'opp-table':
{'compatible': ['operating-points-v2'], 'phandle': [[1]], 'opp-2':
{'opp-hz': [[0], [2]], 'required-opps': [[4294967295]]},
'opp-3': {'opp-hz': [[0], [3]], 'required-opps': [[4294967295
]]}, 'opp-34500': {'opp-hz': [[0], [34500]], 'required-opps':
[[4294967295]]}, 'opp-46000': {'opp-hz': [[0], [46000]],
'required-opps': [[4294967295]]}}, '$nodename': ['display-controller@ae01000']}
From schema:
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/display/msm/qcom,sm8350-dpu.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/display/msm/qcom,sm8350-dpu.example.dtb:
display-controller@ae01000: Unevaluated properties are not allowed
('interrupts', 'operating-points-v2', 'opp-table', 'ports', 'power-domains'
were unexpected)
From schema:
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/display/msm/qcom,sm8350-dpu.yaml
doc reference errors (make refcheckdocs):
See https://patchwork.ozlabs.org/patch/
This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit.
[PATCH v2 01/12] dt-bindings: display: msm: Add qcom, sm8350-dpu binding
Mobile Display Subsystem (MDSS) encapsulates sub-blocks
like DPU display controller, DSI etc. Add YAML schema for DPU device
tree bindings
Signed-off-by: Robert Foss
---
.../bindings/display/msm/qcom,sm8350-dpu.yaml | 120 ++
1 file changed, 120 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/msm/qcom,sm8350-dpu.yaml
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8350-dpu.yaml
b/Documentation/devicetree/bindings/display/msm/qcom,sm8350-dpu.yaml
new file mode 100644
index ..120500395c9a
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8350-dpu.yaml
@@ -0,0 +1,120 @@
+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/msm/qcom,sm8350-dpu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm SM8350 Display DPU
+
+maintainers:
+ - Robert Foss
+
+$ref: /schemas/display/msm/dpu-common.yaml#
+
+properties:
+ compatible:
+const: qcom,sm8350-dpu
+
+ reg:
+items:
+ - description: Address offset and size for mdp register set
+ - description: Address offset and size for vbif register set
+
+ reg-names:
+items:
+ - const: mdp
+ - const: vbif
+
+ clocks:
+items:
+ - description: Display hf axi clock
+ - description: Display sf axi clock
+ - description: Display ahb clock
+ - description: Display lut clock
+ - description: Display core clock
+ - description: Display vsync clock
+
+ clock-names:
+items:
+ - const: bus
+ - const: nrt_bus
+ - const: iface
+ - const: lut
+ - const: core
+ - const: vsync
+
+unevaluatedProperties: false
+
+examples:
+ - |
+#include
+#include
+#include
+#include
+#include
+
+display-controller@ae01000 {
+compatible = "qcom,sm8350-dpu";
+reg = <0x0ae01000 0x8f000>,
+ <0x0aeb 0x2008>;
+reg-names = "mdp", "vbif";
+
+clocks = < GCC_DISP_HF_AXI_CLK>,
+ < GCC_DISP_SF_AXI_CLK>,
+ < DISP_CC_MDSS_AHB_CLK>,
+ < DISP_CC_MDSS_MDP_LUT_CLK>,
+ < DISP_CC_MDSS_MDP_CLK>,
+ < DISP_CC_MDSS_VSYNC_CLK>;
+clock-names = "bus",
+ "nrt_bus",
+ "iface",
+ "lut",
+ "core",
+ "vsync";
+
+assigned-clocks = < DISP_CC_MDSS_VSYNC_CLK>;
+assigned-clock-rates = <1920>;
+
+operating-points-v2 = <_opp_table>;
+power-domains = < SM8350_MMCX>;
+
+interrupt-parent = <>;
+interrupts = <0>;
+
+ports {
+#address-cells = <1>;
+#size-cells = <0>;
+
+port@0 {
+reg = <0>;
+dpu_intf1_out: endpoint {
+remote-endpoint = <_in>;
+};
+};
+};
+
+mdp_opp_table: opp-table {
+compatible = "operating-points-v2";
+
+opp-2 {
+opp-hz = /bits/ 64 <2>;
+required-opps = <_opp_low_svs>;
+};
+
+opp-3 {
+opp-hz = /bits/ 64 <3>;
+required-opps = <_opp_svs>;
+};
+
+opp-34500 {
+opp-hz = /bits/ 64 <34500>;
+required-opps = <_opp_svs_l1>;
+};
+
+opp-46000 {
+opp-hz = /bits/ 64 <46000>;
+required-opps = <_opp_nom>;
+};
+};
+};
+...
--
2.34.1
[PATCH v2 01/12] dt-bindings: display: msm: Add qcom, sm8350-dpu binding
Mobile Display Subsystem (MDSS) encapsulates sub-blocks
like DPU display controller, DSI etc. Add YAML schema for DPU device
tree bindings
Signed-off-by: Robert Foss
---
.../bindings/display/msm/qcom,sm8350-dpu.yaml | 120 ++
1 file changed, 120 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/msm/qcom,sm8350-dpu.yaml
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8350-dpu.yaml
b/Documentation/devicetree/bindings/display/msm/qcom,sm8350-dpu.yaml
new file mode 100644
index ..120500395c9a
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8350-dpu.yaml
@@ -0,0 +1,120 @@
+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/msm/qcom,sm8350-dpu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm SM8350 Display DPU
+
+maintainers:
+ - Robert Foss
+
+$ref: /schemas/display/msm/dpu-common.yaml#
+
+properties:
+ compatible:
+const: qcom,sm8350-dpu
+
+ reg:
+items:
+ - description: Address offset and size for mdp register set
+ - description: Address offset and size for vbif register set
+
+ reg-names:
+items:
+ - const: mdp
+ - const: vbif
+
+ clocks:
+items:
+ - description: Display hf axi clock
+ - description: Display sf axi clock
+ - description: Display ahb clock
+ - description: Display lut clock
+ - description: Display core clock
+ - description: Display vsync clock
+
+ clock-names:
+items:
+ - const: bus
+ - const: nrt_bus
+ - const: iface
+ - const: lut
+ - const: core
+ - const: vsync
+
+unevaluatedProperties: false
+
+examples:
+ - |
+#include
+#include
+#include
+#include
+#include
+
+display-controller@ae01000 {
+compatible = "qcom,sm8350-dpu";
+reg = <0x0ae01000 0x8f000>,
+ <0x0aeb 0x2008>;
+reg-names = "mdp", "vbif";
+
+clocks = < GCC_DISP_HF_AXI_CLK>,
+ < GCC_DISP_SF_AXI_CLK>,
+ < DISP_CC_MDSS_AHB_CLK>,
+ < DISP_CC_MDSS_MDP_LUT_CLK>,
+ < DISP_CC_MDSS_MDP_CLK>,
+ < DISP_CC_MDSS_VSYNC_CLK>;
+clock-names = "bus",
+ "nrt_bus",
+ "iface",
+ "lut",
+ "core",
+ "vsync";
+
+assigned-clocks = < DISP_CC_MDSS_VSYNC_CLK>;
+assigned-clock-rates = <1920>;
+
+operating-points-v2 = <_opp_table>;
+power-domains = < SM8350_MMCX>;
+
+interrupt-parent = <>;
+interrupts = <0>;
+
+ports {
+#address-cells = <1>;
+#size-cells = <0>;
+
+port@0 {
+reg = <0>;
+dpu_intf1_out: endpoint {
+remote-endpoint = <_in>;
+};
+};
+};
+
+mdp_opp_table: opp-table {
+compatible = "operating-points-v2";
+
+opp-2 {
+opp-hz = /bits/ 64 <2>;
+required-opps = <_opp_low_svs>;
+};
+
+opp-3 {
+opp-hz = /bits/ 64 <3>;
+required-opps = <_opp_svs>;
+};
+
+opp-34500 {
+opp-hz = /bits/ 64 <34500>;
+required-opps = <_opp_svs_l1>;
+};
+
+opp-46000 {
+opp-hz = /bits/ 64 <46000>;
+required-opps = <_opp_nom>;
+};
+};
+};
+...
--
2.34.1
