[PATCH v2 04/10] drm/hisilicon: Add crtc funcs for ADE
On 28 November 2015 at 23:56, Emil Velikov wrote:
âHi Emil, thank you for review.â
use_maskOn 28 November 2015 at 10:38, Xinliang Liu
> wrote:
> > Add crtc funcs and helper funcs for ADE.
> >
> > Signed-off-by: Xinliang Liu
> > Signed-off-by: Xinwei Kong
> > Signed-off-by: Andy Green
> > ---
>
> > --- /dev/null
> > +++ b/drivers/gpu/drm/hisilicon/hisi_ade_reg.h
>
> > +#define ADE_CTRL (0x4)
> > +#define ADE_CTRL1 (0x8C)
> > +#define ADE_ROT_SRC_CFG(0x10)
> > +#define ADE_DISP_SRC_CFG (0x18)
> > +#define ADE_WDMA2_SRC_CFG (0x1C)
> > +#define ADE_SEC_OVLY_SRC_CFG (0x20)
> > +#define ADE_WDMA3_SRC_CFG (0x24)
> > +#define ADE_OVLY1_TRANS_CFG(0x2C)
> > +#define ADE_EN (0x100)
> > +#define INTR_MASK_CPU_0(0xC10)
> > +#define INTR_MASK_CPU_1(0xC14)
> > +#define ADE_FRM_DISGARD_CTRL (0xA4)
> > +/* reset and reload regs */
> > +#define ADE_SOFT_RST_SEL0 (0x78)
> > +#define ADE_SOFT_RST_SEL1 (0x7C)
> > +#define ADE_RELOAD_DIS0(0xAC)
> > +#define ADE_RELOAD_DIS1(0xB0)
> > +#define ADE_CH_RDMA_BIT_OFST (0)
> > +#define ADE_CLIP_BIT_OFST (15)
> > +#define ADE_SCL_BIT_OFST (21)
> > +#define ADE_CTRAN_BIT_OFST (24)
> > +#define ADE_OVLY_BIT_OFST (37) /* 32+5 */
> Don't think we have any cases in drm where constants are wrapped in
> brackets. Is there any benefit of doing that here ?
>
Seems no any benefitâ, will remove these brackets in v3.
>
> > +/* channel regs */
> > +#define RD_CH_PE(x)(0x1000 + (x) * 0x80)
> ... and I'm not talking about cases where the macros such as this one.
> > +union U_LDI_CTRL {
> > +struct {
> > + unsigned intldi_en:1;
> > + unsigned intdisp_mode_buf :1;
> > + unsigned intdate_gate_en :1;
> > + unsigned intbpp :2;
> > + unsigned intwait_vsync_en :1;
> > + unsigned intcorlorbar_width :7;
> > + unsigned intbgr :1;
> > + unsigned intcolor_mode:1;
> > + unsigned intshutdown :1;
> > + unsigned intvactive_line :12;
> > + unsigned intldi_en_self_clr :1;
> > + unsigned intreserved_573 :3;
> > + } bits;
> > + unsigned intu32;
> > +};
> > +
> > +union U_LDI_WORK_MODE {
> > +struct {
> > + unsigned intwork_mode :1;
> > + unsigned intwback_en :1;
> > + unsigned intcolorbar_en :1;
> > + unsigned intreserved_577 :29;
> > + } bits;
> > + unsigned intu32;
> > +};
> > +
> The struct in the above two unions is missing a level of indentation.
>
âyes, will be fixed in v3.â
>
>
> > --- /dev/null
> > +++ b/drivers/gpu/drm/hisilicon/hisi_drm_ade.c
>
> > +static void ade_ldi_set_mode(struct ade_crtc *acrtc,
> > +struct drm_display_mode *mode,
> > +struct drm_display_mode *adj_mode)
> > +{
> > + struct ade_hw_ctx *ctx = acrtc->ctx;
> > + void __iomem *base = ctx->base;
> > + u32 out_w = mode->hdisplay;
> > + u32 out_h = mode->vdisplay;
> > + u32 hfp, hbp, hsw, vfp, vbp, vsw;
> > + u32 plr_flags;
> > + int ret;
> > +
> > + plr_flags = (mode->flags & DRM_MODE_FLAG_NVSYNC)
> > + ? HISI_LDI_FLAG_NVSYNC : 0;
> > + plr_flags |= (mode->flags & DRM_MODE_FLAG_NHSYNC)
> > + ? HISI_LDI_FLAG_NHSYNC : 0;
> > + hfp = mode->hsync_start - mode->hdisplay;
> > + hbp = mode->htotal - mode->hsync_end;
> > + hsw = mode->hsync_end - mode->hsync_start;
> > + vfp = mode->vsync_start - mode->vdisplay;
> > + vbp = mode->vtotal - mode->vsync_end;
> > + vsw = mode->vsync_end - mode->vsync_start;
> > + if (vsw > 15) {
> > + DRM_INFO("vsw exceeded 15\n");
>
> DRM_ERROR or DRM_DEBUG_xx perhaps ?
>
This is not an error hardware still can handle if vsw exceed 15.
You are right maybe â
â
DRM_DEBUG_DRIVER is better.
â
>
> > + vsw = 15;
> > + }
> > +
> > + writel((hbp << 20) | (hfp << 0), base + LDI_HRZ_CTRL0);
> > + /* p3-73 6220V100 pdf:
> > +* "The configured value is the actual width - 1"
> > +*/
> > + writel(hsw - 1, base + LDI_HRZ_CTRL1);
> > + writel((vbp << 20) | (vfp << 0), base + LDI_VRT_CTRL0);
> > + /* p3-74 6220V100 pdf:
> > +* "The configured value is the actual width - 1"
> > +*/
> > + writel(vsw - 1, base + LDI_VRT_CTRL1);
> > +
> > + /* p3-75 6220V100 pdf:
> > +* "The
[PATCH v2 04/10] drm/hisilicon: Add crtc funcs for ADE
Add crtc funcs and helper funcs for ADE. Signed-off-by: Xinliang Liu Signed-off-by: Xinwei Kong Signed-off-by: Andy Green --- drivers/gpu/drm/hisilicon/Makefile | 3 +- drivers/gpu/drm/hisilicon/hisi_ade_reg.h | 490 + drivers/gpu/drm/hisilicon/hisi_drm_ade.c | 511 +++ drivers/gpu/drm/hisilicon/hisi_drm_drv.c | 15 + drivers/gpu/drm/hisilicon/hisi_drm_drv.h | 16 + 5 files changed, 1034 insertions(+), 1 deletion(-) create mode 100644 drivers/gpu/drm/hisilicon/hisi_ade_reg.h create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_ade.c create mode 100644 drivers/gpu/drm/hisilicon/hisi_drm_drv.h diff --git a/drivers/gpu/drm/hisilicon/Makefile b/drivers/gpu/drm/hisilicon/Makefile index 7375456..3433c8b 100644 --- a/drivers/gpu/drm/hisilicon/Makefile +++ b/drivers/gpu/drm/hisilicon/Makefile @@ -1,3 +1,4 @@ -hisi-drm-y := hisi_drm_drv.o +hisi-drm-y := hisi_drm_drv.o \ + hisi_drm_ade.o obj-$(CONFIG_DRM_HISI) += hisi-drm.o diff --git a/drivers/gpu/drm/hisilicon/hisi_ade_reg.h b/drivers/gpu/drm/hisilicon/hisi_ade_reg.h new file mode 100644 index 000..6a7bc46 --- /dev/null +++ b/drivers/gpu/drm/hisilicon/hisi_ade_reg.h @@ -0,0 +1,490 @@ +/* + * Copyright (c) 2014-2015 Hisilicon Limited. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#ifndef __HISI_ADE_REG_H__ +#define __HISI_ADE_REG_H__ + +/* + * ADE Registers Offset + */ +#define ADE_CTRL (0x4) +#define ADE_CTRL1 (0x8C) +#define ADE_ROT_SRC_CFG(0x10) +#define ADE_DISP_SRC_CFG (0x18) +#define ADE_WDMA2_SRC_CFG (0x1C) +#define ADE_SEC_OVLY_SRC_CFG (0x20) +#define ADE_WDMA3_SRC_CFG (0x24) +#define ADE_OVLY1_TRANS_CFG(0x2C) +#define ADE_EN (0x100) +#define INTR_MASK_CPU_0(0xC10) +#define INTR_MASK_CPU_1(0xC14) +#define ADE_FRM_DISGARD_CTRL (0xA4) +/* reset and reload regs */ +#define ADE_SOFT_RST_SEL0 (0x78) +#define ADE_SOFT_RST_SEL1 (0x7C) +#define ADE_RELOAD_DIS0(0xAC) +#define ADE_RELOAD_DIS1(0xB0) +#define ADE_CH_RDMA_BIT_OFST (0) +#define ADE_CLIP_BIT_OFST (15) +#define ADE_SCL_BIT_OFST (21) +#define ADE_CTRAN_BIT_OFST (24) +#define ADE_OVLY_BIT_OFST (37) /* 32+5 */ +/* channel regs */ +#define RD_CH_PE(x)(0x1000 + (x) * 0x80) +#define RD_CH_CTRL(x) (0x1004 + (x) * 0x80) +#define RD_CH_ADDR(x) (0x1008 + (x) * 0x80) +#define RD_CH_SIZE(x) (0x100C + (x) * 0x80) +#define RD_CH_STRIDE(x)(0x1010 + (x) * 0x80) +#define RD_CH_SPACE(x) (0x1014 + (x) * 0x80) +#define RD_CH_PARTIAL_SIZE(x) (0x1018 + (x) * 0x80) +#define RD_CH_PARTIAL_SPACE(x) (0x101C + (x) * 0x80) +#define RD_CH_EN(x)(0x1020 + (x) * 0x80) +#define RD_CH_STATUS(x)(0x1024 + (x) * 0x80) +#define RD_CH_DISP_CTRL(0x1404) +#define RD_CH_DISP_ADDR(0x1408) +#define RD_CH_DISP_SIZE(0x140C) +#define RD_CH_DISP_STRIDE (0x1410) +#define RD_CH_DISP_SPACE (0x1414) +#define RD_CH_DISP_EN (0x142C) +/* clip regs */ +#define ADE_CLIP_DISABLE(x)(0x6800 + (x) * 0x100) +#define ADE_CLIP_SIZE0(x) (0x6804 + (x) * 0x100) +#define ADE_CLIP_SIZE1(x) (0x6808 + (x) * 0x100) +#define ADE_CLIP_SIZE2(x) (0x680C + (x) * 0x100) +#define ADE_CLIP_CFG_OK(x) (0x6810 + (x) * 0x100) +/* scale regs */ +#define ADE_SCL1_MUX_CFG (0xC) +#define ADE_SCL2_SRC_CFG (0x14) +#define ADE_SCL3_MUX_CFG (0x8) +#define ADE_SCL_CTRL(x)(0x3000 + (x) * 0x800) +#define ADE_SCL_HSP(x) (0x3004 + (x) * 0x800) +#define ADE_SCL_UV_HSP(x) (0x3008 + (x) * 0x800) +#define ADE_SCL_VSP(x) (0x300C + (x) * 0x800) +#define ADE_SCL_UV_VSP(x) (0x3010 + (x) * 0x800) +#define ADE_SCL_ORES(x)(0x3014 + (x) * 0x800) +#define ADE_SCL_IRES(x)(0x3018 + (x) * 0x800) +#define ADE_SCL_START(x) (0x301C + (x) * 0x800) +#define ADE_SCL_ERR(x) (0x3020 + (x) * 0x800) +#define ADE_SCL_PIX_OFST(x)(0x3024 + (x) * 0x800) +#define ADE_SCL_UV_PIX_OFST(x) (0x3028 + (x) * 0x800) +#define ADE_SCL_COEF_CLR(x)(0x3030 + (x) * 0x800) +#define ADE_SCL_HCOEF(x, m, n) (0x3100 + (x) * 0x800 + \ + 12
[PATCH v2 04/10] drm/hisilicon: Add crtc funcs for ADE
use_maskOn 28 November 2015 at 10:38, Xinliang Liu
wrote:
> Add crtc funcs and helper funcs for ADE.
>
> Signed-off-by: Xinliang Liu
> Signed-off-by: Xinwei Kong
> Signed-off-by: Andy Green
> ---
> --- /dev/null
> +++ b/drivers/gpu/drm/hisilicon/hisi_ade_reg.h
> +#define ADE_CTRL (0x4)
> +#define ADE_CTRL1 (0x8C)
> +#define ADE_ROT_SRC_CFG(0x10)
> +#define ADE_DISP_SRC_CFG (0x18)
> +#define ADE_WDMA2_SRC_CFG (0x1C)
> +#define ADE_SEC_OVLY_SRC_CFG (0x20)
> +#define ADE_WDMA3_SRC_CFG (0x24)
> +#define ADE_OVLY1_TRANS_CFG(0x2C)
> +#define ADE_EN (0x100)
> +#define INTR_MASK_CPU_0(0xC10)
> +#define INTR_MASK_CPU_1(0xC14)
> +#define ADE_FRM_DISGARD_CTRL (0xA4)
> +/* reset and reload regs */
> +#define ADE_SOFT_RST_SEL0 (0x78)
> +#define ADE_SOFT_RST_SEL1 (0x7C)
> +#define ADE_RELOAD_DIS0(0xAC)
> +#define ADE_RELOAD_DIS1(0xB0)
> +#define ADE_CH_RDMA_BIT_OFST (0)
> +#define ADE_CLIP_BIT_OFST (15)
> +#define ADE_SCL_BIT_OFST (21)
> +#define ADE_CTRAN_BIT_OFST (24)
> +#define ADE_OVLY_BIT_OFST (37) /* 32+5 */
Don't think we have any cases in drm where constants are wrapped in
brackets. Is there any benefit of doing that here ?
> +/* channel regs */
> +#define RD_CH_PE(x)(0x1000 + (x) * 0x80)
... and I'm not talking about cases where the macros such as this one.
> +union U_LDI_CTRL {
> +struct {
> + unsigned intldi_en:1;
> + unsigned intdisp_mode_buf :1;
> + unsigned intdate_gate_en :1;
> + unsigned intbpp :2;
> + unsigned intwait_vsync_en :1;
> + unsigned intcorlorbar_width :7;
> + unsigned intbgr :1;
> + unsigned intcolor_mode:1;
> + unsigned intshutdown :1;
> + unsigned intvactive_line :12;
> + unsigned intldi_en_self_clr :1;
> + unsigned intreserved_573 :3;
> + } bits;
> + unsigned intu32;
> +};
> +
> +union U_LDI_WORK_MODE {
> +struct {
> + unsigned intwork_mode :1;
> + unsigned intwback_en :1;
> + unsigned intcolorbar_en :1;
> + unsigned intreserved_577 :29;
> + } bits;
> + unsigned intu32;
> +};
> +
The struct in the above two unions is missing a level of indentation.
> --- /dev/null
> +++ b/drivers/gpu/drm/hisilicon/hisi_drm_ade.c
> +static void ade_ldi_set_mode(struct ade_crtc *acrtc,
> +struct drm_display_mode *mode,
> +struct drm_display_mode *adj_mode)
> +{
> + struct ade_hw_ctx *ctx = acrtc->ctx;
> + void __iomem *base = ctx->base;
> + u32 out_w = mode->hdisplay;
> + u32 out_h = mode->vdisplay;
> + u32 hfp, hbp, hsw, vfp, vbp, vsw;
> + u32 plr_flags;
> + int ret;
> +
> + plr_flags = (mode->flags & DRM_MODE_FLAG_NVSYNC)
> + ? HISI_LDI_FLAG_NVSYNC : 0;
> + plr_flags |= (mode->flags & DRM_MODE_FLAG_NHSYNC)
> + ? HISI_LDI_FLAG_NHSYNC : 0;
> + hfp = mode->hsync_start - mode->hdisplay;
> + hbp = mode->htotal - mode->hsync_end;
> + hsw = mode->hsync_end - mode->hsync_start;
> + vfp = mode->vsync_start - mode->vdisplay;
> + vbp = mode->vtotal - mode->vsync_end;
> + vsw = mode->vsync_end - mode->vsync_start;
> + if (vsw > 15) {
> + DRM_INFO("vsw exceeded 15\n");
DRM_ERROR or DRM_DEBUG_xx perhaps ?
> + vsw = 15;
> + }
> +
> + writel((hbp << 20) | (hfp << 0), base + LDI_HRZ_CTRL0);
> + /* p3-73 6220V100 pdf:
> +* "The configured value is the actual width - 1"
> +*/
> + writel(hsw - 1, base + LDI_HRZ_CTRL1);
> + writel((vbp << 20) | (vfp << 0), base + LDI_VRT_CTRL0);
> + /* p3-74 6220V100 pdf:
> +* "The configured value is the actual width - 1"
> +*/
> + writel(vsw - 1, base + LDI_VRT_CTRL1);
> +
> + /* p3-75 6220V100 pdf:
> +* "The configured value is the actual width - 1"
> +*/
> + writel(((out_h - 1) << 20) | ((out_w - 1) << 0),
> + base + LDI_DSP_SIZE);
> + writel(plr_flags, base + LDI_PLR_CTRL);
> +
> + ret = clk_set_rate(ctx->ade_pix_clk, mode->clock * 1000);
> + /* Success should be guaranteed in aotomic_check
> +* failer shouldn't happen here
> +*/
> + if (ret)
> + DRM_ERROR("set ade_pixel_clk_rate fail\n");
DItto
> + adj_mode->clock = clk_get_rate(ctx->ade_pix_clk) / 1000;
> +
