Re: [PATCH v2 1/2] dt-bindings: samsung,mipi-dsim: Add 'lane-polarities'

2023-04-12 Thread Fabio Estevam

Hi Rob,

On 12/04/2023 11:43, Rob Herring wrote:


No, this should be video-interfaces.yaml since you use properties from
it.


Ok, will change it.




+unevaluatedProperties: false
+
+properties:
+  data-lanes:
+oneOf:
+  - minItems: 1
+maxItems: 4
+uniqueItems: true
+items:
+  enum: [ 1, 2, 3, 4 ]


The h/w really supports any combination of lanes to be used?


The MIPI DSIM IP supports the usage of 1, 2, 3, or 4 data lanes.

The following cases are possible:

data-lanes = <1>;
data-lanes = <1 2>;
data-lanes = <1 2 3>;
data-lanes = <1 2 3 4>;

Lane reordering is not supported.




+description:
+  See ../../media/video-interfaces.yaml for 
details.

+
+  lane-polarities:
+minItems: 1
+maxItems: 5
+items:
+  enum: [ 0, 1 ]
+description:
+  See ../../media/video-interfaces.yaml for details.
+  The Samsung MIPI DSI IP requires that all the data 
lanes have

+  the same polarity.


Sounds like a constraint:

oneOf:
  - items:
  const: 0
  - items:
  const: 1


Imagine a board that has 4 data lanes and only the clock lane is 
inverted.


The representation is (the first entry is the clock lane, followed by 
the 4 data lanes):


lane-polarities = <1 0 0 0 0>;

If the board has no inversion on the clock lane, and has the data lanes 
inverted:


lane-polarities = <0 1 1 1 1>;

Should I keep the data-lanes and lane-polarities description as in this 
patch?


Please advise.

Thanks,

Fabio Estevam


Re: [PATCH v2 1/2] dt-bindings: samsung,mipi-dsim: Add 'lane-polarities'

2023-04-12 Thread Rob Herring
On Thu, Apr 06, 2023 at 04:03:53PM -0300, Fabio Estevam wrote:
> From: Fabio Estevam 
> 
> The Samsung DSIM IP block allows the inversion of the clock and
> data lanes.
> 
> Add an optional property called 'lane-polarities' that describes the
> polarities of the MIPI DSI clock and data lanes.
> 
> This property is useful for properly describing the hardware when the
> board designer decided to switch the polarities of the MIPI DSI
> clock and/or data lanes.
> 
> Signed-off-by: Fabio Estevam 
> ---
> Changes since v1:
> - Rebased against drm-misc-next that has samsung,mipi-dsim.yaml.
> 
>  .../display/bridge/samsung,mipi-dsim.yaml | 29 +++
>  1 file changed, 29 insertions(+)
> 
> diff --git 
> a/Documentation/devicetree/bindings/display/bridge/samsung,mipi-dsim.yaml 
> b/Documentation/devicetree/bindings/display/bridge/samsung,mipi-dsim.yaml
> index e841659e20cd..04eb440ade72 100644
> --- a/Documentation/devicetree/bindings/display/bridge/samsung,mipi-dsim.yaml
> +++ b/Documentation/devicetree/bindings/display/bridge/samsung,mipi-dsim.yaml
> @@ -105,6 +105,35 @@ properties:
>DSI output port node to the panel or the next bridge
>in the chain.
>  
> +properties:
> +  endpoint:
> +$ref: /schemas/graph.yaml#/$defs/endpoint-base

No, this should be video-interfaces.yaml since you use properties from 
it.

> +unevaluatedProperties: false
> +
> +properties:
> +  data-lanes:
> +oneOf:
> +  - minItems: 1
> +maxItems: 4
> +uniqueItems: true
> +items:
> +  enum: [ 1, 2, 3, 4 ]

The h/w really supports any combination of lanes to be used?

> +description:
> +  See ../../media/video-interfaces.yaml for details.
> +
> +  lane-polarities:
> +minItems: 1
> +maxItems: 5
> +items:
> +  enum: [ 0, 1 ]
> +description:
> +  See ../../media/video-interfaces.yaml for details.
> +  The Samsung MIPI DSI IP requires that all the data lanes 
> have
> +  the same polarity.

Sounds like a constraint:

oneOf:
  - items:
  const: 0
  - items:
  const: 1

> +
> +dependencies:
> +  lane-polarities: [data-lanes]
> +
>  required:
>- clock-names
>- clocks
> -- 
> 2.34.1
> 


[PATCH v2 1/2] dt-bindings: samsung,mipi-dsim: Add 'lane-polarities'

2023-04-06 Thread Fabio Estevam
From: Fabio Estevam 

The Samsung DSIM IP block allows the inversion of the clock and
data lanes.

Add an optional property called 'lane-polarities' that describes the
polarities of the MIPI DSI clock and data lanes.

This property is useful for properly describing the hardware when the
board designer decided to switch the polarities of the MIPI DSI
clock and/or data lanes.

Signed-off-by: Fabio Estevam 
---
Changes since v1:
- Rebased against drm-misc-next that has samsung,mipi-dsim.yaml.

 .../display/bridge/samsung,mipi-dsim.yaml | 29 +++
 1 file changed, 29 insertions(+)

diff --git 
a/Documentation/devicetree/bindings/display/bridge/samsung,mipi-dsim.yaml 
b/Documentation/devicetree/bindings/display/bridge/samsung,mipi-dsim.yaml
index e841659e20cd..04eb440ade72 100644
--- a/Documentation/devicetree/bindings/display/bridge/samsung,mipi-dsim.yaml
+++ b/Documentation/devicetree/bindings/display/bridge/samsung,mipi-dsim.yaml
@@ -105,6 +105,35 @@ properties:
   DSI output port node to the panel or the next bridge
   in the chain.
 
+properties:
+  endpoint:
+$ref: /schemas/graph.yaml#/$defs/endpoint-base
+unevaluatedProperties: false
+
+properties:
+  data-lanes:
+oneOf:
+  - minItems: 1
+maxItems: 4
+uniqueItems: true
+items:
+  enum: [ 1, 2, 3, 4 ]
+description:
+  See ../../media/video-interfaces.yaml for details.
+
+  lane-polarities:
+minItems: 1
+maxItems: 5
+items:
+  enum: [ 0, 1 ]
+description:
+  See ../../media/video-interfaces.yaml for details.
+  The Samsung MIPI DSI IP requires that all the data lanes have
+  the same polarity.
+
+dependencies:
+  lane-polarities: [data-lanes]
+
 required:
   - clock-names
   - clocks
-- 
2.34.1