Convert phy-mtk-ufs.txt to YAML schema mediatek,ufs-phy.yaml
Signed-off-by: Chunfeng Yun
---
v2: fix binding check warning of reg in example
---
.../bindings/phy/mediatek,ufs-phy.yaml| 64 +++
.../devicetree/bindings/phy/phy-mtk-ufs.txt | 38 ---
2 files changed, 64 insertions(+), 38 deletions(-)
create mode 100644 Documentation/devicetree/bindings/phy/mediatek,ufs-phy.yaml
delete mode 100644 Documentation/devicetree/bindings/phy/phy-mtk-ufs.txt
diff --git a/Documentation/devicetree/bindings/phy/mediatek,ufs-phy.yaml
b/Documentation/devicetree/bindings/phy/mediatek,ufs-phy.yaml
new file mode 100644
index ..3a9be82e7f13
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/mediatek,ufs-phy.yaml
@@ -0,0 +1,64 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright (c) 2020 MediaTek
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/mediatek,ufs-phy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek Universal Flash Storage (UFS) M-PHY binding
+
+maintainers:
+ - Stanley Chu
+ - Chunfeng Yun
+
+description: |
+ UFS M-PHY nodes are defined to describe on-chip UFS M-PHY hardware macro.
+ Each UFS M-PHY node should have its own node.
+ To bind UFS M-PHY with UFS host controller, the controller node should
+ contain a phandle reference to UFS M-PHY node.
+
+properties:
+ $nodename:
+pattern: "^ufs-phy@[0-9a-f]+$"
+
+ compatible:
+const: mediatek,mt8183-ufsphy
+
+ reg:
+maxItems: 1
+
+ clocks:
+items:
+ - description: Unipro core control clock.
+ - description: M-PHY core control clock.
+
+ clock-names:
+items:
+ - const: unipro
+ - const: mp
+
+ "#phy-cells":
+const: 0
+
+required:
+ - compatible
+ - reg
+ - "#phy-cells"
+ - clocks
+ - clock-names
+
+additionalProperties: false
+
+examples:
+ - |
+#include
+ufsphy: ufs-phy@11fa {
+compatible = "mediatek,mt8183-ufsphy";
+reg = <0x11fa 0xc000>;
+clocks = < CLK_INFRA_UNIPRO_SCK>,
+ < CLK_INFRA_UFS_MP_SAP_BCLK>;
+clock-names = "unipro", "mp";
+#phy-cells = <0>;
+};
+
+...
diff --git a/Documentation/devicetree/bindings/phy/phy-mtk-ufs.txt
b/Documentation/devicetree/bindings/phy/phy-mtk-ufs.txt
deleted file mode 100644
index 5789029a1d42..
--- a/Documentation/devicetree/bindings/phy/phy-mtk-ufs.txt
+++ /dev/null
@@ -1,38 +0,0 @@
-MediaTek Universal Flash Storage (UFS) M-PHY binding
-
-
-UFS M-PHY nodes are defined to describe on-chip UFS M-PHY hardware macro.
-Each UFS M-PHY node should have its own node.
-
-To bind UFS M-PHY with UFS host controller, the controller node should
-contain a phandle reference to UFS M-PHY node.
-
-Required properties for UFS M-PHY nodes:
-- compatible : Compatible list, contains the following controller:
- "mediatek,mt8183-ufsphy" for ufs phy
- persent on MT81xx chipsets.
-- reg: Address and length of the UFS M-PHY register set.
-- #phy-cells : This property shall be set to 0.
-- clocks : List of phandle and clock specifier pairs.
-- clock-names: List of clock input name strings sorted in the same
- order as the clocks property. Following clocks are
- mandatory.
- "unipro": Unipro core control clock.
- "mp": M-PHY core control clock.
-
-Example:
-
- ufsphy: phy@11fa {
- compatible = "mediatek,mt8183-ufsphy";
- reg = <0 0x11fa 0 0xc000>;
- #phy-cells = <0>;
-
- clocks = <_ao INFRACFG_AO_UNIPRO_SCK_CG>,
-<_ao INFRACFG_AO_UFS_MP_SAP_BCLK_CG>;
- clock-names = "unipro", "mp";
- };
-
- ufshci@1127 {
- ...
- phys = <>;
- };
--
2.18.0
___
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
