Re: [PATCH v2 7/7] arm64: dts: exynos: configure TV path clocks for Ultra HD modes

2017-01-23 Thread Marek Szyprowski 

Hi Andrzej,

On 2017-01-23 08:56, Andrzej Hajda wrote:

Ultra HD modes requires clock ticking at increased rate.

Signed-off-by: Andrzej Hajda 
---
  arch/arm64/boot/dts/exynos/exynos5433.dtsi | 11 +++
  1 file changed, 11 insertions(+)

diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi 
b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index f120d99..4d28e93 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi


I think that exynos5433-tm2-common.dtsi is a better place for such 
definitions.

They can be also moved to _disp node to match convention for the clocks
configuration used on particular board.


@@ -764,6 +764,17 @@
clock-names = "pclk", "aclk_decon", "aclk_smmu_decon0x",
  "aclk_xiu_decon0x", "pclk_smmu_decon0x",
  "sclk_decon_vclk", "sclk_decon_eclk";
+   assigned-clocks =
+   <_mif CLK_MOUT_SCLK_DECON_TV_ECLK_A>,
+   <_mif CLK_DIV_SCLK_DECON_TV_ECLK>,
+   <_disp CLK_MOUT_SCLK_DECON_TV_ECLK_USER>,
+   <_disp CLK_MOUT_SCLK_DECON_TV_ECLK>;
+   assigned-clock-parents =
+   <_mif CLK_MOUT_BUS_PLL_DIV2>,
+   <0>,
+   <_mif CLK_SCLK_DECON_TV_ECLK_DISP>,
+   <_disp CLK_MOUT_SCLK_DECON_TV_ECLK_USER>;
+   assigned-clock-rates = <0>, <4>;
samsung,disp-sysreg = <_disp>;
interrupt-names = "fifo", "vsync", "lcd_sys";
interrupts = ,


Best regards
--
Marek Szyprowski, PhD
Samsung R Institute Poland

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[PATCH v2 7/7] arm64: dts: exynos: configure TV path clocks for Ultra HD modes

2017-01-22 Thread Andrzej Hajda 
Ultra HD modes requires clock ticking at increased rate.

Signed-off-by: Andrzej Hajda 
---
 arch/arm64/boot/dts/exynos/exynos5433.dtsi | 11 +++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi 
b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index f120d99..4d28e93 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
@@ -764,6 +764,17 @@
clock-names = "pclk", "aclk_decon", "aclk_smmu_decon0x",
  "aclk_xiu_decon0x", "pclk_smmu_decon0x",
  "sclk_decon_vclk", "sclk_decon_eclk";
+   assigned-clocks =
+   <_mif CLK_MOUT_SCLK_DECON_TV_ECLK_A>,
+   <_mif CLK_DIV_SCLK_DECON_TV_ECLK>,
+   <_disp CLK_MOUT_SCLK_DECON_TV_ECLK_USER>,
+   <_disp CLK_MOUT_SCLK_DECON_TV_ECLK>;
+   assigned-clock-parents =
+   <_mif CLK_MOUT_BUS_PLL_DIV2>,
+   <0>,
+   <_mif CLK_SCLK_DECON_TV_ECLK_DISP>,
+   <_disp CLK_MOUT_SCLK_DECON_TV_ECLK_USER>;
+   assigned-clock-rates = <0>, <4>;
samsung,disp-sysreg = <_disp>;
interrupt-names = "fifo", "vsync", "lcd_sys";
interrupts = ,
-- 
2.7.4

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