The clk of grf must be enabled before writing grf
register for rk3399.
Signed-off-by: Nickey Yang
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 6aa43fd..ab7629c 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1630,8 +1630,8 @@
reg = <0x0 0xff96 0x0 0x8000>;
interrupts = ;
clocks = < SCLK_DPHY_PLL>, < PCLK_MIPI_DSI0>,
-< SCLK_DPHY_TX0_CFG>;
- clock-names = "ref", "pclk", "phy_cfg";
+< SCLK_DPHY_TX0_CFG>, < PCLK_VIO_GRF>;
+ clock-names = "ref", "pclk", "phy_cfg", "grf";
power-domains = < RK3399_PD_VIO>;
rockchip,grf = <>;
status = "disabled";
--
1.9.1
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