Re: [PATCH v3 0/7] drm/meson: add support for Amlogic Video FBC
On 24/03/2020 15:20, Neil Armstrong wrote: > Amlogic uses a proprietary lossless image compression protocol and format > for their hardware video codec accelerators, either video decoders or > video input encoders. > > It considerably reduces memory bandwidth while writing and reading > frames in memory. > > The underlying storage is considered to be 3 components, 8bit or 10-bit > per component, YCbCr 420, single plane : > - DRM_FORMAT_YUV420_8BIT > - DRM_FORMAT_YUV420_10BIT > > This modifier will be notably added to DMA-BUF frames imported from the V4L2 > Amlogic VDEC decoder. > > At least two layout are supported : > - Basic: composed of a body and a header > - Scatter: the buffer is filled with a IOMMU scatter table referring > to the encoder current memory layout. This mode if more efficient in terms > of memory allocation but frames are not dumpable and only valid during until > the buffer is freed and back in control of the encoder > > At least two options are supported : > - Memory saving: when the pixel bpp is 8b, the size of the superblock can > be reduced, thus saving memory. > > This serie adds the missing register, updated the FBC decoder registers > content to be committed by the crtc code. > > The Amlogic FBC has been tested with compressed content from the Amlogic > HW VP9 decoder on S905X (GXL), S905D2 (G12A) and S905X3 (SM1) in 8bit > (Scatter+Mem Saving on G12A/SM1, Mem Saving on GXL) and 10bit > (Scatter on G12A/SM1, default on GXL). > > It's expected to work as-is on GXM and G12B SoCs. > > Changes since v2 at [2]: > - Added "BASIC" layout and moved the SCATTER mode as layout, making > BASIC and SCATTER layout exclusives > - Moved the Memory Saving at bit 8 for options fields > - Split fourcc and overlay patch to introduce basic, mem saving and then > scatter in separate patches > - Added comment about "transferability" of the buffers > > Changes since v1 at [1]: > - s/VD1_AXI_SEL_AFB/VD1_AXI_SEL_AFBC/ into meson_registers.h > > [1] https://patchwork.freedesktop.org/series/73722/#rev1 > [2] https://patchwork.freedesktop.org/series/73722/#rev2 > > Neil Armstrong (7): > drm/fourcc: Add modifier definitions for describing Amlogic Video > Framebuffer Compression > drm/meson: add Amlogic Video FBC registers > drm/meson: overlay: setup overlay for Amlogic FBC > drm/meson: crtc: handle commit of Amlogic FBC frames > drm/fourcc: amlogic: Add modifier definitions for Memory Saving option > drm/meson: overlay: setup overlay for Amlogic FBC Memory Saving mode > drm/meson: overlay: setup overlay for Amlogic FBC Scatter Memory > layout > > drivers/gpu/drm/meson/meson_crtc.c | 118 --- > drivers/gpu/drm/meson/meson_drv.h | 16 ++ > drivers/gpu/drm/meson/meson_overlay.c | 257 +++- > drivers/gpu/drm/meson/meson_registers.h | 22 ++ > include/uapi/drm/drm_fourcc.h | 66 ++ > 5 files changed, 441 insertions(+), 38 deletions(-) > Please ignore this serie, v4 has been sent. Neil ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
Re: [PATCH v3 0/7] drm/meson: add support for Amlogic Video FBC
Neil Armstrong writes: > Amlogic uses a proprietary lossless image compression protocol and format > for their hardware video codec accelerators, either video decoders or > video input encoders. > > It considerably reduces memory bandwidth while writing and reading > frames in memory. > > The underlying storage is considered to be 3 components, 8bit or 10-bit > per component, YCbCr 420, single plane : > - DRM_FORMAT_YUV420_8BIT > - DRM_FORMAT_YUV420_10BIT > > This modifier will be notably added to DMA-BUF frames imported from the V4L2 > Amlogic VDEC decoder. > > At least two layout are supported : > - Basic: composed of a body and a header > - Scatter: the buffer is filled with a IOMMU scatter table referring > to the encoder current memory layout. This mode if more efficient in terms > of memory allocation but frames are not dumpable and only valid during until > the buffer is freed and back in control of the encoder > > At least two options are supported : > - Memory saving: when the pixel bpp is 8b, the size of the superblock can > be reduced, thus saving memory. > > This serie adds the missing register, updated the FBC decoder registers > content to be committed by the crtc code. > > The Amlogic FBC has been tested with compressed content from the Amlogic > HW VP9 decoder on S905X (GXL), S905D2 (G12A) and S905X3 (SM1) in 8bit > (Scatter+Mem Saving on G12A/SM1, Mem Saving on GXL) and 10bit > (Scatter on G12A/SM1, default on GXL). Tested on meson-sm1-sei610 (VP9 60fps content). Tested-by: Kevin Hilman Kevin ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
[PATCH v3 0/7] drm/meson: add support for Amlogic Video FBC
Amlogic uses a proprietary lossless image compression protocol and format for their hardware video codec accelerators, either video decoders or video input encoders. It considerably reduces memory bandwidth while writing and reading frames in memory. The underlying storage is considered to be 3 components, 8bit or 10-bit per component, YCbCr 420, single plane : - DRM_FORMAT_YUV420_8BIT - DRM_FORMAT_YUV420_10BIT This modifier will be notably added to DMA-BUF frames imported from the V4L2 Amlogic VDEC decoder. At least two layout are supported : - Basic: composed of a body and a header - Scatter: the buffer is filled with a IOMMU scatter table referring to the encoder current memory layout. This mode if more efficient in terms of memory allocation but frames are not dumpable and only valid during until the buffer is freed and back in control of the encoder At least two options are supported : - Memory saving: when the pixel bpp is 8b, the size of the superblock can be reduced, thus saving memory. This serie adds the missing register, updated the FBC decoder registers content to be committed by the crtc code. The Amlogic FBC has been tested with compressed content from the Amlogic HW VP9 decoder on S905X (GXL), S905D2 (G12A) and S905X3 (SM1) in 8bit (Scatter+Mem Saving on G12A/SM1, Mem Saving on GXL) and 10bit (Scatter on G12A/SM1, default on GXL). It's expected to work as-is on GXM and G12B SoCs. Changes since v2 at [2]: - Added "BASIC" layout and moved the SCATTER mode as layout, making BASIC and SCATTER layout exclusives - Moved the Memory Saving at bit 8 for options fields - Split fourcc and overlay patch to introduce basic, mem saving and then scatter in separate patches - Added comment about "transferability" of the buffers Changes since v1 at [1]: - s/VD1_AXI_SEL_AFB/VD1_AXI_SEL_AFBC/ into meson_registers.h [1] https://patchwork.freedesktop.org/series/73722/#rev1 [2] https://patchwork.freedesktop.org/series/73722/#rev2 Neil Armstrong (7): drm/fourcc: Add modifier definitions for describing Amlogic Video Framebuffer Compression drm/meson: add Amlogic Video FBC registers drm/meson: overlay: setup overlay for Amlogic FBC drm/meson: crtc: handle commit of Amlogic FBC frames drm/fourcc: amlogic: Add modifier definitions for Memory Saving option drm/meson: overlay: setup overlay for Amlogic FBC Memory Saving mode drm/meson: overlay: setup overlay for Amlogic FBC Scatter Memory layout drivers/gpu/drm/meson/meson_crtc.c | 118 --- drivers/gpu/drm/meson/meson_drv.h | 16 ++ drivers/gpu/drm/meson/meson_overlay.c | 257 +++- drivers/gpu/drm/meson/meson_registers.h | 22 ++ include/uapi/drm/drm_fourcc.h | 66 ++ 5 files changed, 441 insertions(+), 38 deletions(-) -- 2.22.0 ___ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
