Add the clock types which are used by the sun6i/8i families for video.
Signed-off-by: Jean-Francois Moine
---
v3: (no change)
v2:
- remarks from Chen-Yu Tsai
- DT documentation added
---
Documentation/devicetree/bindings/clock/sunxi.txt | 2 +
drivers/clk/sunxi/clk-sun6i-display.c | 106 +
drivers/clk/sunxi/clk-sun6i-pll3.c| 174 ++
3 files changed, 282 insertions(+)
create mode 100644 drivers/clk/sunxi/clk-sun6i-display.c
create mode 100644 drivers/clk/sunxi/clk-sun6i-pll3.c
diff --git a/Documentation/devicetree/bindings/clock/sunxi.txt
b/Documentation/devicetree/bindings/clock/sunxi.txt
index e59f57b..a22b92f 100644
--- a/Documentation/devicetree/bindings/clock/sunxi.txt
+++ b/Documentation/devicetree/bindings/clock/sunxi.txt
@@ -11,6 +11,7 @@ Required properties:
"allwinner,sun6i-a31-pll1-clk" - for the main PLL clock on A31
"allwinner,sun8i-a23-pll1-clk" - for the main PLL clock on A23
"allwinner,sun9i-a80-pll4-clk" - for the peripheral PLLs on A80
+ "allwinner,sun6i-pll3-clk" - for the video PLLs clock
"allwinner,sun4i-a10-pll5-clk" - for the PLL5 clock
"allwinner,sun4i-a10-pll6-clk" - for the PLL6 clock
"allwinner,sun6i-a31-pll6-clk" - for the PLL6 clock on A31
@@ -77,6 +78,7 @@ Required properties:
"allwinner,sun9i-a80-usb-mod-clk" - for usb gates + resets on A80
"allwinner,sun9i-a80-usb-phy-clk" - for usb phy gates + resets on A80
"allwinner,sun4i-a10-ve-clk" - for the Video Engine clock
+ "allwinner,sun6i-display-clk" - for the display clocks
Required properties for all clocks:
- reg : shall be the control register address for the clock.
diff --git a/drivers/clk/sunxi/clk-sun6i-display.c
b/drivers/clk/sunxi/clk-sun6i-display.c
new file mode 100644
index 000..48356e3
--- /dev/null
+++ b/drivers/clk/sunxi/clk-sun6i-display.c
@@ -0,0 +1,106 @@
+/*
+ * Copyright 2016 Jean-Francois Moine
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+static DEFINE_SPINLOCK(sun6i_display_lock);
+
+#define SUN6I_DISPLAY_GATE_BIT 31
+#define SUN6I_DISPLAY_SEL_SHIFT24
+#define SUN6I_DISPLAY_SEL_MASK GENMASK(2, 0)
+#define SUN6I_DISPLAY_MSHIFT 0
+#define SUN6I_DISPLAY_MWIDTH 4
+
+static void __init sun6i_display_setup(struct device_node *node)
+{
+ const char *clk_name = node->name;
+ const char *parents[8];
+ struct clk_mux *mux = NULL;
+ struct clk_divider *div;
+ struct clk_gate *gate;
+ struct resource res;
+ void __iomem *mmio;
+ struct clk *clk;
+ int n;
+
+ of_property_read_string(node, "clock-output-names", _name);
+
+ mmio = of_io_request_and_map(node, 0, of_node_full_name(node));
+ if (IS_ERR(mmio)) {
+ pr_err("%s: Could not map the clock registers\n", clk_name);
+ return;
+ }
+
+ n = of_clk_parent_fill(node, parents, ARRAY_SIZE(parents));
+
+ if (n > 1) {/* many possible sources */
+ mux = kzalloc(sizeof(*mux), GFP_KERNEL);
+ if (!mux)
+ goto free_io;
+ mux->reg = mmio;
+ mux->shift = SUN6I_DISPLAY_SEL_SHIFT;
+ mux->mask = SUN6I_DISPLAY_SEL_MASK;
+ mux->lock = _display_lock;
+ }
+
+ gate = kzalloc(sizeof(*gate), GFP_KERNEL);
+ if (!gate)
+ goto free_mux;
+
+ gate->reg = mmio;
+ gate->bit_idx = SUN6I_DISPLAY_GATE_BIT;
+ gate->lock = _display_lock;
+
+ div = kzalloc(sizeof(*div), GFP_KERNEL);
+ if (!div)
+ goto free_gate;
+
+ div->reg = mmio;
+ div->shift = SUN6I_DISPLAY_MSHIFT;
+ div->width = SUN6I_DISPLAY_MWIDTH;
+ div->lock = _display_lock;
+
+ clk = clk_register_composite(NULL, clk_name,
+parents, n,
+mux ? >hw : NULL, _mux_ops,
+>hw, _divider_ops,
+>hw, _gate_ops,
+0);
+ if (IS_ERR(clk)) {
+ pr_err("%s: Couldn't register the clock\n", clk_name);
+ goto free_div;
+ }
+
+ of_clk_add_provider(node, of_clk_src_simple_get, clk);
+
+ return;
+
+free_div:
+ kfree(div);
+free_gate:
+ kfree(gate);
+free_mux:
