Re: [PATCH v4 06/16] drm/i915/hdcp: HDCP stream encryption support

2020-11-05 Thread Ramalingam C 
On 2020-11-06 at 10:52:03 +0530, Anshuman Gupta wrote:
> On 2020-11-05 at 21:04:03 +0530, Ramalingam C wrote:
> > On 2020-10-27 at 22:11:58 +0530, Anshuman Gupta wrote:
> > > Both HDCP_{1.x,2.x} requires to select/deselect Multistream HDCP bit
> > > in TRANS_DDI_FUNC_CTL in order to enable/disable stream HDCP
> > > encryption over DP MST Transport Link.
> > > 
> > > HDCP 1.4 stream encryption requires to validate the stream encryption
> > > status in HDCP_STATUS_{TRANSCODER,PORT} register driving that link
> > > in order to enable/disable the stream encryption.
> > > 
> > > Both of above requirement are same for all Gen with respect to
> > > B.Spec Documentation.
> > > 
> > > v2:
> > > Cosmetic changes function name, error msg print and
> > > stream typo fixes. [Uma]
> > > 
> > > Cc: Ramalingam C 
> > > Signed-off-by: Anshuman Gupta 
> > > ---
> > >  drivers/gpu/drm/i915/display/intel_ddi.c  | 10 +--
> > >  drivers/gpu/drm/i915/display/intel_ddi.h  |  6 +-
> > >  .../drm/i915/display/intel_display_types.h|  4 +
> > >  drivers/gpu/drm/i915/display/intel_dp_hdcp.c  | 80 ---
> > >  drivers/gpu/drm/i915/display/intel_hdmi.c | 14 ++--
> > >  drivers/gpu/drm/i915/i915_reg.h   |  1 +
> > >  6 files changed, 90 insertions(+), 25 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c 
> > > b/drivers/gpu/drm/i915/display/intel_ddi.c
> > > index 9fce623e951e..779603a38cfc 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> > > @@ -1948,9 +1948,9 @@ void intel_ddi_disable_transcoder_func(const struct 
> > > intel_crtc_state *crtc_state
> > >   }
> > >  }
> > >  
> > > -int intel_ddi_toggle_hdcp_signalling(struct intel_encoder *intel_encoder,
> > > -  enum transcoder cpu_transcoder,
> > > -  bool enable)
> > > +int intel_ddi_toggle_hdcp_bits(struct intel_encoder *intel_encoder,
> > > +enum transcoder cpu_transcoder,
> > > +bool enable, u32 hdcp_mask)
> > >  {
> > >   struct drm_device *dev = intel_encoder->base.dev;
> > >   struct drm_i915_private *dev_priv = to_i915(dev);
> > > @@ -1965,9 +1965,9 @@ int intel_ddi_toggle_hdcp_signalling(struct 
> > > intel_encoder *intel_encoder,
> > >  
> > >   tmp = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder));
> > >   if (enable)
> > > - tmp |= TRANS_DDI_HDCP_SIGNALLING;
> > > + tmp |= hdcp_mask;
> > >   else
> > > - tmp &= ~TRANS_DDI_HDCP_SIGNALLING;
> > > + tmp &= ~hdcp_mask;
> > >   intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder), tmp);
> > >   intel_display_power_put(dev_priv, intel_encoder->power_domain, wakeref);
> > >   return ret;
> > > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.h 
> > > b/drivers/gpu/drm/i915/display/intel_ddi.h
> > > index dcc711cfe4fe..a4dd815c 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_ddi.h
> > > +++ b/drivers/gpu/drm/i915/display/intel_ddi.h
> > > @@ -50,9 +50,9 @@ u32 bxt_signal_levels(struct intel_dp *intel_dp,
> > > const struct intel_crtc_state *crtc_state);
> > >  u32 ddi_signal_levels(struct intel_dp *intel_dp,
> > > const struct intel_crtc_state *crtc_state);
> > > -int intel_ddi_toggle_hdcp_signalling(struct intel_encoder *intel_encoder,
> > > -  enum transcoder cpu_transcoder,
> > > -  bool enable);
> > > +int intel_ddi_toggle_hdcp_bits(struct intel_encoder *intel_encoder,
> > > +enum transcoder cpu_transcoder,
> > > +bool enable, u32 hdcp_mask);
> > >  void icl_sanitize_encoder_pll_mapping(struct intel_encoder *encoder);
> > >  
> > >  #endif /* __INTEL_DDI_H__ */
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h 
> > > b/drivers/gpu/drm/i915/display/intel_display_types.h
> > > index c47124a679b6..59b8fc21e3e8 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > > @@ -339,6 +339,10 @@ struct intel_hdcp_shim {
> > >enum transcoder cpu_transcoder,
> > >bool enable);
> > >  
> > > + /* Enable/Disable stream encryption on DP MST Transport Link */
> > > + int (*stream_encryption)(struct intel_digital_port *dig_port,
> > > +  bool enable);
> > > +
> > >   /* Ensures the link is still protected */
> > >   bool (*check_link)(struct intel_digital_port *dig_port,
> > >  struct intel_connector *connector);
> > > diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c 
> > > b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> > > index 03424d20e9f7..6dcbfaffd2c5 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> > > @@ -16,6 +16,30 @@
>

Re: [PATCH v4 06/16] drm/i915/hdcp: HDCP stream encryption support

2020-11-05 Thread Anshuman Gupta 
On 2020-11-05 at 21:04:03 +0530, Ramalingam C wrote:
> On 2020-10-27 at 22:11:58 +0530, Anshuman Gupta wrote:
> > Both HDCP_{1.x,2.x} requires to select/deselect Multistream HDCP bit
> > in TRANS_DDI_FUNC_CTL in order to enable/disable stream HDCP
> > encryption over DP MST Transport Link.
> > 
> > HDCP 1.4 stream encryption requires to validate the stream encryption
> > status in HDCP_STATUS_{TRANSCODER,PORT} register driving that link
> > in order to enable/disable the stream encryption.
> > 
> > Both of above requirement are same for all Gen with respect to
> > B.Spec Documentation.
> > 
> > v2:
> > Cosmetic changes function name, error msg print and
> > stream typo fixes. [Uma]
> > 
> > Cc: Ramalingam C 
> > Signed-off-by: Anshuman Gupta 
> > ---
> >  drivers/gpu/drm/i915/display/intel_ddi.c  | 10 +--
> >  drivers/gpu/drm/i915/display/intel_ddi.h  |  6 +-
> >  .../drm/i915/display/intel_display_types.h|  4 +
> >  drivers/gpu/drm/i915/display/intel_dp_hdcp.c  | 80 ---
> >  drivers/gpu/drm/i915/display/intel_hdmi.c | 14 ++--
> >  drivers/gpu/drm/i915/i915_reg.h   |  1 +
> >  6 files changed, 90 insertions(+), 25 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c 
> > b/drivers/gpu/drm/i915/display/intel_ddi.c
> > index 9fce623e951e..779603a38cfc 100644
> > --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> > @@ -1948,9 +1948,9 @@ void intel_ddi_disable_transcoder_func(const struct 
> > intel_crtc_state *crtc_state
> > }
> >  }
> >  
> > -int intel_ddi_toggle_hdcp_signalling(struct intel_encoder *intel_encoder,
> > -enum transcoder cpu_transcoder,
> > -bool enable)
> > +int intel_ddi_toggle_hdcp_bits(struct intel_encoder *intel_encoder,
> > +  enum transcoder cpu_transcoder,
> > +  bool enable, u32 hdcp_mask)
> >  {
> > struct drm_device *dev = intel_encoder->base.dev;
> > struct drm_i915_private *dev_priv = to_i915(dev);
> > @@ -1965,9 +1965,9 @@ int intel_ddi_toggle_hdcp_signalling(struct 
> > intel_encoder *intel_encoder,
> >  
> > tmp = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder));
> > if (enable)
> > -   tmp |= TRANS_DDI_HDCP_SIGNALLING;
> > +   tmp |= hdcp_mask;
> > else
> > -   tmp &= ~TRANS_DDI_HDCP_SIGNALLING;
> > +   tmp &= ~hdcp_mask;
> > intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder), tmp);
> > intel_display_power_put(dev_priv, intel_encoder->power_domain, wakeref);
> > return ret;
> > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.h 
> > b/drivers/gpu/drm/i915/display/intel_ddi.h
> > index dcc711cfe4fe..a4dd815c 100644
> > --- a/drivers/gpu/drm/i915/display/intel_ddi.h
> > +++ b/drivers/gpu/drm/i915/display/intel_ddi.h
> > @@ -50,9 +50,9 @@ u32 bxt_signal_levels(struct intel_dp *intel_dp,
> >   const struct intel_crtc_state *crtc_state);
> >  u32 ddi_signal_levels(struct intel_dp *intel_dp,
> >   const struct intel_crtc_state *crtc_state);
> > -int intel_ddi_toggle_hdcp_signalling(struct intel_encoder *intel_encoder,
> > -enum transcoder cpu_transcoder,
> > -bool enable);
> > +int intel_ddi_toggle_hdcp_bits(struct intel_encoder *intel_encoder,
> > +  enum transcoder cpu_transcoder,
> > +  bool enable, u32 hdcp_mask);
> >  void icl_sanitize_encoder_pll_mapping(struct intel_encoder *encoder);
> >  
> >  #endif /* __INTEL_DDI_H__ */
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h 
> > b/drivers/gpu/drm/i915/display/intel_display_types.h
> > index c47124a679b6..59b8fc21e3e8 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > @@ -339,6 +339,10 @@ struct intel_hdcp_shim {
> >  enum transcoder cpu_transcoder,
> >  bool enable);
> >  
> > +   /* Enable/Disable stream encryption on DP MST Transport Link */
> > +   int (*stream_encryption)(struct intel_digital_port *dig_port,
> > +bool enable);
> > +
> > /* Ensures the link is still protected */
> > bool (*check_link)(struct intel_digital_port *dig_port,
> >struct intel_connector *connector);
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c 
> > b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> > index 03424d20e9f7..6dcbfaffd2c5 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> > @@ -16,6 +16,30 @@
> >  #include "intel_dp.h"
> >  #include "intel_hdcp.h"
> >  
> > +static unsigned int transcoder_to_stream_enc_status(enum transcoder 
> > cpu_transcoder)
> > +{
> > +   u32 stream_enc_mask;
>

Re: [PATCH v4 06/16] drm/i915/hdcp: HDCP stream encryption support

2020-11-05 Thread Ramalingam C 
On 2020-10-27 at 22:11:58 +0530, Anshuman Gupta wrote:
> Both HDCP_{1.x,2.x} requires to select/deselect Multistream HDCP bit
> in TRANS_DDI_FUNC_CTL in order to enable/disable stream HDCP
> encryption over DP MST Transport Link.
> 
> HDCP 1.4 stream encryption requires to validate the stream encryption
> status in HDCP_STATUS_{TRANSCODER,PORT} register driving that link
> in order to enable/disable the stream encryption.
> 
> Both of above requirement are same for all Gen with respect to
> B.Spec Documentation.
> 
> v2:
> Cosmetic changes function name, error msg print and
> stream typo fixes. [Uma]
> 
> Cc: Ramalingam C 
> Signed-off-by: Anshuman Gupta 
> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c  | 10 +--
>  drivers/gpu/drm/i915/display/intel_ddi.h  |  6 +-
>  .../drm/i915/display/intel_display_types.h|  4 +
>  drivers/gpu/drm/i915/display/intel_dp_hdcp.c  | 80 ---
>  drivers/gpu/drm/i915/display/intel_hdmi.c | 14 ++--
>  drivers/gpu/drm/i915/i915_reg.h   |  1 +
>  6 files changed, 90 insertions(+), 25 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c 
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 9fce623e951e..779603a38cfc 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -1948,9 +1948,9 @@ void intel_ddi_disable_transcoder_func(const struct 
> intel_crtc_state *crtc_state
>   }
>  }
>  
> -int intel_ddi_toggle_hdcp_signalling(struct intel_encoder *intel_encoder,
> -  enum transcoder cpu_transcoder,
> -  bool enable)
> +int intel_ddi_toggle_hdcp_bits(struct intel_encoder *intel_encoder,
> +enum transcoder cpu_transcoder,
> +bool enable, u32 hdcp_mask)
>  {
>   struct drm_device *dev = intel_encoder->base.dev;
>   struct drm_i915_private *dev_priv = to_i915(dev);
> @@ -1965,9 +1965,9 @@ int intel_ddi_toggle_hdcp_signalling(struct 
> intel_encoder *intel_encoder,
>  
>   tmp = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder));
>   if (enable)
> - tmp |= TRANS_DDI_HDCP_SIGNALLING;
> + tmp |= hdcp_mask;
>   else
> - tmp &= ~TRANS_DDI_HDCP_SIGNALLING;
> + tmp &= ~hdcp_mask;
>   intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder), tmp);
>   intel_display_power_put(dev_priv, intel_encoder->power_domain, wakeref);
>   return ret;
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.h 
> b/drivers/gpu/drm/i915/display/intel_ddi.h
> index dcc711cfe4fe..a4dd815c 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.h
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.h
> @@ -50,9 +50,9 @@ u32 bxt_signal_levels(struct intel_dp *intel_dp,
> const struct intel_crtc_state *crtc_state);
>  u32 ddi_signal_levels(struct intel_dp *intel_dp,
> const struct intel_crtc_state *crtc_state);
> -int intel_ddi_toggle_hdcp_signalling(struct intel_encoder *intel_encoder,
> -  enum transcoder cpu_transcoder,
> -  bool enable);
> +int intel_ddi_toggle_hdcp_bits(struct intel_encoder *intel_encoder,
> +enum transcoder cpu_transcoder,
> +bool enable, u32 hdcp_mask);
>  void icl_sanitize_encoder_pll_mapping(struct intel_encoder *encoder);
>  
>  #endif /* __INTEL_DDI_H__ */
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h 
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index c47124a679b6..59b8fc21e3e8 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -339,6 +339,10 @@ struct intel_hdcp_shim {
>enum transcoder cpu_transcoder,
>bool enable);
>  
> + /* Enable/Disable stream encryption on DP MST Transport Link */
> + int (*stream_encryption)(struct intel_digital_port *dig_port,
> +  bool enable);
> +
>   /* Ensures the link is still protected */
>   bool (*check_link)(struct intel_digital_port *dig_port,
>  struct intel_connector *connector);
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c 
> b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> index 03424d20e9f7..6dcbfaffd2c5 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> @@ -16,6 +16,30 @@
>  #include "intel_dp.h"
>  #include "intel_hdcp.h"
>  
> +static unsigned int transcoder_to_stream_enc_status(enum transcoder 
> cpu_transcoder)
> +{
> + u32 stream_enc_mask;
> +
> + switch (cpu_transcoder) {
> + case TRANSCODER_A:
> + stream_enc_mask = HDCP_STATUS_STREAM_A_ENC;
> + break;
> + case TRANSCODER_B:
> +

RE: [PATCH v4 06/16] drm/i915/hdcp: HDCP stream encryption support

2020-11-01 Thread Shankar, Uma 



> -Original Message-
> From: Anshuman Gupta 
> Sent: Tuesday, October 27, 2020 10:12 PM
> To: intel-...@lists.freedesktop.org; dri-devel@lists.freedesktop.org
> Cc: seanp...@chromium.org; Nikula, Jani ; C,
> Ramalingam ; Li, Juston ;
> Shankar, Uma ; Gupta, Anshuman
> 
> Subject: [PATCH v4 06/16] drm/i915/hdcp: HDCP stream encryption support
> 
> Both HDCP_{1.x,2.x} requires to select/deselect Multistream HDCP bit in
> TRANS_DDI_FUNC_CTL in order to enable/disable stream HDCP encryption over
> DP MST Transport Link.
> 
> HDCP 1.4 stream encryption requires to validate the stream encryption status 
> in
> HDCP_STATUS_{TRANSCODER,PORT} register driving that link in order to
> enable/disable the stream encryption.
> 
> Both of above requirement are same for all Gen with respect to B.Spec
> Documentation.

Looks Good to me.
Reviewed-by: Uma Shankar 

> v2:
> Cosmetic changes function name, error msg print and stream typo fixes. [Uma]
> 
> Cc: Ramalingam C 
> Signed-off-by: Anshuman Gupta 
> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c  | 10 +--
>  drivers/gpu/drm/i915/display/intel_ddi.h  |  6 +-
>  .../drm/i915/display/intel_display_types.h|  4 +
>  drivers/gpu/drm/i915/display/intel_dp_hdcp.c  | 80 ---
>  drivers/gpu/drm/i915/display/intel_hdmi.c | 14 ++--
>  drivers/gpu/drm/i915/i915_reg.h   |  1 +
>  6 files changed, 90 insertions(+), 25 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 9fce623e951e..779603a38cfc 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -1948,9 +1948,9 @@ void intel_ddi_disable_transcoder_func(const struct
> intel_crtc_state *crtc_state
>   }
>  }
> 
> -int intel_ddi_toggle_hdcp_signalling(struct intel_encoder *intel_encoder,
> -  enum transcoder cpu_transcoder,
> -  bool enable)
> +int intel_ddi_toggle_hdcp_bits(struct intel_encoder *intel_encoder,
> +enum transcoder cpu_transcoder,
> +bool enable, u32 hdcp_mask)
>  {
>   struct drm_device *dev = intel_encoder->base.dev;
>   struct drm_i915_private *dev_priv = to_i915(dev); @@ -1965,9 +1965,9
> @@ int intel_ddi_toggle_hdcp_signalling(struct intel_encoder *intel_encoder,
> 
>   tmp = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder));
>   if (enable)
> - tmp |= TRANS_DDI_HDCP_SIGNALLING;
> + tmp |= hdcp_mask;
>   else
> - tmp &= ~TRANS_DDI_HDCP_SIGNALLING;
> + tmp &= ~hdcp_mask;
>   intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder), tmp);
>   intel_display_power_put(dev_priv, intel_encoder->power_domain,
> wakeref);
>   return ret;
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.h
> b/drivers/gpu/drm/i915/display/intel_ddi.h
> index dcc711cfe4fe..a4dd815c 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.h
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.h
> @@ -50,9 +50,9 @@ u32 bxt_signal_levels(struct intel_dp *intel_dp,
> const struct intel_crtc_state *crtc_state);
>  u32 ddi_signal_levels(struct intel_dp *intel_dp,
> const struct intel_crtc_state *crtc_state); -int
> intel_ddi_toggle_hdcp_signalling(struct intel_encoder *intel_encoder,
> -  enum transcoder cpu_transcoder,
> -  bool enable);
> +int intel_ddi_toggle_hdcp_bits(struct intel_encoder *intel_encoder,
> +enum transcoder cpu_transcoder,
> +bool enable, u32 hdcp_mask);
>  void icl_sanitize_encoder_pll_mapping(struct intel_encoder *encoder);
> 
>  #endif /* __INTEL_DDI_H__ */
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index c47124a679b6..59b8fc21e3e8 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -339,6 +339,10 @@ struct intel_hdcp_shim {
>enum transcoder cpu_transcoder,
>bool enable);
> 
> + /* Enable/Disable stream encryption on DP MST Transport Link */
> + int (*stream_encryption)(struct intel_digital_port *dig_port,
> +  bool enable);
> +
>   /* Ensures the link is still protected */
>   bool (*check_link)(struct intel_digital_port *dig_port,
>  struct intel_connector *connector

[PATCH v4 06/16] drm/i915/hdcp: HDCP stream encryption support

2020-10-27 Thread Anshuman Gupta 
Both HDCP_{1.x,2.x} requires to select/deselect Multistream HDCP bit
in TRANS_DDI_FUNC_CTL in order to enable/disable stream HDCP
encryption over DP MST Transport Link.

HDCP 1.4 stream encryption requires to validate the stream encryption
status in HDCP_STATUS_{TRANSCODER,PORT} register driving that link
in order to enable/disable the stream encryption.

Both of above requirement are same for all Gen with respect to
B.Spec Documentation.

v2:
Cosmetic changes function name, error msg print and
stream typo fixes. [Uma]

Cc: Ramalingam C 
Signed-off-by: Anshuman Gupta 
---
 drivers/gpu/drm/i915/display/intel_ddi.c  | 10 +--
 drivers/gpu/drm/i915/display/intel_ddi.h  |  6 +-
 .../drm/i915/display/intel_display_types.h|  4 +
 drivers/gpu/drm/i915/display/intel_dp_hdcp.c  | 80 ---
 drivers/gpu/drm/i915/display/intel_hdmi.c | 14 ++--
 drivers/gpu/drm/i915/i915_reg.h   |  1 +
 6 files changed, 90 insertions(+), 25 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c 
b/drivers/gpu/drm/i915/display/intel_ddi.c
index 9fce623e951e..779603a38cfc 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -1948,9 +1948,9 @@ void intel_ddi_disable_transcoder_func(const struct 
intel_crtc_state *crtc_state
}
 }
 
-int intel_ddi_toggle_hdcp_signalling(struct intel_encoder *intel_encoder,
-enum transcoder cpu_transcoder,
-bool enable)
+int intel_ddi_toggle_hdcp_bits(struct intel_encoder *intel_encoder,
+  enum transcoder cpu_transcoder,
+  bool enable, u32 hdcp_mask)
 {
struct drm_device *dev = intel_encoder->base.dev;
struct drm_i915_private *dev_priv = to_i915(dev);
@@ -1965,9 +1965,9 @@ int intel_ddi_toggle_hdcp_signalling(struct intel_encoder 
*intel_encoder,
 
tmp = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder));
if (enable)
-   tmp |= TRANS_DDI_HDCP_SIGNALLING;
+   tmp |= hdcp_mask;
else
-   tmp &= ~TRANS_DDI_HDCP_SIGNALLING;
+   tmp &= ~hdcp_mask;
intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder), tmp);
intel_display_power_put(dev_priv, intel_encoder->power_domain, wakeref);
return ret;
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.h 
b/drivers/gpu/drm/i915/display/intel_ddi.h
index dcc711cfe4fe..a4dd815c 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.h
+++ b/drivers/gpu/drm/i915/display/intel_ddi.h
@@ -50,9 +50,9 @@ u32 bxt_signal_levels(struct intel_dp *intel_dp,
  const struct intel_crtc_state *crtc_state);
 u32 ddi_signal_levels(struct intel_dp *intel_dp,
  const struct intel_crtc_state *crtc_state);
-int intel_ddi_toggle_hdcp_signalling(struct intel_encoder *intel_encoder,
-enum transcoder cpu_transcoder,
-bool enable);
+int intel_ddi_toggle_hdcp_bits(struct intel_encoder *intel_encoder,
+  enum transcoder cpu_transcoder,
+  bool enable, u32 hdcp_mask);
 void icl_sanitize_encoder_pll_mapping(struct intel_encoder *encoder);
 
 #endif /* __INTEL_DDI_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h 
b/drivers/gpu/drm/i915/display/intel_display_types.h
index c47124a679b6..59b8fc21e3e8 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -339,6 +339,10 @@ struct intel_hdcp_shim {
 enum transcoder cpu_transcoder,
 bool enable);
 
+   /* Enable/Disable stream encryption on DP MST Transport Link */
+   int (*stream_encryption)(struct intel_digital_port *dig_port,
+bool enable);
+
/* Ensures the link is still protected */
bool (*check_link)(struct intel_digital_port *dig_port,
   struct intel_connector *connector);
diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c 
b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
index 03424d20e9f7..6dcbfaffd2c5 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
@@ -16,6 +16,30 @@
 #include "intel_dp.h"
 #include "intel_hdcp.h"
 
+static unsigned int transcoder_to_stream_enc_status(enum transcoder 
cpu_transcoder)
+{
+   u32 stream_enc_mask;
+
+   switch (cpu_transcoder) {
+   case TRANSCODER_A:
+   stream_enc_mask = HDCP_STATUS_STREAM_A_ENC;
+   break;
+   case TRANSCODER_B:
+   stream_enc_mask = HDCP_STATUS_STREAM_B_ENC;
+   break;
+   case TRANSCODER_C:
+   stream_enc_mask = HDCP_STATUS_STREAM_C_ENC;
+   break;
+   case TRANSCODER_D:
+