Re: [PATCH v4 2/8] drm/mediatek: add component POSTMASK

2021-01-30 Thread Yongqiang Niu 
On Fri, 2021-01-29 at 16:35 +0800, CK Hu wrote:
> On Fri, 2021-01-29 at 16:32 +0800, Yongqiang Niu wrote:
> > On Fri, 2021-01-29 at 16:18 +0800, CK Hu wrote:
> > > Hi, Hsin-Yi:
> > > 
> > > On Fri, 2021-01-29 at 15:34 +0800, Hsin-Yi Wang wrote:
> > > > From: Yongqiang Niu 
> > > > 
> > > > This patch add component POSTMASK,
> > > > 
> > > > Signed-off-by: Yongqiang Niu 
> > > > Signed-off-by: Hsin-Yi Wang 
> > > > ---
> > > >  drivers/gpu/drm/mediatek/Makefile|   1 +
> > > >  drivers/gpu/drm/mediatek/mtk_disp_drv.h  |   8 +
> > > >  drivers/gpu/drm/mediatek/mtk_disp_postmask.c | 161 +++
> > > >  drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c  |  11 ++
> > > >  drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h  |   1 +
> > > >  drivers/gpu/drm/mediatek/mtk_drm_drv.c   |   4 +-
> > > >  drivers/gpu/drm/mediatek/mtk_drm_drv.h   |   1 +
> > > >  7 files changed, 186 insertions(+), 1 deletion(-)
> > > >  create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_postmask.c
> > > > 
> > > > diff --git a/drivers/gpu/drm/mediatek/Makefile 
> > > > b/drivers/gpu/drm/mediatek/Makefile
> > > > index b64674b944860..13a0eafabf9c0 100644
> > > > --- a/drivers/gpu/drm/mediatek/Makefile
> > > > +++ b/drivers/gpu/drm/mediatek/Makefile
> > > > @@ -3,6 +3,7 @@
> > > >  mediatek-drm-y := mtk_disp_color.o \
> > > >   mtk_disp_gamma.o \
> > > >   mtk_disp_ovl.o \
> > > > + mtk_disp_postmask.o \
> > > >   mtk_disp_rdma.o \
> > > >   mtk_drm_crtc.o \
> > > >   mtk_drm_ddp_comp.o \
> > > > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_drv.h 
> > > > b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> > > > index 02191010699f8..d74e85db3fcdf 100644
> > > > --- a/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> > > > +++ b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> > > > @@ -37,6 +37,14 @@ void mtk_gamma_set_common(void __iomem *regs, struct 
> > > > drm_crtc_state *state);
> > > >  void mtk_gamma_start(struct device *dev);
> > > >  void mtk_gamma_stop(struct device *dev);
> > > >  
> > > > +int mtk_postmask_clk_enable(struct device *dev);
> > > > +void mtk_postmask_clk_disable(struct device *dev);
> > > > +void mtk_postmask_config(struct device *dev, unsigned int w,
> > > > +  unsigned int h, unsigned int vrefresh,
> > > > +  unsigned int bpc, struct cmdq_pkt *cmdq_pkt);
> > > > +void mtk_postmask_start(struct device *dev);
> > > > +void mtk_postmask_stop(struct device *dev);
> > > > +
> > > >  void mtk_ovl_bgclr_in_on(struct device *dev);
> > > >  void mtk_ovl_bgclr_in_off(struct device *dev);
> > > >  void mtk_ovl_bypass_shadow(struct device *dev);
> > > > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_postmask.c 
> > > > b/drivers/gpu/drm/mediatek/mtk_disp_postmask.c
> > > > new file mode 100644
> > > > index 0..d640cef9c15a4
> > > > --- /dev/null
> > > > +++ b/drivers/gpu/drm/mediatek/mtk_disp_postmask.c
> > > > @@ -0,0 +1,161 @@
> > > > +/*
> > > > + * SPDX-License-Identifier:
> > > > + *
> > > > + * Copyright (c) 2020 MediaTek Inc.
> > > 
> > > 2021
> > > 
> > > > + */
> > > > +
> > > > +#include 
> > > > +#include 
> > > > +#include 
> > > > +#include 
> > > > +#include 
> > > > +#include 
> > > > +#include 
> > > > +#include 
> > > > +
> > > > +#include "mtk_disp_drv.h"
> > > > +#include "mtk_drm_crtc.h"
> > > > +#include "mtk_drm_ddp_comp.h"
> > > > +
> > > > +#define DISP_POSTMASK_EN   0x
> > > > +#define POSTMASK_ENBIT(0)
> > > > +#define DISP_POSTMASK_CFG  0x0020
> > > > +#define POSTMASK_RELAY_MODEBIT(0)
> > > > +#define DISP_POSTMASK_SIZE 0x0030
> > > > +
> > > > +struct mtk_disp_postmask_data {
> > > > +   u32 reserved;
> > > > +};
> > > 
> > > Useless, so remove.
> > > 
> > > > +
> > > > +/**
> > > > + * struct mtk_disp_postmask - DISP_postmask driver structure
> > > > + * @ddp_comp - structure containing type enum and hardware resources
> > > > + * @crtc - associated crtc to report irq events to
> > > > + */
> > > > +struct mtk_disp_postmask {
> > > > +   struct clk *clk;
> > > > +   void __iomem *regs;
> > > > +   struct cmdq_client_reg cmdq_reg;
> > > > +   const struct mtk_disp_postmask_data *data;
> > > > +};
> > > > +
> > > > +int mtk_postmask_clk_enable(struct device *dev)
> > > > +{
> > > > +   struct mtk_disp_postmask *postmask = dev_get_drvdata(dev);
> > > > +
> > > > +   return clk_prepare_enable(postmask->clk);
> > > > +}
> > > > +
> > > > +void mtk_postmask_clk_disable(struct device *dev)
> > > > +{
> > > > +   struct mtk_disp_postmask *postmask = dev_get_drvdata(dev);
> > > > +
> > > > +   clk_disable_unprepare(postmask->clk);
> > > > +}
> > > > +
> > > > +void mtk_postmask_config(struct device *dev, unsigned int w,
> > > > +unsigned int h, unsigned int vrefresh,
> > > > +

Re: [PATCH v4 2/8] drm/mediatek: add component POSTMASK

2021-01-30 Thread Yongqiang Niu 
On Fri, 2021-01-29 at 16:18 +0800, CK Hu wrote:
> Hi, Hsin-Yi:
> 
> On Fri, 2021-01-29 at 15:34 +0800, Hsin-Yi Wang wrote:
> > From: Yongqiang Niu 
> > 
> > This patch add component POSTMASK,
> > 
> > Signed-off-by: Yongqiang Niu 
> > Signed-off-by: Hsin-Yi Wang 
> > ---
> >  drivers/gpu/drm/mediatek/Makefile|   1 +
> >  drivers/gpu/drm/mediatek/mtk_disp_drv.h  |   8 +
> >  drivers/gpu/drm/mediatek/mtk_disp_postmask.c | 161 +++
> >  drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c  |  11 ++
> >  drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h  |   1 +
> >  drivers/gpu/drm/mediatek/mtk_drm_drv.c   |   4 +-
> >  drivers/gpu/drm/mediatek/mtk_drm_drv.h   |   1 +
> >  7 files changed, 186 insertions(+), 1 deletion(-)
> >  create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_postmask.c
> > 
> > diff --git a/drivers/gpu/drm/mediatek/Makefile 
> > b/drivers/gpu/drm/mediatek/Makefile
> > index b64674b944860..13a0eafabf9c0 100644
> > --- a/drivers/gpu/drm/mediatek/Makefile
> > +++ b/drivers/gpu/drm/mediatek/Makefile
> > @@ -3,6 +3,7 @@
> >  mediatek-drm-y := mtk_disp_color.o \
> >   mtk_disp_gamma.o \
> >   mtk_disp_ovl.o \
> > + mtk_disp_postmask.o \
> >   mtk_disp_rdma.o \
> >   mtk_drm_crtc.o \
> >   mtk_drm_ddp_comp.o \
> > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_drv.h 
> > b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> > index 02191010699f8..d74e85db3fcdf 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> > +++ b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> > @@ -37,6 +37,14 @@ void mtk_gamma_set_common(void __iomem *regs, struct 
> > drm_crtc_state *state);
> >  void mtk_gamma_start(struct device *dev);
> >  void mtk_gamma_stop(struct device *dev);
> >  
> > +int mtk_postmask_clk_enable(struct device *dev);
> > +void mtk_postmask_clk_disable(struct device *dev);
> > +void mtk_postmask_config(struct device *dev, unsigned int w,
> > +  unsigned int h, unsigned int vrefresh,
> > +  unsigned int bpc, struct cmdq_pkt *cmdq_pkt);
> > +void mtk_postmask_start(struct device *dev);
> > +void mtk_postmask_stop(struct device *dev);
> > +
> >  void mtk_ovl_bgclr_in_on(struct device *dev);
> >  void mtk_ovl_bgclr_in_off(struct device *dev);
> >  void mtk_ovl_bypass_shadow(struct device *dev);
> > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_postmask.c 
> > b/drivers/gpu/drm/mediatek/mtk_disp_postmask.c
> > new file mode 100644
> > index 0..d640cef9c15a4
> > --- /dev/null
> > +++ b/drivers/gpu/drm/mediatek/mtk_disp_postmask.c
> > @@ -0,0 +1,161 @@
> > +/*
> > + * SPDX-License-Identifier:
> > + *
> > + * Copyright (c) 2020 MediaTek Inc.
> 
> 2021
> 
> > + */
> > +
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +
> > +#include "mtk_disp_drv.h"
> > +#include "mtk_drm_crtc.h"
> > +#include "mtk_drm_ddp_comp.h"
> > +
> > +#define DISP_POSTMASK_EN   0x
> > +#define POSTMASK_ENBIT(0)
> > +#define DISP_POSTMASK_CFG  0x0020
> > +#define POSTMASK_RELAY_MODEBIT(0)
> > +#define DISP_POSTMASK_SIZE 0x0030
> > +
> > +struct mtk_disp_postmask_data {
> > +   u32 reserved;
> > +};
> 
> Useless, so remove.
> 
> > +
> > +/**
> > + * struct mtk_disp_postmask - DISP_postmask driver structure
> > + * @ddp_comp - structure containing type enum and hardware resources
> > + * @crtc - associated crtc to report irq events to
> > + */
> > +struct mtk_disp_postmask {
> > +   struct clk *clk;
> > +   void __iomem *regs;
> > +   struct cmdq_client_reg cmdq_reg;
> > +   const struct mtk_disp_postmask_data *data;
> > +};
> > +
> > +int mtk_postmask_clk_enable(struct device *dev)
> > +{
> > +   struct mtk_disp_postmask *postmask = dev_get_drvdata(dev);
> > +
> > +   return clk_prepare_enable(postmask->clk);
> > +}
> > +
> > +void mtk_postmask_clk_disable(struct device *dev)
> > +{
> > +   struct mtk_disp_postmask *postmask = dev_get_drvdata(dev);
> > +
> > +   clk_disable_unprepare(postmask->clk);
> > +}
> > +
> > +void mtk_postmask_config(struct device *dev, unsigned int w,
> > +unsigned int h, unsigned int vrefresh,
> > +unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
> > +{
> > +   struct mtk_disp_postmask *postmask = dev_get_drvdata(dev);
> > +
> > +   mtk_ddp_write(cmdq_pkt, w << 16 | h, &postmask->cmdq_reg, 
> > postmask->regs,
> > + DISP_POSTMASK_SIZE);
> > +   mtk_ddp_write(cmdq_pkt, POSTMASK_RELAY_MODE, &postmask->cmdq_reg,
> > + postmask->regs, DISP_POSTMASK_CFG);
> > +}
> > +
> > +void mtk_postmask_start(struct device *dev)
> > +{
> > +   struct mtk_disp_postmask *postmask = dev_get_drvdata(dev);
> > +
> > +   writel(POSTMASK_EN, postmask->regs + DISP_POSTMASK_EN);
> > +}
> > +
> > +void mtk_postmask_stop(struct device *dev)
> > +{
> >

Re: [PATCH v4 2/8] drm/mediatek: add component POSTMASK

2021-01-30 Thread Hsin-Yi Wang 
On Fri, Jan 29, 2021 at 4:49 PM Yongqiang Niu
 wrote:
>
> On Fri, 2021-01-29 at 16:35 +0800, CK Hu wrote:
> > On Fri, 2021-01-29 at 16:32 +0800, Yongqiang Niu wrote:
> > > On Fri, 2021-01-29 at 16:18 +0800, CK Hu wrote:
> > > > Hi, Hsin-Yi:
> > > >
> > > > On Fri, 2021-01-29 at 15:34 +0800, Hsin-Yi Wang wrote:
> > > > > From: Yongqiang Niu 
> > > > >
> > > > > This patch add component POSTMASK,
> > > > >
> > > > > Signed-off-by: Yongqiang Niu 
> > > > > Signed-off-by: Hsin-Yi Wang 
> > > > > ---
> > > > >  drivers/gpu/drm/mediatek/Makefile|   1 +
> > > > >  drivers/gpu/drm/mediatek/mtk_disp_drv.h  |   8 +
> > > > >  drivers/gpu/drm/mediatek/mtk_disp_postmask.c | 161 
> > > > > +++
> > > > >  drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c  |  11 ++
> > > > >  drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h  |   1 +
> > > > >  drivers/gpu/drm/mediatek/mtk_drm_drv.c   |   4 +-
> > > > >  drivers/gpu/drm/mediatek/mtk_drm_drv.h   |   1 +
> > > > >  7 files changed, 186 insertions(+), 1 deletion(-)
> > > > >  create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_postmask.c
> > > > >
> > > > > diff --git a/drivers/gpu/drm/mediatek/Makefile 
> > > > > b/drivers/gpu/drm/mediatek/Makefile
> > > > > index b64674b944860..13a0eafabf9c0 100644
> > > > > --- a/drivers/gpu/drm/mediatek/Makefile
> > > > > +++ b/drivers/gpu/drm/mediatek/Makefile
> > > > > @@ -3,6 +3,7 @@
> > > > >  mediatek-drm-y := mtk_disp_color.o \
> > > > >   mtk_disp_gamma.o \
> > > > >   mtk_disp_ovl.o \
> > > > > + mtk_disp_postmask.o \
> > > > >   mtk_disp_rdma.o \
> > > > >   mtk_drm_crtc.o \
> > > > >   mtk_drm_ddp_comp.o \
> > > > > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_drv.h 
> > > > > b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> > > > > index 02191010699f8..d74e85db3fcdf 100644
> > > > > --- a/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> > > > > +++ b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> > > > > @@ -37,6 +37,14 @@ void mtk_gamma_set_common(void __iomem *regs, 
> > > > > struct drm_crtc_state *state);
> > > > >  void mtk_gamma_start(struct device *dev);
> > > > >  void mtk_gamma_stop(struct device *dev);
> > > > >
> > > > > +int mtk_postmask_clk_enable(struct device *dev);
> > > > > +void mtk_postmask_clk_disable(struct device *dev);
> > > > > +void mtk_postmask_config(struct device *dev, unsigned int w,
> > > > > +  unsigned int h, unsigned int vrefresh,
> > > > > +  unsigned int bpc, struct cmdq_pkt *cmdq_pkt);
> > > > > +void mtk_postmask_start(struct device *dev);
> > > > > +void mtk_postmask_stop(struct device *dev);
> > > > > +
> > > > >  void mtk_ovl_bgclr_in_on(struct device *dev);
> > > > >  void mtk_ovl_bgclr_in_off(struct device *dev);
> > > > >  void mtk_ovl_bypass_shadow(struct device *dev);
> > > > > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_postmask.c 
> > > > > b/drivers/gpu/drm/mediatek/mtk_disp_postmask.c
> > > > > new file mode 100644
> > > > > index 0..d640cef9c15a4
> > > > > --- /dev/null
> > > > > +++ b/drivers/gpu/drm/mediatek/mtk_disp_postmask.c
> > > > > @@ -0,0 +1,161 @@
> > > > > +/*
> > > > > + * SPDX-License-Identifier:
> > > > > + *
> > > > > + * Copyright (c) 2020 MediaTek Inc.
> > > >
> > > > 2021
> > > >
> > > > > + */
> > > > > +
> > > > > +#include 
> > > > > +#include 
> > > > > +#include 
> > > > > +#include 
> > > > > +#include 
> > > > > +#include 
> > > > > +#include 
> > > > > +#include 
> > > > > +
> > > > > +#include "mtk_disp_drv.h"
> > > > > +#include "mtk_drm_crtc.h"
> > > > > +#include "mtk_drm_ddp_comp.h"
> > > > > +
> > > > > +#define DISP_POSTMASK_EN   0x
> > > > > +#define POSTMASK_ENBIT(0)
> > > > > +#define DISP_POSTMASK_CFG  0x0020
> > > > > +#define POSTMASK_RELAY_MODEBIT(0)
> > > > > +#define DISP_POSTMASK_SIZE 0x0030
> > > > > +
> > > > > +struct mtk_disp_postmask_data {
> > > > > +   u32 reserved;
> > > > > +};
> > > >
> > > > Useless, so remove.
> > > >
> > > > > +
> > > > > +/**
> > > > > + * struct mtk_disp_postmask - DISP_postmask driver structure
> > > > > + * @ddp_comp - structure containing type enum and hardware resources
> > > > > + * @crtc - associated crtc to report irq events to
> > > > > + */
> > > > > +struct mtk_disp_postmask {
> > > > > +   struct clk *clk;
> > > > > +   void __iomem *regs;
> > > > > +   struct cmdq_client_reg cmdq_reg;
> > > > > +   const struct mtk_disp_postmask_data *data;
> > > > > +};
> > > > > +
> > > > > +int mtk_postmask_clk_enable(struct device *dev)
> > > > > +{
> > > > > +   struct mtk_disp_postmask *postmask = dev_get_drvdata(dev);
> > > > > +
> > > > > +   return clk_prepare_enable(postmask->clk);
> > > > > +}
> > > > > +
> > > > > +void mtk_postmask_clk_disable(struct device *dev)
> > > > > +{
> > > > > +   st

Re: [PATCH v4 2/8] drm/mediatek: add component POSTMASK

2021-01-29 Thread CK Hu 
On Fri, 2021-01-29 at 16:32 +0800, Yongqiang Niu wrote:
> On Fri, 2021-01-29 at 16:18 +0800, CK Hu wrote:
> > Hi, Hsin-Yi:
> > 
> > On Fri, 2021-01-29 at 15:34 +0800, Hsin-Yi Wang wrote:
> > > From: Yongqiang Niu 
> > > 
> > > This patch add component POSTMASK,
> > > 
> > > Signed-off-by: Yongqiang Niu 
> > > Signed-off-by: Hsin-Yi Wang 
> > > ---
> > >  drivers/gpu/drm/mediatek/Makefile|   1 +
> > >  drivers/gpu/drm/mediatek/mtk_disp_drv.h  |   8 +
> > >  drivers/gpu/drm/mediatek/mtk_disp_postmask.c | 161 +++
> > >  drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c  |  11 ++
> > >  drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h  |   1 +
> > >  drivers/gpu/drm/mediatek/mtk_drm_drv.c   |   4 +-
> > >  drivers/gpu/drm/mediatek/mtk_drm_drv.h   |   1 +
> > >  7 files changed, 186 insertions(+), 1 deletion(-)
> > >  create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_postmask.c
> > > 
> > > diff --git a/drivers/gpu/drm/mediatek/Makefile 
> > > b/drivers/gpu/drm/mediatek/Makefile
> > > index b64674b944860..13a0eafabf9c0 100644
> > > --- a/drivers/gpu/drm/mediatek/Makefile
> > > +++ b/drivers/gpu/drm/mediatek/Makefile
> > > @@ -3,6 +3,7 @@
> > >  mediatek-drm-y := mtk_disp_color.o \
> > > mtk_disp_gamma.o \
> > > mtk_disp_ovl.o \
> > > +   mtk_disp_postmask.o \
> > > mtk_disp_rdma.o \
> > > mtk_drm_crtc.o \
> > > mtk_drm_ddp_comp.o \
> > > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_drv.h 
> > > b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> > > index 02191010699f8..d74e85db3fcdf 100644
> > > --- a/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> > > +++ b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> > > @@ -37,6 +37,14 @@ void mtk_gamma_set_common(void __iomem *regs, struct 
> > > drm_crtc_state *state);
> > >  void mtk_gamma_start(struct device *dev);
> > >  void mtk_gamma_stop(struct device *dev);
> > >  
> > > +int mtk_postmask_clk_enable(struct device *dev);
> > > +void mtk_postmask_clk_disable(struct device *dev);
> > > +void mtk_postmask_config(struct device *dev, unsigned int w,
> > > +  unsigned int h, unsigned int vrefresh,
> > > +  unsigned int bpc, struct cmdq_pkt *cmdq_pkt);
> > > +void mtk_postmask_start(struct device *dev);
> > > +void mtk_postmask_stop(struct device *dev);
> > > +
> > >  void mtk_ovl_bgclr_in_on(struct device *dev);
> > >  void mtk_ovl_bgclr_in_off(struct device *dev);
> > >  void mtk_ovl_bypass_shadow(struct device *dev);
> > > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_postmask.c 
> > > b/drivers/gpu/drm/mediatek/mtk_disp_postmask.c
> > > new file mode 100644
> > > index 0..d640cef9c15a4
> > > --- /dev/null
> > > +++ b/drivers/gpu/drm/mediatek/mtk_disp_postmask.c
> > > @@ -0,0 +1,161 @@
> > > +/*
> > > + * SPDX-License-Identifier:
> > > + *
> > > + * Copyright (c) 2020 MediaTek Inc.
> > 
> > 2021
> > 
> > > + */
> > > +
> > > +#include 
> > > +#include 
> > > +#include 
> > > +#include 
> > > +#include 
> > > +#include 
> > > +#include 
> > > +#include 
> > > +
> > > +#include "mtk_disp_drv.h"
> > > +#include "mtk_drm_crtc.h"
> > > +#include "mtk_drm_ddp_comp.h"
> > > +
> > > +#define DISP_POSTMASK_EN 0x
> > > +#define POSTMASK_EN  BIT(0)
> > > +#define DISP_POSTMASK_CFG0x0020
> > > +#define POSTMASK_RELAY_MODE  BIT(0)
> > > +#define DISP_POSTMASK_SIZE   0x0030
> > > +
> > > +struct mtk_disp_postmask_data {
> > > + u32 reserved;
> > > +};
> > 
> > Useless, so remove.
> > 
> > > +
> > > +/**
> > > + * struct mtk_disp_postmask - DISP_postmask driver structure
> > > + * @ddp_comp - structure containing type enum and hardware resources
> > > + * @crtc - associated crtc to report irq events to
> > > + */
> > > +struct mtk_disp_postmask {
> > > + struct clk *clk;
> > > + void __iomem *regs;
> > > + struct cmdq_client_reg cmdq_reg;
> > > + const struct mtk_disp_postmask_data *data;
> > > +};
> > > +
> > > +int mtk_postmask_clk_enable(struct device *dev)
> > > +{
> > > + struct mtk_disp_postmask *postmask = dev_get_drvdata(dev);
> > > +
> > > + return clk_prepare_enable(postmask->clk);
> > > +}
> > > +
> > > +void mtk_postmask_clk_disable(struct device *dev)
> > > +{
> > > + struct mtk_disp_postmask *postmask = dev_get_drvdata(dev);
> > > +
> > > + clk_disable_unprepare(postmask->clk);
> > > +}
> > > +
> > > +void mtk_postmask_config(struct device *dev, unsigned int w,
> > > +  unsigned int h, unsigned int vrefresh,
> > > +  unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
> > > +{
> > > + struct mtk_disp_postmask *postmask = dev_get_drvdata(dev);
> > > +
> > > + mtk_ddp_write(cmdq_pkt, w << 16 | h, &postmask->cmdq_reg, 
> > > postmask->regs,
> > > +   DISP_POSTMASK_SIZE);
> > > + mtk_ddp_write(cmdq_pkt, POSTMASK_RELAY_MODE, &postmask->cmdq_reg,
> > > +   postmask->regs, DISP_POSTMA

Re: [PATCH v4 2/8] drm/mediatek: add component POSTMASK

2021-01-29 Thread CK Hu 
Hi, Hsin-Yi:

On Fri, 2021-01-29 at 15:34 +0800, Hsin-Yi Wang wrote:
> From: Yongqiang Niu 
> 
> This patch add component POSTMASK,
> 
> Signed-off-by: Yongqiang Niu 
> Signed-off-by: Hsin-Yi Wang 
> ---
>  drivers/gpu/drm/mediatek/Makefile|   1 +
>  drivers/gpu/drm/mediatek/mtk_disp_drv.h  |   8 +
>  drivers/gpu/drm/mediatek/mtk_disp_postmask.c | 161 +++
>  drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c  |  11 ++
>  drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h  |   1 +
>  drivers/gpu/drm/mediatek/mtk_drm_drv.c   |   4 +-
>  drivers/gpu/drm/mediatek/mtk_drm_drv.h   |   1 +
>  7 files changed, 186 insertions(+), 1 deletion(-)
>  create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_postmask.c
> 
> diff --git a/drivers/gpu/drm/mediatek/Makefile 
> b/drivers/gpu/drm/mediatek/Makefile
> index b64674b944860..13a0eafabf9c0 100644
> --- a/drivers/gpu/drm/mediatek/Makefile
> +++ b/drivers/gpu/drm/mediatek/Makefile
> @@ -3,6 +3,7 @@
>  mediatek-drm-y := mtk_disp_color.o \
> mtk_disp_gamma.o \
> mtk_disp_ovl.o \
> +   mtk_disp_postmask.o \
> mtk_disp_rdma.o \
> mtk_drm_crtc.o \
> mtk_drm_ddp_comp.o \
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_drv.h 
> b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> index 02191010699f8..d74e85db3fcdf 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> @@ -37,6 +37,14 @@ void mtk_gamma_set_common(void __iomem *regs, struct 
> drm_crtc_state *state);
>  void mtk_gamma_start(struct device *dev);
>  void mtk_gamma_stop(struct device *dev);
>  
> +int mtk_postmask_clk_enable(struct device *dev);
> +void mtk_postmask_clk_disable(struct device *dev);
> +void mtk_postmask_config(struct device *dev, unsigned int w,
> +  unsigned int h, unsigned int vrefresh,
> +  unsigned int bpc, struct cmdq_pkt *cmdq_pkt);
> +void mtk_postmask_start(struct device *dev);
> +void mtk_postmask_stop(struct device *dev);
> +
>  void mtk_ovl_bgclr_in_on(struct device *dev);
>  void mtk_ovl_bgclr_in_off(struct device *dev);
>  void mtk_ovl_bypass_shadow(struct device *dev);
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_postmask.c 
> b/drivers/gpu/drm/mediatek/mtk_disp_postmask.c
> new file mode 100644
> index 0..d640cef9c15a4
> --- /dev/null
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_postmask.c
> @@ -0,0 +1,161 @@
> +/*
> + * SPDX-License-Identifier:
> + *
> + * Copyright (c) 2020 MediaTek Inc.

2021

> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include "mtk_disp_drv.h"
> +#include "mtk_drm_crtc.h"
> +#include "mtk_drm_ddp_comp.h"
> +
> +#define DISP_POSTMASK_EN 0x
> +#define POSTMASK_EN  BIT(0)
> +#define DISP_POSTMASK_CFG0x0020
> +#define POSTMASK_RELAY_MODE  BIT(0)
> +#define DISP_POSTMASK_SIZE   0x0030
> +
> +struct mtk_disp_postmask_data {
> + u32 reserved;
> +};

Useless, so remove.

> +
> +/**
> + * struct mtk_disp_postmask - DISP_postmask driver structure
> + * @ddp_comp - structure containing type enum and hardware resources
> + * @crtc - associated crtc to report irq events to
> + */
> +struct mtk_disp_postmask {
> + struct clk *clk;
> + void __iomem *regs;
> + struct cmdq_client_reg cmdq_reg;
> + const struct mtk_disp_postmask_data *data;
> +};
> +
> +int mtk_postmask_clk_enable(struct device *dev)
> +{
> + struct mtk_disp_postmask *postmask = dev_get_drvdata(dev);
> +
> + return clk_prepare_enable(postmask->clk);
> +}
> +
> +void mtk_postmask_clk_disable(struct device *dev)
> +{
> + struct mtk_disp_postmask *postmask = dev_get_drvdata(dev);
> +
> + clk_disable_unprepare(postmask->clk);
> +}
> +
> +void mtk_postmask_config(struct device *dev, unsigned int w,
> +  unsigned int h, unsigned int vrefresh,
> +  unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
> +{
> + struct mtk_disp_postmask *postmask = dev_get_drvdata(dev);
> +
> + mtk_ddp_write(cmdq_pkt, w << 16 | h, &postmask->cmdq_reg, 
> postmask->regs,
> +   DISP_POSTMASK_SIZE);
> + mtk_ddp_write(cmdq_pkt, POSTMASK_RELAY_MODE, &postmask->cmdq_reg,
> +   postmask->regs, DISP_POSTMASK_CFG);
> +}
> +
> +void mtk_postmask_start(struct device *dev)
> +{
> + struct mtk_disp_postmask *postmask = dev_get_drvdata(dev);
> +
> + writel(POSTMASK_EN, postmask->regs + DISP_POSTMASK_EN);
> +}
> +
> +void mtk_postmask_stop(struct device *dev)
> +{
> + struct mtk_disp_postmask *postmask = dev_get_drvdata(dev);
> +
> + writel_relaxed(0x0, postmask->regs + DISP_POSTMASK_EN);
> +}
> +
> +static int mtk_disp_postmask_bind(struct device *dev, struct device *master, 
> void *data)
> +{
> + return 0;
> +}
> +
> +static void mtk_disp_po

[PATCH v4 2/8] drm/mediatek: add component POSTMASK

2021-01-29 Thread Hsin-Yi Wang 
From: Yongqiang Niu 

This patch add component POSTMASK,

Signed-off-by: Yongqiang Niu 
Signed-off-by: Hsin-Yi Wang 
---
 drivers/gpu/drm/mediatek/Makefile|   1 +
 drivers/gpu/drm/mediatek/mtk_disp_drv.h  |   8 +
 drivers/gpu/drm/mediatek/mtk_disp_postmask.c | 161 +++
 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c  |  11 ++
 drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h  |   1 +
 drivers/gpu/drm/mediatek/mtk_drm_drv.c   |   4 +-
 drivers/gpu/drm/mediatek/mtk_drm_drv.h   |   1 +
 7 files changed, 186 insertions(+), 1 deletion(-)
 create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_postmask.c

diff --git a/drivers/gpu/drm/mediatek/Makefile 
b/drivers/gpu/drm/mediatek/Makefile
index b64674b944860..13a0eafabf9c0 100644
--- a/drivers/gpu/drm/mediatek/Makefile
+++ b/drivers/gpu/drm/mediatek/Makefile
@@ -3,6 +3,7 @@
 mediatek-drm-y := mtk_disp_color.o \
  mtk_disp_gamma.o \
  mtk_disp_ovl.o \
+ mtk_disp_postmask.o \
  mtk_disp_rdma.o \
  mtk_drm_crtc.o \
  mtk_drm_ddp_comp.o \
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_drv.h 
b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
index 02191010699f8..d74e85db3fcdf 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_drv.h
+++ b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
@@ -37,6 +37,14 @@ void mtk_gamma_set_common(void __iomem *regs, struct 
drm_crtc_state *state);
 void mtk_gamma_start(struct device *dev);
 void mtk_gamma_stop(struct device *dev);
 
+int mtk_postmask_clk_enable(struct device *dev);
+void mtk_postmask_clk_disable(struct device *dev);
+void mtk_postmask_config(struct device *dev, unsigned int w,
+  unsigned int h, unsigned int vrefresh,
+  unsigned int bpc, struct cmdq_pkt *cmdq_pkt);
+void mtk_postmask_start(struct device *dev);
+void mtk_postmask_stop(struct device *dev);
+
 void mtk_ovl_bgclr_in_on(struct device *dev);
 void mtk_ovl_bgclr_in_off(struct device *dev);
 void mtk_ovl_bypass_shadow(struct device *dev);
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_postmask.c 
b/drivers/gpu/drm/mediatek/mtk_disp_postmask.c
new file mode 100644
index 0..d640cef9c15a4
--- /dev/null
+++ b/drivers/gpu/drm/mediatek/mtk_disp_postmask.c
@@ -0,0 +1,161 @@
+/*
+ * SPDX-License-Identifier:
+ *
+ * Copyright (c) 2020 MediaTek Inc.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "mtk_disp_drv.h"
+#include "mtk_drm_crtc.h"
+#include "mtk_drm_ddp_comp.h"
+
+#define DISP_POSTMASK_EN   0x
+#define POSTMASK_ENBIT(0)
+#define DISP_POSTMASK_CFG  0x0020
+#define POSTMASK_RELAY_MODEBIT(0)
+#define DISP_POSTMASK_SIZE 0x0030
+
+struct mtk_disp_postmask_data {
+   u32 reserved;
+};
+
+/**
+ * struct mtk_disp_postmask - DISP_postmask driver structure
+ * @ddp_comp - structure containing type enum and hardware resources
+ * @crtc - associated crtc to report irq events to
+ */
+struct mtk_disp_postmask {
+   struct clk *clk;
+   void __iomem *regs;
+   struct cmdq_client_reg cmdq_reg;
+   const struct mtk_disp_postmask_data *data;
+};
+
+int mtk_postmask_clk_enable(struct device *dev)
+{
+   struct mtk_disp_postmask *postmask = dev_get_drvdata(dev);
+
+   return clk_prepare_enable(postmask->clk);
+}
+
+void mtk_postmask_clk_disable(struct device *dev)
+{
+   struct mtk_disp_postmask *postmask = dev_get_drvdata(dev);
+
+   clk_disable_unprepare(postmask->clk);
+}
+
+void mtk_postmask_config(struct device *dev, unsigned int w,
+unsigned int h, unsigned int vrefresh,
+unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
+{
+   struct mtk_disp_postmask *postmask = dev_get_drvdata(dev);
+
+   mtk_ddp_write(cmdq_pkt, w << 16 | h, &postmask->cmdq_reg, 
postmask->regs,
+ DISP_POSTMASK_SIZE);
+   mtk_ddp_write(cmdq_pkt, POSTMASK_RELAY_MODE, &postmask->cmdq_reg,
+ postmask->regs, DISP_POSTMASK_CFG);
+}
+
+void mtk_postmask_start(struct device *dev)
+{
+   struct mtk_disp_postmask *postmask = dev_get_drvdata(dev);
+
+   writel(POSTMASK_EN, postmask->regs + DISP_POSTMASK_EN);
+}
+
+void mtk_postmask_stop(struct device *dev)
+{
+   struct mtk_disp_postmask *postmask = dev_get_drvdata(dev);
+
+   writel_relaxed(0x0, postmask->regs + DISP_POSTMASK_EN);
+}
+
+static int mtk_disp_postmask_bind(struct device *dev, struct device *master, 
void *data)
+{
+   return 0;
+}
+
+static void mtk_disp_postmask_unbind(struct device *dev, struct device *master,
+ void *data)
+{
+}
+
+static const struct component_ops mtk_disp_postmask_component_ops = {
+   .bind   = mtk_disp_postmask_bind,
+   .unbind = mtk_disp_postmask_unbind,
+};
+
+static int mtk_disp_postmask_probe(struct platform_de