Re: [PATCH v4 4/8] drm/i915/selftest_migrate: Check CCS meta data clear
On 2022-03-21 at 16:09:08 +0530, Hellstrom, Thomas wrote:
> On Sun, 2022-03-20 at 02:12 +0530, Ramalingam C wrote:
> > While clearing the Flat-CCS capable lmem object, we need to clear the
> > CCS
> > meta data corresponding to the memory.
> >
> > As part of live_migrate_clear add check for the ccs meta data clear
> > for
> > the Flat-CCS capable lmem object.
> >
> > Signed-off-by: Ramalingam C
> > ---
> > drivers/gpu/drm/i915/gt/intel_migrate.c| 32 +++
> > drivers/gpu/drm/i915/gt/selftest_migrate.c | 274 ++-
> > --
> > 2 files changed, 278 insertions(+), 28 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/gt/intel_migrate.c
> > b/drivers/gpu/drm/i915/gt/intel_migrate.c
> > index c1db8daf994a..bbfea570c239 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_migrate.c
> > +++ b/drivers/gpu/drm/i915/gt/intel_migrate.c
> > @@ -572,6 +572,38 @@ static u32 *_i915_ctrl_surf_copy_blt(u32 *cmd,
> > u64 src_addr, u64 dst_addr,
> > return cmd;
> > }
> >
> > +static int emit_copy_ccs(struct i915_request *rq,
> > +u32 dst_offset, u8 dst_access,
> > +u32 src_offset, u8 src_access, int size)
> > +{
> > + struct drm_i915_private *i915 = rq->engine->i915;
> > + int mocs = rq->engine->gt->mocs.uc_index << 1;
> > + u32 num_ccs_blks, ccs_ring_size;
> > + u32 *cs;
> > +
> > + ccs_ring_size = calc_ctrl_surf_instr_size(i915, size);
> > + WARN_ON(!ccs_ring_size);
> > +
> > + cs = intel_ring_begin(rq, round_up(ccs_ring_size, 2));
> > + if (IS_ERR(cs))
> > + return PTR_ERR(cs);
> > +
> > + num_ccs_blks = DIV_ROUND_UP(GET_CCS_BYTES(i915, size),
> > + NUM_CCS_BYTES_PER_BLOCK);
> > +
> > + cs = i915_flush_dw(cs, MI_FLUSH_DW_LLC | MI_FLUSH_DW_CCS);
> > + cs = _i915_ctrl_surf_copy_blt(cs, src_offset, dst_offset,
> > + src_access, dst_access,
> > + mocs, mocs, num_ccs_blks);
> > + cs = i915_flush_dw(cs, MI_FLUSH_DW_LLC | MI_FLUSH_DW_CCS);
> > + if (ccs_ring_size & 1)
> > + *cs++ = MI_NOOP;
> > +
> > + intel_ring_advance(rq, cs);
> > +
> > + return 0;
> > +}
>
>
> This would be an unused function if selftests are not configured,
> right?
No Thomas. This is reused between selftest and eviction flow. in next
version i am reusing it for evict_clear too.
>
>
> > +
> > static int emit_copy(struct i915_request *rq,
> > u32 dst_offset, u32 src_offset, int size)
> > {
> > diff --git a/drivers/gpu/drm/i915/gt/selftest_migrate.c
> > b/drivers/gpu/drm/i915/gt/selftest_migrate.c
> > index b5da8b8cd039..e32cc994f4a2 100644
> > --- a/drivers/gpu/drm/i915/gt/selftest_migrate.c
> > +++ b/drivers/gpu/drm/i915/gt/selftest_migrate.c
> > @@ -132,6 +132,126 @@ static int copy(struct intel_migrate *migrate,
> > return err;
> > }
> >
> > +static int intel_context_copy_ccs(struct intel_context *ce,
> > + const struct i915_deps *deps,
> > + struct scatterlist *sg,
> > + enum i915_cache_level cache_level,
> > + bool write_to_ccs,
> > + struct i915_request **out)
> > +{
> > + u8 src_access = write_to_ccs ? DIRECT_ACCESS :
> > INDIRECT_ACCESS;
> > + u8 dst_access = write_to_ccs ? INDIRECT_ACCESS :
> > DIRECT_ACCESS;
> > + struct sgt_dma it = sg_sgt(sg);
> > + struct i915_request *rq;
> > + u32 offset;
> > + int err;
> > +
> > + GEM_BUG_ON(ce->vm != ce->engine->gt->migrate.context->vm);
> > + *out = NULL;
> > +
> > + GEM_BUG_ON(ce->ring->size < SZ_64K);
> > +
> > + offset = 0;
> > + if (HAS_64K_PAGES(ce->engine->i915))
> > + offset = CHUNK_SZ;
> > + offset += (u64)rq->engine->instance << 32;
> > +
> > + do {
> > + int len;
> > +
> > + rq = i915_request_create(ce);
> > + if (IS_ERR(rq)) {
> > + err = PTR_ERR(rq);
> > + goto out_ce;
> > + }
> > +
> > + if (deps) {
> > + err = i915_request_await_deps(rq, deps);
> > + if (err)
> > + goto out_rq;
> > +
> > + if (rq->engine->emit_init_breadcrumb) {
> > + err = rq->engine-
> > >emit_init_breadcrumb(rq);
> > + if (err)
> > + goto out_rq;
> > + }
> > +
> > + deps = NULL;
> > + }
> > +
> > + /* The PTE updates + clear must not be interrupted.
> > */
> > + err = emit_no_arbitration(rq);
> > + if (err)
> > + goto out_rq;
Re: [PATCH v4 4/8] drm/i915/selftest_migrate: Check CCS meta data clear
On Sun, 2022-03-20 at 02:12 +0530, Ramalingam C wrote:
> While clearing the Flat-CCS capable lmem object, we need to clear the
> CCS
> meta data corresponding to the memory.
>
> As part of live_migrate_clear add check for the ccs meta data clear
> for
> the Flat-CCS capable lmem object.
>
> Signed-off-by: Ramalingam C
> ---
> drivers/gpu/drm/i915/gt/intel_migrate.c | 32 +++
> drivers/gpu/drm/i915/gt/selftest_migrate.c | 274 ++-
> --
> 2 files changed, 278 insertions(+), 28 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_migrate.c
> b/drivers/gpu/drm/i915/gt/intel_migrate.c
> index c1db8daf994a..bbfea570c239 100644
> --- a/drivers/gpu/drm/i915/gt/intel_migrate.c
> +++ b/drivers/gpu/drm/i915/gt/intel_migrate.c
> @@ -572,6 +572,38 @@ static u32 *_i915_ctrl_surf_copy_blt(u32 *cmd,
> u64 src_addr, u64 dst_addr,
> return cmd;
> }
>
> +static int emit_copy_ccs(struct i915_request *rq,
> + u32 dst_offset, u8 dst_access,
> + u32 src_offset, u8 src_access, int size)
> +{
> + struct drm_i915_private *i915 = rq->engine->i915;
> + int mocs = rq->engine->gt->mocs.uc_index << 1;
> + u32 num_ccs_blks, ccs_ring_size;
> + u32 *cs;
> +
> + ccs_ring_size = calc_ctrl_surf_instr_size(i915, size);
> + WARN_ON(!ccs_ring_size);
> +
> + cs = intel_ring_begin(rq, round_up(ccs_ring_size, 2));
> + if (IS_ERR(cs))
> + return PTR_ERR(cs);
> +
> + num_ccs_blks = DIV_ROUND_UP(GET_CCS_BYTES(i915, size),
> + NUM_CCS_BYTES_PER_BLOCK);
> +
> + cs = i915_flush_dw(cs, MI_FLUSH_DW_LLC | MI_FLUSH_DW_CCS);
> + cs = _i915_ctrl_surf_copy_blt(cs, src_offset, dst_offset,
> + src_access, dst_access,
> + mocs, mocs, num_ccs_blks);
> + cs = i915_flush_dw(cs, MI_FLUSH_DW_LLC | MI_FLUSH_DW_CCS);
> + if (ccs_ring_size & 1)
> + *cs++ = MI_NOOP;
> +
> + intel_ring_advance(rq, cs);
> +
> + return 0;
> +}
This would be an unused function if selftests are not configured,
right?
> +
> static int emit_copy(struct i915_request *rq,
> u32 dst_offset, u32 src_offset, int size)
> {
> diff --git a/drivers/gpu/drm/i915/gt/selftest_migrate.c
> b/drivers/gpu/drm/i915/gt/selftest_migrate.c
> index b5da8b8cd039..e32cc994f4a2 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_migrate.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_migrate.c
> @@ -132,6 +132,126 @@ static int copy(struct intel_migrate *migrate,
> return err;
> }
>
> +static int intel_context_copy_ccs(struct intel_context *ce,
> + const struct i915_deps *deps,
> + struct scatterlist *sg,
> + enum i915_cache_level cache_level,
> + bool write_to_ccs,
> + struct i915_request **out)
> +{
> + u8 src_access = write_to_ccs ? DIRECT_ACCESS :
> INDIRECT_ACCESS;
> + u8 dst_access = write_to_ccs ? INDIRECT_ACCESS :
> DIRECT_ACCESS;
> + struct sgt_dma it = sg_sgt(sg);
> + struct i915_request *rq;
> + u32 offset;
> + int err;
> +
> + GEM_BUG_ON(ce->vm != ce->engine->gt->migrate.context->vm);
> + *out = NULL;
> +
> + GEM_BUG_ON(ce->ring->size < SZ_64K);
> +
> + offset = 0;
> + if (HAS_64K_PAGES(ce->engine->i915))
> + offset = CHUNK_SZ;
> + offset += (u64)rq->engine->instance << 32;
> +
> + do {
> + int len;
> +
> + rq = i915_request_create(ce);
> + if (IS_ERR(rq)) {
> + err = PTR_ERR(rq);
> + goto out_ce;
> + }
> +
> + if (deps) {
> + err = i915_request_await_deps(rq, deps);
> + if (err)
> + goto out_rq;
> +
> + if (rq->engine->emit_init_breadcrumb) {
> + err = rq->engine-
> >emit_init_breadcrumb(rq);
> + if (err)
> + goto out_rq;
> + }
> +
> + deps = NULL;
> + }
> +
> + /* The PTE updates + clear must not be interrupted.
> */
> + err = emit_no_arbitration(rq);
> + if (err)
> + goto out_rq;
> +
> + len = emit_pte(rq, , cache_level, true, offset,
> CHUNK_SZ);
> + if (len <= 0) {
> + err = len;
> + goto out_rq;
> + }
> +
> + err = rq->engine->emit_flush(rq, EMIT_INVALIDATE);
> + if (err)
> + goto out_rq;
> +
> + err = emit_copy_ccs(rq, offset, dst_access,
> +
Re: [Intel-gfx] [PATCH v4 4/8] drm/i915/selftest_migrate: Check CCS meta data clear
Hi Ramalingam,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on drm/drm-next drm-tip/drm-tip next-20220318]
[cannot apply to v5.17-rc8]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url:
https://github.com/0day-ci/linux/commits/Ramalingam-C/drm-i915-ttm-Evict-and-restore-of-compressed-object/20220320-044242
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: i386-allyesconfig
(https://download.01.org/0day-ci/archive/20220320/202203200912.4mqfvte9-...@intel.com/config)
compiler: gcc-9 (Ubuntu 9.4.0-1ubuntu1~20.04) 9.4.0
reproduce (this is a W=1 build):
#
https://github.com/0day-ci/linux/commit/afd58bdbf43437bf72ff2313776c3036ebf99a11
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review
Ramalingam-C/drm-i915-ttm-Evict-and-restore-of-compressed-object/20220320-044242
git checkout afd58bdbf43437bf72ff2313776c3036ebf99a11
# save the config file to linux build tree
mkdir build_dir
make W=1 O=build_dir ARCH=i386 SHELL=/bin/bash
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot
All errors (new ones prefixed by >>):
In file included from include/linux/kernel.h:29,
from arch/x86/include/asm/percpu.h:27,
from arch/x86/include/asm/current.h:6,
from arch/x86/include/asm/processor.h:17,
from arch/x86/include/asm/kvm_para.h:5,
from arch/x86/include/asm/hypervisor.h:37,
from drivers/gpu/drm/i915/i915_drv.h:35,
from drivers/gpu/drm/i915/gt/intel_migrate.c:6:
drivers/gpu/drm/i915/gt/selftest_migrate.c: In function 'clear':
>> include/linux/kern_levels.h:5:18: error: format '%lu' expects argument of
>> type 'long unsigned int', but argument 4 has type 'unsigned int'
>> [-Werror=format=]
5 | #define KERN_SOH "\001" /* ASCII Start Of Header */
| ^~
include/linux/printk.h:418:11: note: in definition of macro
'printk_index_wrap'
418 | _p_func(_fmt, ##__VA_ARGS__);\
| ^~~~
include/linux/printk.h:489:2: note: in expansion of macro 'printk'
489 | printk(KERN_ERR pr_fmt(fmt), ##__VA_ARGS__)
| ^~
include/linux/kern_levels.h:11:18: note: in expansion of macro 'KERN_SOH'
11 | #define KERN_ERR KERN_SOH "3" /* error conditions */
| ^~~~
include/linux/printk.h:489:9: note: in expansion of macro 'KERN_ERR'
489 | printk(KERN_ERR pr_fmt(fmt), ##__VA_ARGS__)
| ^~~~
drivers/gpu/drm/i915/gt/selftest_migrate.c:403:6: note: in expansion of
macro 'pr_err'
403 | pr_err("%ps ccs clearing failed, offset: %d/%lu\n",
| ^~
In file included from drivers/gpu/drm/i915/gt/intel_migrate.c:1014:
drivers/gpu/drm/i915/gt/selftest_migrate.c:403:52: note: format string is
defined here
403 | pr_err("%ps ccs clearing failed, offset: %d/%lu\n",
| ~~^
||
|long unsigned int
| %u
drivers/gpu/drm/i915/gt/intel_migrate.c: In function
'intel_context_copy_ccs':
>> drivers/gpu/drm/i915/gt/selftest_migrate.c:157:19: error: 'rq' is used
>> uninitialized in this function [-Werror=uninitialized]
157 | offset += (u64)rq->engine->instance << 32;
| ~~^~~~
cc1: all warnings being treated as errors
vim +/rq +157 drivers/gpu/drm/i915/gt/selftest_migrate.c
134
135 static int intel_context_copy_ccs(struct intel_context *ce,
136const struct i915_deps *deps,
137struct scatterlist *sg,
138enum i915_cache_level cache_level,
139bool write_to_ccs,
140struct i915_request **out)
141 {
142 u8 src_access = write_to_ccs ? DIRECT_ACCESS : INDIRECT_ACCESS;
143 u8 dst_access = write_to_ccs ? INDIRECT_ACCESS : DIRECT_ACCESS;
144 struct sgt_dma it = sg_sgt(sg);
145 struct i915_request *rq;
146 u32 offset;
147 int err;
148
149 GEM_BUG_ON(ce->vm != ce->engine->gt->migrate.context->vm);
150 *out = NULL;
151
152 GEM_BUG_ON(ce->ring->size < SZ_64K);
153
154 offset = 0;
155 if (HAS_64K_PAGES(ce->engine->i915))
156 offset
[PATCH v4 4/8] drm/i915/selftest_migrate: Check CCS meta data clear
While clearing the Flat-CCS capable lmem object, we need to clear the CCS
meta data corresponding to the memory.
As part of live_migrate_clear add check for the ccs meta data clear for
the Flat-CCS capable lmem object.
Signed-off-by: Ramalingam C
---
drivers/gpu/drm/i915/gt/intel_migrate.c| 32 +++
drivers/gpu/drm/i915/gt/selftest_migrate.c | 274 ++---
2 files changed, 278 insertions(+), 28 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_migrate.c
b/drivers/gpu/drm/i915/gt/intel_migrate.c
index c1db8daf994a..bbfea570c239 100644
--- a/drivers/gpu/drm/i915/gt/intel_migrate.c
+++ b/drivers/gpu/drm/i915/gt/intel_migrate.c
@@ -572,6 +572,38 @@ static u32 *_i915_ctrl_surf_copy_blt(u32 *cmd, u64
src_addr, u64 dst_addr,
return cmd;
}
+static int emit_copy_ccs(struct i915_request *rq,
+u32 dst_offset, u8 dst_access,
+u32 src_offset, u8 src_access, int size)
+{
+ struct drm_i915_private *i915 = rq->engine->i915;
+ int mocs = rq->engine->gt->mocs.uc_index << 1;
+ u32 num_ccs_blks, ccs_ring_size;
+ u32 *cs;
+
+ ccs_ring_size = calc_ctrl_surf_instr_size(i915, size);
+ WARN_ON(!ccs_ring_size);
+
+ cs = intel_ring_begin(rq, round_up(ccs_ring_size, 2));
+ if (IS_ERR(cs))
+ return PTR_ERR(cs);
+
+ num_ccs_blks = DIV_ROUND_UP(GET_CCS_BYTES(i915, size),
+ NUM_CCS_BYTES_PER_BLOCK);
+
+ cs = i915_flush_dw(cs, MI_FLUSH_DW_LLC | MI_FLUSH_DW_CCS);
+ cs = _i915_ctrl_surf_copy_blt(cs, src_offset, dst_offset,
+ src_access, dst_access,
+ mocs, mocs, num_ccs_blks);
+ cs = i915_flush_dw(cs, MI_FLUSH_DW_LLC | MI_FLUSH_DW_CCS);
+ if (ccs_ring_size & 1)
+ *cs++ = MI_NOOP;
+
+ intel_ring_advance(rq, cs);
+
+ return 0;
+}
+
static int emit_copy(struct i915_request *rq,
u32 dst_offset, u32 src_offset, int size)
{
diff --git a/drivers/gpu/drm/i915/gt/selftest_migrate.c
b/drivers/gpu/drm/i915/gt/selftest_migrate.c
index b5da8b8cd039..e32cc994f4a2 100644
--- a/drivers/gpu/drm/i915/gt/selftest_migrate.c
+++ b/drivers/gpu/drm/i915/gt/selftest_migrate.c
@@ -132,6 +132,126 @@ static int copy(struct intel_migrate *migrate,
return err;
}
+static int intel_context_copy_ccs(struct intel_context *ce,
+ const struct i915_deps *deps,
+ struct scatterlist *sg,
+ enum i915_cache_level cache_level,
+ bool write_to_ccs,
+ struct i915_request **out)
+{
+ u8 src_access = write_to_ccs ? DIRECT_ACCESS : INDIRECT_ACCESS;
+ u8 dst_access = write_to_ccs ? INDIRECT_ACCESS : DIRECT_ACCESS;
+ struct sgt_dma it = sg_sgt(sg);
+ struct i915_request *rq;
+ u32 offset;
+ int err;
+
+ GEM_BUG_ON(ce->vm != ce->engine->gt->migrate.context->vm);
+ *out = NULL;
+
+ GEM_BUG_ON(ce->ring->size < SZ_64K);
+
+ offset = 0;
+ if (HAS_64K_PAGES(ce->engine->i915))
+ offset = CHUNK_SZ;
+ offset += (u64)rq->engine->instance << 32;
+
+ do {
+ int len;
+
+ rq = i915_request_create(ce);
+ if (IS_ERR(rq)) {
+ err = PTR_ERR(rq);
+ goto out_ce;
+ }
+
+ if (deps) {
+ err = i915_request_await_deps(rq, deps);
+ if (err)
+ goto out_rq;
+
+ if (rq->engine->emit_init_breadcrumb) {
+ err = rq->engine->emit_init_breadcrumb(rq);
+ if (err)
+ goto out_rq;
+ }
+
+ deps = NULL;
+ }
+
+ /* The PTE updates + clear must not be interrupted. */
+ err = emit_no_arbitration(rq);
+ if (err)
+ goto out_rq;
+
+ len = emit_pte(rq, , cache_level, true, offset, CHUNK_SZ);
+ if (len <= 0) {
+ err = len;
+ goto out_rq;
+ }
+
+ err = rq->engine->emit_flush(rq, EMIT_INVALIDATE);
+ if (err)
+ goto out_rq;
+
+ err = emit_copy_ccs(rq, offset, dst_access,
+ offset, src_access, len);
+ if (err)
+ goto out_rq;
+
+ err = rq->engine->emit_flush(rq, EMIT_INVALIDATE |
+MI_FLUSH_DW_CCS);
+
+ /* Arbitration is re-enabled between requests. */
+out_rq:
+ if (*out)
+ i915_request_put(*out);
+
