[PATCH v6 15/15] ARM: dts: rename the clock of MIPI DSI 'pll_clk' to 'sclk_mipi'
On 23.06.2015 11:28, Inki Dae wrote: > On 2015ë 06ì 23ì¼ 11:10, Krzysztof Kozlowski wrote: >> 2015-06-22 21:35 GMT+09:00 Krzysztof Kozlowski : >>> 2015-06-22 20:42 GMT+09:00 Inki Dae : + Krzysztof On 2015ë 06ì 22ì¼ 18:10, Inki Dae wrote: > On 2015ë 06ì 12ì¼ 21:59, Hyungwon Hwang wrote: >> The clock which was named as 'pll_clk' is actually not the clock source >> of PLL in MIPI DSI. This patch fixes this disagreement. > > Mr. Kukjin and Krzysztof, can you give me Acked-by or Singed-off-by? I'd > like to merge this patch to mainline through drm-next. >>> >>> Thanks for forwarding me other necessary patch. All that burden could >>> be easily avoided by sending everything to samsung-soc anyway. >>> >>> The patch itself looks good: >>> Acked-by: Krzysztof Kozlowski >>> >>> Best regards, >>> Krzysztof >> >> To clarify. There were seven versions of this patch and none of them >> were sent to samsung-soc list, to Kukjin Kim or to me. >> >> I also wonder about patch 2: "of: add helper for getting endpoint node >> with specific identifiers" >> for which I can't find respective ack from Rob Herring (+Cc). I only found >> this: >> http://www.spinics.net/lists/devicetree/msg69336.html >> but there are only comments, not an ack. > > Below is the comments from Rob Herring. How about subscribing device > tree mainling list? You are a maintainer of Exynos SoC. This patch was > posted to device tree mailing list ccing Grant and Rob. If you listen to > only Samsung SoC mailing list then you couldn't find this patch in your > email box. Some time ago I was subscribing devicetree, but as I am not device tree maintainer and the traffic there is really huge, I unsubscribed. > > "On Sun, Feb 22, 2015 at 7:41 PM, Hyungwon Hwang > wrote: > > When there are multiple ports or multiple endpoints in a port, they > have to be > > distinguished by the value of reg property. It is common. The drivers > can get > > the specific endpoint in the specific port via this function. Now the > drivers > > have to implement this code in themselves or have to force the order > of dt nodes > > to get the right node. > > > > Signed-off-by: Hyungwon Hwang > > Acked-by: Rob Herring > > I'm not applying as there is no user, so apply this patch along with a > user of the function." Thanks! That helped me finding it in the archives. Best regards, Krzysztof
[PATCH v6 15/15] ARM: dts: rename the clock of MIPI DSI 'pll_clk' to 'sclk_mipi'
On 2015ë 06ì 23ì¼ 11:10, Krzysztof Kozlowski wrote: > 2015-06-22 21:35 GMT+09:00 Krzysztof Kozlowski : >> 2015-06-22 20:42 GMT+09:00 Inki Dae : >>> + Krzysztof >>> >>> On 2015ë 06ì 22ì¼ 18:10, Inki Dae wrote: On 2015ë 06ì 12ì¼ 21:59, Hyungwon Hwang wrote: > The clock which was named as 'pll_clk' is actually not the clock source > of PLL in MIPI DSI. This patch fixes this disagreement. Mr. Kukjin and Krzysztof, can you give me Acked-by or Singed-off-by? I'd like to merge this patch to mainline through drm-next. >> >> Thanks for forwarding me other necessary patch. All that burden could >> be easily avoided by sending everything to samsung-soc anyway. >> >> The patch itself looks good: >> Acked-by: Krzysztof Kozlowski >> >> Best regards, >> Krzysztof > > To clarify. There were seven versions of this patch and none of them > were sent to samsung-soc list, to Kukjin Kim or to me. > > I also wonder about patch 2: "of: add helper for getting endpoint node > with specific identifiers" > for which I can't find respective ack from Rob Herring (+Cc). I only found > this: > http://www.spinics.net/lists/devicetree/msg69336.html > but there are only comments, not an ack. Below is the comments from Rob Herring. How about subscribing device tree mainling list? You are a maintainer of Exynos SoC. This patch was posted to device tree mailing list ccing Grant and Rob. If you listen to only Samsung SoC mailing list then you couldn't find this patch in your email box. "On Sun, Feb 22, 2015 at 7:41 PM, Hyungwon Hwang wrote: > When there are multiple ports or multiple endpoints in a port, they have to be > distinguished by the value of reg property. It is common. The drivers can get > the specific endpoint in the specific port via this function. Now the drivers > have to implement this code in themselves or have to force the order of dt nodes > to get the right node. > > Signed-off-by: Hyungwon Hwang Acked-by: Rob Herring I'm not applying as there is no user, so apply this patch along with a user of the function." That is why I merged this patch to exynos-drm-next. Thanks, Inki Dae > > Best regards, > Krzysztof > -- > To unsubscribe from this list: send the line "unsubscribe devicetree" in >
[PATCH v6 15/15] ARM: dts: rename the clock of MIPI DSI 'pll_clk' to 'sclk_mipi'
2015-06-22 21:35 GMT+09:00 Krzysztof Kozlowski : > 2015-06-22 20:42 GMT+09:00 Inki Dae : >> + Krzysztof >> >> On 2015ë 06ì 22ì¼ 18:10, Inki Dae wrote: >>> On 2015ë 06ì 12ì¼ 21:59, Hyungwon Hwang wrote: The clock which was named as 'pll_clk' is actually not the clock source of PLL in MIPI DSI. This patch fixes this disagreement. >>> >>> Mr. Kukjin and Krzysztof, can you give me Acked-by or Singed-off-by? I'd >>> like to merge this patch to mainline through drm-next. > > Thanks for forwarding me other necessary patch. All that burden could > be easily avoided by sending everything to samsung-soc anyway. > > The patch itself looks good: > Acked-by: Krzysztof Kozlowski > > Best regards, > Krzysztof To clarify. There were seven versions of this patch and none of them were sent to samsung-soc list, to Kukjin Kim or to me. I also wonder about patch 2: "of: add helper for getting endpoint node with specific identifiers" for which I can't find respective ack from Rob Herring (+Cc). I only found this: http://www.spinics.net/lists/devicetree/msg69336.html but there are only comments, not an ack. Best regards, Krzysztof
[PATCH v6 15/15] ARM: dts: rename the clock of MIPI DSI 'pll_clk' to 'sclk_mipi'
2015-06-22 20:42 GMT+09:00 Inki Dae : > + Krzysztof > > On 2015ë 06ì 22ì¼ 18:10, Inki Dae wrote: >> On 2015ë 06ì 12ì¼ 21:59, Hyungwon Hwang wrote: >>> The clock which was named as 'pll_clk' is actually not the clock source >>> of PLL in MIPI DSI. This patch fixes this disagreement. >> >> Mr. Kukjin and Krzysztof, can you give me Acked-by or Singed-off-by? I'd >> like to merge this patch to mainline through drm-next. Thanks for forwarding me other necessary patch. All that burden could be easily avoided by sending everything to samsung-soc anyway. The patch itself looks good: Acked-by: Krzysztof Kozlowski Best regards, Krzysztof >> >> Thanks, >> Inki Dae >> >>> >>> Signed-off-by: Hyungwon Hwang >>> --- >>> Changes before: >>> - Refer https://patchwork.kernel.org/patch/6191811 >>> Changes for v6: >>> - None >>> >>> arch/arm/boot/dts/exynos4.dtsi | 2 +- >>> 1 file changed, 1 insertion(+), 1 deletion(-) >>> >>> diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi >>> index e20cdc2..1538d7a 100644 >>> --- a/arch/arm/boot/dts/exynos4.dtsi >>> +++ b/arch/arm/boot/dts/exynos4.dtsi >>> @@ -167,7 +167,7 @@ >>> phys = <_phy 1>; >>> phy-names = "dsim"; >>> clocks = < CLK_DSIM0>, < CLK_SCLK_MIPI0>; >>> -clock-names = "bus_clk", "pll_clk"; >>> +clock-names = "bus_clk", "sclk_mipi"; >>> status = "disabled"; >>> #address-cells = <1>; >>> #size-cells = <0>; >>> -- >>> 1.9.1 >>> >>> -- >>> To unsubscribe from this list: send the line "unsubscribe devicetree" in >>> the body of a message to majordomo at vger.kernel.org >>> More majordomo info at http://vger.kernel.org/majordomo-info.html >>> >> >
[PATCH v6 15/15] ARM: dts: rename the clock of MIPI DSI 'pll_clk' to 'sclk_mipi'
2015-06-22 21:10 GMT+09:00 Inki Dae :
> On 2015ë
06ì 22ì¼ 20:59, Krzysztof Kozlowski wrote:
>> 2015-06-22 20:42 GMT+09:00 Inki Dae :
>>> + Krzysztof
>>>
>>> On 2015ë
06ì 22ì¼ 18:10, Inki Dae wrote:
On 2015ë
06ì 12ì¼ 21:59, Hyungwon Hwang wrote:
> The clock which was named as 'pll_clk' is actually not the clock source
> of PLL in MIPI DSI. This patch fixes this disagreement.
Mr. Kukjin and Krzysztof, can you give me Acked-by or Singed-off-by? I'd
like to merge this patch to mainline through drm-next.
>>
>> Dear Hyungwon Hwang,
>>
>> Please always CC samsung-soc mailing list on such patches. I won't
>> receive it on my personal email if you don't CC the list. The
>> get_maintainers.pl gives necessary addresses.
>>
>> Comment below,
>>
Thanks,
Inki Dae
>
> Signed-off-by: Hyungwon Hwang
> ---
> Changes before:
> - Refer https://patchwork.kernel.org/patch/6191811
> Changes for v6:
> - None
>
> arch/arm/boot/dts/exynos4.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/exynos4.dtsi
> b/arch/arm/boot/dts/exynos4.dtsi
> index e20cdc2..1538d7a 100644
> --- a/arch/arm/boot/dts/exynos4.dtsi
> +++ b/arch/arm/boot/dts/exynos4.dtsi
> @@ -167,7 +167,7 @@
> phys = <_phy 1>;
> phy-names = "dsim";
> clocks = < CLK_DSIM0>, < CLK_SCLK_MIPI0>;
> -clock-names = "bus_clk", "pll_clk";
> +clock-names = "bus_clk", "sclk_mipi";
>>
>> It seems wrong. The driver fetches reference from a name of "pll_clk",
>> not "sclk_mipi". Also bindings documentation mentions pll_clk and
>> bus_clk only.
>
> Krzysztof,
>
> There is your missing point. The driver is already considered for
> pll_clk also. See the below codes,
>
> #define OLD_SCLK_MIPI_CLK_NAME "pll_clk"
> ...
>
> for (i = 0; i < dsi->driver_data->num_clks; i++) {
> dsi->clks[i] = devm_clk_get(dev, clk_names[i]);
> if (IS_ERR(dsi->clks[i])) {
> if (strcmp(clk_names[i], "sclk_mipi") == 0) {
> strcpy(clk_names[i], OLD_SCLK_MIPI_CLK_NAME);
> i--;
> continue;
> }
>
> dev_info(dev, "failed to get the clock: %s\n",
> clk_names[i]);
> return PTR_ERR(dsi->clks[i]);
> }
> }
>
> Above codes make the driver to try to get the pll_clk - defined as
> OLD_SCLK_MIPI_CLK_NAME macro - again if getting sclk_mipi clock failed
> so there is no problem even though a little bit ugly.
>
> As you know, we should guarantee the backward compatibility so this
> codes check two clock names.
I am looking at next-20150622 and file
drivers/gpu/drm/exynos/exynos_drm_dsi.c. There is no such code there.
There is only pll_clk. No sclk_mipi.
Maybe it was changed by other patch... but I haven't received it. Also
I cannot find such patch on linux-kernel, linux-arm-kernel and
linux-samsung-soc. I cannot ack something that I cannot see :) .
If you sent whole patchset to my office address, then I will look at
it tomorrow. From home I can only look at LKML patches.
Best regards,
Krzysztof
[PATCH v6 15/15] ARM: dts: rename the clock of MIPI DSI 'pll_clk' to 'sclk_mipi'
On 2015ë
06ì 22ì¼ 20:59, Krzysztof Kozlowski wrote:
> 2015-06-22 20:42 GMT+09:00 Inki Dae :
>> + Krzysztof
>>
>> On 2015ë
06ì 22ì¼ 18:10, Inki Dae wrote:
>>> On 2015ë
06ì 12ì¼ 21:59, Hyungwon Hwang wrote:
The clock which was named as 'pll_clk' is actually not the clock source
of PLL in MIPI DSI. This patch fixes this disagreement.
>>>
>>> Mr. Kukjin and Krzysztof, can you give me Acked-by or Singed-off-by? I'd
>>> like to merge this patch to mainline through drm-next.
>
> Dear Hyungwon Hwang,
>
> Please always CC samsung-soc mailing list on such patches. I won't
> receive it on my personal email if you don't CC the list. The
> get_maintainers.pl gives necessary addresses.
>
> Comment below,
>
>>>
>>> Thanks,
>>> Inki Dae
>>>
Signed-off-by: Hyungwon Hwang
---
Changes before:
- Refer https://patchwork.kernel.org/patch/6191811
Changes for v6:
- None
arch/arm/boot/dts/exynos4.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/exynos4.dtsi
b/arch/arm/boot/dts/exynos4.dtsi
index e20cdc2..1538d7a 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -167,7 +167,7 @@
phys = <_phy 1>;
phy-names = "dsim";
clocks = < CLK_DSIM0>, < CLK_SCLK_MIPI0>;
-clock-names = "bus_clk", "pll_clk";
+clock-names = "bus_clk", "sclk_mipi";
>
> It seems wrong. The driver fetches reference from a name of "pll_clk",
> not "sclk_mipi". Also bindings documentation mentions pll_clk and
> bus_clk only.
Krzysztof,
There is your missing point. The driver is already considered for
pll_clk also. See the below codes,
#define OLD_SCLK_MIPI_CLK_NAME "pll_clk"
...
for (i = 0; i < dsi->driver_data->num_clks; i++) {
dsi->clks[i] = devm_clk_get(dev, clk_names[i]);
if (IS_ERR(dsi->clks[i])) {
if (strcmp(clk_names[i], "sclk_mipi") == 0) {
strcpy(clk_names[i], OLD_SCLK_MIPI_CLK_NAME);
i--;
continue;
}
dev_info(dev, "failed to get the clock: %s\n",
clk_names[i]);
return PTR_ERR(dsi->clks[i]);
}
}
Above codes make the driver to try to get the pll_clk - defined as
OLD_SCLK_MIPI_CLK_NAME macro - again if getting sclk_mipi clock failed
so there is no problem even though a little bit ugly.
As you know, we should guarantee the backward compatibility so this
codes check two clock names.
Thanks,
Inki Dae
>
> Best regards,
> Krzysztof
>
>
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
--
1.9.1
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo at vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
>>>
>>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc"
> in
>
[PATCH v6 15/15] ARM: dts: rename the clock of MIPI DSI 'pll_clk' to 'sclk_mipi'
2015-06-22 20:42 GMT+09:00 Inki Dae : > + Krzysztof > > On 2015ë 06ì 22ì¼ 18:10, Inki Dae wrote: >> On 2015ë 06ì 12ì¼ 21:59, Hyungwon Hwang wrote: >>> The clock which was named as 'pll_clk' is actually not the clock source >>> of PLL in MIPI DSI. This patch fixes this disagreement. >> >> Mr. Kukjin and Krzysztof, can you give me Acked-by or Singed-off-by? I'd >> like to merge this patch to mainline through drm-next. Dear Hyungwon Hwang, Please always CC samsung-soc mailing list on such patches. I won't receive it on my personal email if you don't CC the list. The get_maintainers.pl gives necessary addresses. Comment below, >> >> Thanks, >> Inki Dae >> >>> >>> Signed-off-by: Hyungwon Hwang >>> --- >>> Changes before: >>> - Refer https://patchwork.kernel.org/patch/6191811 >>> Changes for v6: >>> - None >>> >>> arch/arm/boot/dts/exynos4.dtsi | 2 +- >>> 1 file changed, 1 insertion(+), 1 deletion(-) >>> >>> diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi >>> index e20cdc2..1538d7a 100644 >>> --- a/arch/arm/boot/dts/exynos4.dtsi >>> +++ b/arch/arm/boot/dts/exynos4.dtsi >>> @@ -167,7 +167,7 @@ >>> phys = <_phy 1>; >>> phy-names = "dsim"; >>> clocks = < CLK_DSIM0>, < CLK_SCLK_MIPI0>; >>> -clock-names = "bus_clk", "pll_clk"; >>> +clock-names = "bus_clk", "sclk_mipi"; It seems wrong. The driver fetches reference from a name of "pll_clk", not "sclk_mipi". Also bindings documentation mentions pll_clk and bus_clk only. Best regards, Krzysztof >>> status = "disabled"; >>> #address-cells = <1>; >>> #size-cells = <0>; >>> -- >>> 1.9.1 >>> >>> -- >>> To unsubscribe from this list: send the line "unsubscribe devicetree" in >>> the body of a message to majordomo at vger.kernel.org >>> More majordomo info at http://vger.kernel.org/majordomo-info.html >>> >> >
[PATCH v6 15/15] ARM: dts: rename the clock of MIPI DSI 'pll_clk' to 'sclk_mipi'
+ Krzysztof On 2015ë 06ì 22ì¼ 18:10, Inki Dae wrote: > On 2015ë 06ì 12ì¼ 21:59, Hyungwon Hwang wrote: >> The clock which was named as 'pll_clk' is actually not the clock source >> of PLL in MIPI DSI. This patch fixes this disagreement. > > Mr. Kukjin and Krzysztof, can you give me Acked-by or Singed-off-by? I'd > like to merge this patch to mainline through drm-next. > > Thanks, > Inki Dae > >> >> Signed-off-by: Hyungwon Hwang >> --- >> Changes before: >> - Refer https://patchwork.kernel.org/patch/6191811 >> Changes for v6: >> - None >> >> arch/arm/boot/dts/exynos4.dtsi | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi >> index e20cdc2..1538d7a 100644 >> --- a/arch/arm/boot/dts/exynos4.dtsi >> +++ b/arch/arm/boot/dts/exynos4.dtsi >> @@ -167,7 +167,7 @@ >> phys = <_phy 1>; >> phy-names = "dsim"; >> clocks = < CLK_DSIM0>, < CLK_SCLK_MIPI0>; >> -clock-names = "bus_clk", "pll_clk"; >> +clock-names = "bus_clk", "sclk_mipi"; >> status = "disabled"; >> #address-cells = <1>; >> #size-cells = <0>; >> -- >> 1.9.1 >> >> -- >> To unsubscribe from this list: send the line "unsubscribe devicetree" in >> the body of a message to majordomo at vger.kernel.org >> More majordomo info at http://vger.kernel.org/majordomo-info.html >> >
[PATCH v6 15/15] ARM: dts: rename the clock of MIPI DSI 'pll_clk' to 'sclk_mipi'
On 2015ë 06ì 12ì¼ 21:59, Hyungwon Hwang wrote: > The clock which was named as 'pll_clk' is actually not the clock source > of PLL in MIPI DSI. This patch fixes this disagreement. Mr. Kukjin and Krzysztof, can you give me Acked-by or Singed-off-by? I'd like to merge this patch to mainline through drm-next. Thanks, Inki Dae > > Signed-off-by: Hyungwon Hwang > --- > Changes before: > - Refer https://patchwork.kernel.org/patch/6191811 > Changes for v6: > - None > > arch/arm/boot/dts/exynos4.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi > index e20cdc2..1538d7a 100644 > --- a/arch/arm/boot/dts/exynos4.dtsi > +++ b/arch/arm/boot/dts/exynos4.dtsi > @@ -167,7 +167,7 @@ > phys = <_phy 1>; > phy-names = "dsim"; > clocks = < CLK_DSIM0>, < CLK_SCLK_MIPI0>; > - clock-names = "bus_clk", "pll_clk"; > + clock-names = "bus_clk", "sclk_mipi"; > status = "disabled"; > #address-cells = <1>; > #size-cells = <0>; > -- > 1.9.1 > > -- > To unsubscribe from this list: send the line "unsubscribe devicetree" in > the body of a message to majordomo at vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html >
[PATCH v6 15/15] ARM: dts: rename the clock of MIPI DSI 'pll_clk' to 'sclk_mipi'
The clock which was named as 'pll_clk' is actually not the clock source of PLL in MIPI DSI. This patch fixes this disagreement. Signed-off-by: Hyungwon Hwang --- Changes before: - Refer https://patchwork.kernel.org/patch/6191811 Changes for v6: - None arch/arm/boot/dts/exynos4.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi index e20cdc2..1538d7a 100644 --- a/arch/arm/boot/dts/exynos4.dtsi +++ b/arch/arm/boot/dts/exynos4.dtsi @@ -167,7 +167,7 @@ phys = <_phy 1>; phy-names = "dsim"; clocks = < CLK_DSIM0>, < CLK_SCLK_MIPI0>; - clock-names = "bus_clk", "pll_clk"; + clock-names = "bus_clk", "sclk_mipi"; status = "disabled"; #address-cells = <1>; #size-cells = <0>; -- 1.9.1
