[PATCH v6 3/5] ARM: dts: sun8i-h3: add HDMI video nodes

2016-11-29 Thread Maxime Ripard 
On Fri, Nov 25, 2016 at 11:22:13AM +0100, Jean-Francois Moine wrote:
> On Fri, 25 Nov 2016 17:41:51 +0800
> Icenowy Zheng  wrote:
> 
> > After removing CLK_PLL_DE's assigned-clock, the kernel passes compilation.
> 
> The 'pll-de' and 'de' must have a fixed rate. Otherwise, if you do not
> use the legacy u-boot, I don't know which can be the rate of the DE.
> 
> > However, it cannot recognize any HDMI screen...
> > 
> > (My board is Orange Pi One, and I manually added status="okay"; to , 
> > , )
> > 
> > [   16.507802] sun8i-de2 100.de-controller: bound 
> > 1c0c000.lcd-controller (ops de2_lcd_ops [sun8i_de2_drm])
> > [   16.675948] sun8i-de2 100.de-controller: bound 1ee.hdmi (ops 
> > de2_hdmi_fini [sun8i_de2_hdmi])
> > [   16.685120] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
> > [   16.695876] [drm] No driver support for vblank timestamp query.
> > [   16.701862] sun8i-de2 100.de-controller: No connectors reported 
> > connected with modes
> > [   16.713061] [drm] Cannot find any crtc or sizes - going 1024x768
> > [   16.734214] Console: switching to colour frame buffer device 128x48
> > [   16.751022] sun8i-de2 100.de-controller: fb0:  frame buffer device
> 
> I put a 'pr_warn' message is case the EDID cannot be read.
> Have you this message?
> 
> Anyway, there is a problem with the EDID:
> - my Orange Pi 2 (H3) randomly fails to read it. But this succeeds after
>   rebooting once or twice.
> - my Banana Pi M2+ (H3) reads it correctly each time.
> - my Banana Pi M3 (A83T) can never read it.
> 
> BTW, on first tries, I was forcing a CEA mode thru the kernel command
> line. This was working with the OPi2 and BPiM3, but there was no sound.
> In the last version, I use a EDID in edid_firmware for having sound
> with the BPiM3. This works fine.
> But, forcing a CEA mode is no more possible, so, when the OPi2 cannot
> read the EDID, the system switches to a VGA mode (default 1024x768)
> which is not supported. It seems that this is your case.
> 
> So, in brief, if your board cannot read the EDID, put a EDID somewhere
> and its path in /sys/module/drm_kms_helper/parameters/edid_firmware.
> There will be no console, but X11 will work correctly.

This is one of the things that are usually very helpful to put in a
cover letter. This is obviously also a blocker for the merge of the
driver, and should be dealt with.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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[PATCH v6 3/5] ARM: dts: sun8i-h3: add HDMI video nodes

2016-11-29 Thread Jernej Skrabec 
Hi Jean-François,

Dne petek, 25. november 2016 11.22.20 UTC+1 je oseba Jean-François Moine 
napisala:
>
> On Fri, 25 Nov 2016 17:41:51 +0800 
> Icenowy Zheng > wrote: 
>
> > After removing CLK_PLL_DE's assigned-clock, the kernel passes 
> compilation. 
>
> The 'pll-de' and 'de' must have a fixed rate. Otherwise, if you do not 
> use the legacy u-boot, I don't know which can be the rate of the DE. 
>
> > However, it cannot recognize any HDMI screen... 
> > 
> > (My board is Orange Pi One, and I manually added status="okay"; to 
> , , ) 
> > 
> > [   16.507802] sun8i-de2 100.de-controller: bound 
> 1c0c000.lcd-controller (ops de2_lcd_ops [sun8i_de2_drm]) 
> > [   16.675948] sun8i-de2 100.de-controller: bound 1ee.hdmi (ops 
> de2_hdmi_fini [sun8i_de2_hdmi]) 
> > [   16.685120] [drm] Supports vblank timestamp caching Rev 2 
> (21.10.2013). 
> > [   16.695876] [drm] No driver support for vblank timestamp query. 
> > [   16.701862] sun8i-de2 100.de-controller: No connectors reported 
> connected with modes 
> > [   16.713061] [drm] Cannot find any crtc or sizes - going 1024x768 
> > [   16.734214] Console: switching to colour frame buffer device 128x48 
> > [   16.751022] sun8i-de2 100.de-controller: fb0:  frame buffer 
> device 
>
> I put a 'pr_warn' message is case the EDID cannot be read. 
> Have you this message? 
>
> Anyway, there is a problem with the EDID: 
> - my Orange Pi 2 (H3) randomly fails to read it. But this succeeds after 
>   rebooting once or twice. 
>

My U-Boot driver never exhibited a problem with reading EDID on OPi2. 
However,
I'm reusing code from Rockchip HDMI U-Boot driver for this (with some 
Allwinner
adjustments).


> - my Banana Pi M2+ (H3) reads it correctly each time. 
> - my Banana Pi M3 (A83T) can never read it. 
>
> BTW, on first tries, I was forcing a CEA mode thru the kernel command 
> line. This was working with the OPi2 and BPiM3, but there was no sound. 
> In the last version, I use a EDID in edid_firmware for having sound 
> with the BPiM3. This works fine. 
> But, forcing a CEA mode is no more possible, so, when the OPi2 cannot 
> read the EDID, the system switches to a VGA mode (default 1024x768) 
> which is not supported. It seems that this is your case. 
>
> So, in brief, if your board cannot read the EDID, put a EDID somewhere 
> and its path in /sys/module/drm_kms_helper/parameters/edid_firmware. 
> There will be no console, but X11 will work correctly. 
>
> -- 
> Ken ar c'hentañ|  ** Breizh ha Linux atav! ** 
> Jef|http://moinejf.free.fr/


Best regards,
Jernej Å krabec 
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[PATCH v6 3/5] ARM: dts: sun8i-h3: add HDMI video nodes

2016-11-25 Thread Icenowy Zheng 


25.11.2016, 18:22, "Jean-Francois Moine" :
> On Fri, 25 Nov 2016 17:41:51 +0800
> Icenowy Zheng  wrote:
>
>>  After removing CLK_PLL_DE's assigned-clock, the kernel passes compilation.
>
> The 'pll-de' and 'de' must have a fixed rate. Otherwise, if you do not
> use the legacy u-boot, I don't know which can be the rate of the DE.

Can't CCU deal with this?

I still kept the CLK_DE's assigned-clock...

>
>>  However, it cannot recognize any HDMI screen...
>>
>>  (My board is Orange Pi One, and I manually added status="okay"; to , 
>> , )
>>
>>  [ 16.507802] sun8i-de2 100.de-controller: bound 1c0c000.lcd-controller 
>> (ops de2_lcd_ops [sun8i_de2_drm])
>>  [ 16.675948] sun8i-de2 100.de-controller: bound 1ee.hdmi (ops 
>> de2_hdmi_fini [sun8i_de2_hdmi])
>>  [ 16.685120] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
>>  [ 16.695876] [drm] No driver support for vblank timestamp query.
>>  [ 16.701862] sun8i-de2 100.de-controller: No connectors reported 
>> connected with modes
>>  [ 16.713061] [drm] Cannot find any crtc or sizes - going 1024x768
>>  [ 16.734214] Console: switching to colour frame buffer device 128x48
>>  [ 16.751022] sun8i-de2 100.de-controller: fb0: frame buffer device
>
> I put a 'pr_warn' message is case the EDID cannot be read.
> Have you this message?

Seems no...

>
> Anyway, there is a problem with the EDID:
> - my Orange Pi 2 (H3) randomly fails to read it. But this succeeds after
>   rebooting once or twice.
> - my Banana Pi M2+ (H3) reads it correctly each time.
> - my Banana Pi M3 (A83T) can never read it.
>
> BTW, on first tries, I was forcing a CEA mode thru the kernel command
> line. This was working with the OPi2 and BPiM3, but there was no sound.
> In the last version, I use a EDID in edid_firmware for having sound
> with the BPiM3. This works fine.
> But, forcing a CEA mode is no more possible, so, when the OPi2 cannot
> read the EDID, the system switches to a VGA mode (default 1024x768)
> which is not supported. It seems that this is your case.
>
> So, in brief, if your board cannot read the EDID, put a EDID somewhere
> and its path in /sys/module/drm_kms_helper/parameters/edid_firmware.
> There will be no console, but X11 will work correctly.

The problem seems to be that the CRTC is not properly initialized...

>
> --
> Ken ar c'hentañ | ** Breizh ha Linux atav! **
> Jef | http://moinejf.free.fr/

[PATCH v6 3/5] ARM: dts: sun8i-h3: add HDMI video nodes

2016-11-25 Thread Icenowy Zheng 


20.11.2016, 20:12, "Jean-Francois Moine" :
> Signed-off-by: Jean-Francois Moine 
> ---
>  arch/arm/boot/dts/sun8i-h3.dtsi | 51 
> +
>  1 file changed, 51 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
> index 416b825..7c6b1d5 100644
> --- a/arch/arm/boot/dts/sun8i-h3.dtsi
> +++ b/arch/arm/boot/dts/sun8i-h3.dtsi
> @@ -140,6 +140,16 @@
>                  #size-cells = <1>;
>                  ranges;
>
> + de: de-controller at 0100 {
> + compatible = "allwinner,sun8i-h3-display-engine";
> + reg = <0x0100 0x40>;
> + clocks = < CLK_BUS_DE>, < CLK_DE>;
> + clock-names = "bus", "clock";
> + resets = < RST_BUS_DE>;
> + ports = <_p>;
> + status = "disabled";
> + };
> +
>                  dma: dma-controller at 01c02000 {
>                          compatible = 
> "allwinner,sun8i-h3-dma";
>                          reg = <0x01c02000 0x1000>;
> @@ -149,6 +159,23 @@
>                          #dma-cells = <1>;
>                  };
>
> + lcd0: lcd-controller at 01c0c000 {
> + compatible = "allwinner,sun8i-a83t-tcon";
> + reg = <0x01c0c000 0x400>;
> + clocks = < CLK_BUS_TCON0>, < CLK_TCON0>;
> + clock-names = "bus", "clock";
> + resets = < RST_BUS_TCON0>;
> + interrupts = ;
> + status = "disabled";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + lcd0_p: port {
> + lcd0_hdmi: endpoint {
> + remote-endpoint = <_lcd0>;
> + };
> + };
> + };
> +
>                  mmc0: mmc at 01c0f000 {
>                          compatible = 
> "allwinner,sun7i-a20-mmc";
>                          reg = <0x01c0f000 0x1000>;
> @@ -314,6 +341,11 @@
>                          clock-names = "hosc", 
> "losc";
>                          #clock-cells = <1>;
>                          #reset-cells = <1>;
> +
> + assigned-clocks = < CLK_PLL_DE>,
> + < CLK_DE>;
> + assigned-clock-rates = <86400>,
> + <43200>;
>                  };
>
>                  pio: pinctrl at 01c20800 {
> @@ -564,6 +596,25 @@
>                          interrupts =  (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
>                  };
>
> + hdmi: hdmi at 01ee {
> + compatible = "allwinner,sun8i-h3-hdmi";
> + reg = <0x01ee 0x2>;
> + clocks = < CLK_BUS_HDMI>, < CLK_HDMI>,
> + < CLK_HDMI_DDC>;
> + clock-names = "bus", "clock", "ddc-clock";
> + resets = < RST_BUS_HDMI0>, < RST_BUS_HDMI1>;
> + reset-names = "hdmi0", "hdmi1";
> + status = "disabled";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + port at 0 { /* video */
> + reg = <0>;
> + hdmi_lcd0: endpoint {
> + remote-endpoint = <_hdmi>;
> + };
> + };
> + };
> +
>                  rtc: rtc at 01f0 {
>                          compatible = 
> "allwinner,sun6i-a31-rtc";
>                          reg = <0x01f0 0x54>;

After removing CLK_PLL_DE's assigned-clock, the kernel passes compilation.

However, it cannot recognize any HDMI screen...

(My board is Orange Pi One, and I manually added status="okay"; to , , 
)

[   16.507802] sun8i-de2 100.de-controller: bound 1c0c000.lcd-controller 
(ops de2_lcd_ops [sun8i_de2_drm])
[   16.675948] sun8i-de2 100.de-controller: bound 1ee.hdmi (ops 
de2_hdmi_fini [sun8i_de2_hdmi])
[   16.685120] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
[   16.695876] [drm] No driver support for vblank timestamp query.
[   16.701862] sun8i-de2 100.de-controller: No connectors reported 
connected with modes
[   16.713061] [drm] Cannot find any crtc or sizes - going 1024x768
[   16.734214] Console: switching to colour frame buffer device 128x48
[   16.751022] sun8i-de2 100.de-controller: fb0:  frame buffer device

> --
> 2.10.2
>
> ___
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[linux-sunxi] [PATCH v6 3/5] ARM: dts: sun8i-h3: add HDMI video nodes

2016-11-25 Thread Icenowy Zheng 


20.11.2016, 20:07, "Jean-Francois Moine" :
> Signed-off-by: Jean-Francois Moine 
> ---
>  arch/arm/boot/dts/sun8i-h3.dtsi | 51 
> +
>  1 file changed, 51 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
> index 416b825..7c6b1d5 100644
> --- a/arch/arm/boot/dts/sun8i-h3.dtsi
> +++ b/arch/arm/boot/dts/sun8i-h3.dtsi
> @@ -140,6 +140,16 @@
>                  #size-cells = <1>;
>                  ranges;
>
> + de: de-controller at 0100 {
> + compatible = "allwinner,sun8i-h3-display-engine";
> + reg = <0x0100 0x40>;
> + clocks = < CLK_BUS_DE>, < CLK_DE>;
> + clock-names = "bus", "clock";
> + resets = < RST_BUS_DE>;
> + ports = <_p>;
> + status = "disabled";
> + };
> +
>                  dma: dma-controller at 01c02000 {
>                          compatible = 
> "allwinner,sun8i-h3-dma";
>                          reg = <0x01c02000 0x1000>;
> @@ -149,6 +159,23 @@
>                          #dma-cells = <1>;
>                  };
>
> + lcd0: lcd-controller at 01c0c000 {
> + compatible = "allwinner,sun8i-a83t-tcon";
> + reg = <0x01c0c000 0x400>;
> + clocks = < CLK_BUS_TCON0>, < CLK_TCON0>;
> + clock-names = "bus", "clock";
> + resets = < RST_BUS_TCON0>;
> + interrupts = ;
> + status = "disabled";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + lcd0_p: port {
> + lcd0_hdmi: endpoint {
> + remote-endpoint = <_lcd0>;
> + };
> + };
> + };
> +
>                  mmc0: mmc at 01c0f000 {
>                          compatible = 
> "allwinner,sun7i-a20-mmc";
>                          reg = <0x01c0f000 0x1000>;
> @@ -314,6 +341,11 @@
>                          clock-names = "hosc", 
> "losc";
>                          #clock-cells = <1>;
>                          #reset-cells = <1>;
> +
> + assigned-clocks = < CLK_PLL_DE>,

Cannot get the patch built on 4.9-rc, as CLK_PLL_DE is not an exported clock.

Only CLK_DE is exported.

> + < CLK_DE>;
> + assigned-clock-rates = <86400>,
> + <43200>;
>                  };
>
>                  pio: pinctrl at 01c20800 {
> @@ -564,6 +596,25 @@
>                          interrupts =  (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
>                  };
>
> + hdmi: hdmi at 01ee {
> + compatible = "allwinner,sun8i-h3-hdmi";
> + reg = <0x01ee 0x2>;
> + clocks = < CLK_BUS_HDMI>, < CLK_HDMI>,
> + < CLK_HDMI_DDC>;
> + clock-names = "bus", "clock", "ddc-clock";
> + resets = < RST_BUS_HDMI0>, < RST_BUS_HDMI1>;
> + reset-names = "hdmi0", "hdmi1";
> + status = "disabled";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + port at 0 { /* video */
> + reg = <0>;
> + hdmi_lcd0: endpoint {
> + remote-endpoint = <_hdmi>;
> + };
> + };
> + };
> +
>                  rtc: rtc at 01f0 {
>                          compatible = 
> "allwinner,sun6i-a31-rtc";
>                          reg = <0x01f0 0x54>;
> --
> 2.10.2
>
> --
> You received this message because you are subscribed to the Google Groups 
> "linux-sunxi" group.
> To unsubscribe from this group and stop receiving emails from it, send an 
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[PATCH v6 3/5] ARM: dts: sun8i-h3: add HDMI video nodes

2016-11-25 Thread Jean-Francois Moine 
On Fri, 25 Nov 2016 17:41:51 +0800
Icenowy Zheng  wrote:

> After removing CLK_PLL_DE's assigned-clock, the kernel passes compilation.

The 'pll-de' and 'de' must have a fixed rate. Otherwise, if you do not
use the legacy u-boot, I don't know which can be the rate of the DE.

> However, it cannot recognize any HDMI screen...
> 
> (My board is Orange Pi One, and I manually added status="okay"; to , 
> , )
> 
> [   16.507802] sun8i-de2 100.de-controller: bound 1c0c000.lcd-controller 
> (ops de2_lcd_ops [sun8i_de2_drm])
> [   16.675948] sun8i-de2 100.de-controller: bound 1ee.hdmi (ops 
> de2_hdmi_fini [sun8i_de2_hdmi])
> [   16.685120] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
> [   16.695876] [drm] No driver support for vblank timestamp query.
> [   16.701862] sun8i-de2 100.de-controller: No connectors reported 
> connected with modes
> [   16.713061] [drm] Cannot find any crtc or sizes - going 1024x768
> [   16.734214] Console: switching to colour frame buffer device 128x48
> [   16.751022] sun8i-de2 100.de-controller: fb0:  frame buffer device

I put a 'pr_warn' message is case the EDID cannot be read.
Have you this message?

Anyway, there is a problem with the EDID:
- my Orange Pi 2 (H3) randomly fails to read it. But this succeeds after
  rebooting once or twice.
- my Banana Pi M2+ (H3) reads it correctly each time.
- my Banana Pi M3 (A83T) can never read it.

BTW, on first tries, I was forcing a CEA mode thru the kernel command
line. This was working with the OPi2 and BPiM3, but there was no sound.
In the last version, I use a EDID in edid_firmware for having sound
with the BPiM3. This works fine.
But, forcing a CEA mode is no more possible, so, when the OPi2 cannot
read the EDID, the system switches to a VGA mode (default 1024x768)
which is not supported. It seems that this is your case.

So, in brief, if your board cannot read the EDID, put a EDID somewhere
and its path in /sys/module/drm_kms_helper/parameters/edid_firmware.
There will be no console, but X11 will work correctly.

-- 
Ken ar c'hentañ| ** Breizh ha Linux atav! **
Jef |   http://moinejf.free.fr/

[linux-sunxi] [PATCH v6 3/5] ARM: dts: sun8i-h3: add HDMI video nodes

2016-11-25 Thread Jean-François Moine 
On Fri, 25 Nov 2016 13:27:20 +0800
Icenowy Zheng  wrote:

> > + assigned-clocks = < CLK_PLL_DE>,
> 
> Cannot get the patch built on 4.9-rc, as CLK_PLL_DE is not an exported clock.

Hi,

Sorry, I forgot it. The symbol goes to
include/dt-bindings/clock/sun8i-h3-ccu.h
as:

#define CLK_PLL_DE  13

-- 
Ken ar c'hentañ| ** Breizh ha Linux atav! **
Jef |   http://moinejf.free.fr/

[PATCH v6 3/5] ARM: dts: sun8i-h3: add HDMI video nodes

2016-11-20 Thread Jean-Francois Moine 
Signed-off-by: Jean-Francois Moine 
---
 arch/arm/boot/dts/sun8i-h3.dtsi | 51 +
 1 file changed, 51 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 416b825..7c6b1d5 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -140,6 +140,16 @@
#size-cells = <1>;
ranges;

+   de: de-controller at 0100 {
+   compatible = "allwinner,sun8i-h3-display-engine";
+   reg = <0x0100 0x40>;
+   clocks = < CLK_BUS_DE>, < CLK_DE>;
+   clock-names = "bus", "clock";
+   resets = < RST_BUS_DE>;
+   ports = <_p>;
+   status = "disabled";
+   };
+
dma: dma-controller at 01c02000 {
compatible = "allwinner,sun8i-h3-dma";
reg = <0x01c02000 0x1000>;
@@ -149,6 +159,23 @@
#dma-cells = <1>;
};

+   lcd0: lcd-controller at 01c0c000 {
+   compatible = "allwinner,sun8i-a83t-tcon";
+   reg = <0x01c0c000 0x400>;
+   clocks = < CLK_BUS_TCON0>, < CLK_TCON0>;
+   clock-names = "bus", "clock";
+   resets = < RST_BUS_TCON0>;
+   interrupts = ;
+   status = "disabled";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   lcd0_p: port {
+   lcd0_hdmi: endpoint {
+   remote-endpoint = <_lcd0>;
+   };
+   };
+   };
+
mmc0: mmc at 01c0f000 {
compatible = "allwinner,sun7i-a20-mmc";
reg = <0x01c0f000 0x1000>;
@@ -314,6 +341,11 @@
clock-names = "hosc", "losc";
#clock-cells = <1>;
#reset-cells = <1>;
+
+   assigned-clocks = < CLK_PLL_DE>,
+ < CLK_DE>;
+   assigned-clock-rates =  <86400>,
+   <43200>;
};

pio: pinctrl at 01c20800 {
@@ -564,6 +596,25 @@
interrupts = ;
};

+   hdmi: hdmi at 01ee {
+   compatible = "allwinner,sun8i-h3-hdmi";
+   reg = <0x01ee 0x2>;
+   clocks = < CLK_BUS_HDMI>, < CLK_HDMI>,
+< CLK_HDMI_DDC>;
+   clock-names = "bus", "clock", "ddc-clock";
+   resets = < RST_BUS_HDMI0>, < RST_BUS_HDMI1>;
+   reset-names = "hdmi0", "hdmi1";
+   status = "disabled";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   port at 0 { /* video */
+   reg = <0>;
+   hdmi_lcd0: endpoint {
+   remote-endpoint = <_hdmi>;
+   };
+   };
+   };
+
rtc: rtc at 01f0 {
compatible = "allwinner,sun6i-a31-rtc";
reg = <0x01f0 0x54>;
-- 
2.10.2