20.11.2016, 20:07, "Jean-Francois Moine" :
> Signed-off-by: Jean-Francois Moine
> ---
> Â arch/arm/boot/dts/sun8i-h3.dtsi | 51
> +
> Â 1 file changed, 51 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
> index 416b825..7c6b1d5 100644
> --- a/arch/arm/boot/dts/sun8i-h3.dtsi
> +++ b/arch/arm/boot/dts/sun8i-h3.dtsi
> @@ -140,6 +140,16 @@
> Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â #size-cells = <1>;
> Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â ranges;
>
> + de: de-controller at 0100 {
> + compatible = "allwinner,sun8i-h3-display-engine";
> + reg = <0x0100 0x40>;
> + clocks = < CLK_BUS_DE>, < CLK_DE>;
> + clock-names = "bus", "clock";
> + resets = < RST_BUS_DE>;
> + ports = <_p>;
> + status = "disabled";
> + };
> +
> Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â dma: dma-controller at 01c02000 {
> Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â compatible =
> "allwinner,sun8i-h3-dma";
> Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â reg = <0x01c02000 0x1000>;
> @@ -149,6 +159,23 @@
> Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â #dma-cells = <1>;
> Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â };
>
> + lcd0: lcd-controller at 01c0c000 {
> + compatible = "allwinner,sun8i-a83t-tcon";
> + reg = <0x01c0c000 0x400>;
> + clocks = < CLK_BUS_TCON0>, < CLK_TCON0>;
> + clock-names = "bus", "clock";
> + resets = < RST_BUS_TCON0>;
> + interrupts = ;
> + status = "disabled";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + lcd0_p: port {
> + lcd0_hdmi: endpoint {
> + remote-endpoint = <_lcd0>;
> + };
> + };
> + };
> +
> Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â mmc0: mmc at 01c0f000 {
> Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â compatible =
> "allwinner,sun7i-a20-mmc";
> Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â reg = <0x01c0f000 0x1000>;
> @@ -314,6 +341,11 @@
> Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â clock-names = "hosc",
> "losc";
> Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â #clock-cells = <1>;
> Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â #reset-cells = <1>;
> +
> + assigned-clocks = < CLK_PLL_DE>,
Cannot get the patch built on 4.9-rc, as CLK_PLL_DE is not an exported clock.
Only CLK_DE is exported.
> + < CLK_DE>;
> + assigned-clock-rates = <86400>,
> + <43200>;
> Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â };
>
> Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â pio: pinctrl at 01c20800 {
> @@ -564,6 +596,25 @@
> Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â interrupts = (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
> Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â };
>
> + hdmi: hdmi at 01ee {
> + compatible = "allwinner,sun8i-h3-hdmi";
> + reg = <0x01ee 0x2>;
> + clocks = < CLK_BUS_HDMI>, < CLK_HDMI>,
> + < CLK_HDMI_DDC>;
> + clock-names = "bus", "clock", "ddc-clock";
> + resets = < RST_BUS_HDMI0>, < RST_BUS_HDMI1>;
> + reset-names = "hdmi0", "hdmi1";
> + status = "disabled";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + port at 0 { /* video */
> + reg = <0>;
> + hdmi_lcd0: endpoint {
> + remote-endpoint = <_hdmi>;
> + };
> + };
> + };
> +
> Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â rtc: rtc at 01f0 {
> Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â compatible =
> "allwinner,sun6i-a31-rtc";
> Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â reg = <0x01f0 0x54>;
> --
> 2.10.2
>
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