Re: [v2 1/4] drm/panel: Support for Starry-himax83102-j02 TDDI MIPI-DSI panel

2023-05-24 Thread Doug Anderson 
Hi,

On Wed, May 24, 2023 at 12:28 AM Cong Yang
 wrote:
>
> The Starry-himax83102-j02 is a 10.51" WUXGA TFT panel. which fits in nicely
> with the existing panel-boe-tv101wum-nl6 driver. From the datasheet[1], MIPI
> needs to keep the LP11 state before the lcm_reset pin is pulled high, so
> increase lp11_before_reset flag.
>
> [1]: 
> https://github.com/HimaxSoftware/Doc/tree/main/Himax_Chipset_Power_Sequence
>
> Signed-off-by: Cong Yang 
> ---
>  .../gpu/drm/panel/panel-boe-tv101wum-nl6.c| 100 ++
>  1 file changed, 100 insertions(+)
>
> diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c 
> b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
> index f5a6046f1d19..5c8ec263e11f 100644
> --- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
> +++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
> @@ -76,6 +76,75 @@ struct panel_init_cmd {
> .len = sizeof((char[]){__VA_ARGS__}), \
> .data = (char[]){__VA_ARGS__} }
>
> +static const struct panel_init_cmd starry_himax83102_j02_init_cmd[] = {

nit: Please have the order of the tables match the order they're
referenced. That means this should come _after_
"starry_qfh032011_53g_init_cmd", not at the start of the tables.


-Doug

[v2 1/4] drm/panel: Support for Starry-himax83102-j02 TDDI MIPI-DSI panel

2023-05-24 Thread Cong Yang 
The Starry-himax83102-j02 is a 10.51" WUXGA TFT panel. which fits in nicely
with the existing panel-boe-tv101wum-nl6 driver. From the datasheet[1], MIPI
needs to keep the LP11 state before the lcm_reset pin is pulled high, so
increase lp11_before_reset flag.

[1]: https://github.com/HimaxSoftware/Doc/tree/main/Himax_Chipset_Power_Sequence

Signed-off-by: Cong Yang 
---
 .../gpu/drm/panel/panel-boe-tv101wum-nl6.c| 100 ++
 1 file changed, 100 insertions(+)

diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c 
b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
index f5a6046f1d19..5c8ec263e11f 100644
--- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
+++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
@@ -76,6 +76,75 @@ struct panel_init_cmd {
.len = sizeof((char[]){__VA_ARGS__}), \
.data = (char[]){__VA_ARGS__} }
 
+static const struct panel_init_cmd starry_himax83102_j02_init_cmd[] = {
+   _INIT_DCS_CMD(0xB9, 0x83, 0x10, 0x21, 0x55, 0x00),
+   _INIT_DCS_CMD(0xB1, 0x2C, 0xB5, 0xB5, 0x31, 0xF1, 0x31, 0xD7, 0x2F, 
0x36, 0x36, 0x36, 0x36, 0x1A, 0x8B, 0x11,
+   0x65, 0x00, 0x88, 0xFA, 0xFF, 0xFF, 0x8F, 0xFF, 0x08, 0x74, 
0x33),
+   _INIT_DCS_CMD(0xB2, 0x00, 0x47, 0xB0, 0x80, 0x00, 0x12, 0x72, 0x3C, 
0xA3, 0x03, 0x03, 0x00, 0x00, 0x88, 0xF5),
+   _INIT_DCS_CMD(0xB4, 0x76, 0x76, 0x76, 0x76, 0x76, 0x76, 0x63, 0x5C, 
0x63, 0x5C, 0x01, 0x9E),
+   _INIT_DCS_CMD(0xE9, 0xCD),
+   _INIT_DCS_CMD(0xBA, 0x84),
+   _INIT_DCS_CMD(0xE9, 0x3F),
+   _INIT_DCS_CMD(0xBC, 0x1B, 0x04),
+   _INIT_DCS_CMD(0xBE, 0x20),
+   _INIT_DCS_CMD(0xBF, 0xFC, 0xC4),
+   _INIT_DCS_CMD(0xC0, 0x36, 0x36, 0x22, 0x11, 0x22, 0xA0, 0x61, 0x08, 
0xF5, 0x03),
+   _INIT_DCS_CMD(0xE9, 0xCC),
+   _INIT_DCS_CMD(0xC7, 0x80),
+   _INIT_DCS_CMD(0xE9, 0x3F),
+   _INIT_DCS_CMD(0xE9, 0xC6),
+   _INIT_DCS_CMD(0xC8, 0x97),
+   _INIT_DCS_CMD(0xE9, 0x3F),
+   _INIT_DCS_CMD(0xC9, 0x00, 0x1E, 0x13, 0x88, 0x01),
+   _INIT_DCS_CMD(0xCB, 0x08, 0x13, 0x07, 0x00, 0x0F, 0x33),
+   _INIT_DCS_CMD(0xCC, 0x02),
+   _INIT_DCS_CMD(0xE9, 0xC4),
+   _INIT_DCS_CMD(0xD0, 0x03),
+   _INIT_DCS_CMD(0xE9, 0x3F),
+   _INIT_DCS_CMD(0xD1, 0x37, 0x06, 0x00, 0x02, 0x04, 0x0C, 0xFF),
+   _INIT_DCS_CMD(0xD2, 0x1F, 0x11, 0x1F),
+   _INIT_DCS_CMD(0xD3, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 
0x08, 0x37, 0x47, 0x34, 0x3B, 0x12, 0x12, 0x03,
+   0x03, 0x32, 0x10, 0x10, 0x00, 0x10, 0x32, 0x10, 0x08, 0x00, 
0x08, 0x32, 0x17, 0x94, 0x07, 0x94, 0x00, 0x00),
+   _INIT_DCS_CMD(0xD5, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 
0x18, 0x18, 0x19, 0x19, 0x40, 0x40, 0x1A, 0x1A,
+   0x1B, 0x1B, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 
0x20, 0x21, 0x28, 0x29, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 
0x18, 0x18, 0x18, 0x18, 0x18),
+   _INIT_DCS_CMD(0xD6, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 
0x18, 0x18, 0x40, 0x40, 0x19, 0x19, 0x1A, 0x1A,
+   0x1B, 0x1B, 0x07, 0x06, 0x05, 0x04, 0x03, 0x02, 0x01, 0x00, 
0x29, 0x28, 0x21, 0x20, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 
0x18, 0x18, 0x18, 0x18, 0x18),
+   _INIT_DCS_CMD(0xD8, 0xAA, 0xBA, 0xEA, 0xAA, 0xAA, 0xA0, 0xAA, 0xBA, 
0xEA, 0xAA, 0xAA, 0xA0, 0xAA, 0xBA, 0xEA, 0xAA,
+   0xAA, 0xA0, 0xAA, 0xBA, 0xEA, 0xAA, 0xAA, 0xA0, 0xAA, 0xBA, 
0xEA, 0xAA, 0xAA, 0xA0, 0xAA, 0xBA, 0xEA, 0xAA, 0xAA, 0xA0),
+   _INIT_DCS_CMD(0xE0, 0x00, 0x09, 0x14, 0x1E, 0x26, 0x48, 0x61, 0x67, 
0x6C, 0x67, 0x7D, 0x7F, 0x80, 0x8B, 0x87, 0x8F, 0x98, 0xAB,
+   0xAB, 0x55, 0x5C, 0x68, 0x73, 0x00, 0x09, 0x14, 0x1E, 0x26, 
0x48, 0x61, 0x67, 0x6C, 0x67, 0x7D, 0x7F, 0x80, 0x8B, 0x87, 0x8F, 0x98, 0xAB, 
0xAB, 0x55, 0x5C, 0x68, 0x73),
+   _INIT_DCS_CMD(0xE7, 0x0E, 0x10, 0x10, 0x21, 0x2B, 0x9A, 0x02, 0x54, 
0x9A, 0x14, 0x14, 0x00, 0x00, 0x00, 0x00, 0x12, 0x05, 0x02, 0x02, 0x10),
+   _INIT_DCS_CMD(0xBD, 0x01),
+   _INIT_DCS_CMD(0xB1, 0x01, 0xBF, 0x11),
+   _INIT_DCS_CMD(0xCB, 0x86),
+   _INIT_DCS_CMD(0xD2, 0x3C, 0xFA),
+   _INIT_DCS_CMD(0xE9, 0xC5),
+   _INIT_DCS_CMD(0xD3, 0x00, 0x00, 0x00, 0x00, 0x80, 0x0C, 0x01),
+   _INIT_DCS_CMD(0xE9, 0x3F),
+   _INIT_DCS_CMD(0xE7, 0x02, 0x00, 0x28, 0x01, 0x7E, 0x0F, 0x7E, 0x10, 
0xA0, 0x00, 0x00, 0x20, 0x40, 0x50, 0x40),
+   _INIT_DCS_CMD(0xBD, 0x02),
+   _INIT_DCS_CMD(0xD8, 0xFF, 0xFF, 0xBF, 0xFE, 0xAA, 0xA0, 0xFF, 0xFF, 
0xBF, 0xFE, 0xAA, 0xA0),
+   _INIT_DCS_CMD(0xE7, 0xFE, 0x04, 0xFE, 0x04, 0xFE, 0x04, 0x03, 0x03, 
0x03, 0x26, 0x00, 0x26, 0x81, 0x02, 0x40, 0x00, 0x20, 0x9E, 0x04, 0x03, 0x02, 
0x01, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00),
+   _INIT_DCS_CMD(0xBD, 0x03),
+   _INIT_DCS_CMD(0xE9, 0xC6),
+   _INIT_DCS_CMD(0xB4, 0x03, 0xFF, 0xF8),
+   _INIT_DCS_CMD(0xE9, 0x3F),
+   _INIT_DCS_CMD(0xD8, 0x00, 0x2A, 0xAA, 0xA8, 0x00, 0x00, 0x00, 0x2A, 
0xAA, 0xA8, 0x00, 0x00, 0x00, 0x3F, 0xFF, 0xFC, 0x00, 0x00, 0x00, 0x3F,