RE: [PATCH v2 3/4] soc: visconti: Add Toshiba Visconti AFFINE image processing accelerator

2022-05-31 Thread yuji2.ishikawa
n=DRV_IPA_DIR_FROM_DEVICE},
};
struct drv_ipa_addr src_addr = {.buffer_index=0, .offset=0};
struct drv_ipa_addr dst_addr = {.buffer_index=1, .offset=0};
struct drv_affine_descriptor desc;

drv_AFFINE_config_descript_init(, bufinfo, 2);
drv_AFFINE_config_input_image(, src_addr, SRC_WIDTH, SRC_HEIGHT, 
SRC_PITCH, SRC_DEPTH_8);
drv_AFFINE_config_output_image(, dst_addr, DST_WIDTH, DST_HEIGHT, 
0, 0, 0, DST_PITCH, DST_DEPTH_8);
drv_AFFINE_config_interpolation_mode(, DRV_AFFINE_BILINEAR, 
DRV_AFFINE_BICB_A_1_00);
drv_AFFINE_config_linear(, (float)(1.5), 0.0, 0.0, 0.0, 
(float)(1.5), 0.0, DRV_AFFINE_FIRST_ORDER);
drv_AFFINE_config_descript_finalize();

ioctl(fd_affine, IOC_IPA_START, );

{
struct pollfd fds[] = {.fd=fd_affine, .events=POLL_IN, .revents = 
0};
poll(fds, 1, 1000);
}
}

void sample()
{
int fd_affine, fd_heap, fd_src, fd_dst;
fd_affine = open("/dev/affine0", O_RDWR);
fd_heap   = open("/dev/dma_heap/linux,cma", O_RDWR);
fd_src= allocate_buffer(fd_heap, SRC_PITCH*SRC_HEIGHT);
fd_dst= allocate_buffer(fd_heap, DST_PITCH*DST_HEIGHT);

/* fill initial value to src buffer here */

affine_sample(fd_affine, fd_src, fd_dst);

...
}


 Reference

* [0] 
https://toshiba.semicon-storage.com/content/dam/toshiba-ss-v2/master/en/company/technical-review/pdf/technical-review-18_e.pdf
  * Fig 7.2.1 shows the whole architecture of prototype chip

Regards,
Yuji

> -Original Message-
> From: Hans Verkuil 
> Sent: Thursday, May 12, 2022 8:19 PM
> To: ishikawa yuji(石川 悠司 ○RDC□AITC○EA開)
> ; Rob Herring ;
> iwamatsu nobuhiro(岩松 信洋 □SWC◯ACT)
> ; Sumit Semwal
> ; Christian König 
> Cc: linux-arm-ker...@lists.infradead.org; linux-ker...@vger.kernel.org;
> linux-me...@vger.kernel.org; dri-devel@lists.freedesktop.org;
> linaro-mm-...@lists.linaro.org
> Subject: Re: [PATCH v2 3/4] soc: visconti: Add Toshiba Visconti AFFINE image
> processing accelerator
> 
> On 4/27/22 15:23, Yuji Ishikawa wrote:
> > Adds support to AFFINE image processing accelerator on Toshiba Visconti
> ARM SoCs.
> > This accelerator supoorts affine transform, lens undistortion and LUT
> transform.
> >
> > Signed-off-by: Yuji Ishikawa 
> > Reviewed-by: Nobuhiro Iwamatsu 
> > ---
> > v1 -> v2:
> >   - apply checkpatch.pl --strict
> >   - renamed identifiers; hwd_AFFINE_ to hwd_affine_
> > ---
> >  drivers/soc/visconti/Kconfig |   6 +
> >  drivers/soc/visconti/Makefile|   2 +
> >  drivers/soc/visconti/affine/Makefile |   6 +
> >  drivers/soc/visconti/affine/affine.c | 451
> +++
> >  drivers/soc/visconti/affine/hwd_affine.c | 206 +
> >  drivers/soc/visconti/affine/hwd_affine.h |  83 
> >  drivers/soc/visconti/affine/hwd_affine_reg.h |  45 ++
> >  drivers/soc/visconti/uapi/affine.h   |  87 
> >  8 files changed, 886 insertions(+)
> >  create mode 100644 drivers/soc/visconti/affine/Makefile
> >  create mode 100644 drivers/soc/visconti/affine/affine.c
> >  create mode 100644 drivers/soc/visconti/affine/hwd_affine.c
> >  create mode 100644 drivers/soc/visconti/affine/hwd_affine.h
> >  create mode 100644 drivers/soc/visconti/affine/hwd_affine_reg.h
> >  create mode 100644 drivers/soc/visconti/uapi/affine.h
> >
> > diff --git a/drivers/soc/visconti/Kconfig
> > b/drivers/soc/visconti/Kconfig index 8b1378917..01583d407 100644
> > --- a/drivers/soc/visconti/Kconfig
> > +++ b/drivers/soc/visconti/Kconfig
> > @@ -1 +1,7 @@
> > +if ARCH_VISCONTI
> > +
> > +config VISCONTI_AFFINE
> > +bool "Visconti Affine driver"
> > +
> > +endif
> >
> > diff --git a/drivers/soc/visconti/Makefile
> > b/drivers/soc/visconti/Makefile index 8d710da08..b25a726c3 100644
> > --- a/drivers/soc/visconti/Makefile
> > +++ b/drivers/soc/visconti/Makefile
> > @@ -4,3 +4,5 @@
> >  #
> >
> >  obj-y += ipa_common.o
> > +
> > +obj-$(CONFIG_VISCONTI_AFFINE) += affine/
> > diff --git a/drivers/soc/visconti/affine/Makefile
> > b/drivers/soc/visconti/affine/Makefile
> > new file mode 100644
> > index 0..82f83b2d6
> > --- /dev/null
> > +++ b/drivers/soc/visconti/affine/Makefile
> > @@ -0,0 +1,6 @@
> > +# SPDX-License-Identifier: GPL-2.0
> > +#
> > +# Makefile for the Visconti AFFINE driver #
> > +
> > +obj-y += affine.o hwd_affine.o
> > diff --git a/drivers/soc/visconti/affine/affine.c
> > b/drivers/soc/visconti/affin

Re: [PATCH v2 3/4] soc: visconti: Add Toshiba Visconti AFFINE image processing accelerator

2022-05-12 Thread Hans Verkuil
On 4/27/22 15:23, Yuji Ishikawa wrote:
> Adds support to AFFINE image processing accelerator on Toshiba Visconti ARM 
> SoCs.
> This accelerator supoorts affine transform, lens undistortion and LUT 
> transform.
> 
> Signed-off-by: Yuji Ishikawa 
> Reviewed-by: Nobuhiro Iwamatsu 
> ---
> v1 -> v2:
>   - apply checkpatch.pl --strict
>   - renamed identifiers; hwd_AFFINE_ to hwd_affine_
> ---
>  drivers/soc/visconti/Kconfig |   6 +
>  drivers/soc/visconti/Makefile|   2 +
>  drivers/soc/visconti/affine/Makefile |   6 +
>  drivers/soc/visconti/affine/affine.c | 451 +++
>  drivers/soc/visconti/affine/hwd_affine.c | 206 +
>  drivers/soc/visconti/affine/hwd_affine.h |  83 
>  drivers/soc/visconti/affine/hwd_affine_reg.h |  45 ++
>  drivers/soc/visconti/uapi/affine.h   |  87 
>  8 files changed, 886 insertions(+)
>  create mode 100644 drivers/soc/visconti/affine/Makefile
>  create mode 100644 drivers/soc/visconti/affine/affine.c
>  create mode 100644 drivers/soc/visconti/affine/hwd_affine.c
>  create mode 100644 drivers/soc/visconti/affine/hwd_affine.h
>  create mode 100644 drivers/soc/visconti/affine/hwd_affine_reg.h
>  create mode 100644 drivers/soc/visconti/uapi/affine.h
> 
> diff --git a/drivers/soc/visconti/Kconfig b/drivers/soc/visconti/Kconfig
> index 8b1378917..01583d407 100644
> --- a/drivers/soc/visconti/Kconfig
> +++ b/drivers/soc/visconti/Kconfig
> @@ -1 +1,7 @@
> +if ARCH_VISCONTI
> +
> +config VISCONTI_AFFINE
> +bool "Visconti Affine driver"
> +
> +endif
>  
> diff --git a/drivers/soc/visconti/Makefile b/drivers/soc/visconti/Makefile
> index 8d710da08..b25a726c3 100644
> --- a/drivers/soc/visconti/Makefile
> +++ b/drivers/soc/visconti/Makefile
> @@ -4,3 +4,5 @@
>  #
>  
>  obj-y += ipa_common.o
> +
> +obj-$(CONFIG_VISCONTI_AFFINE) += affine/
> diff --git a/drivers/soc/visconti/affine/Makefile 
> b/drivers/soc/visconti/affine/Makefile
> new file mode 100644
> index 0..82f83b2d6
> --- /dev/null
> +++ b/drivers/soc/visconti/affine/Makefile
> @@ -0,0 +1,6 @@
> +# SPDX-License-Identifier: GPL-2.0
> +#
> +# Makefile for the Visconti AFFINE driver
> +#
> +
> +obj-y += affine.o hwd_affine.o
> diff --git a/drivers/soc/visconti/affine/affine.c 
> b/drivers/soc/visconti/affine/affine.c
> new file mode 100644
> index 0..eea045dcf
> --- /dev/null
> +++ b/drivers/soc/visconti/affine/affine.c
> @@ -0,0 +1,451 @@
> +// SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
> +/* Toshiba Visconti Affine Accelerator Support
> + *
> + * (C) Copyright 2022 TOSHIBA CORPORATION
> + * (C) Copyright 2022 Toshiba Electronic Devices & Storage Corporation
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include "hwd_affine.h"
> +#include "../ipa_common.h"
> +#include "../uapi/affine.h"
> +
> +struct affine_priv {
> + struct device *dev;
> + struct miscdevice miscdev;
> + struct mutex lock;
> + void __iomem *regs;
> + int irq;
> + wait_queue_head_t waitq;
> + enum drv_ipa_state status;
> + unsigned int hwd_event;
> + unsigned int poll_event;
> + int id;
> + char name[16];
> + bool dma_coherent;
> + struct hwd_affine_status hwd_status;
> +
> + struct dma_buf_attachment *dba[DRV_AFFINE_BUFFER_INDEX_MAX];
> + struct sg_table *sgt[DRV_AFFINE_BUFFER_INDEX_MAX];
> + enum dma_data_direction dma_dir[DRV_AFFINE_BUFFER_INDEX_MAX];
> + unsigned int dma_count;
> +
> + dma_addr_t buffer_iova[DRV_AFFINE_BUFFER_INDEX_MAX];
> +};
> +
> +static u32 affine_ipa_addr_to_iova(struct affine_priv *priv, struct 
> drv_ipa_addr addr)
> +{
> + u32 iova = 0;
> +
> + if (addr.buffer_index < priv->dma_count &&
> + addr.offset < priv->dba[addr.buffer_index]->dmabuf->size)
> + iova = priv->buffer_iova[addr.buffer_index] + addr.offset;
> + return iova;
> +}
> +
> +static int affine_attach_dma_buf(struct affine_priv *priv, unsigned int 
> buffer_index,
> +  struct drv_ipa_buffer_info *buffer_info)
> +{
> + int ret = 0;
> + dma_addr_t addr;
> +
> + if (buffer_index >= DRV_AFFINE_BUFFER_INDEX_MAX) {
> + dev_err(priv->dev, "Buffer index invalid: index=%d\n", 
> buffer_index);
> + return -EINVAL;
> + }
> +
> + switch (buffer_info[buffer_index].direction) {
> + case DRV_IPA_DIR_NONE:
> + priv->dma_dir[priv->dma_count] = DMA_NONE;
> + break;
> + case DRV_IPA_DIR_TO_DEVICE:
> + priv->dma_dir[priv->dma_count] = DMA_TO_DEVICE;
> + break;
> + case DRV_IPA_DIR_FROM_DEVICE:
> + priv->dma_dir[priv->dma_count] = DMA_FROM_DEVICE;
> + break;
> + case DRV_IPA_DIR_BIDIRECTION:
> + priv->dma_dir[priv->dma_count] = DMA_BIDIRECTIONAL;
> + break;
> +