Re: [RFC v2 01/22] drm: RFC for Plane Color Hardware Pipeline
On Thu, 25 Nov 2021 20:43:19 + "Shankar, Uma" wrote: > > -Original Message- > > From: Harry Wentland > > Sent: Tuesday, November 23, 2021 8:35 PM > > To: Shankar, Uma ; intel-...@lists.freedesktop.org; > > dri- > > de...@lists.freedesktop.org > > Cc: ville.syrj...@linux.intel.com; ppaala...@gmail.com; > > brian.star...@arm.com; > > sebast...@sebastianwick.net; shashank.sha...@amd.com > > Subject: Re: [RFC v2 01/22] drm: RFC for Plane Color Hardware Pipeline > > > > > > > > On 2021-09-06 17:38, Uma Shankar wrote: > > > This is a RFC proposal for plane color hardware blocks. > > > It exposes the property interface to userspace and calls out the > > > details or interfaces created and the intended purpose. > > > > > > Credits: Ville Syrjälä > > > Signed-off-by: Uma Shankar > > > --- > > > Documentation/gpu/rfc/drm_color_pipeline.rst | 167 > > > +++ > > > 1 file changed, 167 insertions(+) > > > create mode 100644 Documentation/gpu/rfc/drm_color_pipeline.rst > > > > > > diff --git a/Documentation/gpu/rfc/drm_color_pipeline.rst > > > b/Documentation/gpu/rfc/drm_color_pipeline.rst > > > new file mode 100644 > > > index ..0d1ca858783b > > > --- /dev/null > > > +++ b/Documentation/gpu/rfc/drm_color_pipeline.rst > > > @@ -0,0 +1,167 @@ > > > +== > > > +Display Color Pipeline: Proposed DRM Properties > > > +== > > > + > > > +This is how a typical display color hardware pipeline looks like: > > > + +---+ > > > + |RAM| > > > + | +--++-++-+ | > > > + | | FB 1 || FB 2 || FB N| | > > > + | +--++-++-+ | > > > + +---+ > > > + | Plane Color Hardware Block | > > > + ++ > > > + | +---v-+ +---v---+ +---v--+ | > > > + | | Plane A | | Plane B | | Plane N | | > > > + | | DeGamma | | Degamma | | Degamma | | > > > + | +---+-+ +---+---+ +---+--+ | > > > + | | | || > > > + | +---v-+ +---v---+ +---v--+ | > > > + | |Plane A | | Plane B | | Plane N | | > > > + | |CSC/CTM | | CSC/CTM | | CSC/CTM | | > > > + | +---+-+ ++--+ ++-+ | > > > + | | | | | > > > + | +---v-+ +v--+ +v-+ | > > > + | | Plane A | | Plane B | | Plane N | | > > > + | | Gamma | | Gamma | | Gamma| | > > > + | +---+-+ ++--+ ++-+ | > > > + | | | | | > > > + ++ > > > ++--v--v---v---| > > > +|| || > > > +|| Pipe Blender|| > > > ++++ > > > +||| > > > +|+---v--+ | > > > +|| Pipe DeGamma| | > > > +|| | | > > > +|+---+--+ | > > > +||Pipe Color | > > > +|+---v--+ Hardware| > > > +|| Pipe CSC/CTM| | > > > +|| | | > > > +|+---+--+ | > > > +||| > > > +|+---v--+ | > > > +|| Pipe Gamma | | > > > +|| | | > > > +|+---+--+ | > > > +||| > > > ++-+ > > > + | > > > + v > > > + Pipe Output > > > + > > > > This diagram defines what happens before and after the blending space but > > did > > wh
RE: [RFC v2 01/22] drm: RFC for Plane Color Hardware Pipeline
> -Original Message- > From: Harry Wentland > Sent: Tuesday, November 23, 2021 8:35 PM > To: Shankar, Uma ; intel-...@lists.freedesktop.org; > dri- > de...@lists.freedesktop.org > Cc: ville.syrj...@linux.intel.com; ppaala...@gmail.com; brian.star...@arm.com; > sebast...@sebastianwick.net; shashank.sha...@amd.com > Subject: Re: [RFC v2 01/22] drm: RFC for Plane Color Hardware Pipeline > > > > On 2021-09-06 17:38, Uma Shankar wrote: > > This is a RFC proposal for plane color hardware blocks. > > It exposes the property interface to userspace and calls out the > > details or interfaces created and the intended purpose. > > > > Credits: Ville Syrjälä > > Signed-off-by: Uma Shankar > > --- > > Documentation/gpu/rfc/drm_color_pipeline.rst | 167 > > +++ > > 1 file changed, 167 insertions(+) > > create mode 100644 Documentation/gpu/rfc/drm_color_pipeline.rst > > > > diff --git a/Documentation/gpu/rfc/drm_color_pipeline.rst > > b/Documentation/gpu/rfc/drm_color_pipeline.rst > > new file mode 100644 > > index ..0d1ca858783b > > --- /dev/null > > +++ b/Documentation/gpu/rfc/drm_color_pipeline.rst > > @@ -0,0 +1,167 @@ > > +== > > +Display Color Pipeline: Proposed DRM Properties > > +== > > + > > +This is how a typical display color hardware pipeline looks like: > > + +---+ > > + |RAM| > > + | +--++-++-+ | > > + | | FB 1 || FB 2 || FB N| | > > + | +--++-++-+ | > > + +---+ > > + | Plane Color Hardware Block | > > + ++ > > + | +---v-+ +---v---+ +---v--+ | > > + | | Plane A | | Plane B | | Plane N | | > > + | | DeGamma | | Degamma | | Degamma | | > > + | +---+-+ +---+---+ +---+--+ | > > + | | | || > > + | +---v-+ +---v---+ +---v--+ | > > + | |Plane A | | Plane B | | Plane N | | > > + | |CSC/CTM | | CSC/CTM | | CSC/CTM | | > > + | +---+-+ ++--+ ++-+ | > > + | | | | | > > + | +---v-+ +v--+ +v-+ | > > + | | Plane A | | Plane B | | Plane N | | > > + | | Gamma | | Gamma | | Gamma| | > > + | +---+-+ ++--+ ++-+ | > > + | | | | | > > + ++ > > ++--v--v---v---| > > +|| || > > +|| Pipe Blender|| > > ++++ > > +||| > > +|+---v--+ | > > +|| Pipe DeGamma| | > > +|| | | > > +|+---+--+ | > > +||Pipe Color | > > +|+---v--+ Hardware| > > +|| Pipe CSC/CTM| | > > +|| | | > > +|+---+--+ | > > +||| > > +|+---v--+ | > > +|| Pipe Gamma | | > > +|| | | > > +|+---+--+ | > > +||| > > ++-+ > > + | > > + v > > + Pipe Output > > + > > This diagram defines what happens before and after the blending space but did > where does scaling fit into it? Scaling can look different when performed in > linear or > non-linear space so I think it is important to define where in the pipeline > it sits. > > In my view scaling would happen between plane degamma and plane CSC. Yeah we can add scaling as well to make it clear. Scaling ideally should happen after Degamma. In intel's case it is after the CSC. Regards, Uma Shankar > Harry > > > +Proposal is to have below properties for a plane: > > + > > +* Plan
Re: [RFC v2 01/22] drm: RFC for Plane Color Hardware Pipeline
On 2021-09-06 17:38, Uma Shankar wrote: > This is a RFC proposal for plane color hardware blocks. > It exposes the property interface to userspace and calls > out the details or interfaces created and the intended > purpose. > > Credits: Ville Syrjälä > Signed-off-by: Uma Shankar > --- > Documentation/gpu/rfc/drm_color_pipeline.rst | 167 +++ > 1 file changed, 167 insertions(+) > create mode 100644 Documentation/gpu/rfc/drm_color_pipeline.rst > > diff --git a/Documentation/gpu/rfc/drm_color_pipeline.rst > b/Documentation/gpu/rfc/drm_color_pipeline.rst > new file mode 100644 > index ..0d1ca858783b > --- /dev/null > +++ b/Documentation/gpu/rfc/drm_color_pipeline.rst > @@ -0,0 +1,167 @@ > +== > +Display Color Pipeline: Proposed DRM Properties > +== > + > +This is how a typical display color hardware pipeline looks like: > + +---+ > + |RAM| > + | +--++-++-+ | > + | | FB 1 || FB 2 || FB N| | > + | +--++-++-+ | > + +---+ > + | Plane Color Hardware Block | > + ++ > + | +---v-+ +---v---+ +---v--+ | > + | | Plane A | | Plane B | | Plane N | | > + | | DeGamma | | Degamma | | Degamma | | > + | +---+-+ +---+---+ +---+--+ | > + | | | || > + | +---v-+ +---v---+ +---v--+ | > + | |Plane A | | Plane B | | Plane N | | > + | |CSC/CTM | | CSC/CTM | | CSC/CTM | | > + | +---+-+ ++--+ ++-+ | > + | | | | | > + | +---v-+ +v--+ +v-+ | > + | | Plane A | | Plane B | | Plane N | | > + | | Gamma | | Gamma | | Gamma| | > + | +---+-+ ++--+ ++-+ | > + | | | | | > + ++ > ++--v--v---v---| > +|| || > +|| Pipe Blender|| > ++++ > +||| > +|+---v--+ | > +|| Pipe DeGamma| | > +|| | | > +|+---+--+ | > +||Pipe Color | > +|+---v--+ Hardware| > +|| Pipe CSC/CTM| | > +|| | | > +|+---+--+ | > +||| > +|+---v--+ | > +|| Pipe Gamma | | > +|| | | > +|+---+--+ | > +||| > ++-+ > + | > + v > + Pipe Output > + This diagram defines what happens before and after the blending space but did where does scaling fit into it? Scaling can look different when performed in linear or non-linear space so I think it is important to define where in the pipeline it sits. In my view scaling would happen between plane degamma and plane CSC. Harry > +Proposal is to have below properties for a plane: > + > +* Plane Degamma or Pre-Curve: > + * This will be used to linearize the input framebuffer data. > + * It will apply the reverse of the color transfer function. > + * It can be a degamma curve or OETF for HDR. > + * This linear data can be further acted on by the following > + * color hardware blocks in the display hardware pipeline > + > +UAPI Name: PLANE_DEGAMMA_MODE > +Description: Enum property with values as blob_id's which advertizes the > + possible degamma modes and lut ranges supported by the platform. > + This allows userspace to query and get the plane degamma color > + caps and choose the appropriate degamma mode and create lut values > + accordingly. > + > +UAPI Name: PLANE_DEGAMMA_LUT > +Description: Blob property which allows a userspace to provide LUT values > + to apply degamma curve using the h/w plane degamma processing > + engine, thereby making the content as linear for further color > + processing. Userspace gets the size of LUT and precision etc > + from PLANE_DEGAMA_MODE_PROPERTY > + > +* Plane CTM > + * This is a Property to program the color transformation matrix. > + * This can be used to perform a color space conversion like > + *
Re: [RFC v2 01/22] drm: RFC for Plane Color Hardware Pipeline
On 2021-10-27 04:00, Pekka Paalanen wrote: > On Tue, 26 Oct 2021 11:36:33 -0400 > Harry Wentland wrote: > >> On 2021-10-14 15:44, Shankar, Uma wrote: >>> > ... >> FWIW, AMD HW (depending on generation) can do these operations >> (in this order): >> >> 1) 1D LUT (fixed or PWL programmable) >> 2) simple multiplier (for scaling SDR content to HDR output) >> 3) CTM matrix >> 4) 1D LUT (shaper LUT to non-linearize for more effective 3D LUT transform) >> 5) 3D LUT >> 6) 1D LUT (for non-linear blending, or to linearize after 3D LUT) >> 7) blending >> 8) CTM matrix >> 9) 1D LUT (shaper LUT like above) >> 10) 3D LUT >> 11) 1D LUT (generally for EOTF^-1 for display EOTF) >> >> Not all blocks are available on all (current and future) HW. >> >> I sketched a few diagrams that show how these might be used by >> a compositor if we exposed all of these blocks and should >> really try to add some of them to the color-and-hdr docs >> repo. > > Yes, please. > > That pipeline looks pretty comprehensive. > > Btw. how about YUV<->RGB conversion? Where would that matrix go? It > needs to operate on non-linear values, while a color space conversion > matrix needs to operate on linear color values. > That is communicated via drm_framebuffer.format, and drm_plane's color_range and color_encoding. I expect it to happen before everything else, i.e. at step 0. It seems like any color management implementation I've seen is always operating in RGB. Harry >>> + * This can be used to perform a color space conversion like >>> + * BT2020 to BT709 or BT601 etc. >>> + * This block is generally kept after the degamma unit so that >> >> Not "generally". If blocks can change places, then it becomes >> intractable for generic userspace to program. > > Sure, will drop this wording here. But one open will still remain > for userspace, as to how it gets the pipeline dynamically for a > respective hardware. > Currently we have assumed that this would be the logical fixed order > of hardware units. If we cannot model the abstract KMS pipeline as a fixed order of units (where each unit may exist or not), we need to take a few steps back here and look at what do we actually want to expose. That is a much bigger design problem which we are currently not even considering. >>> >>> I think most of the hardware vendor platforms have this pipeline, so we can >>> implement the properties which include all the possible hardware blocks. If >>> certain units don't exist, the respective properties should not be exposed >>> which will make things easier for userspace. >> >> I think the color pipeline should be modeled in a way that makes >> sense from a color science standpoint and in a way that makes sense >> for compositor implementations. Fortunately HW design generally >> aligns with these intentions but we should be careful to not >> let HW design dictate KMS interfaces. > > I'm so happy to hear that! > > > Thanks, > pq >
Re: [RFC v2 01/22] drm: RFC for Plane Color Hardware Pipeline
On Tue, 26 Oct 2021 11:36:33 -0400 Harry Wentland wrote: > On 2021-10-14 15:44, Shankar, Uma wrote: > > ... > > + > > +* Plane CTM > > + * This is a Property to program the color transformation > > matrix. > > No mode property here? Is there any hardware with something else > than a matrix at this point? > >>> > >>> Not that I am aware of. > >>> > Should we assume there will be hardware with something else, and > have a CSC mode property with only a single enum value defined so far: > "matrix"? Or do we say PLANE_CTM is a matrix and if you have > something else in hardware, then invent a new property for it? > >>> > >>> I think this should be good as we have this for crtc with no one > >>> complaining. > >>> There may be hardware with fixed function operation for the CSC but > >>> then its not a matrix and it would be pretty hardware dependent, so > >>> we can leave that from a generic UAPI. > >> > >> Ok. And if that eventually turns out to be a mistake, it's easy to > >> invent more properties. > > > > I feel that is what would be required. This is just another instance of > > what we have at crtc level. > > > > Would a userspace client ever want to use both CTM and 3D LUT? The only reason I can think of is to keep the 3D LUT size (number of taps) small. I suspect that if one can use a matrix to get close, and then fix the residual with a 3D LUT, the 3D LUT could be significantly smaller than if you'd need to bake the matrix into the 3D LUT. But this is just my own suspicion, I haven't looked for references about this topic. IOW, it's a question of precision - the same reason as to why you would want a 1D LUT before and after a 3D LUT. > We could add a mode property to CTM to allow for a CTM or 3D LUT or > we could add new properties for 3D LUT support. > > 3D LUT might come with shaper 1D LUTs that can be programmed in > conjunction with the 3D LUT. 3D LUTs operating in non-linear > space require less precision than 3D LUTs operating in linear > space, hence the 1D LUT can be used to non-linearize the > pixel data for 3D LUT operation. > > FWIW, AMD HW (depending on generation) can do these operations > (in this order): > > 1) 1D LUT (fixed or PWL programmable) > 2) simple multiplier (for scaling SDR content to HDR output) > 3) CTM matrix > 4) 1D LUT (shaper LUT to non-linearize for more effective 3D LUT transform) > 5) 3D LUT > 6) 1D LUT (for non-linear blending, or to linearize after 3D LUT) > 7) blending > 8) CTM matrix > 9) 1D LUT (shaper LUT like above) > 10) 3D LUT > 11) 1D LUT (generally for EOTF^-1 for display EOTF) > > Not all blocks are available on all (current and future) HW. > > I sketched a few diagrams that show how these might be used by > a compositor if we exposed all of these blocks and should > really try to add some of them to the color-and-hdr docs > repo. Yes, please. That pipeline looks pretty comprehensive. Btw. how about YUV<->RGB conversion? Where would that matrix go? It needs to operate on non-linear values, while a color space conversion matrix needs to operate on linear color values. > > + * This can be used to perform a color space conversion like > > + * BT2020 to BT709 or BT601 etc. > > + * This block is generally kept after the degamma unit so that > > Not "generally". If blocks can change places, then it becomes > intractable for generic userspace to program. > >>> > >>> Sure, will drop this wording here. But one open will still remain > >>> for userspace, as to how it gets the pipeline dynamically for a > >>> respective hardware. > >>> Currently we have assumed that this would be the logical fixed order > >>> of hardware units. > >> > >> If we cannot model the abstract KMS pipeline as a fixed order of units > >> (where each unit may exist or not), we need to take a few steps back > >> here and look at what do we actually want to expose. That is a much > >> bigger design problem which we are currently not even considering. > > > > I think most of the hardware vendor platforms have this pipeline, so we can > > implement the properties which include all the possible hardware blocks. If > > certain units don't exist, the respective properties should not be exposed > > which will make things easier for userspace. > > I think the color pipeline should be modeled in a way that makes > sense from a color science standpoint and in a way that makes sense > for compositor implementations. Fortunately HW design generally > aligns with these intentions but we should be careful to not > let HW design dictate KMS interfaces. I'm so happy to hear that! Thanks, pq pgpKvK_QvSprI.pgp Description: OpenPGP digital signature
Re: [RFC v2 01/22] drm: RFC for Plane Color Hardware Pipeline
On 2021-10-12 16:58, Shankar, Uma wrote: > > >> -Original Message- >> From: Pekka Paalanen >> Sent: Tuesday, October 12, 2021 4:01 PM >> To: Shankar, Uma >> Cc: intel-...@lists.freedesktop.org; dri-devel@lists.freedesktop.org; >> harry.wentl...@amd.com; ville.syrj...@linux.intel.com; >> brian.star...@arm.com; sebast...@sebastianwick.net; >> shashank.sha...@amd.com >> Subject: Re: [RFC v2 01/22] drm: RFC for Plane Color Hardware Pipeline >> >> On Tue, 7 Sep 2021 03:08:43 +0530 >> Uma Shankar wrote: >> snip >>> + >>> + >>> +This patch series adds properties for plane color features. It adds >>> +properties for degamma used to linearize data and CSC used for >>> +gamut conversion. It also includes Gamma support used to again >>> +non-linearize data as per panel supported color space. These can be >>> +utilize by user space to convert planes from one format to another, >>> +one color space to another etc. >> >> FWIW, this is exactly the structure I have assumed in the Weston CM work. > > This is great to hear that we are aligned wrt how the pipeline should work. > > Thanks Pekka for taking time out and providing the feedback. > > @harry.wentl...@amd.com We can work together and build our design to > accommodate > both Intel and AMD's hardware needs. This will also make things generic > enough for any > other hardware vendor as well. > Definitely. I think we're on the right path. Personally I would like to arrive at a solid KMS definition for this by the time Weston guys get to the HDR enablement with SW composition so we can start looking at KMS offloading for HDR planes as next step. Harry > Thanks & Regards, > Uma Shankar > >>> + >>> +Userspace can take smart blending decisions and utilize these >>> +hardware supported plane color features to get accurate color >>> +profile. The same can help in consistent color quality from source >>> +to panel taking advantage of advanced color features in hardware. >>> + >>> +These patches add the property interfaces and enable helper functions. >>> +This series adds Intel's XE_LPD hw specific plane gamma feature. We >>> +can build up and add other platform/hardware specific >>> +implementation on top of this series. >>> + >>> +Credits: Special mention and credits to Ville Syrjala for coming up >>> +with a design for this feature and inputs. This series is based on >>> +his original design and idea. >> >> >> Thanks, >> pq
Re: [RFC v2 01/22] drm: RFC for Plane Color Hardware Pipeline
On 2021-10-14 15:44, Shankar, Uma wrote: > > >> -Original Message- >> From: Pekka Paalanen >> Sent: Wednesday, October 13, 2021 2:01 PM >> To: Shankar, Uma >> Cc: harry.wentl...@amd.com; ville.syrj...@linux.intel.com; intel- >> g...@lists.freedesktop.org; dri-devel@lists.freedesktop.org; >> brian.star...@arm.com; sebast...@sebastianwick.net; >> shashank.sha...@amd.com >> Subject: Re: [RFC v2 01/22] drm: RFC for Plane Color Hardware Pipeline >> >> On Tue, 12 Oct 2021 20:58:27 + >> "Shankar, Uma" wrote: >> >>>> -Original Message- >>>> From: Pekka Paalanen >>>> Sent: Tuesday, October 12, 2021 4:01 PM >>>> To: Shankar, Uma >>>> Cc: intel-...@lists.freedesktop.org; >>>> dri-devel@lists.freedesktop.org; harry.wentl...@amd.com; >>>> ville.syrj...@linux.intel.com; brian.star...@arm.com; >>>> sebast...@sebastianwick.net; shashank.sha...@amd.com >>>> Subject: Re: [RFC v2 01/22] drm: RFC for Plane Color Hardware >>>> Pipeline >>>> >>>> On Tue, 7 Sep 2021 03:08:43 +0530 Uma Shankar >>>> wrote: >>>> >>>>> This is a RFC proposal for plane color hardware blocks. >>>>> It exposes the property interface to userspace and calls out the >>>>> details or interfaces created and the intended purpose. >>>>> >>>>> Credits: Ville Syrjälä >>>>> Signed-off-by: Uma Shankar >>>>> --- >>>>> Documentation/gpu/rfc/drm_color_pipeline.rst | 167 >>>>> +++ >>>>> 1 file changed, 167 insertions(+) create mode 100644 >>>>> Documentation/gpu/rfc/drm_color_pipeline.rst >>>>> >>>>> diff --git a/Documentation/gpu/rfc/drm_color_pipeline.rst >>>>> b/Documentation/gpu/rfc/drm_color_pipeline.rst >>>>> new file mode 100644 >>>>> index ..0d1ca858783b >>>>> --- /dev/null >>>>> +++ b/Documentation/gpu/rfc/drm_color_pipeline.rst >>>>> @@ -0,0 +1,167 @@ >>>>> +== >>>>> +Display Color Pipeline: Proposed DRM Properties >> >> ... >> >>>>> +Proposal is to have below properties for a plane: >>>>> + >>>>> +* Plane Degamma or Pre-Curve: >>>>> + * This will be used to linearize the input framebuffer data. >>>>> + * It will apply the reverse of the color transfer function. >>>>> + * It can be a degamma curve or OETF for HDR. >>>> >>>> As you want to produce light-linear values, you use EOTF or inverse OETF. >>>> >>>> The term OETF has a built-in assumption that that happens in a camera: >>>> it takes in light and produces and electrical signal. Lately I >>>> have personally started talking about non-linear encoding of color >>>> values, since EOTF is often associated with displays if nothing >>>> else is said (taking >> in an electrical signal and producing light). >>>> >>>> So this would be decoding the color values into light-linear color >>>> values. That is what an EOTF does, yes, but I feel there is a >>>> nuanced difference. A piece of equipment implements an EOTF by >>>> turning an electrical signal into light, hence EOTF often refers >>>> to specific equipment. You could talk about content EOTF to denote >>>> content value encoding, as opposed to output or display EOTF, but >>>> that might be confusing if you look at e.g. the diagrams in >>>> BT.2100: is it the EOTF >> or is it the inverse OETF? Is the (inverse?) OOTF included? >>>> >>>> So I try to side-step those questions by talking about encoding. >>> >>> The idea here is that frame buffer presented to display plane engine >>> will be non- >> linear. >>> So output of a media decode should result in content with EOTF applied. >> >> Hi, >> >> sure, but the question is: which EOTF. There can be many different >> things called "EOTF" in a single pipeline, and then it's up to the >> document writer to make the difference between them. Comparing two >> documents with different conventions causes a lot of confusion in my >> personal experience, so it is good to define the concepts more carefully. > > Hi Pekka, > I think you have given some nice inputs to really
Re: [RFC v2 01/22] drm: RFC for Plane Color Hardware Pipeline
Thanks, Uma, for the updated patches. I'm finally finding time to go through them. On 2021-10-15 03:42, Pekka Paalanen wrote: > On Thu, 14 Oct 2021 19:44:25 + > "Shankar, Uma" wrote: > >>> -Original Message- >>> From: Pekka Paalanen >>> Sent: Wednesday, October 13, 2021 2:01 PM >>> To: Shankar, Uma >>> Cc: harry.wentl...@amd.com; ville.syrj...@linux.intel.com; intel- >>> g...@lists.freedesktop.org; dri-devel@lists.freedesktop.org; >>> brian.star...@arm.com; sebast...@sebastianwick.net; >>> shashank.sha...@amd.com >>> Subject: Re: [RFC v2 01/22] drm: RFC for Plane Color Hardware Pipeline >>> >>> On Tue, 12 Oct 2021 20:58:27 + >>> "Shankar, Uma" wrote: >>> >>>>> -Original Message- >>>>> From: Pekka Paalanen >>>>> Sent: Tuesday, October 12, 2021 4:01 PM >>>>> To: Shankar, Uma >>>>> Cc: intel-...@lists.freedesktop.org; >>>>> dri-devel@lists.freedesktop.org; harry.wentl...@amd.com; >>>>> ville.syrj...@linux.intel.com; brian.star...@arm.com; >>>>> sebast...@sebastianwick.net; shashank.sha...@amd.com >>>>> Subject: Re: [RFC v2 01/22] drm: RFC for Plane Color Hardware >>>>> Pipeline >>>>> >>>>> On Tue, 7 Sep 2021 03:08:43 +0530 Uma Shankar >>>>> wrote: >>>>> >>>>>> This is a RFC proposal for plane color hardware blocks. >>>>>> It exposes the property interface to userspace and calls out the >>>>>> details or interfaces created and the intended purpose. >>>>>> >>>>>> Credits: Ville Syrjälä >>>>>> Signed-off-by: Uma Shankar >>>>>> --- >>>>>> Documentation/gpu/rfc/drm_color_pipeline.rst | 167 >>>>>> +++ >>>>>> 1 file changed, 167 insertions(+) create mode 100644 >>>>>> Documentation/gpu/rfc/drm_color_pipeline.rst >>>>>> >>>>>> diff --git a/Documentation/gpu/rfc/drm_color_pipeline.rst >>>>>> b/Documentation/gpu/rfc/drm_color_pipeline.rst >>>>>> new file mode 100644 >>>>>> index ..0d1ca858783b >>>>>> --- /dev/null >>>>>> +++ b/Documentation/gpu/rfc/drm_color_pipeline.rst >>>>>> @@ -0,0 +1,167 @@ >>>>>> +== >>>>>> +Display Color Pipeline: Proposed DRM Properties > > ... > >>> cf. BT.2100 Annex 1, "The relationship between the OETF, the EOTF and >>> the OOTF", although I find those diagrams somewhat confusing still. It >>> does not seem to clearly account for transmission non-linear encoding being >>> different from the display EOTF. >>> >>> Different documents use OOTF to refer to different things. Then there >>> is also the fundamental difference between PQ and HLG systems, where >>> OOTF is by definition in different places of the >>> camera-transmission-display pipeline. >> >> Agree this is a bit confusing, I admit I was much more confused than what >> you were for sure. >> Will do some research to get my understanding in place. Thanks for all the >> inputs. > > I'm sure I was at least equally confused or even more at the start. I > have just had a year of casual reading, discussions, and a W3C workshop > attendance to improve my understanding. :-) > > Now I know enough to be dangerous. > > ... > >>>>>> + >>>>>> +UAPI Name: PLANE_DEGAMMA_MODE >>>>>> +Description: Enum property with values as blob_id's which >>>>>> +advertizes >>>>>> the >>>>> >>>>> Is enum with blob id values even a thing? >>>> >>>> Yeah we could have. This is a dynamic enum created with blobs. Each >>>> entry contains the data structure to extract the full color >>>> capabilities of the hardware. It’s a very interesting play with >>>> blobs (@ville.syrj...@linux.intel.com brainchild) >>> >>> Yes, I think I can imagine how that works. The blobs are created >>> immutable, unable to change once the plane has been advertised to >>> userspace, because their IDs are used as enum values. But that is ok, >>> because the blob describes capabilities that cannot change during the >>> device's life
Re: [RFC v2 01/22] drm: RFC for Plane Color Hardware Pipeline
On Thu, 14 Oct 2021 19:44:25 + "Shankar, Uma" wrote: > > -Original Message- > > From: Pekka Paalanen > > Sent: Wednesday, October 13, 2021 2:01 PM > > To: Shankar, Uma > > Cc: harry.wentl...@amd.com; ville.syrj...@linux.intel.com; intel- > > g...@lists.freedesktop.org; dri-devel@lists.freedesktop.org; > > brian.star...@arm.com; sebast...@sebastianwick.net; > > shashank.sha...@amd.com > > Subject: Re: [RFC v2 01/22] drm: RFC for Plane Color Hardware Pipeline > > > > On Tue, 12 Oct 2021 20:58:27 + > > "Shankar, Uma" wrote: > > > > > > -Original Message- > > > > From: Pekka Paalanen > > > > Sent: Tuesday, October 12, 2021 4:01 PM > > > > To: Shankar, Uma > > > > Cc: intel-...@lists.freedesktop.org; > > > > dri-devel@lists.freedesktop.org; harry.wentl...@amd.com; > > > > ville.syrj...@linux.intel.com; brian.star...@arm.com; > > > > sebast...@sebastianwick.net; shashank.sha...@amd.com > > > > Subject: Re: [RFC v2 01/22] drm: RFC for Plane Color Hardware > > > > Pipeline > > > > > > > > On Tue, 7 Sep 2021 03:08:43 +0530 Uma Shankar > > > > wrote: > > > > > > > > > This is a RFC proposal for plane color hardware blocks. > > > > > It exposes the property interface to userspace and calls out the > > > > > details or interfaces created and the intended purpose. > > > > > > > > > > Credits: Ville Syrjälä > > > > > Signed-off-by: Uma Shankar > > > > > --- > > > > > Documentation/gpu/rfc/drm_color_pipeline.rst | 167 > > > > > +++ > > > > > 1 file changed, 167 insertions(+) create mode 100644 > > > > > Documentation/gpu/rfc/drm_color_pipeline.rst > > > > > > > > > > diff --git a/Documentation/gpu/rfc/drm_color_pipeline.rst > > > > > b/Documentation/gpu/rfc/drm_color_pipeline.rst > > > > > new file mode 100644 > > > > > index ..0d1ca858783b > > > > > --- /dev/null > > > > > +++ b/Documentation/gpu/rfc/drm_color_pipeline.rst > > > > > @@ -0,0 +1,167 @@ > > > > > +== > > > > > +Display Color Pipeline: Proposed DRM Properties ... > > cf. BT.2100 Annex 1, "The relationship between the OETF, the EOTF and > > the OOTF", although I find those diagrams somewhat confusing still. It > > does not seem to clearly account for transmission non-linear encoding being > > different from the display EOTF. > > > > Different documents use OOTF to refer to different things. Then there > > is also the fundamental difference between PQ and HLG systems, where > > OOTF is by definition in different places of the > > camera-transmission-display pipeline. > > Agree this is a bit confusing, I admit I was much more confused than what you > were for sure. > Will do some research to get my understanding in place. Thanks for all the > inputs. I'm sure I was at least equally confused or even more at the start. I have just had a year of casual reading, discussions, and a W3C workshop attendance to improve my understanding. :-) Now I know enough to be dangerous. ... > > > > > + > > > > > +UAPI Name: PLANE_DEGAMMA_MODE > > > > > +Description: Enum property with values as blob_id's which > > > > > +advertizes > > > > > the > > > > > > > > Is enum with blob id values even a thing? > > > > > > Yeah we could have. This is a dynamic enum created with blobs. Each > > > entry contains the data structure to extract the full color > > > capabilities of the hardware. It’s a very interesting play with > > > blobs (@ville.syrj...@linux.intel.com brainchild) > > > > Yes, I think I can imagine how that works. The blobs are created > > immutable, unable to change once the plane has been advertised to > > userspace, because their IDs are used as enum values. But that is ok, > > because the blob describes capabilities that cannot change during the > > device's lifetime... or can they? What if you would want to extend the > > blob format, do you need a KMS client cap to change the format which > > would be impossible because you can't change an enum definition after it > > has been installed so you cannot swap the blob to a new one? > > > > This also
RE: [RFC v2 01/22] drm: RFC for Plane Color Hardware Pipeline
> -Original Message- > From: Pekka Paalanen > Sent: Wednesday, October 13, 2021 12:56 PM > To: Shankar, Uma > Cc: Simon Ser ; daniel.vet...@ffwll.ch; intel- > g...@lists.freedesktop.org; dri-devel@lists.freedesktop.org; > harry.wentl...@amd.com; ville.syrj...@linux.intel.com; brian.star...@arm.com; > sebast...@sebastianwick.net; shashank.sha...@amd.com > Subject: Re: [RFC v2 01/22] drm: RFC for Plane Color Hardware Pipeline > > On Tue, 12 Oct 2021 19:11:29 + > "Shankar, Uma" wrote: > > > > -Original Message- > > > From: Pekka Paalanen > > > Sent: Tuesday, October 12, 2021 5:30 PM > > > To: Simon Ser > > > Cc: Shankar, Uma ; > > > intel-...@lists.freedesktop.org; dri- de...@lists.freedesktop.org; > > > harry.wentl...@amd.com; ville.syrj...@linux.intel.com; > > > brian.star...@arm.com; sebast...@sebastianwick.net; > > > shashank.sha...@amd.com > > > Subject: Re: [RFC v2 01/22] drm: RFC for Plane Color Hardware > > > Pipeline > > > > > > On Tue, 12 Oct 2021 10:35:37 + > > > Simon Ser wrote: > > > > > > > On Tuesday, October 12th, 2021 at 12:30, Pekka Paalanen > > > wrote: > > > > > > > > > is there a practise of landing proposal documents in the kernel? > > > > > How does that work, will a kernel tree carry the patch files? > > > > > Or should this document be worded like documentation for an > > > > > accepted feature, and then the patches either land or don't? > > > > > > > > Once everyone agrees, the RFC can land. I don't think a kernel > > > > tree is necessary. See: > > > > > > > > https://dri.freedesktop.org/docs/drm/gpu/rfc/index.html > > > > > > Does this mean the RFC doc patch will land, but the code patches > > > will remain in the review cycles waiting for userspace proving vehicles? > > > Rather than e.g. committed as files that people would need to apply > > > themselves? Or how does one find the code patches corresponding to RFC > > > docs? > > > > As I understand, this section was added to finalize the design and > > debate on the UAPI, structures, headers and design etc. Once a general > > agreement is in place with all the stakeholders, we can have ack on > > design and approach and get it merged. This hence serves as an approved > reference for the UAPI, accepted and agreed by community at large. > > > > Once the code lands, all the documentation will be added to the right > > driver sections and helpers, like it's been done currently. > > I'm just wondering: someone browses a kernel tree, and discovers this RFC doc > in > there. They want to see or test the latest (WIP) kernel implementation of it. > How will > they find the code / patches? Maybe we could include the WIP links here to help with getting the pieces, this may include the driver patches and also the userspace efforts as well. Regards, Uma Shankar > > Thanks, > pq
RE: [RFC v2 01/22] drm: RFC for Plane Color Hardware Pipeline
> -Original Message- > From: Pekka Paalanen > Sent: Wednesday, October 13, 2021 2:01 PM > To: Shankar, Uma > Cc: harry.wentl...@amd.com; ville.syrj...@linux.intel.com; intel- > g...@lists.freedesktop.org; dri-devel@lists.freedesktop.org; > brian.star...@arm.com; sebast...@sebastianwick.net; > shashank.sha...@amd.com > Subject: Re: [RFC v2 01/22] drm: RFC for Plane Color Hardware Pipeline > > On Tue, 12 Oct 2021 20:58:27 + > "Shankar, Uma" wrote: > > > > -Original Message- > > > From: Pekka Paalanen > > > Sent: Tuesday, October 12, 2021 4:01 PM > > > To: Shankar, Uma > > > Cc: intel-...@lists.freedesktop.org; > > > dri-devel@lists.freedesktop.org; harry.wentl...@amd.com; > > > ville.syrj...@linux.intel.com; brian.star...@arm.com; > > > sebast...@sebastianwick.net; shashank.sha...@amd.com > > > Subject: Re: [RFC v2 01/22] drm: RFC for Plane Color Hardware > > > Pipeline > > > > > > On Tue, 7 Sep 2021 03:08:43 +0530 Uma Shankar > > > wrote: > > > > > > > This is a RFC proposal for plane color hardware blocks. > > > > It exposes the property interface to userspace and calls out the > > > > details or interfaces created and the intended purpose. > > > > > > > > Credits: Ville Syrjälä > > > > Signed-off-by: Uma Shankar > > > > --- > > > > Documentation/gpu/rfc/drm_color_pipeline.rst | 167 > > > > +++ > > > > 1 file changed, 167 insertions(+) create mode 100644 > > > > Documentation/gpu/rfc/drm_color_pipeline.rst > > > > > > > > diff --git a/Documentation/gpu/rfc/drm_color_pipeline.rst > > > > b/Documentation/gpu/rfc/drm_color_pipeline.rst > > > > new file mode 100644 > > > > index ..0d1ca858783b > > > > --- /dev/null > > > > +++ b/Documentation/gpu/rfc/drm_color_pipeline.rst > > > > @@ -0,0 +1,167 @@ > > > > +== > > > > +Display Color Pipeline: Proposed DRM Properties > > ... > > > > > +Proposal is to have below properties for a plane: > > > > + > > > > +* Plane Degamma or Pre-Curve: > > > > + * This will be used to linearize the input framebuffer data. > > > > + * It will apply the reverse of the color transfer function. > > > > + * It can be a degamma curve or OETF for HDR. > > > > > > As you want to produce light-linear values, you use EOTF or inverse OETF. > > > > > > The term OETF has a built-in assumption that that happens in a camera: > > > it takes in light and produces and electrical signal. Lately I > > > have personally started talking about non-linear encoding of color > > > values, since EOTF is often associated with displays if nothing > > > else is said (taking > in an electrical signal and producing light). > > > > > > So this would be decoding the color values into light-linear color > > > values. That is what an EOTF does, yes, but I feel there is a > > > nuanced difference. A piece of equipment implements an EOTF by > > > turning an electrical signal into light, hence EOTF often refers > > > to specific equipment. You could talk about content EOTF to denote > > > content value encoding, as opposed to output or display EOTF, but > > > that might be confusing if you look at e.g. the diagrams in > > > BT.2100: is it the EOTF > or is it the inverse OETF? Is the (inverse?) OOTF included? > > > > > > So I try to side-step those questions by talking about encoding. > > > > The idea here is that frame buffer presented to display plane engine > > will be non- > linear. > > So output of a media decode should result in content with EOTF applied. > > Hi, > > sure, but the question is: which EOTF. There can be many different > things called "EOTF" in a single pipeline, and then it's up to the > document writer to make the difference between them. Comparing two > documents with different conventions causes a lot of confusion in my > personal experience, so it is good to define the concepts more carefully. Hi Pekka, I think you have given some nice inputs to really deep dive and document here. Will update this with the right expectations wrt what transfer functions to be used at various stages in the operation pipeline. > > So output of a media decode should result in content with EOTF applied. > >
Re: [RFC v2 01/22] drm: RFC for Plane Color Hardware Pipeline
On Tue, 12 Oct 2021 20:58:27 + "Shankar, Uma" wrote: > > -Original Message- > > From: Pekka Paalanen > > Sent: Tuesday, October 12, 2021 4:01 PM > > To: Shankar, Uma > > Cc: intel-...@lists.freedesktop.org; dri-devel@lists.freedesktop.org; > > harry.wentl...@amd.com; ville.syrj...@linux.intel.com; > > brian.star...@arm.com; sebast...@sebastianwick.net; > > shashank.sha...@amd.com > > Subject: Re: [RFC v2 01/22] drm: RFC for Plane Color Hardware Pipeline > > > > On Tue, 7 Sep 2021 03:08:43 +0530 > > Uma Shankar wrote: > > > > > This is a RFC proposal for plane color hardware blocks. > > > It exposes the property interface to userspace and calls out the > > > details or interfaces created and the intended purpose. > > > > > > Credits: Ville Syrjälä > > > Signed-off-by: Uma Shankar > > > --- > > > Documentation/gpu/rfc/drm_color_pipeline.rst | 167 > > > +++ > > > 1 file changed, 167 insertions(+) > > > create mode 100644 Documentation/gpu/rfc/drm_color_pipeline.rst > > > > > > diff --git a/Documentation/gpu/rfc/drm_color_pipeline.rst > > > b/Documentation/gpu/rfc/drm_color_pipeline.rst > > > new file mode 100644 > > > index ..0d1ca858783b > > > --- /dev/null > > > +++ b/Documentation/gpu/rfc/drm_color_pipeline.rst > > > @@ -0,0 +1,167 @@ > > > +== > > > +Display Color Pipeline: Proposed DRM Properties ... > > > +Proposal is to have below properties for a plane: > > > + > > > +* Plane Degamma or Pre-Curve: > > > + * This will be used to linearize the input framebuffer data. > > > + * It will apply the reverse of the color transfer function. > > > + * It can be a degamma curve or OETF for HDR. > > > > As you want to produce light-linear values, you use EOTF or inverse OETF. > > > > The term OETF has a built-in assumption that that happens in a camera: > > it takes in light and produces and electrical signal. Lately I have > > personally started talking about non-linear encoding of color values, > > since EOTF is often associated with displays if nothing else is said > > (taking in an electrical signal and producing light). > > > > So this would be decoding the color values into light-linear color > > values. That is what an EOTF does, yes, but I feel there is a nuanced > > difference. A piece of equipment implements an EOTF by turning an > > electrical signal into light, hence EOTF often refers to specific > > equipment. You could talk about content EOTF to denote content value > > encoding, as opposed to output or display EOTF, but that might be > > confusing if you look at e.g. the diagrams in BT.2100: is it the EOTF or is > > it the inverse OETF? Is the (inverse?) OOTF included? > > > > So I try to side-step those questions by talking about encoding. > > The idea here is that frame buffer presented to display plane engine will be > non-linear. > So output of a media decode should result in content with EOTF applied. Hi, sure, but the question is: which EOTF. There can be many different things called "EOTF" in a single pipeline, and then it's up to the document writer to make the difference between them. Comparing two documents with different conventions causes a lot of confusion in my personal experience, so it is good to define the concepts more carefully. > So output of a media decode should result in content with EOTF applied. I suspect you have it backwards. Media decode produces electrical (non-linear) pixel color values. If EOTF was applied, they would be linear instead (and require more memory to achieve the same visual precision). If you want to put it this way, you could say "with inverse EOTF applied", but that might be slightly confusing because it is already baked in to the video, it's not something a media decoder has to specifically apply, I think. However, the (inverse) EOTF in this case is the content EOTF, not the display EOTF. If content and display EOTF differ, then one must apply first content EOTF and then inverse display EOTF to get values that are correctly encoded for the display. (This is necessary but not sufficient in general.) Mind, that this is not an OOTF nor an artistic adjustment, this is purely a value encoding conversion. > Playback transfer function (EOTF): inverse OETF plus rendering intent gamma. Does "rendering intent gamma" refer to artistic adjustments, not OOTF? cf. BT.2100 Annex 1, "The relationship between the OETF, the EOTF and th
Re: [RFC v2 01/22] drm: RFC for Plane Color Hardware Pipeline
On Tue, 12 Oct 2021 19:11:29 + "Shankar, Uma" wrote: > > -Original Message- > > From: Pekka Paalanen > > Sent: Tuesday, October 12, 2021 5:30 PM > > To: Simon Ser > > Cc: Shankar, Uma ; intel-...@lists.freedesktop.org; > > dri- > > de...@lists.freedesktop.org; harry.wentl...@amd.com; > > ville.syrj...@linux.intel.com; brian.star...@arm.com; > > sebast...@sebastianwick.net; shashank.sha...@amd.com > > Subject: Re: [RFC v2 01/22] drm: RFC for Plane Color Hardware Pipeline > > > > On Tue, 12 Oct 2021 10:35:37 + > > Simon Ser wrote: > > > > > On Tuesday, October 12th, 2021 at 12:30, Pekka Paalanen > > wrote: > > > > > > > is there a practise of landing proposal documents in the kernel? How > > > > does that work, will a kernel tree carry the patch files? > > > > Or should this document be worded like documentation for an accepted > > > > feature, and then the patches either land or don't? > > > > > > Once everyone agrees, the RFC can land. I don't think a kernel tree is > > > necessary. See: > > > > > > https://dri.freedesktop.org/docs/drm/gpu/rfc/index.html > > > > Does this mean the RFC doc patch will land, but the code patches will > > remain in the > > review cycles waiting for userspace proving vehicles? > > Rather than e.g. committed as files that people would need to apply > > themselves? Or > > how does one find the code patches corresponding to RFC docs? > > As I understand, this section was added to finalize the design and debate on > the UAPI, > structures, headers and design etc. Once a general agreement is in place with > all the > stakeholders, we can have ack on design and approach and get it merged. This > hence > serves as an approved reference for the UAPI, accepted and agreed by > community at large. > > Once the code lands, all the documentation will be added to the right driver > sections and > helpers, like it's been done currently. I'm just wondering: someone browses a kernel tree, and discovers this RFC doc in there. They want to see or test the latest (WIP) kernel implementation of it. How will they find the code / patches? Thanks, pq pgpOXzW3pj3W9.pgp Description: OpenPGP digital signature
RE: [RFC v2 01/22] drm: RFC for Plane Color Hardware Pipeline
> -Original Message- > From: Pekka Paalanen > Sent: Tuesday, October 12, 2021 4:01 PM > To: Shankar, Uma > Cc: intel-...@lists.freedesktop.org; dri-devel@lists.freedesktop.org; > harry.wentl...@amd.com; ville.syrj...@linux.intel.com; > brian.star...@arm.com; sebast...@sebastianwick.net; > shashank.sha...@amd.com > Subject: Re: [RFC v2 01/22] drm: RFC for Plane Color Hardware Pipeline > > On Tue, 7 Sep 2021 03:08:43 +0530 > Uma Shankar wrote: > > > This is a RFC proposal for plane color hardware blocks. > > It exposes the property interface to userspace and calls out the > > details or interfaces created and the intended purpose. > > > > Credits: Ville Syrjälä > > Signed-off-by: Uma Shankar > > --- > > Documentation/gpu/rfc/drm_color_pipeline.rst | 167 > > +++ > > 1 file changed, 167 insertions(+) > > create mode 100644 Documentation/gpu/rfc/drm_color_pipeline.rst > > > > diff --git a/Documentation/gpu/rfc/drm_color_pipeline.rst > > b/Documentation/gpu/rfc/drm_color_pipeline.rst > > new file mode 100644 > > index ..0d1ca858783b > > --- /dev/null > > +++ b/Documentation/gpu/rfc/drm_color_pipeline.rst > > @@ -0,0 +1,167 @@ > > +== > > +Display Color Pipeline: Proposed DRM Properties > > Hi, > is there a practise of landing proposal documents in the kernel? How > does that work, will a kernel tree carry the patch files? > Or should this document be worded like documentation for an accepted > feature, and then the patches either land or don't? > A thread is forked for this query, we will conclude there. > > +== > > + > > +This is how a typical display color hardware pipeline looks like: > > Typical, or should we say that this is the abstract color pipeline that KMS > assumes? > > Then drivers map this to pieces of hardware the best they can and > reject or do not expose the parts they cannot. Yeah sure Pekka, I will reword this to be clear. > > + +---+ > > + |RAM| > > + | +--++-++-+ | > > + | | FB 1 || FB 2 || FB N| | > > + | +--++-++-+ | > > + +---+ > > + | Plane Color Hardware Block | > > + ++ > > + | +---v-+ +---v---+ +---v--+ | > > + | | Plane A | | Plane B | | Plane N | | > > + | | DeGamma | | Degamma | | Degamma | | > > + | +---+-+ +---+---+ +---+--+ | > > + | | | || > > + | +---v-+ +---v---+ +---v--+ | > > + | |Plane A | | Plane B | | Plane N | | > > + | |CSC/CTM | | CSC/CTM | | CSC/CTM | | > > + | +---+-+ ++--+ ++-+ | > > + | | | | | > > + | +---v-+ +v--+ +v-+ | > > + | | Plane A | | Plane B | | Plane N | | > > + | | Gamma | | Gamma | | Gamma| | > > + | +---+-+ ++--+ ++-+ | > > + | | | | | > > + ++ > > ++--v--v---v---| > > +|| || > > +|| Pipe Blender|| > > ++++ > > +||| > > +|+---v--+ | > > +|| Pipe DeGamma| | > > +|| | | > > +|+---+--+ | > > +||Pipe Color | > > +|+---v--+ Hardware| > > +|| Pipe CSC/CTM| | > > +|| | | > > +|+---+--+ | > > +||| > > +|+---v--+ | > > +|| Pipe Gamma | | > > +|| | | > > +|+---+--+ | > > +||| > > ++-+ > > + | > > + v > > + Pipe Output &
RE: [RFC v2 01/22] drm: RFC for Plane Color Hardware Pipeline
> -Original Message- > From: Pekka Paalanen > Sent: Tuesday, October 12, 2021 5:30 PM > To: Simon Ser > Cc: Shankar, Uma ; intel-...@lists.freedesktop.org; > dri- > de...@lists.freedesktop.org; harry.wentl...@amd.com; > ville.syrj...@linux.intel.com; brian.star...@arm.com; > sebast...@sebastianwick.net; shashank.sha...@amd.com > Subject: Re: [RFC v2 01/22] drm: RFC for Plane Color Hardware Pipeline > > On Tue, 12 Oct 2021 10:35:37 + > Simon Ser wrote: > > > On Tuesday, October 12th, 2021 at 12:30, Pekka Paalanen > wrote: > > > > > is there a practise of landing proposal documents in the kernel? How > > > does that work, will a kernel tree carry the patch files? > > > Or should this document be worded like documentation for an accepted > > > feature, and then the patches either land or don't? > > > > Once everyone agrees, the RFC can land. I don't think a kernel tree is > > necessary. See: > > > > https://dri.freedesktop.org/docs/drm/gpu/rfc/index.html > > Does this mean the RFC doc patch will land, but the code patches will remain > in the > review cycles waiting for userspace proving vehicles? > Rather than e.g. committed as files that people would need to apply > themselves? Or > how does one find the code patches corresponding to RFC docs? As I understand, this section was added to finalize the design and debate on the UAPI, structures, headers and design etc. Once a general agreement is in place with all the stakeholders, we can have ack on design and approach and get it merged. This hence serves as an approved reference for the UAPI, accepted and agreed by community at large. Once the code lands, all the documentation will be added to the right driver sections and helpers, like it's been done currently. @daniel.vet...@ffwll.ch Hope this is the right understanding. Thanks & Regards, Uma Shankar > > Thanks, > pq
Re: [RFC v2 01/22] drm: RFC for Plane Color Hardware Pipeline
On Tue, 12 Oct 2021 10:35:37 + Simon Ser wrote: > On Tuesday, October 12th, 2021 at 12:30, Pekka Paalanen > wrote: > > > is there a practise of landing proposal documents in the kernel? How > > does that work, will a kernel tree carry the patch files? > > Or should this document be worded like documentation for an accepted > > feature, and then the patches either land or don't? > > Once everyone agrees, the RFC can land. I don't think a kernel tree is > necessary. See: > > https://dri.freedesktop.org/docs/drm/gpu/rfc/index.html Does this mean the RFC doc patch will land, but the code patches will remain in the review cycles waiting for userspace proving vehicles? Rather than e.g. committed as files that people would need to apply themselves? Or how does one find the code patches corresponding to RFC docs? Thanks, pq pgpVJeK1TIxma.pgp Description: OpenPGP digital signature
Re: [RFC v2 01/22] drm: RFC for Plane Color Hardware Pipeline
On Tuesday, October 12th, 2021 at 12:30, Pekka Paalanen wrote: > is there a practise of landing proposal documents in the kernel? How > does that work, will a kernel tree carry the patch files? > Or should this document be worded like documentation for an accepted > feature, and then the patches either land or don't? Once everyone agrees, the RFC can land. I don't think a kernel tree is necessary. See: https://dri.freedesktop.org/docs/drm/gpu/rfc/index.html
Re: [RFC v2 01/22] drm: RFC for Plane Color Hardware Pipeline
On Tue, 7 Sep 2021 03:08:43 +0530 Uma Shankar wrote: > This is a RFC proposal for plane color hardware blocks. > It exposes the property interface to userspace and calls > out the details or interfaces created and the intended > purpose. > > Credits: Ville Syrjälä > Signed-off-by: Uma Shankar > --- > Documentation/gpu/rfc/drm_color_pipeline.rst | 167 +++ > 1 file changed, 167 insertions(+) > create mode 100644 Documentation/gpu/rfc/drm_color_pipeline.rst > > diff --git a/Documentation/gpu/rfc/drm_color_pipeline.rst > b/Documentation/gpu/rfc/drm_color_pipeline.rst > new file mode 100644 > index ..0d1ca858783b > --- /dev/null > +++ b/Documentation/gpu/rfc/drm_color_pipeline.rst > @@ -0,0 +1,167 @@ > +== > +Display Color Pipeline: Proposed DRM Properties Hi, is there a practise of landing proposal documents in the kernel? How does that work, will a kernel tree carry the patch files? Or should this document be worded like documentation for an accepted feature, and then the patches either land or don't? > +== > + > +This is how a typical display color hardware pipeline looks like: Typical, or should we say that this is the abstract color pipeline that KMS assumes? Then drivers map this to pieces of hardware the best they can and reject or do not expose the parts they cannot. > + +---+ > + |RAM| > + | +--++-++-+ | > + | | FB 1 || FB 2 || FB N| | > + | +--++-++-+ | > + +---+ > + | Plane Color Hardware Block | > + ++ > + | +---v-+ +---v---+ +---v--+ | > + | | Plane A | | Plane B | | Plane N | | > + | | DeGamma | | Degamma | | Degamma | | > + | +---+-+ +---+---+ +---+--+ | > + | | | || > + | +---v-+ +---v---+ +---v--+ | > + | |Plane A | | Plane B | | Plane N | | > + | |CSC/CTM | | CSC/CTM | | CSC/CTM | | > + | +---+-+ ++--+ ++-+ | > + | | | | | > + | +---v-+ +v--+ +v-+ | > + | | Plane A | | Plane B | | Plane N | | > + | | Gamma | | Gamma | | Gamma| | > + | +---+-+ ++--+ ++-+ | > + | | | | | > + ++ > ++--v--v---v---| > +|| || > +|| Pipe Blender|| > ++++ > +||| > +|+---v--+ | > +|| Pipe DeGamma| | > +|| | | > +|+---+--+ | > +||Pipe Color | > +|+---v--+ Hardware| > +|| Pipe CSC/CTM| | > +|| | | > +|+---+--+ | > +||| > +|+---v--+ | > +|| Pipe Gamma | | > +|| | | > +|+---+--+ | > +||| > ++-+ > + | > + v > + Pipe Output > + > +Proposal is to have below properties for a plane: > + > +* Plane Degamma or Pre-Curve: > + * This will be used to linearize the input framebuffer data. > + * It will apply the reverse of the color transfer function. > + * It can be a degamma curve or OETF for HDR. As you want to produce light-linear values, you use EOTF or inverse OETF. The term OETF has a built-in assumption that that happens in a camera: it takes in light and produces and electrical signal. Lately I have personally started talking about non-linear encoding of color values, since EOTF is often associated with displays if nothing else is said (taking in an electrical signal and producing light). So this would be decoding the color values into light-linear color values. That is what an EOTF does, yes, but I feel there is a nuanced difference. A piece of equipment implements an EOTF by turning an electrical signal into light, hence EOTF often refers to specific equipment. You could talk about content EOTF to denote content value encoding, as opposed to output or display EOTF, but that might be confusing if you look at e.g. the diagrams in BT.2100: is it the EOTF or is it the inverse OETF? Is the
