Re: [BUG] ls1046a: eDMA does not transfer data from I2C
On 9/20/22 7:05 PM, Sean Anderson wrote: > > > On 9/20/22 6:49 PM, Leo Li wrote: >> >> >>> -Original Message- >>> From: Sean Anderson >>> Sent: Tuesday, September 20, 2022 11:21 AM >>> To: Robin Murphy ; Oleksij Rempel >>> ; Pengutronix Kernel Team >>> ; linux-...@vger.kernel.org; linux-arm-kernel >>> ; Vinod Koul ; >>> dmaeng...@vger.kernel.org; Leo Li ; Laurentiu Tudor >>> >>> Cc: Linux Kernel Mailing List ; dri- >>> de...@lists.freedesktop.org; Christian König ; >>> linaro-mm-...@lists.linaro.org; Shawn Guo ; Sumit >>> Semwal ; Joy Zou ; linux- >>> me...@vger.kernel.org >>> Subject: Re: [BUG] ls1046a: eDMA does not transfer data from I2C >>> >>> >>> >>> On 9/20/22 11:44 AM, Sean Anderson wrote: >>> > >>> > >>> > On 9/20/22 11:24 AM, Sean Anderson wrote: >>> >> >>> >> >>> >> On 9/20/22 6:07 AM, Robin Murphy wrote: >>> >>> On 2022-09-19 23:24, Sean Anderson wrote: >>> >>>> Hi all, >>> >>>> >>> >>>> I discovered a bug in either imx_i2c or fsl-edma on the LS1046A >>> >>>> where no data is read in i2c_imx_dma_read except for the last two >>> >>>> bytes (which are not read using DMA). This is perhaps best >>> >>>> illustrated with the following example: >>> >>>> >>> >>>> # hexdump -C /sys/bus/nvmem/devices/0-00540/nvmem >>> >>>> [ 308.914884] i2c i2c-0: 00080938 0x00088938 >>> 0xf5401000 75401000 >>> >>>> [ 308.923529] src= 2180004 dst=f5401000 attr= 0 soff= 0 nbytes=1 >>> slast= 0 >>> >>>> [ 308.923529] citer= 7e biter= 7e doff= 1 dlast_sga= 0 >>> >>>> [ 308.923529] major_int=1 disable_req=1 enable_sg=0 [ 308.942113] >>> >>>> fsl-edma 2c0.edma: vchan 1b4371fc: txd >>> >>>> d9dd26c5[4]: submitted [ 308.974049] fsl-edma >>> >>>> 2c0.edma: txd d9dd26c5[4]: marked complete [ >>> >>>> 308.981339] i2c i2c-0: 00080938 = [2e 2e 2f 2e 2e 2f 2e 2e >>> >>>> 2f 64 65 76 69 63 65 73 2f 70 6c 61 74 66 6f 72 6d 2f 73 6f 63 2f 32 >>> >>>> 31 38 30 >>> 30 30 30 2e 69 32 63 2f 69 32 63 2d 30 2f 30 2d 30 30 35 34 2f 30 2d 30 30 >>> 35 34 >>> 30 00 00] [ 309.002226] i2c i2c-0: 75401000 = [2e 2e 2f 2e 2e 2f >>> 2e 2e 2f >>> 64 65 76 69 63 65 73 2f 70 6c 61 74 66 6f 72 6d 2f 73 6f 63 2f 32 31 38 30 >>> 30 30 30 >>> 2e 69 32 63 2f 69 32 63 2d 30 2f 30 2d 30 30 35 34 2f 30 2d 30 30 35 34 30 >>> 00 00] >>> [ 309.024649] i2c i2c-0: 000809380080 0x000889380080 >>> 0xf5401800 75401800 >>> >>>> [ 309.033270] src= 2180004 dst=f5401800 attr= 0 soff= 0 nbytes=1 >>> slast= 0 >>> >>>> [ 309.033270] citer= 7e biter= 7e doff= 1 dlast_sga= 0 >>> >>>> [ 309.033270] major_int=1 disable_req=1 enable_sg=0 [ 309.051633] >>> >>>> fsl-edma 2c0.edma: vchan 1b4371fc: txd >>> >>>> d9dd26c5[5]: submitted [ 309.083526] fsl-edma >>> >>>> 2c0.edma: txd d9dd26c5[5]: marked complete [ >>> >>>> 309.090807] i2c i2c-0: 000809380080 = [00 00 00 00 00 00 00 00 >>> >>>> 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 >>> >>>> 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 >>> >>>> 00 00 00 00 00 00 00 00 00 00 00 00] [ 309.111694] i2c i2c-0: >>> >>>> 75401800 = [00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 >>> >>>> 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 >>> >>>> 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 >>> >>>> 00 00 00 00] >>> >>>> 2e 2e 2f 2e 2e 2f 2e 2e 2f 64 65 76 69 63 65 73 >>> >>>> |../../../devices| >>> >>>> 0010 2f 70 6c 61 74 66 6f 72 6d 2f 73 6f 63 2f 32 31 >>> >>>> |/platform/soc/21| >>> >>>> 0020 38 30 30 30 30 2e 69 32 63 2f 69 32 63 2d 30 2f >>> >>>> |8.i2c/i2c-0/| >>> >>>> 0030 30 2d 30 30 3
Re: [BUG] ls1046a: eDMA does not transfer data from I2C
On 9/20/22 6:49 PM, Leo Li wrote: > > >> -Original Message- >> From: Sean Anderson >> Sent: Tuesday, September 20, 2022 11:21 AM >> To: Robin Murphy ; Oleksij Rempel >> ; Pengutronix Kernel Team >> ; linux-...@vger.kernel.org; linux-arm-kernel >> ; Vinod Koul ; >> dmaeng...@vger.kernel.org; Leo Li ; Laurentiu Tudor >> >> Cc: Linux Kernel Mailing List ; dri- >> de...@lists.freedesktop.org; Christian König ; >> linaro-mm-...@lists.linaro.org; Shawn Guo ; Sumit >> Semwal ; Joy Zou ; linux- >> me...@vger.kernel.org >> Subject: Re: [BUG] ls1046a: eDMA does not transfer data from I2C >> >> >> >> On 9/20/22 11:44 AM, Sean Anderson wrote: >> > >> > >> > On 9/20/22 11:24 AM, Sean Anderson wrote: >> >> >> >> >> >> On 9/20/22 6:07 AM, Robin Murphy wrote: >> >>> On 2022-09-19 23:24, Sean Anderson wrote: >> >>>> Hi all, >> >>>> >> >>>> I discovered a bug in either imx_i2c or fsl-edma on the LS1046A >> >>>> where no data is read in i2c_imx_dma_read except for the last two >> >>>> bytes (which are not read using DMA). This is perhaps best >> >>>> illustrated with the following example: >> >>>> >> >>>> # hexdump -C /sys/bus/nvmem/devices/0-00540/nvmem >> >>>> [ 308.914884] i2c i2c-0: 00080938 0x00088938 >> 0xf5401000 75401000 >> >>>> [ 308.923529] src= 2180004 dst=f5401000 attr= 0 soff= 0 nbytes=1 >> slast= 0 >> >>>> [ 308.923529] citer= 7e biter= 7e doff= 1 dlast_sga= 0 >> >>>> [ 308.923529] major_int=1 disable_req=1 enable_sg=0 [ 308.942113] >> >>>> fsl-edma 2c0.edma: vchan 1b4371fc: txd >> >>>> d9dd26c5[4]: submitted [ 308.974049] fsl-edma >> >>>> 2c0.edma: txd d9dd26c5[4]: marked complete [ >> >>>> 308.981339] i2c i2c-0: 00080938 = [2e 2e 2f 2e 2e 2f 2e 2e >> >>>> 2f 64 65 76 69 63 65 73 2f 70 6c 61 74 66 6f 72 6d 2f 73 6f 63 2f 32 31 >> >>>> 38 30 >> 30 30 30 2e 69 32 63 2f 69 32 63 2d 30 2f 30 2d 30 30 35 34 2f 30 2d 30 30 >> 35 34 >> 30 00 00] [ 309.002226] i2c i2c-0: 75401000 = [2e 2e 2f 2e 2e 2f 2e >> 2e 2f >> 64 65 76 69 63 65 73 2f 70 6c 61 74 66 6f 72 6d 2f 73 6f 63 2f 32 31 38 30 >> 30 30 30 >> 2e 69 32 63 2f 69 32 63 2d 30 2f 30 2d 30 30 35 34 2f 30 2d 30 30 35 34 30 >> 00 00] >> [ 309.024649] i2c i2c-0: 000809380080 0x000889380080 >> 0xf5401800 75401800 >> >>>> [ 309.033270] src= 2180004 dst=f5401800 attr= 0 soff= 0 nbytes=1 >> slast= 0 >> >>>> [ 309.033270] citer= 7e biter= 7e doff= 1 dlast_sga= 0 >> >>>> [ 309.033270] major_int=1 disable_req=1 enable_sg=0 [ 309.051633] >> >>>> fsl-edma 2c0.edma: vchan 1b4371fc: txd >> >>>> d9dd26c5[5]: submitted [ 309.083526] fsl-edma >> >>>> 2c0.edma: txd d9dd26c5[5]: marked complete [ >> >>>> 309.090807] i2c i2c-0: 000809380080 = [00 00 00 00 00 00 00 00 >> >>>> 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 >> >>>> 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 >> >>>> 00 00 00 00 00 00 00 00 00 00 00 00] [ 309.111694] i2c i2c-0: >> >>>> 75401800 = [00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 >> >>>> 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 >> >>>> 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 >> >>>> 00 00 00 00] >> >>>> 2e 2e 2f 2e 2e 2f 2e 2e 2f 64 65 76 69 63 65 73 >> >>>> |../../../devices| >> >>>> 0010 2f 70 6c 61 74 66 6f 72 6d 2f 73 6f 63 2f 32 31 >> >>>> |/platform/soc/21| >> >>>> 0020 38 30 30 30 30 2e 69 32 63 2f 69 32 63 2d 30 2f >> >>>> |8.i2c/i2c-0/| >> >>>> 0030 30 2d 30 30 35 34 2f 30 2d 30 30 35 34 30 00 00 >> >>>> |0-0054/0-00540..| >> >>>> 0040 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 >> >>>> || >> >>>> * >> >>>> 0070 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ff ff >> >>>> || >> >>>
RE: [BUG] ls1046a: eDMA does not transfer data from I2C
> > > > Despite the DMA completing successfully, no data was copied into the > > buffer, leaving the original (now junk) contents. I probed the I2C bus > > with an oscilloscope, and I verified that the transfer did indeed occur. > > The timing between submission and completion seems reasonable for the > > bus speed (50 kHz for whatever reason). > > > > I had a look over the I2C driver, and nothing looked obviously > > incorrect. If anyone has ideas on what to try, I'm more than willing. > > Is the DMA controller cache-coherent? I see the mainline LS1046A DT doesn't > have a "dma-coherent" property for it, but the behaviour is entirely > consistent with that being wrong - dma_map_single() cleans the cache, > coherent DMA write hits the still-present cache lines, So the coherent DMA write only gets data into the cache not also the DRAM? Otherwise a read back would get the updated data too. - Leo > dma_unmap_single() invalidates the cache, and boom, the data is gone and > you read back the previous content of the buffer that was cleaned out to > DRAM beforehand. > > Robin. > > > --Sean
RE: [BUG] ls1046a: eDMA does not transfer data from I2C
> -Original Message- > From: Sean Anderson > Sent: Tuesday, September 20, 2022 11:21 AM > To: Robin Murphy ; Oleksij Rempel > ; Pengutronix Kernel Team > ; linux-...@vger.kernel.org; linux-arm-kernel > ; Vinod Koul ; > dmaeng...@vger.kernel.org; Leo Li ; Laurentiu Tudor > > Cc: Linux Kernel Mailing List ; dri- > de...@lists.freedesktop.org; Christian König ; > linaro-mm-...@lists.linaro.org; Shawn Guo ; Sumit > Semwal ; Joy Zou ; linux- > me...@vger.kernel.org > Subject: Re: [BUG] ls1046a: eDMA does not transfer data from I2C > > > > On 9/20/22 11:44 AM, Sean Anderson wrote: > > > > > > On 9/20/22 11:24 AM, Sean Anderson wrote: > >> > >> > >> On 9/20/22 6:07 AM, Robin Murphy wrote: > >>> On 2022-09-19 23:24, Sean Anderson wrote: > >>>> Hi all, > >>>> > >>>> I discovered a bug in either imx_i2c or fsl-edma on the LS1046A > >>>> where no data is read in i2c_imx_dma_read except for the last two > >>>> bytes (which are not read using DMA). This is perhaps best > >>>> illustrated with the following example: > >>>> > >>>> # hexdump -C /sys/bus/nvmem/devices/0-00540/nvmem > >>>> [ 308.914884] i2c i2c-0: 00080938 0x00088938 > 0xf5401000 75401000 > >>>> [ 308.923529] src= 2180004 dst=f5401000 attr= 0 soff= 0 nbytes=1 > slast= 0 > >>>> [ 308.923529] citer= 7e biter= 7e doff= 1 dlast_sga= 0 > >>>> [ 308.923529] major_int=1 disable_req=1 enable_sg=0 [ 308.942113] > >>>> fsl-edma 2c0.edma: vchan 1b4371fc: txd > >>>> d9dd26c5[4]: submitted [ 308.974049] fsl-edma > >>>> 2c0.edma: txd d9dd26c5[4]: marked complete [ > >>>> 308.981339] i2c i2c-0: 00080938 = [2e 2e 2f 2e 2e 2f 2e 2e > >>>> 2f 64 65 76 69 63 65 73 2f 70 6c 61 74 66 6f 72 6d 2f 73 6f 63 2f 32 31 > >>>> 38 30 > 30 30 30 2e 69 32 63 2f 69 32 63 2d 30 2f 30 2d 30 30 35 34 2f 30 2d 30 30 35 > 34 > 30 00 00] [ 309.002226] i2c i2c-0: 75401000 = [2e 2e 2f 2e 2e 2f 2e > 2e 2f > 64 65 76 69 63 65 73 2f 70 6c 61 74 66 6f 72 6d 2f 73 6f 63 2f 32 31 38 30 30 > 30 30 > 2e 69 32 63 2f 69 32 63 2d 30 2f 30 2d 30 30 35 34 2f 30 2d 30 30 35 34 30 00 > 00] > [ 309.024649] i2c i2c-0: 000809380080 0x000889380080 > 0xf5401800 75401800 > >>>> [ 309.033270] src= 2180004 dst=f5401800 attr= 0 soff= 0 nbytes=1 > slast= 0 > >>>> [ 309.033270] citer= 7e biter= 7e doff= 1 dlast_sga= 0 > >>>> [ 309.033270] major_int=1 disable_req=1 enable_sg=0 [ 309.051633] > >>>> fsl-edma 2c0.edma: vchan 1b4371fc: txd > >>>> d9dd26c5[5]: submitted [ 309.083526] fsl-edma > >>>> 2c0.edma: txd d9dd26c5[5]: marked complete [ > >>>> 309.090807] i2c i2c-0: 000809380080 = [00 00 00 00 00 00 00 00 > >>>> 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > >>>> 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > >>>> 00 00 00 00 00 00 00 00 00 00 00 00] [ 309.111694] i2c i2c-0: > >>>> 75401800 = [00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > >>>> 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > >>>> 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > >>>> 00 00 00 00] > >>>> 2e 2e 2f 2e 2e 2f 2e 2e 2f 64 65 76 69 63 65 73 > >>>> |../../../devices| > >>>> 0010 2f 70 6c 61 74 66 6f 72 6d 2f 73 6f 63 2f 32 31 > >>>> |/platform/soc/21| > >>>> 0020 38 30 30 30 30 2e 69 32 63 2f 69 32 63 2d 30 2f > >>>> |8.i2c/i2c-0/| > >>>> 0030 30 2d 30 30 35 34 2f 30 2d 30 30 35 34 30 00 00 > >>>> |0-0054/0-00540..| > >>>> 0040 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > >>>> || > >>>> * > >>>> 0070 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ff ff > >>>> || > >>>> 0080 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > >>>> || > >>>> * > >>>> 00f0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ff 5b > >>>> |...[| > >>>> 0100 > >>>> > >>>> (patch with my debug prints appended below) > >>&g
Re: [BUG] ls1046a: eDMA does not transfer data from I2C
On 9/20/22 11:44 AM, Sean Anderson wrote: > > > On 9/20/22 11:24 AM, Sean Anderson wrote: >> >> >> On 9/20/22 6:07 AM, Robin Murphy wrote: >>> On 2022-09-19 23:24, Sean Anderson wrote: Hi all, I discovered a bug in either imx_i2c or fsl-edma on the LS1046A where no data is read in i2c_imx_dma_read except for the last two bytes (which are not read using DMA). This is perhaps best illustrated with the following example: # hexdump -C /sys/bus/nvmem/devices/0-00540/nvmem [ 308.914884] i2c i2c-0: 00080938 0x00088938 0xf5401000 75401000 [ 308.923529] src= 2180004 dst=f5401000 attr= 0 soff= 0 nbytes=1 slast= 0 [ 308.923529] citer= 7e biter= 7e doff= 1 dlast_sga= 0 [ 308.923529] major_int=1 disable_req=1 enable_sg=0 [ 308.942113] fsl-edma 2c0.edma: vchan 1b4371fc: txd d9dd26c5[4]: submitted [ 308.974049] fsl-edma 2c0.edma: txd d9dd26c5[4]: marked complete [ 308.981339] i2c i2c-0: 00080938 = [2e 2e 2f 2e 2e 2f 2e 2e 2f 64 65 76 69 63 65 73 2f 70 6c 61 74 66 6f 72 6d 2f 73 6f 63 2f 32 31 38 30 30 30 30 2e 69 32 63 2f 69 32 63 2d 30 2f 30 2d 30 30 35 34 2f 30 2d 30 30 35 34 30 00 00] [ 309.002226] i2c i2c-0: 75401000 = [2e 2e 2f 2e 2e 2f 2e 2e 2f 64 65 76 69 63 65 73 2f 70 6c 61 74 66 6f 72 6d 2f 73 6f 63 2f 32 31 38 30 30 30 30 2e 69 32 63 2f 69 32 63 2d 30 2f 30 2d 30 30 35 34 2f 30 2d 30 30 35 34 30 00 00] [ 309.024649] i2c i2c-0: 000809380080 0x000889380080 0xf5401800 75401800 [ 309.033270] src= 2180004 dst=f5401800 attr= 0 soff= 0 nbytes=1 slast= 0 [ 309.033270] citer= 7e biter= 7e doff= 1 dlast_sga= 0 [ 309.033270] major_int=1 disable_req=1 enable_sg=0 [ 309.051633] fsl-edma 2c0.edma: vchan 1b4371fc: txd d9dd26c5[5]: submitted [ 309.083526] fsl-edma 2c0.edma: txd d9dd26c5[5]: marked complete [ 309.090807] i2c i2c-0: 000809380080 = [00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00] [ 309.111694] i2c i2c-0: 75401800 = [00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00] 2e 2e 2f 2e 2e 2f 2e 2e 2f 64 65 76 69 63 65 73 |../../../devices| 0010 2f 70 6c 61 74 66 6f 72 6d 2f 73 6f 63 2f 32 31 |/platform/soc/21| 0020 38 30 30 30 30 2e 69 32 63 2f 69 32 63 2d 30 2f |8.i2c/i2c-0/| 0030 30 2d 30 30 35 34 2f 30 2d 30 30 35 34 30 00 00 |0-0054/0-00540..| 0040 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 || * 0070 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ff ff || 0080 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 || * 00f0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ff 5b |...[| 0100 (patch with my debug prints appended below) Despite the DMA completing successfully, no data was copied into the buffer, leaving the original (now junk) contents. I probed the I2C bus with an oscilloscope, and I verified that the transfer did indeed occur. The timing between submission and completion seems reasonable for the bus speed (50 kHz for whatever reason). I had a look over the I2C driver, and nothing looked obviously incorrect. If anyone has ideas on what to try, I'm more than willing. >>> >>> Is the DMA controller cache-coherent? I see the mainline LS1046A DT doesn't >>> have a "dma-coherent" property for it, but the behaviour is entirely >>> consistent with that being wrong - dma_map_single() cleans the cache, >>> coherent DMA write hits the still-present cache lines, dma_unmap_single() >>> invalidates the cache, and boom, the data is gone and you read back the >>> previous content of the buffer that was cleaned out to DRAM beforehand. >> >> I've tried both with and without [1] applied. I also tried removing the >> call to dma_unmap_single, but to no effect. > > Actually, I wasn't updating my device tree like I thought... > > Turns out I2C works only *without* this patch. > > So maybe the eDMA is not coherent? It seems like this might be the case. From the reference manual: > All transactions from eDMA are tagged as snoop configuration if the > SCFG_SNPCNFGCR[eDMASNP] bit is set. Refer Snoop Configuration Register > (SCFG_SNPCNFGCR) for details. But there is no such bit in this register on the LS1046A. On the
Re: [BUG] ls1046a: eDMA does not transfer data from I2C
On 9/20/22 11:24 AM, Sean Anderson wrote:
>
>
> On 9/20/22 6:07 AM, Robin Murphy wrote:
>> On 2022-09-19 23:24, Sean Anderson wrote:
>>> Hi all,
>>>
>>> I discovered a bug in either imx_i2c or fsl-edma on the LS1046A where no
>>> data is read in i2c_imx_dma_read except for the last two bytes (which
>>> are not read using DMA). This is perhaps best illustrated with the
>>> following example:
>>>
>>> # hexdump -C /sys/bus/nvmem/devices/0-00540/nvmem
>>> [ 308.914884] i2c i2c-0: 00080938 0x00088938
>>> 0xf5401000 75401000
>>> [ 308.923529] src= 2180004 dst=f5401000 attr= 0 soff= 0 nbytes=1
>>> slast= 0
>>> [ 308.923529] citer= 7e biter= 7e doff= 1 dlast_sga= 0
>>> [ 308.923529] major_int=1 disable_req=1 enable_sg=0
>>> [ 308.942113] fsl-edma 2c0.edma: vchan 1b4371fc: txd
>>> d9dd26c5[4]: submitted
>>> [ 308.974049] fsl-edma 2c0.edma: txd d9dd26c5[4]: marked
>>> complete
>>> [ 308.981339] i2c i2c-0: 00080938 = [2e 2e 2f 2e 2e 2f 2e 2e 2f 64
>>> 65 76 69 63 65 73 2f 70 6c 61 74 66 6f 72 6d 2f 73 6f 63 2f 32 31 38 30 30
>>> 30 30 2e 69 32 63 2f 69 32 63 2d 30 2f 30 2d 30 30 35 34 2f 30 2d 30 30 35
>>> 34 30 00 00]
>>> [ 309.002226] i2c i2c-0: 75401000 = [2e 2e 2f 2e 2e 2f 2e 2e 2f 64
>>> 65 76 69 63 65 73 2f 70 6c 61 74 66 6f 72 6d 2f 73 6f 63 2f 32 31 38 30 30
>>> 30 30 2e 69 32 63 2f 69 32 63 2d 30 2f 30 2d 30 30 35 34 2f 30 2d 30 30 35
>>> 34 30 00 00]
>>> [ 309.024649] i2c i2c-0: 000809380080 0x000889380080
>>> 0xf5401800 75401800
>>> [ 309.033270] src= 2180004 dst=f5401800 attr= 0 soff= 0 nbytes=1
>>> slast= 0
>>> [ 309.033270] citer= 7e biter= 7e doff= 1 dlast_sga= 0
>>> [ 309.033270] major_int=1 disable_req=1 enable_sg=0
>>> [ 309.051633] fsl-edma 2c0.edma: vchan 1b4371fc: txd
>>> d9dd26c5[5]: submitted
>>> [ 309.083526] fsl-edma 2c0.edma: txd d9dd26c5[5]: marked
>>> complete
>>> [ 309.090807] i2c i2c-0: 000809380080 = [00 00 00 00 00 00 00 00 00 00
>>> 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
>>> 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
>>> 00 00 00 00]
>>> [ 309.111694] i2c i2c-0: 75401800 = [00 00 00 00 00 00 00 00 00 00
>>> 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
>>> 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
>>> 00 00 00 00]
>>> 2e 2e 2f 2e 2e 2f 2e 2e 2f 64 65 76 69 63 65 73
>>> |../../../devices|
>>> 0010 2f 70 6c 61 74 66 6f 72 6d 2f 73 6f 63 2f 32 31
>>> |/platform/soc/21|
>>> 0020 38 30 30 30 30 2e 69 32 63 2f 69 32 63 2d 30 2f
>>> |8.i2c/i2c-0/|
>>> 0030 30 2d 30 30 35 34 2f 30 2d 30 30 35 34 30 00 00
>>> |0-0054/0-00540..|
>>> 0040 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
>>> ||
>>> *
>>> 0070 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ff ff
>>> ||
>>> 0080 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
>>> ||
>>> *
>>> 00f0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ff 5b
>>> |...[|
>>> 0100
>>>
>>> (patch with my debug prints appended below)
>>>
>>> Despite the DMA completing successfully, no data was copied into the
>>> buffer, leaving the original (now junk) contents. I probed the I2C bus
>>> with an oscilloscope, and I verified that the transfer did indeed occur.
>>> The timing between submission and completion seems reasonable for the
>>> bus speed (50 kHz for whatever reason).
>>>
>>> I had a look over the I2C driver, and nothing looked obviously
>>> incorrect. If anyone has ideas on what to try, I'm more than willing.
>>
>> Is the DMA controller cache-coherent? I see the mainline LS1046A DT doesn't
>> have a "dma-coherent" property for it, but the behaviour is entirely
>> consistent with that being wrong - dma_map_single() cleans the cache,
>> coherent DMA write hits the still-present cache lines, dma_unmap_single()
>> invalidates the cache, and boom, the data is gone and you read back the
>> previous content of the buffer that was cleaned out to DRAM beforehand.
>
> I've tried both with and without [1] applied. I also tried removing the
> call to dma_unmap_single, but to no effect.
Actually, I wasn't updating my device tree like I thought...
Turns out I2C works only *without* this patch.
So maybe the eDMA is not coherent?
--Sean
> --Sean
>
> [1]
> https://lore.kernel.org/linux-arm-kernel/20220915233432.31660-6-leoyang...@nxp.com/
>
>>> --Sean
>>>
>>> diff --git a/drivers/dma/fsl-edma-common.c b/drivers/dma/fsl-edma-common.c
>>> index 15896e2413c4..1d9d4a55d2af 100644
>>> --- a/drivers/dma/fsl-edma-common.c
>>> +++ b/drivers/dma/fsl-edma-common.c
>>> @@ -391,6 +391,12 @@ void fsl_edma_fill_tcd(struct fsl_edma_hw_tcd *tcd,
>>> u32 src, u32 dst,
>>> {
>>> u16 csr
Re: [BUG] ls1046a: eDMA does not transfer data from I2C
On 9/20/22 6:07 AM, Robin Murphy wrote:
> On 2022-09-19 23:24, Sean Anderson wrote:
>> Hi all,
>>
>> I discovered a bug in either imx_i2c or fsl-edma on the LS1046A where no
>> data is read in i2c_imx_dma_read except for the last two bytes (which
>> are not read using DMA). This is perhaps best illustrated with the
>> following example:
>>
>> # hexdump -C /sys/bus/nvmem/devices/0-00540/nvmem
>> [ 308.914884] i2c i2c-0: 00080938 0x00088938
>> 0xf5401000 75401000
>> [ 308.923529] src= 2180004 dst=f5401000 attr= 0 soff= 0 nbytes=1 slast=
>> 0
>> [ 308.923529] citer= 7e biter= 7e doff= 1 dlast_sga= 0
>> [ 308.923529] major_int=1 disable_req=1 enable_sg=0
>> [ 308.942113] fsl-edma 2c0.edma: vchan 1b4371fc: txd
>> d9dd26c5[4]: submitted
>> [ 308.974049] fsl-edma 2c0.edma: txd d9dd26c5[4]: marked
>> complete
>> [ 308.981339] i2c i2c-0: 00080938 = [2e 2e 2f 2e 2e 2f 2e 2e 2f 64
>> 65 76 69 63 65 73 2f 70 6c 61 74 66 6f 72 6d 2f 73 6f 63 2f 32 31 38 30 30
>> 30 30 2e 69 32 63 2f 69 32 63 2d 30 2f 30 2d 30 30 35 34 2f 30 2d 30 30 35
>> 34 30 00 00]
>> [ 309.002226] i2c i2c-0: 75401000 = [2e 2e 2f 2e 2e 2f 2e 2e 2f 64
>> 65 76 69 63 65 73 2f 70 6c 61 74 66 6f 72 6d 2f 73 6f 63 2f 32 31 38 30 30
>> 30 30 2e 69 32 63 2f 69 32 63 2d 30 2f 30 2d 30 30 35 34 2f 30 2d 30 30 35
>> 34 30 00 00]
>> [ 309.024649] i2c i2c-0: 000809380080 0x000889380080
>> 0xf5401800 75401800
>> [ 309.033270] src= 2180004 dst=f5401800 attr= 0 soff= 0 nbytes=1 slast=
>> 0
>> [ 309.033270] citer= 7e biter= 7e doff= 1 dlast_sga= 0
>> [ 309.033270] major_int=1 disable_req=1 enable_sg=0
>> [ 309.051633] fsl-edma 2c0.edma: vchan 1b4371fc: txd
>> d9dd26c5[5]: submitted
>> [ 309.083526] fsl-edma 2c0.edma: txd d9dd26c5[5]: marked
>> complete
>> [ 309.090807] i2c i2c-0: 000809380080 = [00 00 00 00 00 00 00 00 00 00
>> 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
>> 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
>> 00 00 00 00]
>> [ 309.111694] i2c i2c-0: 75401800 = [00 00 00 00 00 00 00 00 00 00
>> 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
>> 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
>> 00 00 00 00]
>> 2e 2e 2f 2e 2e 2f 2e 2e 2f 64 65 76 69 63 65 73
>> |../../../devices|
>> 0010 2f 70 6c 61 74 66 6f 72 6d 2f 73 6f 63 2f 32 31
>> |/platform/soc/21|
>> 0020 38 30 30 30 30 2e 69 32 63 2f 69 32 63 2d 30 2f
>> |8.i2c/i2c-0/|
>> 0030 30 2d 30 30 35 34 2f 30 2d 30 30 35 34 30 00 00
>> |0-0054/0-00540..|
>> 0040 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
>> ||
>> *
>> 0070 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ff ff
>> ||
>> 0080 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
>> ||
>> *
>> 00f0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ff 5b
>> |...[|
>> 0100
>>
>> (patch with my debug prints appended below)
>>
>> Despite the DMA completing successfully, no data was copied into the
>> buffer, leaving the original (now junk) contents. I probed the I2C bus
>> with an oscilloscope, and I verified that the transfer did indeed occur.
>> The timing between submission and completion seems reasonable for the
>> bus speed (50 kHz for whatever reason).
>>
>> I had a look over the I2C driver, and nothing looked obviously
>> incorrect. If anyone has ideas on what to try, I'm more than willing.
>
> Is the DMA controller cache-coherent? I see the mainline LS1046A DT doesn't
> have a "dma-coherent" property for it, but the behaviour is entirely
> consistent with that being wrong - dma_map_single() cleans the cache,
> coherent DMA write hits the still-present cache lines, dma_unmap_single()
> invalidates the cache, and boom, the data is gone and you read back the
> previous content of the buffer that was cleaned out to DRAM beforehand.
I've tried both with and without [1] applied. I also tried removing the
call to dma_unmap_single, but to no effect.
--Sean
[1]
https://lore.kernel.org/linux-arm-kernel/20220915233432.31660-6-leoyang...@nxp.com/
>> --Sean
>>
>> diff --git a/drivers/dma/fsl-edma-common.c b/drivers/dma/fsl-edma-common.c
>> index 15896e2413c4..1d9d4a55d2af 100644
>> --- a/drivers/dma/fsl-edma-common.c
>> +++ b/drivers/dma/fsl-edma-common.c
>> @@ -391,6 +391,12 @@ void fsl_edma_fill_tcd(struct fsl_edma_hw_tcd *tcd, u32
>> src, u32 dst,
>> {
>> u16 csr = 0;
>> + pr_info("src=%8x dst=%8x attr=%4x soff=%4x nbytes=%u slast=%8x\n"
>> + "citer=%4x biter=%4x doff=%4x dlast_sga=%8x\n"
>> + "major_int=%d disable_req=%d enable_sg=%d\n",
>> + src, dst, attr, soff, nbytes, slast, citer, biter, doff,
>> +
Re: [BUG] ls1046a: eDMA does not transfer data from I2C
On 2022-09-19 23:24, Sean Anderson wrote:
Hi all,
I discovered a bug in either imx_i2c or fsl-edma on the LS1046A where no
data is read in i2c_imx_dma_read except for the last two bytes (which
are not read using DMA). This is perhaps best illustrated with the
following example:
# hexdump -C /sys/bus/nvmem/devices/0-00540/nvmem
[ 308.914884] i2c i2c-0: 00080938 0x00088938
0xf5401000 75401000
[ 308.923529] src= 2180004 dst=f5401000 attr= 0 soff= 0 nbytes=1 slast=
0
[ 308.923529] citer= 7e biter= 7e doff= 1 dlast_sga= 0
[ 308.923529] major_int=1 disable_req=1 enable_sg=0
[ 308.942113] fsl-edma 2c0.edma: vchan 1b4371fc: txd
d9dd26c5[4]: submitted
[ 308.974049] fsl-edma 2c0.edma: txd d9dd26c5[4]: marked complete
[ 308.981339] i2c i2c-0: 00080938 = [2e 2e 2f 2e 2e 2f 2e 2e 2f 64 65
76 69 63 65 73 2f 70 6c 61 74 66 6f 72 6d 2f 73 6f 63 2f 32 31 38 30 30 30 30
2e 69 32 63 2f 69 32 63 2d 30 2f 30 2d 30 30 35 34 2f 30 2d 30 30 35 34 30 00
00]
[ 309.002226] i2c i2c-0: 75401000 = [2e 2e 2f 2e 2e 2f 2e 2e 2f 64 65
76 69 63 65 73 2f 70 6c 61 74 66 6f 72 6d 2f 73 6f 63 2f 32 31 38 30 30 30 30
2e 69 32 63 2f 69 32 63 2d 30 2f 30 2d 30 30 35 34 2f 30 2d 30 30 35 34 30 00
00]
[ 309.024649] i2c i2c-0: 000809380080 0x000889380080
0xf5401800 75401800
[ 309.033270] src= 2180004 dst=f5401800 attr= 0 soff= 0 nbytes=1 slast=
0
[ 309.033270] citer= 7e biter= 7e doff= 1 dlast_sga= 0
[ 309.033270] major_int=1 disable_req=1 enable_sg=0
[ 309.051633] fsl-edma 2c0.edma: vchan 1b4371fc: txd
d9dd26c5[5]: submitted
[ 309.083526] fsl-edma 2c0.edma: txd d9dd26c5[5]: marked complete
[ 309.090807] i2c i2c-0: 000809380080 = [00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00]
[ 309.111694] i2c i2c-0: 75401800 = [00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00]
2e 2e 2f 2e 2e 2f 2e 2e 2f 64 65 76 69 63 65 73 |../../../devices|
0010 2f 70 6c 61 74 66 6f 72 6d 2f 73 6f 63 2f 32 31 |/platform/soc/21|
0020 38 30 30 30 30 2e 69 32 63 2f 69 32 63 2d 30 2f |8.i2c/i2c-0/|
0030 30 2d 30 30 35 34 2f 30 2d 30 30 35 34 30 00 00 |0-0054/0-00540..|
0040 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ||
*
0070 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ff ff ||
0080 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ||
*
00f0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ff 5b |...[|
0100
(patch with my debug prints appended below)
Despite the DMA completing successfully, no data was copied into the
buffer, leaving the original (now junk) contents. I probed the I2C bus
with an oscilloscope, and I verified that the transfer did indeed occur.
The timing between submission and completion seems reasonable for the
bus speed (50 kHz for whatever reason).
I had a look over the I2C driver, and nothing looked obviously
incorrect. If anyone has ideas on what to try, I'm more than willing.
Is the DMA controller cache-coherent? I see the mainline LS1046A DT
doesn't have a "dma-coherent" property for it, but the behaviour is
entirely consistent with that being wrong - dma_map_single() cleans the
cache, coherent DMA write hits the still-present cache lines,
dma_unmap_single() invalidates the cache, and boom, the data is gone and
you read back the previous content of the buffer that was cleaned out to
DRAM beforehand.
Robin.
--Sean
diff --git a/drivers/dma/fsl-edma-common.c b/drivers/dma/fsl-edma-common.c
index 15896e2413c4..1d9d4a55d2af 100644
--- a/drivers/dma/fsl-edma-common.c
+++ b/drivers/dma/fsl-edma-common.c
@@ -391,6 +391,12 @@ void fsl_edma_fill_tcd(struct fsl_edma_hw_tcd *tcd, u32
src, u32 dst,
{
u16 csr = 0;
+ pr_info("src=%8x dst=%8x attr=%4x soff=%4x nbytes=%u slast=%8x\n"
+ "citer=%4x biter=%4x doff=%4x dlast_sga=%8x\n"
+ "major_int=%d disable_req=%d enable_sg=%d\n",
+ src, dst, attr, soff, nbytes, slast, citer, biter, doff,
+ dlast_sga, major_int, disable_req, enable_sg);
+
/*
* eDMA hardware SGs require the TCDs to be stored in little
* endian format irrespective of the register endian model.
diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c
index 3576b63a6c03..0217f0cb1331 100644
--- a/drivers/i2c/busses/i2c-imx.c
+++ b/drivers/i2c/busses/i2c-imx.c
@@ -402,6 +402,9 @@ static int i2c_imx_dma_xfer(struct imx_i2c_struct *i2c_imx,
dev_err(dev, "DMA mapping failed\n");
Re: [BUG] ls1046a: eDMA does not transfer data from I2C
On 9/19/22 6:40 PM, Leo Li wrote: > > >> -Original Message- >> From: Sean Anderson >> Sent: Monday, September 19, 2022 5:24 PM >> To: Oleksij Rempel ; Pengutronix Kernel Team >> ; linux-...@vger.kernel.org; linux-arm-kernel >> ; Vinod Koul ; >> dmaeng...@vger.kernel.org >> Cc: Sumit Semwal ; Christian König >> ; Linux Kernel Mailing List > ker...@vger.kernel.org>; linux-me...@vger.kernel.org; dri- >> de...@lists.freedesktop.org; linaro-mm-...@lists.linaro.org; Joy Zou >> ; Peng Ma ; Robin Gong >> ; Shawn Guo ; Leo Li >> >> Subject: [BUG] ls1046a: eDMA does not transfer data from I2C >> >> Hi all, >> >> I discovered a bug in either imx_i2c or fsl-edma on the LS1046A where no >> data is read in i2c_imx_dma_read except for the last two bytes (which are >> not read using DMA). This is perhaps best illustrated with the following >> example: > > What is the kernel tree/tag that you are testing with? 5.15.40 Sorry, I forgot to put that in the first email. I can test with linux/master, but I reviewed the different commits and I did not think there would be any difference. I also cherry-picked the eDMA memcpy commit, but the dma test passed. --Sean
RE: [BUG] ls1046a: eDMA does not transfer data from I2C
> -Original Message- > From: Sean Anderson > Sent: Monday, September 19, 2022 5:24 PM > To: Oleksij Rempel ; Pengutronix Kernel Team > ; linux-...@vger.kernel.org; linux-arm-kernel > ; Vinod Koul ; > dmaeng...@vger.kernel.org > Cc: Sumit Semwal ; Christian König > ; Linux Kernel Mailing List ker...@vger.kernel.org>; linux-me...@vger.kernel.org; dri- > de...@lists.freedesktop.org; linaro-mm-...@lists.linaro.org; Joy Zou > ; Peng Ma ; Robin Gong > ; Shawn Guo ; Leo Li > > Subject: [BUG] ls1046a: eDMA does not transfer data from I2C > > Hi all, > > I discovered a bug in either imx_i2c or fsl-edma on the LS1046A where no > data is read in i2c_imx_dma_read except for the last two bytes (which are > not read using DMA). This is perhaps best illustrated with the following > example: What is the kernel tree/tag that you are testing with? Regards, Leo
