On Mon, May 10, 2021 at 11:33 PM Kai-Heng Feng
wrote:
>
> On Fri, Apr 30, 2021 at 12:57 PM Kai-Heng Feng
> wrote:
> >
> > Screen flickers rapidly when two 4K 60Hz monitors are in use. This issue
> > doesn't happen when one monitor is 4K 60Hz (pixelclock 594MHz) and
> > another one is 4K 30Hz (pixelclock 297MHz).
> >
> > The issue is gone after setting "power_dpm_force_performance_level" to
> > "high". Following the indication, we found that the issue occurs when
> > sclk is too low.
> >
> > So resolve the issue by disabling sclk switching when there are two
> > monitors requires high pixelclock (> 297MHz).
> >
> > v2:
> > - Only apply the fix to Oland.
> > Signed-off-by: Kai-Heng Feng
>
> A gentle ping...
Applied. Thanks for the reminder.
Alex
>
> > ---
> > drivers/gpu/drm/radeon/radeon.h| 1 +
> > drivers/gpu/drm/radeon/radeon_pm.c | 8
> > drivers/gpu/drm/radeon/si_dpm.c| 3 +++
> > 3 files changed, 12 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/radeon/radeon.h
> > b/drivers/gpu/drm/radeon/radeon.h
> > index 42281fce552e6..56ed5634cebef 100644
> > --- a/drivers/gpu/drm/radeon/radeon.h
> > +++ b/drivers/gpu/drm/radeon/radeon.h
> > @@ -1549,6 +1549,7 @@ struct radeon_dpm {
> > void*priv;
> > u32 new_active_crtcs;
> > int new_active_crtc_count;
> > + int high_pixelclock_count;
> > u32 current_active_crtcs;
> > int current_active_crtc_count;
> > bool single_display;
> > diff --git a/drivers/gpu/drm/radeon/radeon_pm.c
> > b/drivers/gpu/drm/radeon/radeon_pm.c
> > index 0c1950f4e146f..3861c0b98fcf3 100644
> > --- a/drivers/gpu/drm/radeon/radeon_pm.c
> > +++ b/drivers/gpu/drm/radeon/radeon_pm.c
> > @@ -1767,6 +1767,7 @@ static void radeon_pm_compute_clocks_dpm(struct
> > radeon_device *rdev)
> > struct drm_device *ddev = rdev->ddev;
> > struct drm_crtc *crtc;
> > struct radeon_crtc *radeon_crtc;
> > + struct radeon_connector *radeon_connector;
> >
> > if (!rdev->pm.dpm_enabled)
> > return;
> > @@ -1776,6 +1777,7 @@ static void radeon_pm_compute_clocks_dpm(struct
> > radeon_device *rdev)
> > /* update active crtc counts */
> > rdev->pm.dpm.new_active_crtcs = 0;
> > rdev->pm.dpm.new_active_crtc_count = 0;
> > + rdev->pm.dpm.high_pixelclock_count = 0;
> > if (rdev->num_crtc && rdev->mode_info.mode_config_initialized) {
> > list_for_each_entry(crtc,
> > >mode_config.crtc_list, head) {
> > @@ -1783,6 +1785,12 @@ static void radeon_pm_compute_clocks_dpm(struct
> > radeon_device *rdev)
> > if (crtc->enabled) {
> > rdev->pm.dpm.new_active_crtcs |= (1 <<
> > radeon_crtc->crtc_id);
> > rdev->pm.dpm.new_active_crtc_count++;
> > + if (!radeon_crtc->connector)
> > + continue;
> > +
> > + radeon_connector =
> > to_radeon_connector(radeon_crtc->connector);
> > + if
> > (radeon_connector->pixelclock_for_modeset > 297000)
> > +
> > rdev->pm.dpm.high_pixelclock_count++;
> > }
> > }
> > }
> > diff --git a/drivers/gpu/drm/radeon/si_dpm.c
> > b/drivers/gpu/drm/radeon/si_dpm.c
> > index 9186095518047..3cc2b96a7f368 100644
> > --- a/drivers/gpu/drm/radeon/si_dpm.c
> > +++ b/drivers/gpu/drm/radeon/si_dpm.c
> > @@ -2979,6 +2979,9 @@ static void si_apply_state_adjust_rules(struct
> > radeon_device *rdev,
> > (rdev->pdev->device == 0x6605)) {
> > max_sclk = 75000;
> > }
> > +
> > + if (rdev->pm.dpm.high_pixelclock_count > 1)
> > + disable_sclk_switching = true;
> > }
> >
> > if (rps->vce_active) {
> > --
> > 2.30.2
> >
