Re: [PATCH v4 9/9] drm/bridge: cdns: Convert to phy framework

2019-01-17 Thread Sean Paul
On Wed, Jan 09, 2019 at 10:33:26AM +0100, Maxime Ripard wrote:
> Now that we have everything we need in the phy framework to allow to tune
> the phy parameters, let's convert the Cadence DSI bridge to that API
> instead of creating a ad-hoc driver for its phy.
> 
> Signed-off-by: Maxime Ripard 

Aside from the wakeup change mentioned in patch 8,

Acked-by: Sean Paul 


> ---
>  drivers/gpu/drm/bridge/Kconfig|   1 +-
>  drivers/gpu/drm/bridge/cdns-dsi.c | 485 +++
>  drivers/phy/cadence/cdns-dphy.c   |   2 +-
>  3 files changed, 61 insertions(+), 427 deletions(-)
> 
> diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
> index 2fee47b0d50b..8840f396a7b6 100644
> --- a/drivers/gpu/drm/bridge/Kconfig
> +++ b/drivers/gpu/drm/bridge/Kconfig
> @@ -30,6 +30,7 @@ config DRM_CDNS_DSI
>   select DRM_KMS_HELPER
>   select DRM_MIPI_DSI
>   select DRM_PANEL_BRIDGE
> + select GENERIC_PHY_MIPI_DPHY
>   depends on OF
>   help
> Support Cadence DPI to DSI bridge. This is an internal
> diff --git a/drivers/gpu/drm/bridge/cdns-dsi.c 
> b/drivers/gpu/drm/bridge/cdns-dsi.c
> index 3ac6dd524b6d..7b432257ffbe 100644
> --- a/drivers/gpu/drm/bridge/cdns-dsi.c
> +++ b/drivers/gpu/drm/bridge/cdns-dsi.c
> @@ -21,6 +21,9 @@
>  #include 
>  #include 
>  
> +#include 
> +#include 
> +
>  #define IP_CONF  0x0
>  #define SP_HS_FIFO_DEPTH(x)  (((x) & GENMASK(30, 26)) >> 26)
>  #define SP_LP_FIFO_DEPTH(x)  (((x) & GENMASK(25, 21)) >> 21)
> @@ -419,44 +422,11 @@
>  #define DSI_NULL_FRAME_OVERHEAD  6
>  #define DSI_EOT_PKT_SIZE 4
>  
> -#define REG_WAKEUP_TIME_NS   800
> -#define DPHY_PLL_RATE_HZ 10800
> -
> -/* DPHY registers */
> -#define DPHY_PMA_CMN(reg)(reg)
> -#define DPHY_PMA_LCLK(reg)   (0x100 + (reg))
> -#define DPHY_PMA_LDATA(lane, reg)(0x200 + ((lane) * 0x100) + (reg))
> -#define DPHY_PMA_RCLK(reg)   (0x600 + (reg))
> -#define DPHY_PMA_RDATA(lane, reg)(0x700 + ((lane) * 0x100) + (reg))
> -#define DPHY_PCS(reg)(0xb00 + (reg))
> -
> -#define DPHY_CMN_SSM DPHY_PMA_CMN(0x20)
> -#define DPHY_CMN_SSM_EN  BIT(0)
> -#define DPHY_CMN_TX_MODE_EN  BIT(9)
> -
> -#define DPHY_CMN_PWM DPHY_PMA_CMN(0x40)
> -#define DPHY_CMN_PWM_DIV(x)  ((x) << 20)
> -#define DPHY_CMN_PWM_LOW(x)  ((x) << 10)
> -#define DPHY_CMN_PWM_HIGH(x) (x)
> -
> -#define DPHY_CMN_FBDIV   DPHY_PMA_CMN(0x4c)
> -#define DPHY_CMN_FBDIV_VAL(low, high)(((high) << 11) | ((low) << 22))
> -#define DPHY_CMN_FBDIV_FROM_REG  (BIT(10) | BIT(21))
> -
> -#define DPHY_CMN_OPIPDIV DPHY_PMA_CMN(0x50)
> -#define DPHY_CMN_IPDIV_FROM_REG  BIT(0)
> -#define DPHY_CMN_IPDIV(x)((x) << 1)
> -#define DPHY_CMN_OPDIV_FROM_REG  BIT(6)
> -#define DPHY_CMN_OPDIV(x)((x) << 7)
> -
> -#define DPHY_PSM_CFG DPHY_PCS(0x4)
> -#define DPHY_PSM_CFG_FROM_REGBIT(0)
> -#define DPHY_PSM_CLK_DIV(x)  ((x) << 1)
> -
>  struct cdns_dsi_output {
>   struct mipi_dsi_device *dev;
>   struct drm_panel *panel;
>   struct drm_bridge *bridge;
> + union phy_configure_opts phy_opts;
>  };
>  
>  enum cdns_dsi_input_id {
> @@ -465,14 +435,6 @@ enum cdns_dsi_input_id {
>   CDNS_DSC_INPUT,
>  };
>  
> -struct cdns_dphy_cfg {
> - u8 pll_ipdiv;
> - u8 pll_opdiv;
> - u16 pll_fbdiv;
> - unsigned long lane_bps;
> - unsigned int nlanes;
> -};
> -
>  struct cdns_dsi_cfg {
>   unsigned int hfp;
>   unsigned int hsa;
> @@ -481,34 +443,6 @@ struct cdns_dsi_cfg {
>   unsigned int htotal;
>  };
>  
> -struct cdns_dphy;
> -
> -enum cdns_dphy_clk_lane_cfg {
> - DPHY_CLK_CFG_LEFT_DRIVES_ALL = 0,
> - DPHY_CLK_CFG_LEFT_DRIVES_RIGHT = 1,
> - DPHY_CLK_CFG_LEFT_DRIVES_LEFT = 2,
> - DPHY_CLK_CFG_RIGHT_DRIVES_ALL = 3,
> -};
> -
> -struct cdns_dphy_ops {
> - int (*probe)(struct cdns_dphy *dphy);
> - void (*remove)(struct cdns_dphy *dphy);
> - void (*set_psm_div)(struct cdns_dphy *dphy, u8 div);
> - void (*set_clk_lane_cfg)(struct cdns_dphy *dphy,
> -  enum cdns_dphy_clk_lane_cfg cfg);
> - void (*set_pll_cfg)(struct cdns_dphy *dphy,
> - const struct cdns_dphy_cfg *cfg);
> - unsigned long (*get_wakeup_time_ns)(struct cdns_dphy *dphy);
> -};
> -
> -struct cdns_dphy {
> - struct cdns_dphy_cfg cfg;
> - void __iomem *regs;
> - struct clk *psm_clk;
> - struct clk *pll_ref_clk;
> - const struct cdns_dphy_ops *ops;
> -};
> -
>  struct cdns_dsi_input {
>   enum cdns_dsi_input_id id;
>   struct drm_bridge bridge;
> @@ -526,7 +460,7 @@ struct cdns_dsi {
>   struct reset_control *dsi_p_rst;
>   struct clk *dsi_sys_clk;
>   bool 

Re: [PATCH v4 9/9] drm/bridge: cdns: Convert to phy framework

2019-01-17 Thread Kishon Vijay Abraham I
Hi,

On 09/01/19 3:03 PM, Maxime Ripard wrote:
> Now that we have everything we need in the phy framework to allow to tune
> the phy parameters, let's convert the Cadence DSI bridge to that API
> instead of creating a ad-hoc driver for its phy.
> 
> Signed-off-by: Maxime Ripard 

For this too, need ACKs from DRM MAINTAINERS.

Thanks
Kishon
> ---
>  drivers/gpu/drm/bridge/Kconfig|   1 +-
>  drivers/gpu/drm/bridge/cdns-dsi.c | 485 +++
>  drivers/phy/cadence/cdns-dphy.c   |   2 +-
>  3 files changed, 61 insertions(+), 427 deletions(-)
> 
> diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
> index 2fee47b0d50b..8840f396a7b6 100644
> --- a/drivers/gpu/drm/bridge/Kconfig
> +++ b/drivers/gpu/drm/bridge/Kconfig
> @@ -30,6 +30,7 @@ config DRM_CDNS_DSI
>   select DRM_KMS_HELPER
>   select DRM_MIPI_DSI
>   select DRM_PANEL_BRIDGE
> + select GENERIC_PHY_MIPI_DPHY
>   depends on OF
>   help
> Support Cadence DPI to DSI bridge. This is an internal
> diff --git a/drivers/gpu/drm/bridge/cdns-dsi.c 
> b/drivers/gpu/drm/bridge/cdns-dsi.c
> index 3ac6dd524b6d..7b432257ffbe 100644
> --- a/drivers/gpu/drm/bridge/cdns-dsi.c
> +++ b/drivers/gpu/drm/bridge/cdns-dsi.c
> @@ -21,6 +21,9 @@
>  #include 
>  #include 
>  
> +#include 
> +#include 
> +
>  #define IP_CONF  0x0
>  #define SP_HS_FIFO_DEPTH(x)  (((x) & GENMASK(30, 26)) >> 26)
>  #define SP_LP_FIFO_DEPTH(x)  (((x) & GENMASK(25, 21)) >> 21)
> @@ -419,44 +422,11 @@
>  #define DSI_NULL_FRAME_OVERHEAD  6
>  #define DSI_EOT_PKT_SIZE 4
>  
> -#define REG_WAKEUP_TIME_NS   800
> -#define DPHY_PLL_RATE_HZ 10800
> -
> -/* DPHY registers */
> -#define DPHY_PMA_CMN(reg)(reg)
> -#define DPHY_PMA_LCLK(reg)   (0x100 + (reg))
> -#define DPHY_PMA_LDATA(lane, reg)(0x200 + ((lane) * 0x100) + (reg))
> -#define DPHY_PMA_RCLK(reg)   (0x600 + (reg))
> -#define DPHY_PMA_RDATA(lane, reg)(0x700 + ((lane) * 0x100) + (reg))
> -#define DPHY_PCS(reg)(0xb00 + (reg))
> -
> -#define DPHY_CMN_SSM DPHY_PMA_CMN(0x20)
> -#define DPHY_CMN_SSM_EN  BIT(0)
> -#define DPHY_CMN_TX_MODE_EN  BIT(9)
> -
> -#define DPHY_CMN_PWM DPHY_PMA_CMN(0x40)
> -#define DPHY_CMN_PWM_DIV(x)  ((x) << 20)
> -#define DPHY_CMN_PWM_LOW(x)  ((x) << 10)
> -#define DPHY_CMN_PWM_HIGH(x) (x)
> -
> -#define DPHY_CMN_FBDIV   DPHY_PMA_CMN(0x4c)
> -#define DPHY_CMN_FBDIV_VAL(low, high)(((high) << 11) | ((low) << 22))
> -#define DPHY_CMN_FBDIV_FROM_REG  (BIT(10) | BIT(21))
> -
> -#define DPHY_CMN_OPIPDIV DPHY_PMA_CMN(0x50)
> -#define DPHY_CMN_IPDIV_FROM_REG  BIT(0)
> -#define DPHY_CMN_IPDIV(x)((x) << 1)
> -#define DPHY_CMN_OPDIV_FROM_REG  BIT(6)
> -#define DPHY_CMN_OPDIV(x)((x) << 7)
> -
> -#define DPHY_PSM_CFG DPHY_PCS(0x4)
> -#define DPHY_PSM_CFG_FROM_REGBIT(0)
> -#define DPHY_PSM_CLK_DIV(x)  ((x) << 1)
> -
>  struct cdns_dsi_output {
>   struct mipi_dsi_device *dev;
>   struct drm_panel *panel;
>   struct drm_bridge *bridge;
> + union phy_configure_opts phy_opts;
>  };
>  
>  enum cdns_dsi_input_id {
> @@ -465,14 +435,6 @@ enum cdns_dsi_input_id {
>   CDNS_DSC_INPUT,
>  };
>  
> -struct cdns_dphy_cfg {
> - u8 pll_ipdiv;
> - u8 pll_opdiv;
> - u16 pll_fbdiv;
> - unsigned long lane_bps;
> - unsigned int nlanes;
> -};
> -
>  struct cdns_dsi_cfg {
>   unsigned int hfp;
>   unsigned int hsa;
> @@ -481,34 +443,6 @@ struct cdns_dsi_cfg {
>   unsigned int htotal;
>  };
>  
> -struct cdns_dphy;
> -
> -enum cdns_dphy_clk_lane_cfg {
> - DPHY_CLK_CFG_LEFT_DRIVES_ALL = 0,
> - DPHY_CLK_CFG_LEFT_DRIVES_RIGHT = 1,
> - DPHY_CLK_CFG_LEFT_DRIVES_LEFT = 2,
> - DPHY_CLK_CFG_RIGHT_DRIVES_ALL = 3,
> -};
> -
> -struct cdns_dphy_ops {
> - int (*probe)(struct cdns_dphy *dphy);
> - void (*remove)(struct cdns_dphy *dphy);
> - void (*set_psm_div)(struct cdns_dphy *dphy, u8 div);
> - void (*set_clk_lane_cfg)(struct cdns_dphy *dphy,
> -  enum cdns_dphy_clk_lane_cfg cfg);
> - void (*set_pll_cfg)(struct cdns_dphy *dphy,
> - const struct cdns_dphy_cfg *cfg);
> - unsigned long (*get_wakeup_time_ns)(struct cdns_dphy *dphy);
> -};
> -
> -struct cdns_dphy {
> - struct cdns_dphy_cfg cfg;
> - void __iomem *regs;
> - struct clk *psm_clk;
> - struct clk *pll_ref_clk;
> - const struct cdns_dphy_ops *ops;
> -};
> -
>  struct cdns_dsi_input {
>   enum cdns_dsi_input_id id;
>   struct drm_bridge bridge;
> @@ -526,7 +460,7 @@ struct cdns_dsi {
>   struct reset_control *dsi_p_rst;
>   struct clk *dsi_sys_clk;
>   bool link_initialized;
> - struct