[PATCH 14/14] drm/radeon: remove comparison to bool in si_dpm.c

2020-05-07 Thread Zheng Bin
Fixes coccicheck warning:

drivers/gpu/drm/radeon/si_dpm.c:1885:7-44: WARNING: Comparison to bool
drivers/gpu/drm/radeon/si_dpm.c:2463:5-22: WARNING: Comparison to bool
drivers/gpu/drm/radeon/si_dpm.c:3015:5-26: WARNING: Comparison to bool

Reported-by: Hulk Robot 
Signed-off-by: Zheng Bin 
---
 drivers/gpu/drm/radeon/si_dpm.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/radeon/si_dpm.c b/drivers/gpu/drm/radeon/si_dpm.c
index a167e1c36d24..98e288e5d8c9 100644
--- a/drivers/gpu/drm/radeon/si_dpm.c
+++ b/drivers/gpu/drm/radeon/si_dpm.c
@@ -1882,7 +1882,7 @@ static void si_initialize_powertune_defaults(struct 
radeon_device *rdev)
update_dte_from_pl2 = true;
break;
default:
-   if (si_pi->dte_data.enable_dte_by_default == true)
+   if (si_pi->dte_data.enable_dte_by_default)
DRM_ERROR("DTE is not enabled!\n");
break;
}
@@ -2460,7 +2460,7 @@ static int si_initialize_smc_dte_tables(struct 
radeon_device *rdev)
if (dte_data == NULL)
si_pi->enable_dte = false;

-   if (si_pi->enable_dte == false)
+   if (!si_pi->enable_dte)
return 0;

if (dte_data->k <= 0)
@@ -3012,7 +3012,7 @@ static void si_apply_state_adjust_rules(struct 
radeon_device *rdev,
if (ps->performance_levels[i].vddc > 
ps->performance_levels[i+1].vddc)
ps->performance_levels[i].vddc = 
ps->performance_levels[i+1].vddc;
}
-   if (rdev->pm.dpm.ac_power == false) {
+   if (!rdev->pm.dpm.ac_power) {
for (i = 0; i < ps->performance_level_count; i++) {
if (ps->performance_levels[i].mclk > max_limits->mclk)
ps->performance_levels[i].mclk = 
max_limits->mclk;
--
2.26.0.106.g9fadedd

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[PATCH v5] drm/i915: Init lspcon chip dynamically

2020-05-07 Thread Kai-Heng Feng
On HP 800 G4 DM, if HDMI cable isn't plugged before boot, the HDMI port
becomes useless and never responds to cable hotplugging:
[3.031904] [drm:lspcon_init [i915]] *ERROR* Failed to probe lspcon
[3.031945] [drm:intel_ddi_init [i915]] *ERROR* LSPCON init failed on port D

Seems like the lspcon chip on the system only gets powered after the
cable is plugged.

Consolidate lspcon_init() into lspcon_resume() to dynamically init
lspcon chip, and make HDMI port work.

Closes: https://gitlab.freedesktop.org/drm/intel/issues/203
Signed-off-by: Kai-Heng Feng 
---
v5:
 - Consolidate lspcon_resume() with lspcon_init().
 - Move more logic into lspcon code.

v4:
 - Trust VBT in intel_infoframe_init().
 - Init lspcon in intel_dp_detect().

v3:
 - Make sure it's handled under long HPD case.

v2: 
 - Move lspcon_init() inside of intel_dp_hpd_pulse().

 drivers/gpu/drm/i915/display/intel_ddi.c| 19 +--
 drivers/gpu/drm/i915/display/intel_dp.c | 10 ++--
 drivers/gpu/drm/i915/display/intel_hdmi.c   |  3 +-
 drivers/gpu/drm/i915/display/intel_lspcon.c | 63 -
 drivers/gpu/drm/i915/display/intel_lspcon.h |  3 +-
 5 files changed, 43 insertions(+), 55 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c 
b/drivers/gpu/drm/i915/display/intel_ddi.c
index 5601673c3f30..798fd640da54 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -4770,7 +4770,7 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, 
enum port port)
 {
struct intel_digital_port *intel_dig_port;
struct intel_encoder *encoder;
-   bool init_hdmi, init_dp, init_lspcon = false;
+   bool init_hdmi, init_dp;
enum phy phy = intel_port_to_phy(dev_priv, port);
 
init_hdmi = intel_bios_port_supports_dvi(dev_priv, port) ||
@@ -4784,7 +4784,6 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, 
enum port port)
 * is initialized before lspcon.
 */
init_dp = true;
-   init_lspcon = true;
init_hdmi = false;
drm_dbg_kms(&dev_priv->drm, "VBT says port %c has lspcon\n",
port_name(port));
@@ -4869,22 +4868,6 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, 
enum port port)
goto err;
}
 
-   if (init_lspcon) {
-   if (lspcon_init(intel_dig_port))
-   /* TODO: handle hdmi info frame part */
-   drm_dbg_kms(&dev_priv->drm,
-   "LSPCON init success on port %c\n",
-   port_name(port));
-   else
-   /*
-* LSPCON init faied, but DP init was success, so
-* lets try to drive as DP++ port.
-*/
-   drm_err(&dev_priv->drm,
-   "LSPCON init failed on port %c\n",
-   port_name(port));
-   }
-
intel_infoframe_init(intel_dig_port);
 
return;
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
b/drivers/gpu/drm/i915/display/intel_dp.c
index 6952b0295096..e26aa35d6e37 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -5938,15 +5938,14 @@ static enum drm_connector_status
 intel_dp_detect_dpcd(struct intel_dp *intel_dp)
 {
struct drm_i915_private *i915 = dp_to_i915(intel_dp);
-   struct intel_lspcon *lspcon = dp_to_lspcon(intel_dp);
+   struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
u8 *dpcd = intel_dp->dpcd;
u8 type;
 
if (WARN_ON(intel_dp_is_edp(intel_dp)))
return connector_status_connected;
 
-   if (lspcon->active)
-   lspcon_resume(lspcon);
+   lspcon_resume(dig_port);
 
if (!intel_dp_get_dpcd(intel_dp))
return connector_status_disconnected;
@@ -7198,14 +7197,13 @@ void intel_dp_encoder_reset(struct drm_encoder *encoder)
 {
struct drm_i915_private *dev_priv = to_i915(encoder->dev);
struct intel_dp *intel_dp = enc_to_intel_dp(to_intel_encoder(encoder));
-   struct intel_lspcon *lspcon = dp_to_lspcon(intel_dp);
+   struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
intel_wakeref_t wakeref;
 
if (!HAS_DDI(dev_priv))
intel_dp->DP = intel_de_read(dev_priv, intel_dp->output_reg);
 
-   if (lspcon->active)
-   lspcon_resume(lspcon);
+   lspcon_resume(dig_port);
 
intel_dp->reset_link_params = true;
 
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c 
b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 010f37240710..643ad2127931 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -3155,7 +3155,8 @@ void intel_infoframe_init(struct intel_digital_port 
*intel_dig

[v4 PATCH 1/2] drivers: drm: panel: Add ASUS TM5P5 NT35596 panel driver

2020-05-07 Thread Konrad Dybcio
This adds support for TMP5P5 NT35596 1080x1920 video
mode panel that can be found on some Asus Zenfone 2
Laser (Z00T) devices.

This panel seems to only be found in this device
and we have no straightforward way of actually
getting the correct model number, as no schematics
are released publicly.

Signed-off-by: Konrad Dybcio 
---
 drivers/gpu/drm/panel/Kconfig |  10 +
 drivers/gpu/drm/panel/Makefile|   1 +
 .../drm/panel/panel-asus-z00t-tm5p5-n35596.c  | 367 ++
 3 files changed, 378 insertions(+)
 create mode 100644 drivers/gpu/drm/panel/panel-asus-z00t-tm5p5-n35596.c

diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index a1723c1b5fbf8..ad896a877d49f 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -18,6 +18,16 @@ config DRM_PANEL_ARM_VERSATILE
  reference designs. The panel is detected using special registers
  in the Versatile family syscon registers.
 
+config DRM_PANEL_ASUS_Z00T_TM5P5_NT35596
+   tristate "ASUS Z00T TM5P5 NT35596 panel"
+   depends on GPIOLIB && OF
+   depends on DRM_MIPI_DSI
+   depends on BACKLIGHT_CLASS_DEVICE
+   help
+ Say Y here if you want to enable support for the ASUS TMP5P5
+ NT35596 1080x1920 video mode panel as found in some Asus
+ Zenfone 2 Laser Z00T devices.
+
 config DRM_PANEL_BOE_HIMAX8279D
tristate "Boe Himax8279d panel"
depends on OF
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index 96a883cd66305..3efc1de93aeeb 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -1,5 +1,6 @@
 # SPDX-License-Identifier: GPL-2.0
 obj-$(CONFIG_DRM_PANEL_ARM_VERSATILE) += panel-arm-versatile.o
+obj-$(CONFIG_DRM_PANEL_ASUS_Z00T_TM5P5_NT35596) += 
panel-asus-z00t-tm5p5-n35596.o
 obj-$(CONFIG_DRM_PANEL_BOE_HIMAX8279D) += panel-boe-himax8279d.o
 obj-$(CONFIG_DRM_PANEL_BOE_TV101WUM_NL6) += panel-boe-tv101wum-nl6.o
 obj-$(CONFIG_DRM_PANEL_LVDS) += panel-lvds.o
diff --git a/drivers/gpu/drm/panel/panel-asus-z00t-tm5p5-n35596.c 
b/drivers/gpu/drm/panel/panel-asus-z00t-tm5p5-n35596.c
new file mode 100644
index 0..ec5599685a4c2
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-asus-z00t-tm5p5-n35596.c
@@ -0,0 +1,367 @@
+// SPDX-License-Identifier: GPL-2.0-only
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+struct tm5p5_nt35596 {
+   struct drm_panel panel;
+   struct mipi_dsi_device *dsi;
+   struct regulator_bulk_data supplies[2];
+   struct gpio_desc *reset_gpio;
+   bool prepared;
+};
+
+static inline struct tm5p5_nt35596 *to_tm5p5_nt35596(struct drm_panel *panel)
+{
+   return container_of(panel, struct tm5p5_nt35596, panel);
+}
+
+#define dsi_generic_write_seq(dsi, seq...) do {
\
+   static const u8 d[] = { seq };  \
+   int ret;\
+   ret = mipi_dsi_generic_write(dsi, d, ARRAY_SIZE(d));\
+   if (ret < 0)\
+   return ret; \
+   } while (0)
+
+#define dsi_dcs_write_seq(dsi, seq...) do {\
+   static const u8 d[] = { seq };  \
+   int ret;\
+   ret = mipi_dsi_dcs_write_buffer(dsi, d, ARRAY_SIZE(d)); \
+   if (ret < 0)\
+   return ret; \
+   } while (0)
+
+static void tm5p5_nt35596_reset(struct tm5p5_nt35596 *ctx)
+{
+   gpiod_set_value_cansleep(ctx->reset_gpio, 1);
+   usleep_range(1000, 2000);
+   gpiod_set_value_cansleep(ctx->reset_gpio, 0);
+   usleep_range(1000, 2000);
+   gpiod_set_value_cansleep(ctx->reset_gpio, 1);
+   usleep_range(15000, 16000);
+}
+
+static int tm5p5_nt35596_on(struct tm5p5_nt35596 *ctx)
+{
+   struct mipi_dsi_device *dsi = ctx->dsi;
+
+   dsi_generic_write_seq(dsi, 0xff, 0x05);
+   dsi_generic_write_seq(dsi, 0xfb, 0x01);
+   dsi_generic_write_seq(dsi, 0xc5, 0x31);
+   dsi_generic_write_seq(dsi, 0xff, 0x04);
+   dsi_generic_write_seq(dsi, 0x01, 0x84);
+   dsi_generic_write_seq(dsi, 0x05, 0x25);
+   dsi_generic_write_seq(dsi, 0x06, 0x01);
+   dsi_generic_write_seq(dsi, 0x07, 0x20);
+   dsi_generic_write_seq(dsi, 0x08, 0x06);
+   dsi_generic_write_seq(dsi, 0x09, 0x08);
+   dsi_generic_write_seq(dsi, 0x0a, 0x10);
+   dsi_generic_write_seq(dsi, 0x0b, 0x10);
+   dsi_generic_write_seq(dsi, 0x0c, 0x10);
+   dsi_generic_write_seq(dsi, 0x0d, 0x14);
+   dsi_generic_write_seq(dsi, 0x0e, 0x14);
+   dsi_generic_write_seq(dsi, 0x0f, 0x14);
+   dsi_gener

Re: [RFC PATCH 4/4] arm64: dts: imx8mm: Add GPU nodes for 2D and 3D core using Etnaviv

2020-05-07 Thread Schrempf Frieder
On 06.05.20 13:45, Frieder Schrempf wrote:
> On 03.05.20 16:49, Adam Ford wrote:
>> On Thu, Apr 30, 2020 at 7:46 AM Schrempf Frieder
>>  wrote:
>>>
>>> From: Frieder Schrempf 
>>>
>>> According to the documents, the i.MX8M-Mini features a GC320 and a
>>> GCNanoUltra GPU core. Etnaviv detects them as:
>>>
>>>  etnaviv-gpu 3800.gpu: model: GC600, revision: 4653
>>>  etnaviv-gpu 38008000.gpu: model: GC520, revision: 5341
>>>
>>> This seems to work fine more or less without any changes to the HWDB,
>>> which still might be needed in the future to correct some features,
>>> etc.
>>>
>>> Signed-off-by: Frieder Schrempf 
>>> ---
>> Since not everyone uses the 3D or 2D, would it make sense to mark them
>> as disabled by default and let people who need the 3D and 2D enable
>> them at their respective board files?
> 
> I would rather keep it the way it has been done for other SoCs. Looking 
> at the i.MX6 devicetrees, they all seem to have the GPUs enabled by 
> default.

Ah, I had missed Lucas reply. He already provided much better arguments 
for keeping the GPUs enabled by default.
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[PATCH 03/14] drm/radeon: remove comparison to bool in ni_dpm.c

2020-05-07 Thread Zheng Bin
Fixes coccicheck warning:

drivers/gpu/drm/radeon/ni_dpm.c:807:5-26: WARNING: Comparison to bool
drivers/gpu/drm/radeon/ni_dpm.c:2466:5-36: WARNING: Comparison to boo
drivers/gpu/drm/radeon/ni_dpm.c:3146:5-22: WARNING: Comparison to bool

Reported-by: Hulk Robot 
Signed-off-by: Zheng Bin 
---
 drivers/gpu/drm/radeon/ni_dpm.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/radeon/ni_dpm.c b/drivers/gpu/drm/radeon/ni_dpm.c
index b57c37ddd164..66c48ce107a5 100644
--- a/drivers/gpu/drm/radeon/ni_dpm.c
+++ b/drivers/gpu/drm/radeon/ni_dpm.c
@@ -804,7 +804,7 @@ static void ni_apply_state_adjust_rules(struct 
radeon_device *rdev,
else
max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc;

-   if (rdev->pm.dpm.ac_power == false) {
+   if (!rdev->pm.dpm.ac_power) {
for (i = 0; i < ps->performance_level_count; i++) {
if (ps->performance_levels[i].mclk > max_limits->mclk)
ps->performance_levels[i].mclk = 
max_limits->mclk;
@@ -2463,7 +2463,7 @@ static int ni_populate_power_containment_values(struct 
radeon_device *rdev,
u32 power_boost_limit;
u8 max_ps_percent;

-   if (ni_pi->enable_power_containment == false)
+   if (!ni_pi->enable_power_containment)
return 0;

if (state->performance_level_count == 0)
@@ -3143,7 +3143,7 @@ static int ni_initialize_smc_cac_tables(struct 
radeon_device *rdev)
int i, ret;
u32 reg;

-   if (ni_pi->enable_cac == false)
+   if (!ni_pi->enable_cac)
return 0;

cac_tables = kzalloc(sizeof(PP_NIslands_CACTABLES), GFP_KERNEL);
--
2.26.0.106.g9fadedd

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[PATCH] drm/mediatek: eliminate the magic number in array size

2020-05-07 Thread Bernard Zhao
Eiminate the magic number in array size, there macro defines in
hdmi.h.

Signed-off-by: Bernard Zhao 
---
 drivers/gpu/drm/mediatek/mtk_hdmi.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi.c 
b/drivers/gpu/drm/mediatek/mtk_hdmi.c
index ff43a3d80410..4c962c7f06e5 100644
--- a/drivers/gpu/drm/mediatek/mtk_hdmi.c
+++ b/drivers/gpu/drm/mediatek/mtk_hdmi.c
@@ -982,7 +982,7 @@ static int mtk_hdmi_setup_avi_infoframe(struct mtk_hdmi 
*hdmi,
struct drm_display_mode *mode)
 {
struct hdmi_avi_infoframe frame;
-   u8 buffer[17];
+   u8 buffer[HDMI_INFOFRAME_HEADER_SIZE + HDMI_AVI_INFOFRAME_SIZE];
ssize_t err;
 
err = drm_hdmi_avi_infoframe_from_display_mode(&frame,
@@ -1008,7 +1008,7 @@ static int mtk_hdmi_setup_spd_infoframe(struct mtk_hdmi 
*hdmi,
const char *product)
 {
struct hdmi_spd_infoframe frame;
-   u8 buffer[29];
+   u8 buffer[HDMI_INFOFRAME_HEADER_SIZE + HDMI_SPD_INFOFRAME_SIZE];
ssize_t err;
 
err = hdmi_spd_infoframe_init(&frame, vendor, product);
@@ -1031,7 +1031,7 @@ static int mtk_hdmi_setup_spd_infoframe(struct mtk_hdmi 
*hdmi,
 static int mtk_hdmi_setup_audio_infoframe(struct mtk_hdmi *hdmi)
 {
struct hdmi_audio_infoframe frame;
-   u8 buffer[14];
+   u8 buffer[HDMI_INFOFRAME_HEADER_SIZE + HDMI_AUDIO_INFOFRAME_SIZE];
ssize_t err;
 
err = hdmi_audio_infoframe_init(&frame);
-- 
2.26.2

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[PATCH v10 2/2] drm/bridge: anx7625: Add anx7625 MIPI DSI/DPI to DP bridge driver

2020-05-07 Thread Xin Ji
The ANX7625 is an ultra-low power 4K Mobile HD Transmitter designed
for portable device. It converts MIPI DSI/DPI to DisplayPort 1.3 4K.

The ANX7625 can support both USB Type-C PD feature and MIPI DSI/DPI
to DP feature. This driver only enabled MIPI DSI/DPI to DP feature.

Signed-off-by: Xin Ji 
---
 drivers/gpu/drm/bridge/Makefile   |2 +-
 drivers/gpu/drm/bridge/analogix/Kconfig   |8 +
 drivers/gpu/drm/bridge/analogix/Makefile  |1 +
 drivers/gpu/drm/bridge/analogix/anx7625.c | 1961 +
 drivers/gpu/drm/bridge/analogix/anx7625.h |  397 ++
 5 files changed, 2368 insertions(+), 1 deletion(-)
 create mode 100644 drivers/gpu/drm/bridge/analogix/anx7625.c
 create mode 100644 drivers/gpu/drm/bridge/analogix/anx7625.h

diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile
index 4934fcf..bcd388a 100644
--- a/drivers/gpu/drm/bridge/Makefile
+++ b/drivers/gpu/drm/bridge/Makefile
@@ -12,8 +12,8 @@ obj-$(CONFIG_DRM_SII9234) += sii9234.o
 obj-$(CONFIG_DRM_THINE_THC63LVD1024) += thc63lvd1024.o
 obj-$(CONFIG_DRM_TOSHIBA_TC358764) += tc358764.o
 obj-$(CONFIG_DRM_TOSHIBA_TC358767) += tc358767.o
-obj-$(CONFIG_DRM_ANALOGIX_DP) += analogix/
 obj-$(CONFIG_DRM_I2C_ADV7511) += adv7511/
 obj-$(CONFIG_DRM_TI_SN65DSI86) += ti-sn65dsi86.o
 obj-$(CONFIG_DRM_TI_TFP410) += ti-tfp410.o
+obj-y += analogix/
 obj-y += synopsys/
diff --git a/drivers/gpu/drm/bridge/analogix/Kconfig 
b/drivers/gpu/drm/bridge/analogix/Kconfig
index e930ff9..c772be2 100644
--- a/drivers/gpu/drm/bridge/analogix/Kconfig
+++ b/drivers/gpu/drm/bridge/analogix/Kconfig
@@ -2,3 +2,11 @@
 config DRM_ANALOGIX_DP
tristate
depends on DRM
+
+config DRM_ANALOGIX_ANX7625
+   tristate "Analogix Anx7625 MIPI to DP interface support"
+   depends on DRM
+   depends on OF
+   help
+   ANX7625 is an ultra-low power 4K mobile HD transmitter designed
+   for portable devices. It converts MIPI/DPI to DisplayPort1.3 4K.
diff --git a/drivers/gpu/drm/bridge/analogix/Makefile 
b/drivers/gpu/drm/bridge/analogix/Makefile
index fdbf3fd..b6c4a19 100644
--- a/drivers/gpu/drm/bridge/analogix/Makefile
+++ b/drivers/gpu/drm/bridge/analogix/Makefile
@@ -1,3 +1,4 @@
 # SPDX-License-Identifier: GPL-2.0-only
+obj-$(CONFIG_DRM_ANALOGIX_ANX7625) += anx7625.o
 analogix_dp-objs := analogix_dp_core.o analogix_dp_reg.o
 obj-$(CONFIG_DRM_ANALOGIX_DP) += analogix_dp.o
diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c 
b/drivers/gpu/drm/bridge/analogix/anx7625.c
new file mode 100644
index 000..2afa869
--- /dev/null
+++ b/drivers/gpu/drm/bridge/analogix/anx7625.c
@@ -0,0 +1,1961 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright(c) 2020, Analogix Semiconductor. All rights reserved.
+ *
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include "anx7625.h"
+
+/*
+ * There is a sync issue while access I2C register between AP(CPU) and
+ * internal firmware(OCM), to avoid the race condition, AP should access
+ * the reserved slave address before slave address occurs changes.
+ */
+static int i2c_access_workaround(struct anx7625_data *ctx,
+struct i2c_client *client)
+{
+   u8 offset;
+   struct device *dev = &client->dev;
+   int ret;
+
+   if (client == ctx->last_client)
+   return 0;
+
+   ctx->last_client = client;
+
+   if (client == ctx->i2c.tcpc_client)
+   offset = RSVD_00_ADDR;
+   else if (client == ctx->i2c.tx_p0_client)
+   offset = RSVD_D1_ADDR;
+   else if (client == ctx->i2c.tx_p1_client)
+   offset = RSVD_60_ADDR;
+   else if (client == ctx->i2c.rx_p0_client)
+   offset = RSVD_39_ADDR;
+   else if (client == ctx->i2c.rx_p1_client)
+   offset = RSVD_7F_ADDR;
+   else
+   offset = RSVD_00_ADDR;
+
+   ret = i2c_smbus_write_byte_data(client, offset, 0x00);
+   if (ret < 0)
+   DRM_DEV_ERROR(dev,
+ "fail to access i2c id=%x\n:%x",
+ client->addr, offset);
+
+   return ret;
+}
+
+static int anx7625_reg_read(struct anx7625_data *ctx,
+   struct i2c_client *client, u8 reg_addr)
+{
+   int ret;
+   struct device *dev = &client->dev;
+
+   i2c_access_workaround(ctx, client);
+
+   ret = i2c_smbus_read_byte_data(client, reg_addr);
+   if (ret < 0)
+   DRM_DEV_ERROR(dev, "read i2c fail id=%x:%x\n",
+ client->addr, reg_addr);
+
+   return ret;
+}
+
+static int anx7625_reg_block_read(struct anx7625_data *ctx,
+ struct i2c_client *client,
+ u8 reg_addr, u

RE: [PATCH v3 4/4] MAINTAINERS: Add IPK MIPI DSI Host driver entry

2020-05-07 Thread Angelo Ribeiro
From: Joe Perches 
Date: Mon, Apr 27, 2020 at 15:45:17

> On Mon, 2020-04-27 at 16:00 +0200, Angelo Ribeiro wrote:
> > Creates entry for Synopsys DesignWare IPK DRM driver and
> > adds myself as maintainer.
> []
> > diff --git a/MAINTAINERS b/MAINTAINERS
> []
> > @@ -5507,6 +5507,14 @@ T:   git git://anongit.freedesktop.org/drm/drm-misc
> >  F: Documentation/devicetree/bindings/display/ste,mcde.txt
> >  F: drivers/gpu/drm/mcde/
> >  
> > +DRM DRIVER FOR SYNOPSYS DESIGNWARE IPK
> > +M: Angelo Ribeiro 
> > +L: dri-devel@lists.freedesktop.org
> > +S: Maintained
> > +F: drivers/gpu/drm/ipk/
> > +F: Documentation/devicetree/bindings/display/ipk/
> > +T: git git://anongit.freedesktop.org/drm/drm-misc
> 
> There is now a preferred order for the entries in a section.
> 
> Please use:
> 
> DRM DRIVER FOR SYNOPSYS DESIGNWARE IPK
> M:Angelo Ribeiro 
> L:dri-devel@lists.freedesktop.org>
> S:Maintained
> T:git git://anongit.freedesktop.org/drm/drm-misc
> F:Document
> ation/devicetree/bindings/display/ipk/>
> F:drivers/gpu/drm/ipk/

Hi Joe,

Thanks for the review I will apply it.

Angelo
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[PATCH 00/14] drm/radeon: remove comparison to bool

2020-05-07 Thread Zheng Bin
Zheng Bin (14):
  drm/radeon: remove comparison to bool in btc_dpm.c
  drm/radeon: remove comparison to bool in ci_dpm.c
  drm/radeon: remove comparison to bool in ni_dpm.c
  drm/radeon: remove comparison to bool in radeon_atpx_handler.c
  drm/radeon: remove comparison to bool in radeon_object.c
  drm/radeon: remove comparison to bool in radeon_ttm.c
  drm/radeon: remove comparison to bool in r100.c
  drm/radeon: remove comparison to bool in r300.c
  drm/radeon: remove comparison to bool in r600.c
  drm/radeon: remove comparison to bool in rs600.c
  drm/radeon: remove comparison to bool in rs690.c
  drm/radeon: remove comparison to bool in rv6xx_dpm.c
  drm/radeon: remove comparison to bool in rv515.c
  drm/radeon: remove comparison to bool in si_dpm.c

 drivers/gpu/drm/radeon/btc_dpm.c | 2 +-
 drivers/gpu/drm/radeon/ci_dpm.c  | 4 ++--
 drivers/gpu/drm/radeon/ni_dpm.c  | 6 +++---
 drivers/gpu/drm/radeon/r100.c| 2 +-
 drivers/gpu/drm/radeon/r300.c| 2 +-
 drivers/gpu/drm/radeon/r600.c| 3 ++-
 drivers/gpu/drm/radeon/radeon_atpx_handler.c | 4 ++--
 drivers/gpu/drm/radeon/radeon_object.c   | 2 +-
 drivers/gpu/drm/radeon/radeon_ttm.c  | 2 +-
 drivers/gpu/drm/radeon/rs600.c   | 2 +-
 drivers/gpu/drm/radeon/rs690.c   | 3 ++-
 drivers/gpu/drm/radeon/rv515.c   | 2 +-
 drivers/gpu/drm/radeon/rv6xx_dpm.c   | 2 +-
 drivers/gpu/drm/radeon/si_dpm.c  | 6 +++---
 14 files changed, 22 insertions(+), 20 deletions(-)

--
2.26.0.106.g9fadedd

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[PATCH 06/14] drm/radeon: remove comparison to bool in radeon_ttm.c

2020-05-07 Thread Zheng Bin
Fixes coccicheck warning:

drivers/gpu/drm/radeon/radeon_ttm.c:141:6-62: WARNING: Comparison to bool

Reported-by: Hulk Robot 
Signed-off-by: Zheng Bin 
---
 drivers/gpu/drm/radeon/radeon_ttm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c 
b/drivers/gpu/drm/radeon/radeon_ttm.c
index 5d50c9edbe80..d1fcb5f995b0 100644
--- a/drivers/gpu/drm/radeon/radeon_ttm.c
+++ b/drivers/gpu/drm/radeon/radeon_ttm.c
@@ -138,7 +138,7 @@ static void radeon_evict_flags(struct ttm_buffer_object *bo,
rbo = container_of(bo, struct radeon_bo, tbo);
switch (bo->mem.mem_type) {
case TTM_PL_VRAM:
-   if (rbo->rdev->ring[radeon_copy_ring_index(rbo->rdev)].ready == 
false)
+   if (!rbo->rdev->ring[radeon_copy_ring_index(rbo->rdev)].ready)
radeon_ttm_placement_from_domain(rbo, 
RADEON_GEM_DOMAIN_CPU);
else if (rbo->rdev->mc.visible_vram_size < 
rbo->rdev->mc.real_vram_size &&
 bo->mem.start < (rbo->rdev->mc.visible_vram_size >> 
PAGE_SHIFT)) {
--
2.26.0.106.g9fadedd

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[PATCH 09/14] drm/radeon: remove comparison to bool in r600.c

2020-05-07 Thread Zheng Bin
Fixes coccicheck warning:

drivers/gpu/drm/radeon/r600.c:1494:8-37: WARNING: Comparison to bool

Reported-by: Hulk Robot 
Signed-off-by: Zheng Bin 
---
 drivers/gpu/drm/radeon/r600.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index d9a33ca768f3..a37f50907107 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -1491,7 +1491,8 @@ static int r600_mc_init(struct radeon_device *rdev)
/* FastFB shall be used with UMA memory. Here 
it is simply disabled when sideport
* memory is present.
*/
-   if (rdev->mc.igp_sideport_enabled == false && 
radeon_fastfb == 1) {
+   if (!rdev->mc.igp_sideport_enabled &&
+   radeon_fastfb == 1) {
DRM_INFO("Direct mapping: aper base at 
0x%llx, replaced by direct mapping base 0x%llx.\n",
(unsigned long 
long)rdev->mc.aper_base, k8_addr);
rdev->mc.aper_base = 
(resource_size_t)k8_addr;
--
2.26.0.106.g9fadedd

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[PATCH v2] drm/mediatek: cleanup coding style in mediatek a bit

2020-05-07 Thread Bernard Zhao
This code change is to make code bit more readable.

Signed-off-by: Bernard Zhao 
---
 drivers/gpu/drm/mediatek/mtk_hdmi.c | 12 
 1 file changed, 4 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi.c 
b/drivers/gpu/drm/mediatek/mtk_hdmi.c
index ff43a3d80410..43e9876fd50c 100644
--- a/drivers/gpu/drm/mediatek/mtk_hdmi.c
+++ b/drivers/gpu/drm/mediatek/mtk_hdmi.c
@@ -311,14 +311,10 @@ static void mtk_hdmi_hw_send_info_frame(struct mtk_hdmi 
*hdmi, u8 *buffer,
u8 checksum;
int ctrl_frame_en = 0;
 
-   frame_type = *buffer;
-   buffer += 1;
-   frame_ver = *buffer;
-   buffer += 1;
-   frame_len = *buffer;
-   buffer += 1;
-   checksum = *buffer;
-   buffer += 1;
+   frame_type = *buffer++;
+   frame_ver = *buffer++;
+   frame_len = *buffer++;
+   checksum = *buffer++;
frame_data = buffer;
 
dev_dbg(hdmi->dev,
-- 
2.26.2

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[PATCH 13/14] drm/radeon: remove comparison to bool in rv515.c

2020-05-07 Thread Zheng Bin
Fixes coccicheck warning:

drivers/gpu/drm/radeon/rv515.c:666:5-37: WARNING: Comparison to bool

Reported-by: Hulk Robot 
Signed-off-by: Zheng Bin 
---
 drivers/gpu/drm/radeon/rv515.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/radeon/rv515.c b/drivers/gpu/drm/radeon/rv515.c
index 147e5cf8348d..77e6b9dcdb69 100644
--- a/drivers/gpu/drm/radeon/rv515.c
+++ b/drivers/gpu/drm/radeon/rv515.c
@@ -663,7 +663,7 @@ int rv515_init(struct radeon_device *rdev)
RREG32(R_0007C0_CP_STAT));
}
/* check if cards are posted or not */
-   if (radeon_boot_test_post_card(rdev) == false)
+   if (!radeon_boot_test_post_card(rdev))
return -EINVAL;
/* Initialize clocks */
radeon_get_clock_info(rdev->ddev);
--
2.26.0.106.g9fadedd

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Re: [PATCH v5 2/6] drm/of: Make drm_of_find_panel_or_bridge() to check graph's presence

2020-05-07 Thread Dmitry Osipenko
06.05.2020 19:41, Sam Ravnborg пишет:
> On Sat, Apr 18, 2020 at 08:06:59PM +0300, Dmitry Osipenko wrote:
>> When graph isn't defined in a device-tree, the of_graph_get_remote_node()
>> prints a noisy error message, telling that port node is not found. This is
>> undesirable behaviour in our case because absence of a panel/bridge graph
>> is a valid case. Let's check presence of the local port in a device-tree
>> before proceeding with parsing the graph.
>>
>> Signed-off-by: Dmitry Osipenko 
> Reviewed-by: Sam Ravnborg 

Thank you again for taking a look at these patches!
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RE: [PATCH v3 3/4] drm: ipk: Add extensions for DW MIPI DSI Host driver

2020-05-07 Thread Angelo Ribeiro
From: Daniel Vetter 
Date: Tue, Apr 28, 2020 at 16:28:15

> On Mon, Apr 27, 2020 at 04:00:35PM +0200, Angelo Ribeiro wrote:
> > Add Synopsys DesignWare IPK specific extensions for Synopsys DesignWare
> > MIPI DSI Host driver.
> > 
> > Cc: Maarten Lankhorst 
> > Cc: Maxime Ripard 
> > Cc: David Airlie 
> > Cc: Daniel Vetter 
> > Cc: Sam Ravnborg 
> > Cc: Gustavo Pimentel 
> > Cc: Joao Pinto 
> > Signed-off-by: Angelo Ribeiro 
> 
> I've dumped this on a pile of bridge drivers by now, but I don't think the
> dw-mipi-dsi organization makes much sense.
> 
> I think what we'd need is:
> 
> - drm_encoder is handled by the drm_device driver, not by dw-mipi-dsi
>   drm_bridge driver
> 
> - the glue code for the various soc specific implementations (like ipk
>   here) should be put behind the drm_bridge abstraction. Otherwise I'm not
>   really seeing why exactly dw-mipi-dsi is a bridge driver if it doesn't
>   work like a bridge driver
> 
> - Probably we should put all these files into drm/bridge/dw-mipi-dsi/
> 
> - drm_device drivers should get at their bridges with one of the standard
>   of helpers we have in drm_bridge, not by directly calling into a bridge
>   drivers.
> 
> I know that dw-hdmi is using the exact same code pattern, but we got to
> stop this eventually or it becomes an unfixable mess.
> -Daniel

Hi Daniel,

Sorry for the late answer.

I understand what you stated and the conversion of
this driver in a help library could be a good solution since
you can use the DSI as bridge or as encoder, as your pipeline
requires.

Also most of the code implemented by each glue is essential PHY related,
the development of a PHY driver could make this more clear.

However, this needs a lot of work and consensus. Do you think that we
can go ahead with this driver and do the rework later?
I'm available and interested to help on this rework.

Thanks,
Angelo 

> 
> > ---
> > Changes since v3:
> >   - Rearranged headers.
> > ---
> >  drivers/gpu/drm/ipk/Kconfig   |   9 +
> >  drivers/gpu/drm/ipk/Makefile  |   2 +
> >  drivers/gpu/drm/ipk/dw-mipi-dsi-ipk.c | 557 
> > ++
> >  3 files changed, 568 insertions(+)
> >  create mode 100644 drivers/gpu/drm/ipk/dw-mipi-dsi-ipk.c
> > 
> > diff --git a/drivers/gpu/drm/ipk/Kconfig b/drivers/gpu/drm/ipk/Kconfig
> > index 1f87444..49819e5 100644
> > --- a/drivers/gpu/drm/ipk/Kconfig
> > +++ b/drivers/gpu/drm/ipk/Kconfig
> > @@ -11,3 +11,12 @@ config DRM_IPK
> >   Enable support for the Synopsys DesignWare DRM DSI.
> >   To compile this driver as a module, choose M here: the module
> >   will be called ipk-drm.
> > +
> > +config DRM_IPK_DSI
> > +   tristate "Synopsys DesignWare IPK specific extensions for MIPI DSI"
> > +   depends on DRM_IPK
> > +   select DRM_DW_MIPI_DSI
> > +   help
> > + Choose this option for Synopsys DesignWare IPK MIPI DSI support.
> > + To compile this driver as a module, choose M here: the module
> > + will be called dw-mipi-dsi-ipk.
> > diff --git a/drivers/gpu/drm/ipk/Makefile b/drivers/gpu/drm/ipk/Makefile
> > index 6a1a911..f22d590 100644
> > --- a/drivers/gpu/drm/ipk/Makefile
> > +++ b/drivers/gpu/drm/ipk/Makefile
> > @@ -2,3 +2,5 @@
> >  ipk-drm-y := dw-drv.o dw-vpg.o
> >  
> >  obj-$(CONFIG_DRM_IPK) += ipk-drm.o
> > +
> > +obj-$(CONFIG_DRM_IPK_DSI) += dw-mipi-dsi-ipk.o
> > diff --git a/drivers/gpu/drm/ipk/dw-mipi-dsi-ipk.c 
> > b/drivers/gpu/drm/ipk/dw-mipi-dsi-ipk.c
> > new file mode 100644
> > index 000..f8ac4ca
> > --- /dev/null
> > +++ b/drivers/gpu/drm/ipk/dw-mipi-dsi-ipk.c
> > @@ -0,0 +1,557 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Copyright (c) 2019-2020 Synopsys, Inc. and/or its affiliates.
> > + * Synopsys DesignWare MIPI DSI solution driver
> > + *
> > + * Author: Angelo Ribeiro 
> > + * Author: Luis Oliveira 
> > + */
> > +
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +
> > +#include 
> > +
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +
> > +#define DW_DPHY_LPCLK_CTRL 0x94
> > +#define DW_DPHY_RSTZ   0xA0
> > +#define DW_DPHY_IF_CFG 0xA4
> > +#define DW_DPHY_ULPS_CTRL  0xA8
> > +#define DW_DPHY_TX_TRIGGERS0xAC
> > +#define DW_DPHY_STATUS 0xB0
> > +#define DW_DPHY_TST_CTRL0  0xB4
> > +#define DW_DPHY_TST_CTRL1  0xB8
> > +#define DW_GEN3_IF_TESTER  0x3c
> > +#define DW_GEN3_IF_SOC_PLL 0x48
> > +#define DW_GEN3_IF_SOC_PLL_EN  0x4C
> > +
> > +#define DW_12BITS_DPHY_RDY_L0  0x507
> > +#define DW_12BITS_DPHY_RDY_L1  0x707
> > +#define DW_12BITS_DPHY_RDY_L2  0x907
> > +#define DW_12BITS_DPHY_RDY_L3  0xB07
> > +
> > +#define DW_LANE_MIN_KBPS   8
> > +#define DW_LANE_MAX_KBPS   25
> > +#define DW_DPHY_DIV_UPPER_LIMIT8000
> > +#define DW_DPHY_DIV_LOWER_LIMIT2000
> > +#define DW_MIN_OUTPUT_FREQ 80
> > +#define DW_LPHS_TIM_TRANSIONS  0x40
> > +
> > +enum dw_glueiftester {
> > +   GLUE_LOGIC = 0x4,
> > +   

Re: [RFC PATCH 3/4] drm/etnaviv: Change order of enabling clocks to fix boot on i.MX8MM

2020-05-07 Thread Schrempf Frieder
Hi Peng,

On 01.05.20 14:36, Peng Fan wrote:
>> Subject: Re: [RFC PATCH 3/4] drm/etnaviv: Change order of enabling clocks to
>> fix boot on i.MX8MM
>>
>> On 30.04.20 16:35, Lucas Stach wrote:
>>> Am Donnerstag, den 30.04.2020, 12:46 + schrieb Schrempf Frieder:
 From: Frieder Schrempf 

 On some i.MX8MM devices the boot hangs when enabling the GPU clocks.
 Changing the order of clock initalization to

 core -> shader -> bus -> reg

 fixes the issue. This is the same order used in the imx platform code
 of the downstream GPU driver in the NXP kernel [1]. For the sake of
 consistency we also adjust the order of disabling the clocks to the
 reverse.

 [1]
 https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fsou

>> rce.codeaurora.org%2Fexternal%2Fimx%2Flinux-imx%2Ftree%2Fdrivers%2F
>> mx

>> c%2Fgpu-viv%2Fhal%2Fos%2Flinux%2Fkernel%2Fplatform%2Ffreescale%2Fgc
>> _h

>> al_kernel_platform_imx.c%3Fh%3Dimx_5.4.3_2.0.0%23n1538&data=02
>> %7C

>> 01%7Cpeng.fan%40nxp.com%7Cdc7da53f665e4f567e3008d7ed1c27e0%7C6
>> 86ea1d3

>> bc2b4c6fa92cd99c5c301635%7C0%7C0%7C637238577497969787&sda
>> ta=QRHzu
 C6gSKy%2F6y2FTRvlNF5t7DmJIvTgBESYKchI%2FDw%3D&reserved=0
>>>
>>> I don't see why the order of the clocks is important. Is this really a
>>> GPU issue? As in: does a GPU access hang when enabling the clocks in
>>> the wrong order? Or is this a clock driver issue with a clock access
>>> hanging due to an upstream clock still being disabled?
>>
>> Actually you might be right with this being a clock driver issue. The hanging
>> happens while enabling the clocks (unrelated to any GPU register access). The
>> strange thing is that most of the devices we have don't care and work as is
>> and some devices reliably fail each time when enabling the clocks in the
>> "wrong" order.
>>
>> So I guess this could indeed be some clock being enabled with an upstream
>> PLL not having locked yet or something.
> 
> https://eur04.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchwork.kernel.org%2Fcover%2F11433775%2F&data=02%7C01%7Cfrieder.schrempf%40kontron.de%7C1014be5f9b8b4d0c6e8108d7edcc5bde%7C8c9d3c973fd941c8a2b1646f3942daf1%7C0%7C0%7C637239334279684748&sdata=UwVVzPEvNOP6I4g78uG5O9jVYmHwqyo6hj97wvtlzs0%3D&reserved=0
> 
> Will this pachset help?

Thanks for the pointer. Unfortunately the clock patches don't help. I 
tried with 5.7-rc4 and your patches on top and the issue still persists.

Also I found out that changing the order of the clock initialization as 
proposed, does not fix the problem, either. On some boards it helps, 
others still hang when the clocks are initialized.

Thanks,
Frieder

> 
> The i.MX8M CCM root mux code in Linux needs a fix.
> 
> Regards,
> Peng.
> 
>>
>>>
>>> Regards,
>>> Lucas
>>>
 Signed-off-by: Frieder Schrempf 
 ---
drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 42
>> +--
1 file changed, 21 insertions(+), 21 deletions(-)

 diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
 b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
 index 7b138d4dd068..424b2e5951f0 100644
 --- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
 +++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
 @@ -1487,55 +1487,55 @@ static int etnaviv_gpu_clk_enable(struct
>> etnaviv_gpu *gpu)
{
int ret;

 -  if (gpu->clk_reg) {
 -  ret = clk_prepare_enable(gpu->clk_reg);
 +  if (gpu->clk_core) {
 +  ret = clk_prepare_enable(gpu->clk_core);
if (ret)
return ret;
}

 -  if (gpu->clk_bus) {
 -  ret = clk_prepare_enable(gpu->clk_bus);
 +  if (gpu->clk_shader) {
 +  ret = clk_prepare_enable(gpu->clk_shader);
if (ret)
 -  goto disable_clk_reg;
 +  goto disable_clk_core;
}

 -  if (gpu->clk_core) {
 -  ret = clk_prepare_enable(gpu->clk_core);
 +  if (gpu->clk_bus) {
 +  ret = clk_prepare_enable(gpu->clk_bus);
if (ret)
 -  goto disable_clk_bus;
 +  goto disable_clk_shader;
}

 -  if (gpu->clk_shader) {
 -  ret = clk_prepare_enable(gpu->clk_shader);
 +  if (gpu->clk_reg) {
 +  ret = clk_prepare_enable(gpu->clk_reg);
if (ret)
 -  goto disable_clk_core;
 +  goto disable_clk_bus;
}

return 0;

 -disable_clk_core:
 -  if (gpu->clk_core)
 -  clk_disable_unprepare(gpu->clk_core);
disable_clk_bus:
if (gpu->clk_bus)
clk_disable_unprepare(gpu->clk_bus);
 -disable_clk_reg:
 -  if (gpu->clk_reg)
 -  clk_disable_unprepare(gpu->clk_reg);
 +disable

Re: [PATCH] drm/mediatek: stop iterating dma addresses when sg_dma_len() == 0

2020-05-07 Thread Anand Mistry
On Wed, May 6, 2020 at 10:25 AM Chun-Kuang Hu  wrote:
>
> Hi, Anand,
>
> Chun-Kuang Hu  於 2020年4月29日 週三 上午12:37寫道:
> >
> > Hi, Anand,
> >
> > Anand K. Mistry  於 2020年4月28日 週二 上午9:54寫道:
> > >
> > > On Sun, 26 Apr 2020 at 18:04, Chun-Kuang Hu  
> > > wrote:
> > > >
> > > > Hi, Anand:
> > > >
> > > > Anand K Mistry  於 2020年4月20日 週一 下午2:09寫道:
> > > > >
> > > > > If dma_map_sg() merges pages when creating the mapping, only the first
> > > > > entries will have a valid sg_dma_address() and sg_dma_len(), followed 
> > > > > by
> > > > > entries with sg_dma_len() == 0.
> > > > >
> > > > > Signed-off-by: Anand K Mistry 
>
> Author should sign off this patch, please give a sign off tag by author.

Sorry, email issues meant i sent the patch from a different account.
Should I re-send the
patch from the same account as the sign-off line? I'm still working my
way through the kernel patch process.

>
> Regards,
> Chun-Kuang.
>
> > > > > ---
> > > > >  drivers/gpu/drm/mediatek/mtk_drm_gem.c | 3 +++
> > > > >  1 file changed, 3 insertions(+)
> > > > >
> > > > > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_gem.c 
> > > > > b/drivers/gpu/drm/mediatek/mtk_drm_gem.c
> > > > > index b04a3c2b111e09..f8fd8b98c30e3d 100644
> > > > > --- a/drivers/gpu/drm/mediatek/mtk_drm_gem.c
> > > > > +++ b/drivers/gpu/drm/mediatek/mtk_drm_gem.c
> > > > > @@ -224,6 +224,9 @@ struct drm_gem_object 
> > > > > *mtk_gem_prime_import_sg_table(struct drm_device *dev,
> > > > >
> > > > > expected = sg_dma_address(sg->sgl);
> > > > > for_each_sg(sg->sgl, s, sg->nents, i) {
> > > > > +   if (!sg_dma_len(s))
> > > > > +   break;
> > > >
> > > > I think this should be 'continue'
> > >
> > > scatterlist.h has the comment:
> > > /*
> > >  * These macros should be used after a dma_map_sg call has been done
> > >  * to get bus addresses of each of the SG entries and their lengths.
> > >  * You should only work with the number of sg entries dma_map_sg
> > >  * returns, or alternatively stop on the first sg_dma_len(sg) which
> > >  * is 0.
> > >  */
> > >
> > > So breaking on the first sg_dma_len(sg) == 0 appears to be (one of)
> > > the documented approach.
> > >
> >
> > Okay, you're right. So
> >
> > Reviewed-by: Chun-Kuang Hu 
> >
> > > >
> > > > Regards,
> > > > Chun-Kuang.
> > > >
> > > > > +
> > > > > if (sg_dma_address(s) != expected) {
> > > > > DRM_ERROR("sg_table is not contiguous");
> > > > > ret = -EINVAL;
> > > > > --
> > > > > 2.26.1.301.g55bc3eb7cb9-goog
> > > > >
> > > > >
> > > > > ___
> > > > > Linux-mediatek mailing list
> > > > > linux-media...@lists.infradead.org
> > > > > http://lists.infradead.org/mailman/listinfo/linux-mediatek
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[v4 PATCH 0/2] Add support for ASUS Z00T TM5P5 NT35596 panel

2020-05-07 Thread Konrad Dybcio
changes since v3:
- fix dt-bindings issue

changes since v2:
- fix Kconfig indentation

changes since v1:
- make `backlight_properties props` constant
- a couple of line breaks
- change name and compatible to reflect ASUS being the vendor
- remove a redundant TODO

Konrad Dybcio (2):
  drivers: drm: panel: Add ASUS TM5P5 NT35596 panel driver
  dt-bindings: display: Document ASUS Z00T TM5P5 NT35596 panel
compatible

 .../panel/asus,z00t-tm5p5-nt35596.yaml|  56 +++
 drivers/gpu/drm/panel/Kconfig |  10 +
 drivers/gpu/drm/panel/Makefile|   1 +
 .../drm/panel/panel-asus-z00t-tm5p5-n35596.c  | 367 ++
 4 files changed, 434 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/display/panel/asus,z00t-tm5p5-nt35596.yaml
 create mode 100644 drivers/gpu/drm/panel/panel-asus-z00t-tm5p5-n35596.c

-- 
2.26.2

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[PATCH 04/14] drm/radeon: remove comparison to bool in radeon_atpx_handler.c

2020-05-07 Thread Zheng Bin
Fixes coccicheck warning:

drivers/gpu/drm/radeon/radeon_atpx_handler.c:561:15-49: WARNING: Comparison to 
bool
drivers/gpu/drm/radeon/radeon_atpx_handler.c:571:15-49: WARNING: Comparison to 
bool

Reported-by: Hulk Robot 
Signed-off-by: Zheng Bin 
---
 drivers/gpu/drm/radeon/radeon_atpx_handler.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/radeon/radeon_atpx_handler.c 
b/drivers/gpu/drm/radeon/radeon_atpx_handler.c
index 6f93f54bf651..6131917322b4 100644
--- a/drivers/gpu/drm/radeon/radeon_atpx_handler.c
+++ b/drivers/gpu/drm/radeon/radeon_atpx_handler.c
@@ -558,7 +558,7 @@ static bool radeon_atpx_detect(void)
while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, pdev)) != 
NULL) {
vga_count++;

-   has_atpx |= (radeon_atpx_pci_probe_handle(pdev) == true);
+   has_atpx |= radeon_atpx_pci_probe_handle(pdev);

parent_pdev = pci_upstream_bridge(pdev);
d3_supported |= parent_pdev && parent_pdev->bridge_d3;
@@ -568,7 +568,7 @@ static bool radeon_atpx_detect(void)
while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_OTHER << 8, pdev)) != 
NULL) {
vga_count++;

-   has_atpx |= (radeon_atpx_pci_probe_handle(pdev) == true);
+   has_atpx |= radeon_atpx_pci_probe_handle(pdev);

parent_pdev = pci_upstream_bridge(pdev);
d3_supported |= parent_pdev && parent_pdev->bridge_d3;
--
2.26.0.106.g9fadedd

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[PATCH 11/14] drm/radeon: remove comparison to bool in rs690.c

2020-05-07 Thread Zheng Bin
Fixes coccicheck warning:

drivers/gpu/drm/radeon/rs690.c:190:6-35: WARNING: Comparison to bool
drivers/gpu/drm/radeon/rs690.c:844:5-37: WARNING: Comparison to bool

Reported-by: Hulk Robot 
Signed-off-by: Zheng Bin 
---
 drivers/gpu/drm/radeon/rs690.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/radeon/rs690.c b/drivers/gpu/drm/radeon/rs690.c
index c296f94f9700..ddc3bfbb557c 100644
--- a/drivers/gpu/drm/radeon/rs690.c
+++ b/drivers/gpu/drm/radeon/rs690.c
@@ -187,7 +187,8 @@ static void rs690_mc_init(struct radeon_device *rdev)
/* FastFB shall be used with UMA memory. Here it is simply 
disabled when sideport
 * memory is present.
 */
-   if (rdev->mc.igp_sideport_enabled == false && radeon_fastfb == 
1) {
+   if (!rdev->mc.igp_sideport_enabled &&
+   radeon_fastfb == 1) {
DRM_INFO("Direct mapping: aper base at 0x%llx, replaced 
by direct mapping base 0x%llx.\n",
(unsigned long long)rdev->mc.aper_base, 
k8_addr);
rdev->mc.aper_base = (resource_size_t)k8_addr;
--
2.26.0.106.g9fadedd

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Re: [PATCH hmm v2 5/5] mm/hmm: remove the customizable pfn format from hmm_range_fault

2020-05-07 Thread Jason Gunthorpe
On Mon, May 04, 2020 at 06:30:00PM -0700, John Hubbard wrote:
> On 2020-05-01 11:20, Jason Gunthorpe wrote:
> > From: Jason Gunthorpe 
> > 
> > Presumably the intent here was that hmm_range_fault() could put the data
> > into some HW specific format and thus avoid some work. However, nothing
> > actually does that, and it isn't clear how anything actually could do that
> > as hmm_range_fault() provides CPU addresses which must be DMA mapped.
> > 
> > Perhaps there is some special HW that does not need DMA mapping, but we
> > don't have any examples of this, and the theoretical performance win of
> > avoiding an extra scan over the pfns array doesn't seem worth the
> > complexity. Plus pfns needs to be scanned anyhow to sort out any
> > DEVICE_PRIVATE pages.
> > 
> > This version replaces the uint64_t with an usigned long containing a pfn
> > and fixed flags. On input flags is filled with the HMM_PFN_REQ_* values,
> > on successful output it is filled with HMM_PFN_* values, describing the
> > state of the pages.
> > 
> 
> Just some minor stuff below. I wasn't able to spot any errors in the code,
> though, so these are just documentation nits.
> 
> 
> ...
> 
> > 
> > diff --git a/Documentation/vm/hmm.rst b/Documentation/vm/hmm.rst
> > index 9924f2caa0184c..c9f2329113a47f 100644
> > +++ b/Documentation/vm/hmm.rst
> > @@ -185,9 +185,6 @@ The usage pattern is::
> > range.start = ...;
> > range.end = ...;
> > range.pfns = ...;
> 
> That should be:
> 
>   range.hmm_pfns = ...;

Yep

> 
> > -  range.flags = ...;
> > -  range.values = ...;
> > -  range.pfn_shift = ...;
> > if (!mmget_not_zero(interval_sub->notifier.mm))
> > return -EFAULT;
> > @@ -229,15 +226,10 @@ The hmm_range struct has 2 fields, default_flags and 
> > pfn_flags_mask, that specif
> >   fault or snapshot policy for the whole range instead of having to set them
> >   for each entry in the pfns array.
> > -For instance, if the device flags for range.flags are::
> > +For instance if the device driver wants pages for a range with at least 
> > read
> > +permission, it sets::
> > -range.flags[HMM_PFN_VALID] = (1 << 63);
> > -range.flags[HMM_PFN_WRITE] = (1 << 62);
> > -
> > -and the device driver wants pages for a range with at least read 
> > permission,
> > -it sets::
> > -
> > -range->default_flags = (1 << 63);
> > +range->default_flags = HMM_PFN_REQ_FAULT;
> >   range->pfn_flags_mask = 0;
> >   and calls hmm_range_fault() as described above. This will fill fault all 
> > pages
> > @@ -246,18 +238,18 @@ in the range with at least read permission.
> >   Now let's say the driver wants to do the same except for one page in the 
> > range for
> >   which it wants to have write permission. Now driver set::
> > -range->default_flags = (1 << 63);
> > -range->pfn_flags_mask = (1 << 62);
> > -range->pfns[index_of_write] = (1 << 62);
> > +range->default_flags = HMM_PFN_REQ_FAULT;
> > +range->pfn_flags_mask = HMM_PFN_REQ_WRITE;
> > +range->pfns[index_of_write] = HMM_PFN_REQ_WRITE;
> 
> 
> All these choices for _WRITE behavior make it slightly confusing. I mean, it's
> better than it was, but there are default flags, a mask, and an index as well,
> and it looks like maybe we have a little more power and flexibility than
> desirable? Nouveau for example is now just setting the mask only:

The example is showing how to fault all pages but request write for
only certain pages, ie it shows how to use default_flags and pfn_flags
together in probably the only way that could make any sense

> > @@ -542,12 +564,15 @@ static int nouveau_range_fault(struct nouveau_svmm 
> > *svmm,
> > return -EBUSY;
> > range.notifier_seq = mmu_interval_read_begin(range.notifier);
> > -   range.default_flags = 0;
> > -   range.pfn_flags_mask = -1UL;
> > down_read(&mm->mmap_sem);
> > ret = hmm_range_fault(&range);
> > up_read(&mm->mmap_sem);
> > if (ret) {
> > +   /*
> > +* FIXME: the input PFN_REQ flags are destroyed on
> > +* -EBUSY, we need to regenerate them, also for the
> > +* other continue below
> > +*/
> 
> How serious is this FIXME? It seems like we could get stuck in a loop here,
> if we're not issuing a new REQ, right?

Serious enough someone should fix it and not copy it into other
drivers..
 
> > if (ret == -EBUSY)
> > continue;
> > return ret;
> > @@ -562,7 +587,7 @@ static int nouveau_range_fault(struct nouveau_svmm 
> > *svmm,
> > break;
> > }
> > -   nouveau_dmem_convert_pfn(drm, &range);
> > +   nouveau_hmm_convert_pfn(drm, &range, ioctl_addr);
> > svmm->vmm->vmm.object.client->super = true;
> > ret = nvif_object_ioctl(&svmm->vmm->vmm.object, data, size, NULL);
> > @@ -589,6 +614,7 @@

[PATCH 02/14] drm/radeon: remove comparison to bool in ci_dpm.c

2020-05-07 Thread Zheng Bin
Fixes coccicheck warning:

drivers/gpu/drm/radeon/ci_dpm.c:814:5-26: WARNING: Comparison to bool
drivers/gpu/drm/radeon/ci_dpm.c:2916:6-21: WARNING: Comparison to bool

Reported-by: Hulk Robot 
Signed-off-by: Zheng Bin 
---
 drivers/gpu/drm/radeon/ci_dpm.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/radeon/ci_dpm.c b/drivers/gpu/drm/radeon/ci_dpm.c
index 134aa2b01f90..c77ca911a8b6 100644
--- a/drivers/gpu/drm/radeon/ci_dpm.c
+++ b/drivers/gpu/drm/radeon/ci_dpm.c
@@ -811,7 +811,7 @@ static void ci_apply_state_adjust_rules(struct 
radeon_device *rdev,
else
max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc;

-   if (rdev->pm.dpm.ac_power == false) {
+   if (!rdev->pm.dpm.ac_power) {
for (i = 0; i < ps->performance_level_count; i++) {
if (ps->performance_levels[i].mclk > max_limits->mclk)
ps->performance_levels[i].mclk = 
max_limits->mclk;
@@ -2913,7 +2913,7 @@ static int ci_populate_single_memory_level(struct 
radeon_device *rdev,

if (pi->mclk_stutter_mode_threshold &&
(memory_clock <= pi->mclk_stutter_mode_threshold) &&
-   (pi->uvd_enabled == false) &&
+   !pi->uvd_enabled &&
(RREG32(DPG_PIPE_STUTTER_CONTROL) & STUTTER_ENABLE) &&
(rdev->pm.dpm.new_active_crtc_count <= 2))
memory_level->StutterEnable = true;
--
2.26.0.106.g9fadedd

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Re:[PATCH] drm/exynos: make pointer to const data const type

2020-05-07 Thread Bernard


From: Bernard Zhao 
Date: 2020-04-26 17:01:42
To:  Inki Dae ,Joonyoung Shim 
,Seung-Woo Kim ,Kyungmin Park 
,David Airlie ,Daniel Vetter 
,Kukjin Kim ,Krzysztof Kozlowski 
,dri-devel@lists.freedesktop.org,linux-arm-ker...@lists.infradead.org,linux-samsung-...@vger.kernel.org,linux-ker...@vger.kernel.org
Cc:  opensource.ker...@vivo.com,Bernard Zhao 
Subject: [PATCH] drm/exynos: make pointer to const data const type>Maybe keep 
pointer which points to global const string data
>in const type is better, make sure not change const data.
>
>Signed-off-by: Bernard Zhao 
>---
> drivers/gpu/drm/exynos/exynos_drm_dsi.c | 2 +-
> drivers/gpu/drm/exynos/exynos_drm_mic.c | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
>diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c 
>b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
>index e080aa92338c..f60d99c85ac9 100644
>--- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c
>+++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
>@@ -211,7 +211,7 @@
> 
> #define OLD_SCLK_MIPI_CLK_NAME "pll_clk"
> 
>-static char *clk_names[5] = { "bus_clk", "sclk_mipi",
>+static const char *const clk_names[5] = { "bus_clk", "sclk_mipi",
>   "phyclk_mipidphy0_bitclkdiv8", "phyclk_mipidphy0_rxclkesc0",
>   "sclk_rgb_vclk_to_dsim0" };
> 
>diff --git a/drivers/gpu/drm/exynos/exynos_drm_mic.c 
>b/drivers/gpu/drm/exynos/exynos_drm_mic.c
>index f41d75923557..a86abc173605 100644
>--- a/drivers/gpu/drm/exynos/exynos_drm_mic.c
>+++ b/drivers/gpu/drm/exynos/exynos_drm_mic.c
>@@ -88,7 +88,7 @@
> 
> #define MIC_BS_SIZE_2D(x) ((x) & 0x3fff)
> 
>-static char *clk_names[] = { "pclk_mic0", "sclk_rgb_vclk_to_mic0" };
>+static const char *const clk_names[] = { "pclk_mic0", "sclk_rgb_vclk_to_mic0" 
>};
> #define NUM_CLKS  ARRAY_SIZE(clk_names)
> static DEFINE_MUTEX(mic_mutex);
> 
>-- 
>2.26.2
>


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[PATCH -next] drm/ast: Make ast_primary_plane_helper_atomic_update static

2020-05-07 Thread Samuel Zou
Fix the following sparse warning:

drivers/gpu/drm/ast/ast_mode.c:564:6: warning:
symbol 'ast_primary_plane_helper_atomic_update'
was not declared. Should it be static?

Reported-by: Hulk Robot 
Signed-off-by: Samuel Zou 
---
 drivers/gpu/drm/ast/ast_mode.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/ast/ast_mode.c b/drivers/gpu/drm/ast/ast_mode.c
index 7062bcd..4ddf770 100644
--- a/drivers/gpu/drm/ast/ast_mode.c
+++ b/drivers/gpu/drm/ast/ast_mode.c
@@ -561,8 +561,9 @@ static int ast_primary_plane_helper_atomic_check(struct 
drm_plane *plane,
return 0;
 }
 
-void ast_primary_plane_helper_atomic_update(struct drm_plane *plane,
-   struct drm_plane_state *old_state)
+static void
+ast_primary_plane_helper_atomic_update(struct drm_plane *plane,
+  struct drm_plane_state *old_state)
 {
struct ast_private *ast = plane->dev->dev_private;
struct drm_plane_state *state = plane->state;
-- 
2.6.2

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Re:Re: Re: [PATCH] drm/mediatek: cleanup coding style in mediatek a bit

2020-05-07 Thread Bernard


发件人:Chun-Kuang Hu 
发送日期:2020-04-30 23:50:38
收件人:Bernard 
抄送人:Chun-Kuang Hu ,Philipp Zabel 
,opensource.ker...@vivo.com,David Airlie 
,linux-kernel ,DRI Development 
,"moderated list:ARM/Mediatek SoC support" 
,Daniel Vetter ,Matthias 
Brugger ,Linux ARM 

主题:Re: Re: [PATCH] drm/mediatek: cleanup coding style in mediatek a bit>Hi, 
Bernard:
>
>Bernard  於 2020年4月30日 週四 下午2:32寫道:
>>
>>
>>
>> 发件人:Chun-Kuang Hu 
>> 发送日期:2020-04-29 22:22:50
>> 收件人:Bernard Zhao 
>> 抄送人:Chun-Kuang Hu ,Philipp Zabel 
>> ,David Airlie ,Daniel Vetter 
>> ,Matthias Brugger ,DRI Development 
>> ,Linux ARM 
>> ,"moderated list:ARM/Mediatek SoC 
>> support" ,linux-kernel 
>> ,opensource.ker...@vivo.com
>> 主题:Re: [PATCH] drm/mediatek: cleanup coding style in mediatek a bit>Hi, 
>> Bernard:
>> >
>> >Bernard Zhao  於 2020年4月27日 週一 下午3:53寫道:
>> >>
>> >> This code change is to make code bit more readable.
>> >> Optimise array size align to HDMI macro define.
>> >> Add check if len is overange.
>> >
>> >One patch should just do one thing, but this do three things.
>> >So break this into three patches.
>> >
>> >Regards,
>> >Chun-Kuang.
>>
>> Hi
>> This optimization is mainly to make the code a bit readable.
>> These modifications are related, main in several related function calls in 
>> the same file.
>> I was a bit confused that if it is really necessary to change to three 
>> separate patch submissions?
>>
>> Regards
>> Bernard
>>
>> >>
>> >> Signed-off-by: Bernard Zhao 
>> >> ---
>> >>  drivers/gpu/drm/mediatek/mtk_hdmi.c | 22 +++---
>> >>  1 file changed, 11 insertions(+), 11 deletions(-)
>> >>
>> >> diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi.c 
>> >> b/drivers/gpu/drm/mediatek/mtk_hdmi.c
>> >> index ff43a3d80410..40fb5154ed5d 100644
>> >> --- a/drivers/gpu/drm/mediatek/mtk_hdmi.c
>> >> +++ b/drivers/gpu/drm/mediatek/mtk_hdmi.c
>> >> @@ -311,15 +311,15 @@ static void mtk_hdmi_hw_send_info_frame(struct 
>> >> mtk_hdmi *hdmi, u8 *buffer,
>> >> u8 checksum;
>> >> int ctrl_frame_en = 0;
>> >>
>> >> -   frame_type = *buffer;
>> >> -   buffer += 1;
>> >> -   frame_ver = *buffer;
>> >> -   buffer += 1;
>> >> -   frame_len = *buffer;
>> >> -   buffer += 1;
>> >> -   checksum = *buffer;
>> >> -   buffer += 1;
>> >> +   frame_type = *buffer++;
>> >> +   frame_ver = *buffer++;
>> >> +   frame_len = *buffer++;
>> >> +   checksum = *buffer++;
>
>This part looks like cleanup, so keep in this patch.
>
>> >> frame_data = buffer;
>> >> +   if ((frame_len + HDMI_INFOFRAME_HEADER_SIZE) > len) {
>> >> +   dev_err(hdmi->dev, "Wrong frame len: %d\n", frame_len;
>> >> +   return;
>
>This is error checking, not cleanup the coding style, so move this to
>another patch.
>
>> >> +   }
>> >>
>> >> dev_dbg(hdmi->dev,
>> >> 
>> >> "frame_type:0x%x,frame_ver:0x%x,frame_len:0x%x,checksum:0x%x\n",
>> >> @@ -982,7 +982,7 @@ static int mtk_hdmi_setup_avi_infoframe(struct 
>> >> mtk_hdmi *hdmi,
>> >> struct drm_display_mode *mode)
>> >>  {
>> >> struct hdmi_avi_infoframe frame;
>> >> -   u8 buffer[17];
>> >> +   u8 buffer[HDMI_INFOFRAME_HEADER_SIZE + HDMI_AVI_INFOFRAME_SIZE];
>
>This is to symbolize the number, symbolization is more than cleanup.
>
>Regards,
>Chun-Kuang.
>

Hi
Sure, I get the picture, i will resubmit, thank you!

Regards,
Bernard

>> >> ssize_t err;
>> >>
>> >> err = drm_hdmi_avi_infoframe_from_display_mode(&frame,
>> >> @@ -1008,7 +1008,7 @@ static int mtk_hdmi_setup_spd_infoframe(struct 
>> >> mtk_hdmi *hdmi,
>> >> const char *product)
>> >>  {
>> >> struct hdmi_spd_infoframe frame;
>> >> -   u8 buffer[29];
>> >> +   u8 buffer[HDMI_INFOFRAME_HEADER_SIZE + HDMI_SPD_INFOFRAME_SIZE];
>> >> ssize_t err;
>> >>
>> >> err = hdmi_spd_infoframe_init(&frame, vendor, product);
>> >> @@ -1031,7 +1031,7 @@ static int mtk_hdmi_setup_spd_infoframe(struct 
>> >> mtk_hdmi *hdmi,
>> >>  static int mtk_hdmi_setup_audio_infoframe(struct mtk_hdmi *hdmi)
>> >>  {
>> >> struct hdmi_audio_infoframe frame;
>> >> -   u8 buffer[14];
>> >> +   u8 buffer[HDMI_INFOFRAME_HEADER_SIZE + HDMI_AUDIO_INFOFRAME_SIZE];
>> >> ssize_t err;
>> >>
>> >> err = hdmi_audio_infoframe_init(&frame);
>> >> --
>> >> 2.26.2
>> >>
>> >>
>> >> ___
>> >> Linux-mediatek mailing list
>> >> linux-media...@lists.infradead.org
>> >> http://lists.infradead.org/mailman/listinfo/linux-mediatek
>>
>>
>> ___
>> Linux-mediatek mailing list
>> linux-media...@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-mediatek


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Re: [PATCH hmm v2 0/5] Adjust hmm_range_fault() API

2020-05-07 Thread Jason Gunthorpe
On Fri, May 01, 2020 at 03:20:43PM -0300, Jason Gunthorpe wrote:
> From: Jason Gunthorpe 
> 
> The API is a bit complicated for the uses we actually have, and
> disucssions for simplifying have come up a number of times.
> 
> This small series removes the customizable pfn format and simplifies the
> return code of hmm_range_fault()
> 
> All the drivers are adjusted to process in the simplified format.
> I would appreciated tested-by's for the two drivers, thanks!
> 
> v2:
>  - Move call chain to commit message
>  - Fix typo of HMM_PFN_REQ_FAULT
>  - Move nouveau_hmm_convert_pfn() to nouveau_svm.c
>  - Add acks and tested-bys
> v1: 
> https://lore.kernel.org/r/0-v1-4eb72686de3c+5062-hmm_no_flags_...@mellanox.com
> 
> Cc: Christoph Hellwig 
> Cc: John Hubbard 
> Cc: Jérôme Glisse 
> Cc: Ben Skeggs 
> To: Ralph Campbell 
> Cc: nouv...@lists.freedesktop.org
> Cc: Niranjana Vishwanathapura 
> Cc: intel-...@lists.freedesktop.org
> Cc: "Kuehling, Felix" 
> Cc: Alex Deucher 
> Cc: "Christian König" 
> Cc: "David (ChunMing) Zhou" 
> Cc: amd-...@lists.freedesktop.org
> Cc: dri-devel@lists.freedesktop.org
> Cc: linux-ker...@vger.kernel.org
> Cc: "Yang, Philip" 
> To: linux...@kvack.org
> 
> Jason Gunthorpe (5):
>   mm/hmm: make CONFIG_DEVICE_PRIVATE into a select
>   mm/hmm: make hmm_range_fault return 0 or -1
>   drm/amdgpu: remove dead code after hmm_range_fault()
>   mm/hmm: remove HMM_PFN_SPECIAL
>   mm/hmm: remove the customizable pfn format from hmm_range_fault

Applied to hmm.git, thanks

Jason
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[PATCH 10/14] drm/radeon: remove comparison to bool in rs600.c

2020-05-07 Thread Zheng Bin
Fixes coccicheck warning:

drivers/gpu/drm/radeon/rs600.c:1132:5-37: WARNING: Comparison to bool

Reported-by: Hulk Robot 
Signed-off-by: Zheng Bin 
---
 drivers/gpu/drm/radeon/rs600.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c
index c88b4906f7bc..a7ff0609a3eb 100644
--- a/drivers/gpu/drm/radeon/rs600.c
+++ b/drivers/gpu/drm/radeon/rs600.c
@@ -1129,7 +1129,7 @@ int rs600_init(struct radeon_device *rdev)
RREG32(R_0007C0_CP_STAT));
}
/* check if cards are posted or not */
-   if (radeon_boot_test_post_card(rdev) == false)
+   if (!radeon_boot_test_post_card(rdev))
return -EINVAL;

/* Initialize clocks */
--
2.26.0.106.g9fadedd

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[v4 PATCH 2/2] dt-bindings: display: Document ASUS Z00T TM5P5 NT35596 panel compatible

2020-05-07 Thread Konrad Dybcio
Signed-off-by: Konrad Dybcio 
---
 .../panel/asus,z00t-tm5p5-nt35596.yaml| 56 +++
 1 file changed, 56 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/display/panel/asus,z00t-tm5p5-nt35596.yaml

diff --git 
a/Documentation/devicetree/bindings/display/panel/asus,z00t-tm5p5-nt35596.yaml 
b/Documentation/devicetree/bindings/display/panel/asus,z00t-tm5p5-nt35596.yaml
new file mode 100644
index 0..083d2b9d0c69a
--- /dev/null
+++ 
b/Documentation/devicetree/bindings/display/panel/asus,z00t-tm5p5-nt35596.yaml
@@ -0,0 +1,56 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/panel/asus,z00t-tm5p5-nt35596.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ASUS Z00T TM5P5 NT35596 5.5" 1080×1920 LCD Panel
+
+maintainers:
+  - Konrad Dybcio 
+
+description: |+
+  This panel seems to only be found in the Asus Z00T
+  smartphone and we have no straightforward way of
+  actually getting the correct model number,
+  as no schematics are released publicly.
+
+allOf:
+  - $ref: panel-common.yaml#
+
+properties:
+  compatible:
+const: asus,z00t-tm5p5-n35596
+  reg: true
+  reset-gpios: true
+  vdd-supply:
+ description: core voltage supply
+  vddio-supply:
+ description: vddio supply
+
+required:
+  - compatible
+  - reg
+  - vdd-supply
+  - vddio-supply
+  - reset-gpios
+
+additionalProperties: false
+
+examples:
+  - |
+#include 
+
+dsi {
+#address-cells = <1>;
+#size-cells = <0>;
+panel@0 {
+reg = <0>;
+
+compatible = "asus,z00t-tm5p5-n35596";
+
+vdd-supply = <&pm8916_l8>;
+vddio-supply = <&pm8916_l6>;
+reset-gpios = <&msmgpio 25 GPIO_ACTIVE_HIGH>;
+};
+};
-- 
2.26.2

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[PATCH 05/14] drm/radeon: remove comparison to bool in radeon_object.c

2020-05-07 Thread Zheng Bin
Fixes coccicheck warning:

drivers/gpu/drm/radeon/radeon_object.c:427:6-35: WARNING: Comparison to bool

Reported-by: Hulk Robot 
Signed-off-by: Zheng Bin 
---
 drivers/gpu/drm/radeon/radeon_object.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/radeon/radeon_object.c 
b/drivers/gpu/drm/radeon/radeon_object.c
index 140d94cc080d..f06c5e9dc72c 100644
--- a/drivers/gpu/drm/radeon/radeon_object.c
+++ b/drivers/gpu/drm/radeon/radeon_object.c
@@ -424,7 +424,7 @@ int radeon_bo_evict_vram(struct radeon_device *rdev)
/* late 2.6.33 fix IGP hibernate - we need pm ops to do this correct */
 #ifndef CONFIG_HIBERNATION
if (rdev->flags & RADEON_IS_IGP) {
-   if (rdev->mc.igp_sideport_enabled == false)
+   if (!rdev->mc.igp_sideport_enabled)
/* Useless to evict on IGP chips */
return 0;
}
--
2.26.0.106.g9fadedd

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[PATCH V2] video: fbdev: w100fb: Fix a potential double free.

2020-05-07 Thread Christophe JAILLET
Some memory is vmalloc'ed in the 'w100fb_save_vidmem' function and freed in
the 'w100fb_restore_vidmem' function. (these functions are called
respectively from the 'suspend' and the 'resume' functions)

However, it is also freed in the 'remove' function.

In order to avoid a potential double free, set the corresponding pointer
to NULL once freed in the 'w100fb_restore_vidmem' function.

Fixes: aac51f09d96a ("[PATCH] w100fb: Rewrite for platform independence")
Cc: Richard Purdie 
Cc: Antonino Daplas 
Cc: Bartlomiej Zolnierkiewicz 
Cc:  # v2.6.14+
Signed-off-by: Christophe JAILLET 
---
v2: - Add Cc: tags
- Reword the commit message to give the names of the functions that
  allocate and free the memory. These functions are called from the
  suspend and resume function.
---
 drivers/video/fbdev/w100fb.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/video/fbdev/w100fb.c b/drivers/video/fbdev/w100fb.c
index 2d6e2738b792..d96ab28f8ce4 100644
--- a/drivers/video/fbdev/w100fb.c
+++ b/drivers/video/fbdev/w100fb.c
@@ -588,6 +588,7 @@ static void w100fb_restore_vidmem(struct w100fb_par *par)
memsize=par->mach->mem->size;
memcpy_toio(remapped_fbuf + (W100_FB_BASE-MEM_WINDOW_BASE), 
par->saved_extmem, memsize);
vfree(par->saved_extmem);
+   par->saved_extmem = NULL;
}
if (par->saved_intmem) {
memsize=MEM_INT_SIZE;
@@ -596,6 +597,7 @@ static void w100fb_restore_vidmem(struct w100fb_par *par)
else
memcpy_toio(remapped_fbuf + 
(W100_FB_BASE-MEM_WINDOW_BASE), par->saved_intmem, memsize);
vfree(par->saved_intmem);
+   par->saved_intmem = NULL;
}
 }
 
-- 
2.25.1

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[PATCH v10 1/2] dt-bindings: drm/bridge: anx7625: MIPI to DP transmitter binding

2020-05-07 Thread Xin Ji
The ANX7625 is an ultra-low power 4K Mobile HD Transmitter designed
for portable device. It converts MIPI to DisplayPort 1.3 4K.

You can add support to your board with binding.

Example:
anx7625_bridge: encoder@58 {
compatible = "analogix,anx7625";
reg = <0x58>;
status = "okay";
enable-gpios = <&pio 45 GPIO_ACTIVE_HIGH>;
reset-gpios = <&pio 73 GPIO_ACTIVE_HIGH>;

ports {
#address-cells = <1>;
#size-cells = <0>;

mipi2dp_bridge_in: port@0 {
reg = <0>;
anx7625_in: endpoint {
remote-endpoint = <&mipi_dsi>;
};
};

mipi2dp_bridge_out: port@1 {
reg = <1>;
anx7625_out: endpoint {
remote-endpoint = <&panel_in>;
};
};
};
};

Signed-off-by: Xin Ji 
---
 .../bindings/display/bridge/analogix,anx7625.yaml  | 98 ++
 1 file changed, 98 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml

diff --git 
a/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml 
b/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml
new file mode 100644
index 000..6e54176
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml
@@ -0,0 +1,98 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+# Copyright 2019 Analogix Semiconductor, Inc.
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/display/bridge/analogix,anx7625.yaml#";
+$schema: "http://devicetree.org/meta-schemas/core.yaml#";
+
+title: Analogix ANX7625 SlimPort (4K Mobile HD Transmitter)
+
+maintainers:
+  - Xin Ji 
+
+description: |
+  The ANX7625 is an ultra-low power 4K Mobile HD Transmitter
+  designed for portable devices.
+
+properties:
+  "#address-cells": true
+  "#size-cells": true
+
+  compatible:
+items:
+  - const: analogix,anx7625
+
+  reg:
+maxItems: 1
+
+  interrupts:
+description: used for interrupt pin B8.
+maxItems: 1
+
+  enable-gpios:
+description: used for power on chip control, POWER_EN pin D2.
+maxItems: 1
+
+  reset-gpios:
+description: used for reset chip control, RESET_N pin B7.
+maxItems: 1
+
+  ports:
+type: object
+
+properties:
+  port@0:
+type: object
+description:
+  Video port for MIPI DSI input.
+
+  port@1:
+type: object
+description:
+  Video port for panel or connector.
+
+required:
+- port@0
+- port@1
+
+required:
+  - compatible
+  - reg
+  - ports
+
+additionalProperties: false
+
+examples:
+  - |
+#include 
+
+i2c0 {
+#address-cells = <1>;
+#size-cells = <0>;
+
+anx7625_bridge: encoder@58 {
+compatible = "analogix,anx7625";
+reg = <0x58>;
+enable-gpios = <&pio 45 GPIO_ACTIVE_HIGH>;
+reset-gpios = <&pio 73 GPIO_ACTIVE_HIGH>;
+
+ports {
+#address-cells = <1>;
+#size-cells = <0>;
+
+mipi2dp_bridge_in: port@0 {
+reg = <0>;
+anx7625_in: endpoint {
+remote-endpoint = <&mipi_dsi>;
+};
+};
+
+mipi2dp_bridge_out: port@1 {
+reg = <1>;
+anx7625_out: endpoint {
+remote-endpoint = <&panel_in>;
+};
+};
+};
+};
+};
-- 
2.7.4

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[PATCH] drm/exynos: remove no need devm_kfree in probe [re-send, welcome any comments]

2020-05-07 Thread Bernard
Remove no need devm_kfree in probe.
The change is to make the code a bit more readable

Signed-off-by: Bernard Zhao 
---
 drivers/gpu/drm/exynos/exynos_drm_dpi.c | 10 +++---
 1 file changed, 3 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_dpi.c 
b/drivers/gpu/drm/exynos/exynos_drm_dpi.c
index 43fa0f26c052..e06f7d7a6695 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_dpi.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_dpi.c
@@ -181,10 +181,8 @@ static int exynos_dpi_parse_dt(struct exynos_dpi *ctx)
return -ENOMEM;
 
ret = of_get_videomode(dn, vm, 0);
-   if (ret < 0) {
-   devm_kfree(dev, vm);
+   if (ret < 0)
return ret;
-   }
 
ctx->vm = vm;
 
@@ -233,10 +231,8 @@ struct drm_encoder *exynos_dpi_probe(struct device *dev)
ctx->dev = dev;
 
ret = exynos_dpi_parse_dt(ctx);
-   if (ret < 0) {
-   devm_kfree(dev, ctx);
-   return NULL;
-   }
+   if (ret < 0)
+   return ERR_PTR(ret);
 
if (ctx->panel_node) {
ctx->panel = of_drm_find_panel(ctx->panel_node);
-- 
2.26.2


[re-send, welcome any comments]
Regards,
Bernard




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[PATCH 07/14] drm/radeon: remove comparison to bool in r100.c

2020-05-07 Thread Zheng Bin
Fixes coccicheck warning:

drivers/gpu/drm/radeon/r100.c:4065:5-37: WARNING: Comparison to bool

Reported-by: Hulk Robot 
Signed-off-by: Zheng Bin 
---
 drivers/gpu/drm/radeon/r100.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index 24c8db673931..298a9c22074a 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -4062,7 +4062,7 @@ int r100_init(struct radeon_device *rdev)
RREG32(R_0007C0_CP_STAT));
}
/* check if cards are posted or not */
-   if (radeon_boot_test_post_card(rdev) == false)
+   if (!radeon_boot_test_post_card(rdev))
return -EINVAL;
/* Set asic errata */
r100_errata(rdev);
--
2.26.0.106.g9fadedd

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Re:[PATCH] drm/meson: pm resume add return errno branch

2020-05-07 Thread Bernard


From: Bernard Zhao 
Date: 2020-04-28 21:17:47
To:  Neil Armstrong ,David Airlie 
,Daniel Vetter ,Kevin Hilman 
,dri-devel@lists.freedesktop.org,linux-amlo...@lists.infradead.org,linux-arm-ker...@lists.infradead.org,linux-ker...@vger.kernel.org
Cc:  opensource.ker...@vivo.com,Bernard Zhao 
Subject: [PATCH] drm/meson: pm resume add return errno branch>pm_resump api did 
not handle drm_mode_config_helper_resume error.
>This change add handle to return drm_mode_config_helper_resume`s
>error number. This code logic is aligned with api pm_suspend.
>After this change, the code maybe a bit readable.
>
>Signed-off-by: Bernard Zhao 
>---
> drivers/gpu/drm/meson/meson_drv.c | 4 +---
> 1 file changed, 1 insertion(+), 3 deletions(-)
>
>diff --git a/drivers/gpu/drm/meson/meson_drv.c 
>b/drivers/gpu/drm/meson/meson_drv.c
>index b5f5eb7b4bb9..8c2e1b47e81a 100644
>--- a/drivers/gpu/drm/meson/meson_drv.c
>+++ b/drivers/gpu/drm/meson/meson_drv.c
>@@ -412,9 +412,7 @@ static int __maybe_unused meson_drv_pm_resume(struct 
>device *dev)
>   if (priv->afbcd.ops)
>   priv->afbcd.ops->init(priv);
> 
>-  drm_mode_config_helper_resume(priv->drm);
>-
>-  return 0;
>+  return drm_mode_config_helper_resume(priv->drm);
> }
> 
> static int compare_of(struct device *dev, void *data)
>-- 
>2.26.2
>


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Re: [PATCH hmm v2 5/5] mm/hmm: remove the customizable pfn format from hmm_range_fault

2020-05-07 Thread Jason Gunthorpe
On Fri, May 01, 2020 at 05:53:26PM -0700, Ralph Campbell wrote:
> > Acked-by: Felix Kuehling 
> > Tested-by: Ralph Campbell 
> > Signed-off-by: Jason Gunthorpe 
> > Signed-off-by: Christoph Hellwig 
> >   Documentation/vm/hmm.rst|  26 ++--
> >   drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c |  35 ++
> >   drivers/gpu/drm/nouveau/nouveau_dmem.c  |  27 +---
> >   drivers/gpu/drm/nouveau/nouveau_dmem.h  |   3 +-
> >   drivers/gpu/drm/nouveau/nouveau_svm.c   |  87 -
> >   include/linux/hmm.h |  99 ++-
> >   mm/hmm.c| 160 +++-
> >   7 files changed, 192 insertions(+), 245 deletions(-)
> > 
> 
> ...snip...
> 
> > +static void nouveau_hmm_convert_pfn(struct nouveau_drm *drm,
> > +   struct hmm_range *range, u64 *ioctl_addr)
> > +{
> > +   unsigned long i, npages;
> > +
> > +   /*
> > +* The ioctl_addr prepared here is passed through nvif_object_ioctl()
> > +* to an eventual DMA map in something like gp100_vmm_pgt_pfn()
> > +*
> > +* This is all just encoding the internal hmm reprensetation into a
> 
> s/reprensetation/representation/
> 
> Looks good and still tests OK with nouveau.

Got it, thanks

Jason
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[PATCH -next] drm/i2c/tda998x: Make tda998x_audio_digital_mute static

2020-05-07 Thread Samuel Zou
Fix the following sparse warning:

drivers/gpu/drm/i2c/tda998x_drv.c:1136:5: warning:
symbol 'tda998x_audio_digital_mute' was not declared. Should it be static?

Reported-by: Hulk Robot 
Signed-off-by: Samuel Zou 
---
 drivers/gpu/drm/i2c/tda998x_drv.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i2c/tda998x_drv.c 
b/drivers/gpu/drm/i2c/tda998x_drv.c
index 3c90d7a..9517f52 100644
--- a/drivers/gpu/drm/i2c/tda998x_drv.c
+++ b/drivers/gpu/drm/i2c/tda998x_drv.c
@@ -1133,7 +1133,8 @@ static void tda998x_audio_shutdown(struct device *dev, 
void *data)
mutex_unlock(&priv->audio_mutex);
 }
 
-int tda998x_audio_digital_mute(struct device *dev, void *data, bool enable)
+static int tda998x_audio_digital_mute(struct device *dev, void *data,
+ bool enable)
 {
struct tda998x_priv *priv = dev_get_drvdata(dev);
 
-- 
2.6.2

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[PATCH 12/14] drm/radeon: remove comparison to bool in rv6xx_dpm.c

2020-05-07 Thread Zheng Bin
Fixes coccicheck warning:

drivers/gpu/drm/radeon/rv6xx_dpm.c:1571:5-20: WARNING: Comparison to bool

Reported-by: Hulk Robot 
Signed-off-by: Zheng Bin 
---
 drivers/gpu/drm/radeon/rv6xx_dpm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/radeon/rv6xx_dpm.c 
b/drivers/gpu/drm/radeon/rv6xx_dpm.c
index 69d380fff22a..ebdb937730c2 100644
--- a/drivers/gpu/drm/radeon/rv6xx_dpm.c
+++ b/drivers/gpu/drm/radeon/rv6xx_dpm.c
@@ -1568,7 +1568,7 @@ int rv6xx_dpm_enable(struct radeon_device *rdev)
rv6xx_program_engine_speed_parameters(rdev);

rv6xx_enable_display_gap(rdev, true);
-   if (pi->display_gap == false)
+   if (!pi->display_gap)
rv6xx_enable_display_gap(rdev, false);

rv6xx_program_power_level_enter_state(rdev);
--
2.26.0.106.g9fadedd

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Re: [PATCH] dma-buf: fix use-after-free in dmabuffs_dname

2020-05-07 Thread Charan Teja Kalla

Thank you Greg for the reply.

On 5/5/2020 3:38 PM, Greg KH wrote:

On Tue, Apr 28, 2020 at 01:24:02PM +0530, Charan Teja Reddy wrote:

The following race occurs while accessing the dmabuf object exported as
file:
P1  P2
dma_buf_release()  dmabuffs_dname()
   [say lsof reading /proc//fd/]

   read dmabuf stored in dentry->fsdata
Free the dmabuf object
   Start accessing the dmabuf structure

In the above description, the dmabuf object freed in P1 is being
accessed from P2 which is resulting into the use-after-free. Below is
the dump stack reported.

Call Trace:
  kasan_report+0x12/0x20
  __asan_report_load8_noabort+0x14/0x20
  dmabuffs_dname+0x4f4/0x560
  tomoyo_realpath_from_path+0x165/0x660
  tomoyo_get_realpath
  tomoyo_check_open_permission+0x2a3/0x3e0
  tomoyo_file_open
  tomoyo_file_open+0xa9/0xd0
  security_file_open+0x71/0x300
  do_dentry_open+0x37a/0x1380
  vfs_open+0xa0/0xd0
  path_openat+0x12ee/0x3490
  do_filp_open+0x192/0x260
  do_sys_openat2+0x5eb/0x7e0
  do_sys_open+0xf2/0x180

Fixes: bb2bb90 ("dma-buf: add DMA_BUF_SET_NAME ioctls")

Nit, please read the documentation for how to do a Fixes: line properly,
you need more digits:
Fixes: bb2bb9030425 ("dma-buf: add DMA_BUF_SET_NAME ioctls")



Will update the patch



Reported-by:syzbot+3643a18836bce555b...@syzkaller.appspotmail.com
Signed-off-by: Charan Teja Reddy

Also, any reason you didn't include the other mailing lists that
get_maintainer.pl said to?



Really sorry for not sending to complete list. Added now.



And finally, no cc: stable in the s-o-b area for an issue that needs to
be backported to older kernels?



Will update the patch.





---
  drivers/dma-buf/dma-buf.c | 25 +++--
  include/linux/dma-buf.h   |  1 +
  2 files changed, 24 insertions(+), 2 deletions(-)

diff --git a/drivers/dma-buf/dma-buf.c b/drivers/dma-buf/dma-buf.c
index 570c923..069d8f78 100644
--- a/drivers/dma-buf/dma-buf.c
+++ b/drivers/dma-buf/dma-buf.c
@@ -25,6 +25,7 @@
  #include 
  #include 
  #include 
+#include 
  
  #include 

  #include 
@@ -38,18 +39,34 @@ struct dma_buf_list {
  
  static struct dma_buf_list db_list;
  
+static void dmabuf_dent_put(struct dma_buf *dmabuf)

+{
+   if (atomic_dec_and_test(&dmabuf->dent_count)) {
+   kfree(dmabuf->name);
+   kfree(dmabuf);
+   }

Why not just use a kref instead of an open-coded atomic value?



Kref approach looks cleaner. will update the patch accordingly.



+}
+
  static char *dmabuffs_dname(struct dentry *dentry, char *buffer, int buflen)
  {
struct dma_buf *dmabuf;
char name[DMA_BUF_NAME_LEN];
size_t ret = 0;
  
+	spin_lock(&dentry->d_lock);

dmabuf = dentry->d_fsdata;
+   if (!dmabuf || !atomic_add_unless(&dmabuf->dent_count, 1, 0)) {
+   spin_unlock(&dentry->d_lock);
+   goto out;

How can dmabuf not be valid here?

And isn't there already a usecount for the buffer?



dmabuf exported as file simply relies on that file's refcount, thus 
fput() releases the dmabuf.


We are storing the dmabuf in the dentry->d_fsdata but there is no 
binding between the dentry and the dmabuf. So, flow will be like


1) P1 calls fput(dmabuf_fd)

2) P2 trying to access the file information of P1.
    Eg: lsof command trying to list out the dmabuf_fd information using 
/proc//fd/dmabuf_fd


3) P1 calls the file->f_op->release(dmabuf_fd_file)(ends up in calling 
dma_buf_release()),   thus frees up the dmabuf buffer.


4) P2 access the dmabuf stored in the dentry->d_fsdata which was freed 
in step 3.


So we need to have some refcount mechanism to avoid the use-after-free 
in step 4.



+   }
+   spin_unlock(&dentry->d_lock);
dma_resv_lock(dmabuf->resv, NULL);
if (dmabuf->name)
ret = strlcpy(name, dmabuf->name, DMA_BUF_NAME_LEN);
dma_resv_unlock(dmabuf->resv);
+   dmabuf_dent_put(dmabuf);
  
+out:

return dynamic_dname(dentry, buffer, buflen, "/%s:%s",
 dentry->d_name.name, ret > 0 ? name : "");
  }
@@ -80,12 +97,16 @@ static int dma_buf_fs_init_context(struct fs_context *fc)
  static int dma_buf_release(struct inode *inode, struct file *file)
  {
struct dma_buf *dmabuf;
+   struct dentry *dentry = file->f_path.dentry;
  
  	if (!is_dma_buf_file(file))

return -EINVAL;
  
  	dmabuf = file->private_data;
  
+	spin_lock(&dentry->d_lock);

+   dentry->d_fsdata = NULL;
+   spin_unlock(&dentry->d_lock);
BUG_ON(dmabuf->vmapping_counter);
  
  	/*

@@ -108,8 +129,7 @@ static int dma_buf_release(struct inode *inode, struct file 
*file)
dma_resv_fini(dmabuf->resv);
  
  	module_put(dmabuf->owner);

-   kfree(dmabuf->name);
-   kfree(dmabuf);
+   dmabuf_dent_put(dmabuf);
return 0;
  }
  
@@ -548,6 +568,7 @@ struct dma_buf *dma_buf_export(con

[PATCH 08/14] drm/radeon: remove comparison to bool in r300.c

2020-05-07 Thread Zheng Bin
Fixes coccicheck warning:

drivers/gpu/drm/radeon/r300.c:1544:5-37: WARNING: Comparison to bool

Reported-by: Hulk Robot 
Signed-off-by: Zheng Bin 
---
 drivers/gpu/drm/radeon/r300.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c
index 3b7ead5be5bf..26448b6e97e6 100644
--- a/drivers/gpu/drm/radeon/r300.c
+++ b/drivers/gpu/drm/radeon/r300.c
@@ -1541,7 +1541,7 @@ int r300_init(struct radeon_device *rdev)
RREG32(R_0007C0_CP_STAT));
}
/* check if cards are posted or not */
-   if (radeon_boot_test_post_card(rdev) == false)
+   if (!radeon_boot_test_post_card(rdev))
return -EINVAL;
/* Set asic errata */
r300_errata(rdev);
--
2.26.0.106.g9fadedd

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[PATCH 01/14] drm/radeon: remove comparison to bool in btc_dpm.c

2020-05-07 Thread Zheng Bin
Fixes coccicheck warning:

drivers/gpu/drm/radeon/btc_dpm.c:2115:5-26: WARNING: Comparison to bool

Reported-by: Hulk Robot 
Signed-off-by: Zheng Bin 
---
 drivers/gpu/drm/radeon/btc_dpm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/radeon/btc_dpm.c b/drivers/gpu/drm/radeon/btc_dpm.c
index d1d8aaf8323c..60b32eba6f46 100644
--- a/drivers/gpu/drm/radeon/btc_dpm.c
+++ b/drivers/gpu/drm/radeon/btc_dpm.c
@@ -2112,7 +2112,7 @@ static void btc_apply_state_adjust_rules(struct 
radeon_device *rdev,
else
max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc;

-   if (rdev->pm.dpm.ac_power == false) {
+   if (!rdev->pm.dpm.ac_power) {
if (ps->high.mclk > max_limits->mclk)
ps->high.mclk = max_limits->mclk;
if (ps->high.sclk > max_limits->sclk)
--
2.26.0.106.g9fadedd

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Re: [RFC PATCH 4/4] arm64: dts: imx8mm: Add GPU nodes for 2D and 3D core using Etnaviv

2020-05-07 Thread Schrempf Frieder
On 03.05.20 16:49, Adam Ford wrote:
> On Thu, Apr 30, 2020 at 7:46 AM Schrempf Frieder
>  wrote:
>>
>> From: Frieder Schrempf 
>>
>> According to the documents, the i.MX8M-Mini features a GC320 and a
>> GCNanoUltra GPU core. Etnaviv detects them as:
>>
>>  etnaviv-gpu 3800.gpu: model: GC600, revision: 4653
>>  etnaviv-gpu 38008000.gpu: model: GC520, revision: 5341
>>
>> This seems to work fine more or less without any changes to the HWDB,
>> which still might be needed in the future to correct some features,
>> etc.
>>
>> Signed-off-by: Frieder Schrempf 
>> ---
> Since not everyone uses the 3D or 2D, would it make sense to mark them
> as disabled by default and let people who need the 3D and 2D enable
> them at their respective board files?

I would rather keep it the way it has been done for other SoCs. Looking 
at the i.MX6 devicetrees, they all seem to have the GPUs enabled by default.
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[PATCH v10 0/2] Add initial support for slimport anx7625

2020-05-07 Thread Xin Ji
Hi all,

The following series add support for the Slimport ANX7625 transmitter, a
ultra-low power Full-HD 4K MIPI to DP transmitter designed for portable device.


This is the v10 version, any mistakes, please let me know, I will fix it in
the next series.

Change history:
v10: Fix comments from Rob Herring, Daniel.
 - Fix dt_binding_check warning.
 - Update description.

v9: Fix comments from Sam, Nicolas, Daniel
 - Remove extcon interface.
 - Remove DPI support.
 - Fix dt_binding_check complains.
 - Code clean up and update description.

v8: Fix comments from Nicolas.
 - Fix several coding format.
 - Update description.

v7:
 - Fix critical timing(eg:odd hfp/hbp) in "mode_fixup" interface,
   enhance MIPI RX tolerance by setting register MIPI_DIGITAL_ADJ_1 to 0x3D.


Xin Ji (2):
  dt-bindings: drm/bridge: anx7625: MIPI to DP transmitter binding
  drm/bridge: anx7625: Add anx7625 MIPI DSI/DPI to DP bridge driver

 .../bindings/display/bridge/analogix,anx7625.yaml  |   98 +
 drivers/gpu/drm/bridge/Makefile|2 +-
 drivers/gpu/drm/bridge/analogix/Kconfig|8 +
 drivers/gpu/drm/bridge/analogix/Makefile   |1 +
 drivers/gpu/drm/bridge/analogix/anx7625.c  | 1961 
 drivers/gpu/drm/bridge/analogix/anx7625.h  |  397 
 6 files changed, 2466 insertions(+), 1 deletion(-)
 create mode 100644 
Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml
 create mode 100644 drivers/gpu/drm/bridge/analogix/anx7625.c
 create mode 100644 drivers/gpu/drm/bridge/analogix/anx7625.h

-- 
2.7.4

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[PULL] drm-misc-next

2020-05-07 Thread Thomas Zimmermann
Hi, Dave, Daniel,

this is the third pull request for drm-misc-next for what will become
v5.8. AFAICT the highlights are the new managed allocation for DRM device
structures; optimizations in drm_mm, and Lima got runtime PM support.

Best regards
Thomas

drm-misc-next-2020-05-07:
drm-misc-next for 5.8:

UAPI Changes:

Cross-subsystem Changes:

 * MAINTAINERS: restore alphabetical order; update cirrus driver
 * Dcomuentation: document visionix, chronteli, ite vendor prefices; update
  documentation for Chrontel CH7033, IT6505, IVO, BOE,
  Panasonic, Chunghwa, AUO bindings; convert dw_mipi_dsi.txt
  to YAML; remove todo item for drm_display_mode.hsync removal;

Core Changes:

 * drm: add devm_drm_dev_alloc() for managed allocations of drm_device;
use DRM_MODESET_LOCK_ALL_*() in mode-object code; remove
drm_display_mode.hsync; small cleanups of unused variables,
compiler warnings and static functions
 * drm/client: dual-lincensing: GPL-2.0 or MIT
 * drm/mm: optimize tree searches in rb_hole_addr()

Driver Changes:

 * drm/{many}: use devm_drm_dev_alloc(); don't use drm_device.dev_private
 * drm/ast: don't double-assign to drm_crtc_funcs.set_config; drop
drm_connector_register()
 * drm/bochs: drop drm_connector_register()
 * drm/bridge: add support for Chrontel ch7033; fix stack usage with
   old gccs; return error pointer in drm_panel_bridge_add()
 * drm/cirrus: Move to tiny
 * drm/dp_mst: don't use 2nd sideband tx slot; revert "Remove single tx
   msg restriction"
 * drm/lima: support runtime PM;
 * drm/meson: limit modes wrt chipset
 * drm/panel: add support for Visionox rm69299; fix clock on
  boe-tv101wum-n16; fix panel type for AUO G101EVN10;
  add support for Ivo M133NFW4 R0; add support for BOE
  NV133FHM-N61; add support for AUO G121EAN01.4, G156XTN01.0,
  G190EAN01
 * drm/pl111: improve vexpress init; fix module auto-loading
 * drm/stm: read number of endpoints from device tree
 * drm/vboxvideo: use managed PCI functions; drop DRM_MTRR_WC
 * drm/vkms: fix use-after-free in vkms_gem_create(); enable cursor
 support by default
 * fbdev: use boolean values in several drivers
 * fbdev/controlfb: fix COMPILE_TEST
 * fbdev/w100fb: fix double-free bug
The following changes since commit 776d58823a60c689816972b51100cb322a0834ce:

  dma-buf: Couple of documentation typo fixes (2020-04-21 14:37:51 +0200)

are available in the Git repository at:

  git://anongit.freedesktop.org/drm/drm-misc tags/drm-misc-next-2020-05-07

for you to fetch changes up to 0ea2ea42b31abc1141f2fd3911f952a97d401fcb:

  drm/vkms: Hold gem object while still in-use (2020-05-06 21:51:46 -0400)


drm-misc-next for 5.8:

UAPI Changes:

Cross-subsystem Changes:

 * MAINTAINERS: restore alphabetical order; update cirrus driver
 * Dcomuentation: document visionix, chronteli, ite vendor prefices; update
  documentation for Chrontel CH7033, IT6505, IVO, BOE,
  Panasonic, Chunghwa, AUO bindings; convert dw_mipi_dsi.txt
  to YAML; remove todo item for drm_display_mode.hsync removal;

Core Changes:

 * drm: add devm_drm_dev_alloc() for managed allocations of drm_device;
use DRM_MODESET_LOCK_ALL_*() in mode-object code; remove
drm_display_mode.hsync; small cleanups of unused variables,
compiler warnings and static functions
 * drm/client: dual-lincensing: GPL-2.0 or MIT
 * drm/mm: optimize tree searches in rb_hole_addr()

Driver Changes:

 * drm/{many}: use devm_drm_dev_alloc(); don't use drm_device.dev_private
 * drm/ast: don't double-assign to drm_crtc_funcs.set_config; drop
drm_connector_register()
 * drm/bochs: drop drm_connector_register()
 * drm/bridge: add support for Chrontel ch7033; fix stack usage with
   old gccs; return error pointer in drm_panel_bridge_add()
 * drm/cirrus: Move to tiny
 * drm/dp_mst: don't use 2nd sideband tx slot; revert "Remove single tx
   msg restriction"
 * drm/lima: support runtime PM;
 * drm/meson: limit modes wrt chipset
 * drm/panel: add support for Visionox rm69299; fix clock on
  boe-tv101wum-n16; fix panel type for AUO G101EVN10;
  add support for Ivo M133NFW4 R0; add support for BOE
  NV133FHM-N61; add support for AUO G121EAN01.4, G156XTN01.0,
  G190EAN01
 * drm/pl111: improve vexpress init; fix module auto-loading
 * drm/stm: read number of endpoints from device tree
 * drm/vboxvideo: use managed PCI functions; drop DRM_MTRR_WC
 * drm/vkms: fix use-after-free in vkms_gem_create(); enable cursor
 support by default
 * fbdev: use boolean values in several drivers
 * fbdev/controlfb: fix COMPILE_TEST
 * fbdev/w100fb: fix double-free bug


Adrian Ratiu (1

Re: [PATCH v3 01/25] dma-mapping: add generic helpers for mapping sgtable objects

2020-05-07 Thread Hans Verkuil
Hi Marek,

On 05/05/2020 10:45, Marek Szyprowski wrote:
> struct sg_table is a common structure used for describing a memory
> buffer. It consists of a scatterlist with memory pages and DMA addresses
> (sgl entry), as well as the number of scatterlist entries: CPU pages
> (orig_nents entry) and DMA pages (nents entry).
> 
> It turned out that it was a common mistake to misuse nents and orig_nents
> entries, call dma-mapping functions with a wrong number of entries or
> ignoring the number of mapped entries returned by the dma_map_sg
> function.
> 
> To avoid such issues, lets introduce a common wrappers operating directly
> on the struct sg_table objects, which take care of the proper use of
> the nents and orig_nents entries.
> 
> Signed-off-by: Marek Szyprowski 
> ---
>  include/linux/dma-mapping.h | 32 
>  include/linux/iommu.h   |  6 ++
>  2 files changed, 38 insertions(+)
> 
> diff --git a/include/linux/dma-mapping.h b/include/linux/dma-mapping.h
> index b43116a..8364c20d 100644
> --- a/include/linux/dma-mapping.h
> +++ b/include/linux/dma-mapping.h
> @@ -609,6 +609,36 @@ static inline void 
> dma_sync_single_range_for_device(struct device *dev,
>   return dma_sync_single_for_device(dev, addr + offset, size, dir);
>  }
>  
> +static inline int dma_map_sgtable_attrs(struct device *dev,
> + struct sg_table *sgt, enum dma_data_direction dir, unsigned long attrs)

Please document these new inline functions!

The core reason IMHO why so many drivers do this wrong is that the struct 
sg_table
documentation is very poor. In particular w.r.t. how the nents and orig_nents
fields should be used.

It confused me, and clearly I am not alone in that.

So while this is a very nice improvement, it doesn't address the core issue, 
i.e.
the documentation.

Especially some examples on how to use these new functions would be welcome.

Regards,

Hans

> +{
> + int n = dma_map_sg_attrs(dev, sgt->sgl, sgt->orig_nents, dir, attrs);
> +
> + if (n > 0) {
> + sgt->nents = n;
> + return 0;
> + }
> + return -EINVAL;
> +}
> +
> +static inline void dma_unmap_sgtable_attrs(struct device *dev,
> + struct sg_table *sgt, enum dma_data_direction dir, unsigned long attrs)
> +{
> + dma_unmap_sg_attrs(dev, sgt->sgl, sgt->orig_nents, dir, attrs);
> +}
> +
> +static inline void dma_sync_sgtable_for_cpu(struct device *dev,
> + struct sg_table *sgt, enum dma_data_direction dir)
> +{
> + dma_sync_sg_for_cpu(dev, sgt->sgl, sgt->orig_nents, dir);
> +}
> +
> +static inline void dma_sync_sgtable_for_device(struct device *dev,
> + struct sg_table *sgt, enum dma_data_direction dir)
> +{
> + dma_sync_sg_for_device(dev, sgt->sgl, sgt->orig_nents, dir);
> +}
> +
>  #define dma_map_single(d, a, s, r) dma_map_single_attrs(d, a, s, r, 0)
>  #define dma_unmap_single(d, a, s, r) dma_unmap_single_attrs(d, a, s, r, 0)
>  #define dma_map_sg(d, s, n, r) dma_map_sg_attrs(d, s, n, r, 0)
> @@ -617,6 +647,8 @@ static inline void 
> dma_sync_single_range_for_device(struct device *dev,
>  #define dma_unmap_page(d, a, s, r) dma_unmap_page_attrs(d, a, s, r, 0)
>  #define dma_get_sgtable(d, t, v, h, s) dma_get_sgtable_attrs(d, t, v, h, s, 
> 0)
>  #define dma_mmap_coherent(d, v, c, h, s) dma_mmap_attrs(d, v, c, h, s, 0)
> +#define dma_map_sgtable(d, s, r) dma_map_sgtable_attrs(d, s, r, 0)
> +#define dma_unmap_sgtable(d, s, r) dma_unmap_sgtable_attrs(d, s, r, 0)
>  
>  extern int dma_common_mmap(struct device *dev, struct vm_area_struct *vma,
>   void *cpu_addr, dma_addr_t dma_addr, size_t size,
> diff --git a/include/linux/iommu.h b/include/linux/iommu.h
> index 7ef8b0b..5106b65 100644
> --- a/include/linux/iommu.h
> +++ b/include/linux/iommu.h
> @@ -466,6 +466,12 @@ extern size_t iommu_map_sg_atomic(struct iommu_domain 
> *domain,
>  extern void iommu_set_fault_handler(struct iommu_domain *domain,
>   iommu_fault_handler_t handler, void *token);
>  
> +static inline size_t iommu_map_sgtable(struct iommu_domain *domain,
> + unsigned long iova, struct sg_table *sgt, int prot)
> +{
> + return iommu_map_sg(domain, iova, sgt->sgl, sgt->orig_nents, prot);
> +}
> +
>  extern void iommu_get_resv_regions(struct device *dev, struct list_head 
> *list);
>  extern void iommu_put_resv_regions(struct device *dev, struct list_head 
> *list);
>  extern void generic_iommu_put_resv_regions(struct device *dev,
> 

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Re: Operating KMS UAPI (Re: RFC: Drm-connector properties managed by another driver / privacy screen support)

2020-05-07 Thread Pekka Paalanen
On Tue, 5 May 2020 10:48:52 +0200
Daniel Vetter  wrote:

> Refocusing on where I think we still have a bit a disconnnect.
> 
> On Mon, May 04, 2020 at 03:22:28PM +0300, Pekka Paalanen wrote:
> > On Mon, 4 May 2020 13:00:02 +0200
> > Daniel Vetter  wrote:  
> > > On Mon, May 4, 2020 at 11:49 AM Pekka Paalanen  
> > > wrote:  
> > > > On Thu, 30 Apr 2020 15:53:23 +0200
> > > > Daniel Vetter  wrote:  
> > > I guess my point is, this is a lot bigger problem than just the
> > > default state. This = vt switching that doesn't look horrible and
> > > doesn't result in artifacts and issues on the new compositor.  
> > 
> > I am interested in getting reliably to the same hardware state as you
> > used to have before, either after reboots or after vt-switches. The
> > transition does not have to be guaranteed to be smooth, but at the same
> > time the restore policy should not exclude the possibility of a
> > smooth transition.  
> 
> So my point is kinda that if you want both, then the only way to get there
> to have a very clear set of what's allowed to be left behind be the
> outgoing compositor. For example:
> - only primary plane
> - only untiled
> - no color transform magic
> - ...

Hi,

agreed, and to this I was implicitly adding "for everything else the
old compositor must leave behind the so called default state".

That means the new compositor restoring defaults to the properties it
does not understand is a no-op, unless the old compositor violated the
smooth transition rules, in which case it might not be a smooth
transition.

If on some system, the default state does not result in a "usable"
picture on screen, then a compositor that does not understand the
property will always be broken and has always been broken.

If such compositor ever worked ok on such system, it was because it
inherited a property value that made things work. So if using defaults
breaks things, it means the defaults were not actually the defaults.

This definition probably means that defaults cannot be universal
constants, but I think it would be enough if they were constants given
the hardware and firmware at hand. IOW, not changed by simply rebooting
or upgrading the kernel.

> 
> Imo this is a related problem to the save/restore topic, since if one
> compositor does something the new one doesn't understand (e.g. tiled
> buffers with modifiers, and new compositor doesn't use getfb2), then it's
> going to break.
> 
> Similar, if the old compositor sets a new color transform property that
> the new compositor doesn't understand, then you get a mess.
> 
> Blind restore handles the permanent mess issue, but it doesn't handle the
> smooth transition issue. But both problems are of the "old compositor did
> something the new compositor doesn't understand", hence why I chuck them
> into the same bin. And the issue with a blind save/restore, or kernel
> defaults, or any of the solutions proposed here is that they pretty much
> guarantee non-smooth transitions, they only solve the permanent damange
> part of the problem.

Right, except I disagree on the "guarantee non-smooth transition", as I
explained above.

> I think to solve both, we need some kind of proper compositor switching
> protocol, e.g. using logind:
> - old compositor transitions to the minimal config as specified somewhere
> - logind forces all other properties to "defaults", whether that's
>   restoring boot-up defaults or defaults obtained from the kernel or
>   something else is tbd

In my mind, the new compositor would do this step. If the old
compositor did its job, it's a no-op.

> - logind maybe even does a transition if there's multiple version of the
>   protocol, e.g. v2 allows modifiers, v1 only untiled, so it'd need to do
>   a blit to untiled if the new compositor only supports v1 switching
>   protocol

That would be fancy, but I'm not sure it's necessary. Maybe it becomes
useful one day, and then that day we can look into involving actual
protocol or logind. I just don't see a problem implementing the de
facto protocol v1 that already exists without logind or such.

> - new compositor takes over, and can continue the smooth transition since
>   it's a well-defined starting state with limited feature usage, _and_
>   everything else is reset to "defaults"
>  
> I fear that if we only solve the "resets to defaults" issue then we can
> draw ourselves into a corner for the smooth transition stuff, if e.g. the
> wrong entity in the above dance forces the reset to defaults.

I guess we fundamentally agree. It just doesn't matter who does the
reset to defaults if the old compositor does not, the transition cannot
be smooth.

To me it seems the key here is that the old compositor *must* use "a
simple KMS setup" and reset everything else to defaults.

Actually, that's what we require in practise already. If the old
compositor leaves something funny in KMS state, the new compositor will
either glitch or be permanently broken when taking over.

The only thing that needs 

[PATCH v2 1/6] drm/mgag200: Convert struct drm_device to struct mga_device with helper

2020-05-07 Thread Thomas Zimmermann
Mgag200 uses dev_private to look up struct mga_device for instances
of struct drm_device. Use of dev_private is deprecated, so hide it in
the helper function to_mga_device().

v2:
* make to_mga_device() a function (Sam)

Signed-off-by: Thomas Zimmermann 
Reviewed-by: Daniel Vetter 
Reviewed-by: Sam Ravnborg 
---
 drivers/gpu/drm/mgag200/mgag200_cursor.c |  4 ++--
 drivers/gpu/drm/mgag200/mgag200_drv.c|  2 +-
 drivers/gpu/drm/mgag200/mgag200_drv.h|  5 +
 drivers/gpu/drm/mgag200/mgag200_i2c.c| 10 +-
 drivers/gpu/drm/mgag200/mgag200_main.c   |  4 ++--
 drivers/gpu/drm/mgag200/mgag200_mode.c   | 18 +-
 6 files changed, 24 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/mgag200/mgag200_cursor.c 
b/drivers/gpu/drm/mgag200/mgag200_cursor.c
index d491edd317ff3..aebc9ce43d551 100644
--- a/drivers/gpu/drm/mgag200/mgag200_cursor.c
+++ b/drivers/gpu/drm/mgag200/mgag200_cursor.c
@@ -260,7 +260,7 @@ int mgag200_crtc_cursor_set(struct drm_crtc *crtc, struct 
drm_file *file_priv,
uint32_t handle, uint32_t width, uint32_t height)
 {
struct drm_device *dev = crtc->dev;
-   struct mga_device *mdev = (struct mga_device *)dev->dev_private;
+   struct mga_device *mdev = to_mga_device(dev);
struct drm_gem_object *obj;
struct drm_gem_vram_object *gbo = NULL;
int ret;
@@ -307,7 +307,7 @@ int mgag200_crtc_cursor_set(struct drm_crtc *crtc, struct 
drm_file *file_priv,
 
 int mgag200_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
 {
-   struct mga_device *mdev = (struct mga_device *)crtc->dev->dev_private;
+   struct mga_device *mdev = to_mga_device(crtc->dev);
 
/* Our origin is at (64,64) */
x += 64;
diff --git a/drivers/gpu/drm/mgag200/mgag200_drv.c 
b/drivers/gpu/drm/mgag200/mgag200_drv.c
index 3298b7ef18b03..c2f0e4b40b052 100644
--- a/drivers/gpu/drm/mgag200/mgag200_drv.c
+++ b/drivers/gpu/drm/mgag200/mgag200_drv.c
@@ -120,7 +120,7 @@ int mgag200_driver_dumb_create(struct drm_file *file,
   struct drm_device *dev,
   struct drm_mode_create_dumb *args)
 {
-   struct mga_device *mdev = dev->dev_private;
+   struct mga_device *mdev = to_mga_device(dev);
unsigned long pg_align;
 
if (WARN_ONCE(!dev->vram_mm, "VRAM MM not initialized"))
diff --git a/drivers/gpu/drm/mgag200/mgag200_drv.h 
b/drivers/gpu/drm/mgag200/mgag200_drv.h
index 9691252d6233f..93e2d232931af 100644
--- a/drivers/gpu/drm/mgag200/mgag200_drv.h
+++ b/drivers/gpu/drm/mgag200/mgag200_drv.h
@@ -182,6 +182,11 @@ struct mga_device {
struct drm_encoder encoder;
 };
 
+static inline struct mga_device *to_mga_device(struct drm_device *dev)
+{
+   return dev->dev_private;
+}
+
 static inline enum mga_type
 mgag200_type_from_driver_data(kernel_ulong_t driver_data)
 {
diff --git a/drivers/gpu/drm/mgag200/mgag200_i2c.c 
b/drivers/gpu/drm/mgag200/mgag200_i2c.c
index 9f4635916d322..09731e614e46d 100644
--- a/drivers/gpu/drm/mgag200/mgag200_i2c.c
+++ b/drivers/gpu/drm/mgag200/mgag200_i2c.c
@@ -61,34 +61,34 @@ static inline void mga_i2c_set(struct mga_device *mdev, int 
mask, int state)
 static void mga_gpio_setsda(void *data, int state)
 {
struct mga_i2c_chan *i2c = data;
-   struct mga_device *mdev = i2c->dev->dev_private;
+   struct mga_device *mdev = to_mga_device(i2c->dev);
mga_i2c_set(mdev, i2c->data, state);
 }
 
 static void mga_gpio_setscl(void *data, int state)
 {
struct mga_i2c_chan *i2c = data;
-   struct mga_device *mdev = i2c->dev->dev_private;
+   struct mga_device *mdev = to_mga_device(i2c->dev);
mga_i2c_set(mdev, i2c->clock, state);
 }
 
 static int mga_gpio_getsda(void *data)
 {
struct mga_i2c_chan *i2c = data;
-   struct mga_device *mdev = i2c->dev->dev_private;
+   struct mga_device *mdev = to_mga_device(i2c->dev);
return (mga_i2c_read_gpio(mdev) & i2c->data) ? 1 : 0;
 }
 
 static int mga_gpio_getscl(void *data)
 {
struct mga_i2c_chan *i2c = data;
-   struct mga_device *mdev = i2c->dev->dev_private;
+   struct mga_device *mdev = to_mga_device(i2c->dev);
return (mga_i2c_read_gpio(mdev) & i2c->clock) ? 1 : 0;
 }
 
 struct mga_i2c_chan *mgag200_i2c_create(struct drm_device *dev)
 {
-   struct mga_device *mdev = dev->dev_private;
+   struct mga_device *mdev = to_mga_device(dev);
struct mga_i2c_chan *i2c;
int ret;
int data, clock;
diff --git a/drivers/gpu/drm/mgag200/mgag200_main.c 
b/drivers/gpu/drm/mgag200/mgag200_main.c
index b680cf47cbb94..b705b7776d2fc 100644
--- a/drivers/gpu/drm/mgag200/mgag200_main.c
+++ b/drivers/gpu/drm/mgag200/mgag200_main.c
@@ -92,7 +92,7 @@ static int mga_vram_init(struct mga_device *mdev)
 static int mgag200_device_init(struct drm_device *dev,
   uint32_t flags)
 {
-   struct mga_device *mdev = dev->dev_private;
+   struct mga_de

[PATCH v2 6/6] drm/mgag200: Embed connector instance in struct mga_device

2020-05-07 Thread Thomas Zimmermann
Storing the connector instance in struct mga_device avoids some
dynamic memory allocation. On errors, the connector's initializer
function now destroys the i2c structure. Done in preparation of
converting mgag200 to simple-KMS helpers.

v2:
* improved commit message (Michael)
* fixed error message for mgag200_vga_connector_init() (Sam)

Signed-off-by: Thomas Zimmermann 
Reviewed-by: Michael J. Ruhl 
Acked-by: Sam Ravnborg 
Tested-by: John Donnelly 
---
 drivers/gpu/drm/mgag200/mgag200_drv.h  |  1 +
 drivers/gpu/drm/mgag200/mgag200_mode.c | 56 +++---
 2 files changed, 33 insertions(+), 24 deletions(-)

diff --git a/drivers/gpu/drm/mgag200/mgag200_drv.h 
b/drivers/gpu/drm/mgag200/mgag200_drv.h
index 40e6ffbe97949..d9b7e96b214f8 100644
--- a/drivers/gpu/drm/mgag200/mgag200_drv.h
+++ b/drivers/gpu/drm/mgag200/mgag200_drv.h
@@ -171,6 +171,7 @@ struct mga_device {
/* SE model number stored in reg 0x1e24 */
u32 unique_rev_id;
 
+   struct mga_connector connector;
struct drm_encoder encoder;
 };
 
diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c 
b/drivers/gpu/drm/mgag200/mgag200_mode.c
index 1d1e937203fa7..5f4ac36a97760 100644
--- a/drivers/gpu/drm/mgag200/mgag200_mode.c
+++ b/drivers/gpu/drm/mgag200/mgag200_mode.c
@@ -1448,6 +1448,10 @@ static void mga_crtc_init(struct mga_device *mdev)
drm_crtc_helper_add(&mga_crtc->base, &mga_helper_funcs);
 }
 
+/*
+ * Connector
+ */
+
 static int mga_vga_get_modes(struct drm_connector *connector)
 {
struct mga_connector *mga_connector = to_mga_connector(connector);
@@ -1572,7 +1576,6 @@ static void mga_connector_destroy(struct drm_connector 
*connector)
struct mga_connector *mga_connector = to_mga_connector(connector);
mgag200_i2c_destroy(mga_connector->i2c);
drm_connector_cleanup(connector);
-   kfree(connector);
 }
 
 static const struct drm_connector_helper_funcs mga_vga_connector_helper_funcs 
= {
@@ -1586,30 +1589,33 @@ static const struct drm_connector_funcs 
mga_vga_connector_funcs = {
.destroy = mga_connector_destroy,
 };
 
-static struct drm_connector *mga_vga_init(struct drm_device *dev)
+static int mgag200_vga_connector_init(struct mga_device *mdev)
 {
-   struct drm_connector *connector;
-   struct mga_connector *mga_connector;
-
-   mga_connector = kzalloc(sizeof(struct mga_connector), GFP_KERNEL);
-   if (!mga_connector)
-   return NULL;
-
-   connector = &mga_connector->base;
-   mga_connector->i2c = mgag200_i2c_create(dev);
-   if (!mga_connector->i2c)
-   DRM_ERROR("failed to add ddc bus\n");
+   struct drm_device *dev = mdev->dev;
+   struct mga_connector *mconnector = &mdev->connector;
+   struct drm_connector *connector = &mconnector->base;
+   struct mga_i2c_chan *i2c;
+   int ret;
 
-   drm_connector_init_with_ddc(dev, connector,
-   &mga_vga_connector_funcs,
-   DRM_MODE_CONNECTOR_VGA,
-   &mga_connector->i2c->adapter);
+   i2c = mgag200_i2c_create(dev);
+   if (!i2c)
+   drm_warn(dev, "failed to add DDC bus\n");
 
+   ret = drm_connector_init_with_ddc(dev, connector,
+ &mga_vga_connector_funcs,
+ DRM_MODE_CONNECTOR_VGA,
+ &i2c->adapter);
+   if (ret)
+   goto err_mgag200_i2c_destroy;
drm_connector_helper_add(connector, &mga_vga_connector_helper_funcs);
 
-   drm_connector_register(connector);
+   mconnector->i2c = i2c;
 
-   return connector;
+   return 0;
+
+err_mgag200_i2c_destroy:
+   mgag200_i2c_destroy(i2c);
+   return ret;
 }
 
 static const struct drm_mode_config_funcs mgag200_mode_config_funcs = {
@@ -1628,7 +1634,7 @@ int mgag200_modeset_init(struct mga_device *mdev)
 {
struct drm_device *dev = mdev->dev;
struct drm_encoder *encoder = &mdev->encoder;
-   struct drm_connector *connector;
+   struct drm_connector *connector = &mdev->connector.base;
int ret;
 
mdev->bpp_shifts[0] = 0;
@@ -1664,10 +1670,12 @@ int mgag200_modeset_init(struct mga_device *mdev)
}
encoder->possible_crtcs = 0x1;
 
-   connector = mga_vga_init(dev);
-   if (!connector) {
-   DRM_ERROR("mga_vga_init failed\n");
-   return -1;
+   ret = mgag200_vga_connector_init(mdev);
+   if (ret) {
+   drm_err(dev,
+   "mgag200_vga_connector_init() failed, error %d\n",
+   ret);
+   return ret;
}
 
drm_connector_attach_encoder(connector, encoder);
-- 
2.26.0

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[PATCH v2 2/6] drm/mgag200: Remove several references to struct mga_device.dev

2020-05-07 Thread Thomas Zimmermann
Done in preparation of embedding the DRM device in struct mga_device.
This patch makes the patch for embedding more readable.

v2:
* improved commit message (Daniel)

Signed-off-by: Thomas Zimmermann 
Reviewed-by: Daniel Vetter 
Reviewed-by: Sam Ravnborg 
---
 drivers/gpu/drm/mgag200/mgag200_main.c | 23 ---
 drivers/gpu/drm/mgag200/mgag200_mode.c | 17 +
 2 files changed, 21 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/mgag200/mgag200_main.c 
b/drivers/gpu/drm/mgag200/mgag200_main.c
index b705b7776d2fc..51919b5c1d97f 100644
--- a/drivers/gpu/drm/mgag200/mgag200_main.c
+++ b/drivers/gpu/drm/mgag200/mgag200_main.c
@@ -66,25 +66,26 @@ static int mga_probe_vram(struct mga_device *mdev, void 
__iomem *mem)
 /* Map the framebuffer from the card and configure the core */
 static int mga_vram_init(struct mga_device *mdev)
 {
+   struct drm_device *dev = mdev->dev;
void __iomem *mem;
 
/* BAR 0 is VRAM */
-   mdev->mc.vram_base = pci_resource_start(mdev->dev->pdev, 0);
-   mdev->mc.vram_window = pci_resource_len(mdev->dev->pdev, 0);
+   mdev->mc.vram_base = pci_resource_start(dev->pdev, 0);
+   mdev->mc.vram_window = pci_resource_len(dev->pdev, 0);
 
-   if (!devm_request_mem_region(mdev->dev->dev, mdev->mc.vram_base, 
mdev->mc.vram_window,
-   "mgadrmfb_vram")) {
+   if (!devm_request_mem_region(dev->dev, mdev->mc.vram_base,
+mdev->mc.vram_window, "mgadrmfb_vram")) {
DRM_ERROR("can't reserve VRAM\n");
return -ENXIO;
}
 
-   mem = pci_iomap(mdev->dev->pdev, 0, 0);
+   mem = pci_iomap(dev->pdev, 0, 0);
if (!mem)
return -ENOMEM;
 
mdev->mc.vram_size = mga_probe_vram(mdev, mem);
 
-   pci_iounmap(mdev->dev->pdev, mem);
+   pci_iounmap(dev->pdev, mem);
 
return 0;
 }
@@ -105,12 +106,12 @@ static int mgag200_device_init(struct drm_device *dev,
mdev->has_sdram = !(option & (1 << 14));
 
/* BAR 0 is the framebuffer, BAR 1 contains registers */
-   mdev->rmmio_base = pci_resource_start(mdev->dev->pdev, 1);
-   mdev->rmmio_size = pci_resource_len(mdev->dev->pdev, 1);
+   mdev->rmmio_base = pci_resource_start(dev->pdev, 1);
+   mdev->rmmio_size = pci_resource_len(dev->pdev, 1);
 
-   if (!devm_request_mem_region(mdev->dev->dev, mdev->rmmio_base, 
mdev->rmmio_size,
-   "mgadrmfb_mmio")) {
-   DRM_ERROR("can't reserve mmio registers\n");
+   if (!devm_request_mem_region(dev->dev, mdev->rmmio_base,
+mdev->rmmio_size, "mgadrmfb_mmio")) {
+   drm_err(dev, "can't reserve mmio registers\n");
return -ENOMEM;
}
 
diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c 
b/drivers/gpu/drm/mgag200/mgag200_mode.c
index fa91869c0db52..aaa73b29b04f0 100644
--- a/drivers/gpu/drm/mgag200/mgag200_mode.c
+++ b/drivers/gpu/drm/mgag200/mgag200_mode.c
@@ -1433,6 +1433,7 @@ static const struct drm_crtc_helper_funcs 
mga_helper_funcs = {
 /* CRTC setup */
 static void mga_crtc_init(struct mga_device *mdev)
 {
+   struct drm_device *dev = mdev->dev;
struct mga_crtc *mga_crtc;
 
mga_crtc = kzalloc(sizeof(struct mga_crtc) +
@@ -1442,7 +1443,7 @@ static void mga_crtc_init(struct mga_device *mdev)
if (mga_crtc == NULL)
return;
 
-   drm_crtc_init(mdev->dev, &mga_crtc->base, &mga_crtc_funcs);
+   drm_crtc_init(dev, &mga_crtc->base, &mga_crtc_funcs);
 
drm_mode_crtc_set_gamma_size(&mga_crtc->base, MGAG200_LUT_SIZE);
mdev->mode_info.crtc = mga_crtc;
@@ -1617,30 +1618,30 @@ static struct drm_connector *mga_vga_init(struct 
drm_device *dev)
 
 int mgag200_modeset_init(struct mga_device *mdev)
 {
+   struct drm_device *dev = mdev->dev;
struct drm_encoder *encoder = &mdev->encoder;
struct drm_connector *connector;
int ret;
 
mdev->mode_info.mode_config_initialized = true;
 
-   mdev->dev->mode_config.max_width = MGAG200_MAX_FB_WIDTH;
-   mdev->dev->mode_config.max_height = MGAG200_MAX_FB_HEIGHT;
+   dev->mode_config.max_width = MGAG200_MAX_FB_WIDTH;
+   dev->mode_config.max_height = MGAG200_MAX_FB_HEIGHT;
 
-   mdev->dev->mode_config.fb_base = mdev->mc.vram_base;
+   dev->mode_config.fb_base = mdev->mc.vram_base;
 
mga_crtc_init(mdev);
 
-   ret = drm_simple_encoder_init(mdev->dev, encoder,
- DRM_MODE_ENCODER_DAC);
+   ret = drm_simple_encoder_init(dev, encoder, DRM_MODE_ENCODER_DAC);
if (ret) {
-   drm_err(mdev->dev,
+   drm_err(dev,
"drm_simple_encoder_init() failed, error %d\n",
ret);
return ret;
}
encoder->possible_crtcs = 0x1;
 
-   connector = mga_vga_init(mdev

[PATCH v2 0/6] Prepare mgag200 for simple KMS and managed init

2020-05-07 Thread Thomas Zimmermann
(was: drm/mgag200: Embed DRM device in struct mga_device)

This is v2 of the patchset for embedding the DRM device instance in struct
mga_device. Following Sam's suggestion I only picked the first three
patches of v1. On top of that I added 3 patches from mgag200's simple-KMS
patchset. The patch set prepares mgag200 for simple KMS and managed
initialization, but also makes sense on its own.

All patches have been reviewed and/or acked already. If no one objects, I'll
soon merge them into drm-misc-next.

v2:
* removed patches 4 and 5, added 3 patches from simple-KMS patchset
* improved commit messages
* to_mga_device() is now a function
* fixed error mesage for mgag200_vga_connector_init()

Thomas Zimmermann (6):
  drm/mgag200: Convert struct drm_device to struct mga_device with
helper
  drm/mgag200: Remove several references to struct mga_device.dev
  drm/mgag200: Integrate init function into load function
  drm/mgag200: Use managed mode-config initialization
  drm/mgag200: Remove unused fields from struct mga_device
  drm/mgag200: Embed connector instance in struct mga_device

 drivers/gpu/drm/mgag200/mgag200_cursor.c |   4 +-
 drivers/gpu/drm/mgag200/mgag200_drv.c|   2 +-
 drivers/gpu/drm/mgag200/mgag200_drv.h|  15 ++-
 drivers/gpu/drm/mgag200/mgag200_i2c.c|  10 +-
 drivers/gpu/drm/mgag200/mgag200_main.c   | 115 ++--
 drivers/gpu/drm/mgag200/mgag200_mode.c   | 127 ++-
 6 files changed, 125 insertions(+), 148 deletions(-)

--
2.26.0

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[PATCH v2 4/6] drm/mgag200: Use managed mode-config initialization

2020-05-07 Thread Thomas Zimmermann
Mode configuration is now cleanued up automatically. While at it,
move all mode-config code into mgag200_mode.c. Done in preparation
of switching mgag200 to simple-KMS helpers.

v2:
* improve commit message (Sam)
* rebased during cherry pick
* also move bpp_shift initialization

Signed-off-by: Thomas Zimmermann 
Acked-by: Sam Ravnborg 
Tested-by: John Donnelly 
---
 drivers/gpu/drm/mgag200/mgag200_drv.h  |  1 -
 drivers/gpu/drm/mgag200/mgag200_main.c | 28 ++---
 drivers/gpu/drm/mgag200/mgag200_mode.c | 34 ++
 3 files changed, 31 insertions(+), 32 deletions(-)

diff --git a/drivers/gpu/drm/mgag200/mgag200_drv.h 
b/drivers/gpu/drm/mgag200/mgag200_drv.h
index 93e2d232931af..65d7096cad889 100644
--- a/drivers/gpu/drm/mgag200/mgag200_drv.h
+++ b/drivers/gpu/drm/mgag200/mgag200_drv.h
@@ -201,7 +201,6 @@ mgag200_flags_from_driver_data(kernel_ulong_t driver_data)
 
/* mgag200_mode.c */
 int mgag200_modeset_init(struct mga_device *mdev);
-void mgag200_modeset_fini(struct mga_device *mdev);
 
/* mgag200_main.c */
 int mgag200_driver_load(struct drm_device *dev, unsigned long flags);
diff --git a/drivers/gpu/drm/mgag200/mgag200_main.c 
b/drivers/gpu/drm/mgag200/mgag200_main.c
index 186197b8ffd35..fd651eda6f012 100644
--- a/drivers/gpu/drm/mgag200/mgag200_main.c
+++ b/drivers/gpu/drm/mgag200/mgag200_main.c
@@ -10,15 +10,8 @@
 
 #include 
 
-#include 
-#include 
-
 #include "mgag200_drv.h"
 
-static const struct drm_mode_config_funcs mga_mode_funcs = {
-   .fb_create = drm_gem_fb_create
-};
-
 static int mga_probe_vram(struct mga_device *mdev, void __iomem *mem)
 {
int offset;
@@ -135,27 +128,14 @@ int mgag200_driver_load(struct drm_device *dev, unsigned 
long flags)
if (ret)
return ret;
 
-   mdev->bpp_shifts[0] = 0;
-   mdev->bpp_shifts[1] = 1;
-   mdev->bpp_shifts[2] = 0;
-   mdev->bpp_shifts[3] = 2;
-
ret = mgag200_mm_init(mdev);
if (ret)
goto err_mm;
 
-   drm_mode_config_init(dev);
-   dev->mode_config.funcs = (void *)&mga_mode_funcs;
-   if (IS_G200_SE(mdev) && mdev->vram_fb_available < (2048*1024))
-   dev->mode_config.preferred_depth = 16;
-   else
-   dev->mode_config.preferred_depth = 32;
-   dev->mode_config.prefer_shadow = 1;
-
ret = mgag200_modeset_init(mdev);
if (ret) {
drm_err(dev, "Fatal error during modeset init: %d\n", ret);
-   goto err_modeset;
+   goto err_mgag200_mm_fini;
}
 
ret = mgag200_cursor_init(mdev);
@@ -164,9 +144,7 @@ int mgag200_driver_load(struct drm_device *dev, unsigned 
long flags)
 
return 0;
 
-err_modeset:
-   drm_mode_config_cleanup(dev);
-   mgag200_cursor_fini(mdev);
+err_mgag200_mm_fini:
mgag200_mm_fini(mdev);
 err_mm:
dev->dev_private = NULL;
@@ -179,8 +157,6 @@ void mgag200_driver_unload(struct drm_device *dev)
 
if (mdev == NULL)
return;
-   mgag200_modeset_fini(mdev);
-   drm_mode_config_cleanup(dev);
mgag200_cursor_fini(mdev);
mgag200_mm_fini(mdev);
dev->dev_private = NULL;
diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c 
b/drivers/gpu/drm/mgag200/mgag200_mode.c
index aaa73b29b04f0..7dad386913261 100644
--- a/drivers/gpu/drm/mgag200/mgag200_mode.c
+++ b/drivers/gpu/drm/mgag200/mgag200_mode.c
@@ -13,6 +13,7 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -1615,6 +1616,17 @@ static struct drm_connector *mga_vga_init(struct 
drm_device *dev)
return connector;
 }
 
+static const struct drm_mode_config_funcs mgag200_mode_config_funcs = {
+   .fb_create = drm_gem_fb_create
+};
+
+static unsigned int mgag200_preferred_depth(struct mga_device *mdev)
+{
+   if (IS_G200_SE(mdev) && mdev->vram_fb_available < (2048*1024))
+   return 16;
+   else
+   return 32;
+}
 
 int mgag200_modeset_init(struct mga_device *mdev)
 {
@@ -1623,13 +1635,30 @@ int mgag200_modeset_init(struct mga_device *mdev)
struct drm_connector *connector;
int ret;
 
+   mdev->bpp_shifts[0] = 0;
+   mdev->bpp_shifts[1] = 1;
+   mdev->bpp_shifts[2] = 0;
+   mdev->bpp_shifts[3] = 2;
+
+   ret = drmm_mode_config_init(dev);
+   if (ret) {
+   drm_err(dev, "drmm_mode_config_init() failed, error %d\n",
+   ret);
+   return ret;
+   }
+
mdev->mode_info.mode_config_initialized = true;
 
dev->mode_config.max_width = MGAG200_MAX_FB_WIDTH;
dev->mode_config.max_height = MGAG200_MAX_FB_HEIGHT;
 
+   dev->mode_config.preferred_depth = mgag200_preferred_depth(mdev);
+   dev->mode_config.prefer_shadow = 1;
+
dev->mode_config.fb_base = mdev->mc.vram_base;
 
+   dev->mode_config.funcs = &mgag200_mode_config_funcs;
+
  

[PATCH v2 5/6] drm/mgag200: Remove unused fields from struct mga_device

2020-05-07 Thread Thomas Zimmermann
The fields mode_info, num_crtcs and mode in struct mga_device serve
no purpose. Remove them.

Signed-off-by: Thomas Zimmermann 
Acked-by: Sam Ravnborg 
Tested-by: John Donnelly 
---
 drivers/gpu/drm/mgag200/mgag200_drv.h  | 8 
 drivers/gpu/drm/mgag200/mgag200_main.c | 3 ---
 drivers/gpu/drm/mgag200/mgag200_mode.c | 6 --
 3 files changed, 17 deletions(-)

diff --git a/drivers/gpu/drm/mgag200/mgag200_drv.h 
b/drivers/gpu/drm/mgag200/mgag200_drv.h
index 65d7096cad889..40e6ffbe97949 100644
--- a/drivers/gpu/drm/mgag200/mgag200_drv.h
+++ b/drivers/gpu/drm/mgag200/mgag200_drv.h
@@ -104,11 +104,6 @@ struct mga_crtc {
bool enabled;
 };
 
-struct mga_mode_info {
-   bool mode_config_initialized;
-   struct mga_crtc *crtc;
-};
-
 struct mga_i2c_chan {
struct i2c_adapter adapter;
struct drm_device *dev;
@@ -160,17 +155,14 @@ struct mga_device {
void __iomem*rmmio;
 
struct mga_mc   mc;
-   struct mga_mode_infomode_info;
 
struct mga_cursor cursor;
 
size_t vram_fb_available;
 
boolsuspended;
-   int num_crtc;
enum mga_type   type;
int has_sdram;
-   struct drm_display_mode mode;
 
int bpp_shifts[4];
 
diff --git a/drivers/gpu/drm/mgag200/mgag200_main.c 
b/drivers/gpu/drm/mgag200/mgag200_main.c
index fd651eda6f012..86df799fd38c5 100644
--- a/drivers/gpu/drm/mgag200/mgag200_main.c
+++ b/drivers/gpu/drm/mgag200/mgag200_main.c
@@ -97,9 +97,6 @@ int mgag200_driver_load(struct drm_device *dev, unsigned long 
flags)
mdev->flags = mgag200_flags_from_driver_data(flags);
mdev->type = mgag200_type_from_driver_data(flags);
 
-   /* Hardcode the number of CRTCs to 1 */
-   mdev->num_crtc = 1;
-
pci_read_config_dword(dev->pdev, PCI_MGA_OPTION, &option);
mdev->has_sdram = !(option & (1 << 14));
 
diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c 
b/drivers/gpu/drm/mgag200/mgag200_mode.c
index 7dad386913261..1d1e937203fa7 100644
--- a/drivers/gpu/drm/mgag200/mgag200_mode.c
+++ b/drivers/gpu/drm/mgag200/mgag200_mode.c
@@ -1136,9 +1136,6 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc,
 
WREG8(MGA_MISC_OUT, misc);
 
-   if (adjusted_mode)
-   memcpy(&mdev->mode, mode, sizeof(struct drm_display_mode));
-
mga_crtc_do_set_base(crtc, old_fb, x, y, 0);
 
/* reset tagfifo */
@@ -1447,7 +1444,6 @@ static void mga_crtc_init(struct mga_device *mdev)
drm_crtc_init(dev, &mga_crtc->base, &mga_crtc_funcs);
 
drm_mode_crtc_set_gamma_size(&mga_crtc->base, MGAG200_LUT_SIZE);
-   mdev->mode_info.crtc = mga_crtc;
 
drm_crtc_helper_add(&mga_crtc->base, &mga_helper_funcs);
 }
@@ -1647,8 +1643,6 @@ int mgag200_modeset_init(struct mga_device *mdev)
return ret;
}
 
-   mdev->mode_info.mode_config_initialized = true;
-
dev->mode_config.max_width = MGAG200_MAX_FB_WIDTH;
dev->mode_config.max_height = MGAG200_MAX_FB_HEIGHT;
 
-- 
2.26.0

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[PATCH v2 3/6] drm/mgag200: Integrate init function into load function

2020-05-07 Thread Thomas Zimmermann
Done to simplify initialization code before embedding the DRM device
instance in struct mga_device.

Signed-off-by: Thomas Zimmermann 
Reviewed-by: Daniel Vetter 
Acked-by: Sam Ravnborg 
---
 drivers/gpu/drm/mgag200/mgag200_main.c | 59 +-
 1 file changed, 19 insertions(+), 40 deletions(-)

diff --git a/drivers/gpu/drm/mgag200/mgag200_main.c 
b/drivers/gpu/drm/mgag200/mgag200_main.c
index 51919b5c1d97f..186197b8ffd35 100644
--- a/drivers/gpu/drm/mgag200/mgag200_main.c
+++ b/drivers/gpu/drm/mgag200/mgag200_main.c
@@ -90,12 +90,17 @@ static int mga_vram_init(struct mga_device *mdev)
return 0;
 }
 
-static int mgag200_device_init(struct drm_device *dev,
-  uint32_t flags)
+int mgag200_driver_load(struct drm_device *dev, unsigned long flags)
 {
-   struct mga_device *mdev = to_mga_device(dev);
+   struct mga_device *mdev;
int ret, option;
 
+   mdev = devm_kzalloc(dev->dev, sizeof(struct mga_device), GFP_KERNEL);
+   if (mdev == NULL)
+   return -ENOMEM;
+   dev->dev_private = (void *)mdev;
+   mdev->dev = dev;
+
mdev->flags = mgag200_flags_from_driver_data(flags);
mdev->type = mgag200_type_from_driver_data(flags);
 
@@ -122,8 +127,8 @@ static int mgag200_device_init(struct drm_device *dev,
/* stash G200 SE model number for later use */
if (IS_G200_SE(mdev)) {
mdev->unique_rev_id = RREG32(0x1e24);
-   DRM_DEBUG("G200 SE unique revision id is 0x%x\n",
- mdev->unique_rev_id);
+   drm_dbg(dev, "G200 SE unique revision id is 0x%x\n",
+   mdev->unique_rev_id);
}
 
ret = mga_vram_init(mdev);
@@ -134,33 +139,9 @@ static int mgag200_device_init(struct drm_device *dev,
mdev->bpp_shifts[1] = 1;
mdev->bpp_shifts[2] = 0;
mdev->bpp_shifts[3] = 2;
-   return 0;
-}
-
-/*
- * Functions here will be called by the core once it's bound the driver to
- * a PCI device
- */
-
 
-int mgag200_driver_load(struct drm_device *dev, unsigned long flags)
-{
-   struct mga_device *mdev;
-   int r;
-
-   mdev = devm_kzalloc(dev->dev, sizeof(struct mga_device), GFP_KERNEL);
-   if (mdev == NULL)
-   return -ENOMEM;
-   dev->dev_private = (void *)mdev;
-   mdev->dev = dev;
-
-   r = mgag200_device_init(dev, flags);
-   if (r) {
-   dev_err(&dev->pdev->dev, "Fatal error during GPU init: %d\n", 
r);
-   return r;
-   }
-   r = mgag200_mm_init(mdev);
-   if (r)
+   ret = mgag200_mm_init(mdev);
+   if (ret)
goto err_mm;
 
drm_mode_config_init(dev);
@@ -171,16 +152,15 @@ int mgag200_driver_load(struct drm_device *dev, unsigned 
long flags)
dev->mode_config.preferred_depth = 32;
dev->mode_config.prefer_shadow = 1;
 
-   r = mgag200_modeset_init(mdev);
-   if (r) {
-   dev_err(&dev->pdev->dev, "Fatal error during modeset init: 
%d\n", r);
+   ret = mgag200_modeset_init(mdev);
+   if (ret) {
+   drm_err(dev, "Fatal error during modeset init: %d\n", ret);
goto err_modeset;
}
 
-   r = mgag200_cursor_init(mdev);
-   if (r)
-   dev_warn(&dev->pdev->dev,
-   "Could not initialize cursors. Not doing hardware 
cursors.\n");
+   ret = mgag200_cursor_init(mdev);
+   if (ret)
+   drm_err(dev, "Could not initialize cursors. Not doing hardware 
cursors.\n");
 
return 0;
 
@@ -190,8 +170,7 @@ int mgag200_driver_load(struct drm_device *dev, unsigned 
long flags)
mgag200_mm_fini(mdev);
 err_mm:
dev->dev_private = NULL;
-
-   return r;
+   return ret;
 }
 
 void mgag200_driver_unload(struct drm_device *dev)
-- 
2.26.0

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[PATCH v3] drm/ast: Don't check new mode if CRTC is being disabled

2020-05-07 Thread Thomas Zimmermann
Suspending failed because there's no mode if the CRTC is being
disabled. Early-out in this case. This fixes runtime PM for ast.

v3:
* fixed commit message
v2:
* added Tested-by/Reported-by tags
* added Fixes tags and CC (Sam)
* improved comment

Signed-off-by: Thomas Zimmermann 
Reported-by: Cary Garrett 
Tested-by: Cary Garrett 
Fixes: b48e1b6ffd28 ("drm/ast: Add CRTC helpers for atomic modesetting")
Cc: Thomas Zimmermann 
Cc: Gerd Hoffmann 
Cc: Dave Airlie 
Cc: Daniel Vetter 
Cc: Sam Ravnborg 
Cc:  # v5.6+
---
 drivers/gpu/drm/ast/ast_mode.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/ast/ast_mode.c b/drivers/gpu/drm/ast/ast_mode.c
index 7a9f20a2fd303..0cbbb21edb4e1 100644
--- a/drivers/gpu/drm/ast/ast_mode.c
+++ b/drivers/gpu/drm/ast/ast_mode.c
@@ -801,6 +801,9 @@ static int ast_crtc_helper_atomic_check(struct drm_crtc 
*crtc,
return -EINVAL;
}
 
+   if (!state->enable)
+   return 0; /* no mode checks if CRTC is being disabled */
+
ast_state = to_ast_crtc_state(state);
 
format = ast_state->format;
-- 
2.26.0

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Re: Question about sRGB framebuffer support

2020-05-07 Thread Artem Mygaiev
On Thu, May 7, 2020 at 9:18 AM Ville Syrjälä
 wrote:
>
> On Thu, May 07, 2020 at 09:07:59AM +0300, Ville Syrjälä wrote:
> > On Wed, May 06, 2020 at 04:54:08PM +0300, Artem Mygaiev wrote:
> > > On Wed, May 6, 2020 at 12:33 PM Ville Syrjälä
> > >  wrote:
> > > >
> > > > On Wed, May 06, 2020 at 12:25:00PM +0300, Artem Mygaiev wrote:
> > > > > On Wed, May 6, 2020 at 12:18 PM Ville Syrjälä
> > > > >  wrote:
> > > > > >
> > > > > > On Wed, May 06, 2020 at 12:04:22PM +0300, Artem Mygaiev wrote:
> > > > > > > Hello Ville
> > > > > > >
> > > > > > > On Wed, May 6, 2020 at 10:45 AM Ville Syrjälä
> > > > > > >  wrote:
> > > > > > > >
> > > > > > > > On Tue, May 05, 2020 at 01:24:16PM +0300, Artem Mygaiev wrote:
> > > > > > > > > Hello all
> > > > > > > > >
> > > > > > > > > I am currently working on DRM/KMS driver for Fresco Logic 
> > > > > > > > > FL2000 USB display
> > > > > > > > > controller [1]. I have already implemented a POC driver [2] 
> > > > > > > > > which is working for
> > > > > > > > > me, although there are still plenty of things to improve or 
> > > > > > > > > fix, of course.
> > > > > > > > >
> > > > > > > > > So far I have one thing that I somehow cannot find in DRM/KMS 
> > > > > > > > > documentation or
> > > > > > > > > existing drivers: how to tell the system that HW expects sRGB 
> > > > > > > > > (i.e. non-linear)
> > > > > > > > > color encoding in framebuffers? This is a HW limitation that 
> > > > > > > > > I cannot influence
> > > > > > > > > by configuration.
> > > > > > > >
> > > > > > > > Does it do something to process the data that requires 
> > > > > > > > linearization
> > > > > > > > or why does it care about the gamma applied to the data? In a 
> > > > > > > > typical
> > > > > > > > use case the data is just passed through unless the user asks 
> > > > > > > > otherwise,
> > > > > > > > so it doesn't matter much what gamma was used. Though most 
> > > > > > > > displays
> > > > > > > > probably expect something resembling sRGB gamma by default, so 
> > > > > > > > that's
> > > > > > > > presumably what most things generate, and images/videos/etc. 
> > > > > > > > pretty
> > > > > > > > much always have gamma already applied when they are produced.
> > > > > > > >
> > > > > > >
> > > > > > > Unfortunately the HW was designed in a way that when it is 
> > > > > > > configured to 24-bit
> > > > > > > RGB888 it expects sRGB and applies degamma automatically. It is 
> > > > > > > not possible to
> > > > > > > disable this, I've asked vendor and they confirmed this [1].
> > > > > >
> > > > > > So it always does degamma+gamma for no real reason? That shouldn't
> > > > > > really matter (apart from potentially losing some precision in those
> > > > > > conversions).
> > > > > >
> > > > >
> > > > > It always does only degamma (sRGB -> linear), so if you supply linear 
> > > > > RGB it
> > > > > will totally corrupt picture colors, e.g. this is how kmscube looks 
> > > > > like:
> > > > > https://github.com/klogg/fl2000_drm/issues/15
> > > >
> > > > That doesn't really make sense to me. You never feed linear data to
> > > > actual displays.
> > > >
> > >
> > > I have a display with gamma 1.0 (as populated in EDID) which I assume 
> > > means
> > > linear gamma (am I wrong here?) which is connected to FL2000 dongle, so 
> > > there is
> > > no gamma applied after de-gamma.
> >
> > Never seen one like that myself IIRC.
> >
> > Hmm. Looks like edid-decode (assuming that's what you used) decodes a
> > value of 0xff as 1.0 for EDID v1.3 and older. That may be what's
> > happening in your case. Unfortunately the spec only says ""If set to
> > FFh, the gamma value is not defined here." without any further hint
> > as to where it might actually be defined. I think the only other
> > place we know of is the DispID ext block. Do you have one of those?
> > I suspect DispID might require the EDID to be v1.4 though.
>
> Actually just found two ways an extension block might specify:
> Display Information Extension (DI-EXT), and Display Transfer
> Characteristics Data Block (DTCDB) as part of the CEA ext block.
>

First, I must reiterate that problem is solved for me, I was wrong in my
assumption that it has to do smth. with gamma, it was plain word order
misalignment. Thank you for support!

Just to close the topic with "weird" gamma 1.o display please see below the raw
EDID with my comments (parsed according to VESA-EEDID-A2):

00 FF FF FF FF FF FF 00  - header
04 81 - manufacturer
04 00 - product
01 00 00 00 - serial
01 - week
11 - year
01 03 - edid 1.3
80 - video input: digital, color depth undefined, interface undefined
0F - 15cm width
0A - 10cm height
00 - Gamma 1.0 (but value 0?)
0A - feature support: RGB 4:4:4 & YCrCb 4:4:4, preferred timing has details
00 00 00 00 00 00 00 00 00 00 - color characteristics empty
00 00 00 - established timings empty
01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 - unused standard timings 1
80 0C 20 80 30 E0 2D 10 28 30 D3 00 6C 44 00 00 00 18 - preferred timin

Re: [PATCH v2] drm/amd/amdgpu: cleanup coding style a bit

2020-05-07 Thread Christian König

Am 07.05.20 um 11:13 schrieb Bernard Zhao:

There is DEVICE_ATTR mechanism in separate attribute define.
So this change is to use attr array, also use
sysfs_create_files in init function & sysfs_remove_files in
fini function.
This maybe make the code a bit readable.

Signed-off-by: Bernard Zhao 


Reviewed-by: Christian König 



Changes since V1:
*Use DEVICE_ATTR mechanism

Link for V1:
*https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flore.kernel.org%2Fpatchwork%2Fpatch%2F1228076%2F&data=02%7C01%7Cchristian.koenig%40amd.com%7C073b9043be5346b3c90c08d7f266e6fb%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637244396096735223&sdata=PjFsYvmw2pvVisZ6TzMqOyoSr0m3DsFN%2F0q%2B%2FfBxACg%3D&reserved=0
---
  drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c | 43 ++--
  1 file changed, 13 insertions(+), 30 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
index 82a3299e53c0..57bbc70662ff 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
@@ -148,6 +148,15 @@ static DEVICE_ATTR(mem_info_vis_vram_used, S_IRUGO,
  static DEVICE_ATTR(mem_info_vram_vendor, S_IRUGO,
   amdgpu_mem_info_vram_vendor, NULL);
  
+static struct attribute *amdgpu_vram_mgr_attributes[] = {

+   &dev_attr_mem_info_vram_total.attr,
+   &dev_attr_mem_info_vis_vram_total.attr,
+   &dev_attr_mem_info_vram_used.attr,
+   &dev_attr_mem_info_vis_vram_used.attr,
+   &dev_attr_mem_info_vram_vendor.attr,
+   NULL
+};
+
  /**
   * amdgpu_vram_mgr_init - init VRAM manager and DRM MM
   *
@@ -172,31 +181,9 @@ static int amdgpu_vram_mgr_init(struct 
ttm_mem_type_manager *man,
man->priv = mgr;
  
  	/* Add the two VRAM-related sysfs files */

-   ret = device_create_file(adev->dev, &dev_attr_mem_info_vram_total);
-   if (ret) {
-   DRM_ERROR("Failed to create device file mem_info_vram_total\n");
-   return ret;
-   }
-   ret = device_create_file(adev->dev, &dev_attr_mem_info_vis_vram_total);
-   if (ret) {
-   DRM_ERROR("Failed to create device file 
mem_info_vis_vram_total\n");
-   return ret;
-   }
-   ret = device_create_file(adev->dev, &dev_attr_mem_info_vram_used);
-   if (ret) {
-   DRM_ERROR("Failed to create device file mem_info_vram_used\n");
-   return ret;
-   }
-   ret = device_create_file(adev->dev, &dev_attr_mem_info_vis_vram_used);
-   if (ret) {
-   DRM_ERROR("Failed to create device file 
mem_info_vis_vram_used\n");
-   return ret;
-   }
-   ret = device_create_file(adev->dev, &dev_attr_mem_info_vram_vendor);
-   if (ret) {
-   DRM_ERROR("Failed to create device file 
mem_info_vram_vendor\n");
-   return ret;
-   }
+   ret = sysfs_create_files(&adev->dev->kobj, amdgpu_vram_mgr_attributes);
+   if (ret)
+   DRM_ERROR("Failed to register sysfs\n");
  
  	return 0;

  }
@@ -219,11 +206,7 @@ static int amdgpu_vram_mgr_fini(struct 
ttm_mem_type_manager *man)
spin_unlock(&mgr->lock);
kfree(mgr);
man->priv = NULL;
-   device_remove_file(adev->dev, &dev_attr_mem_info_vram_total);
-   device_remove_file(adev->dev, &dev_attr_mem_info_vis_vram_total);
-   device_remove_file(adev->dev, &dev_attr_mem_info_vram_used);
-   device_remove_file(adev->dev, &dev_attr_mem_info_vis_vram_used);
-   device_remove_file(adev->dev, &dev_attr_mem_info_vram_vendor);
+   sysfs_remove_files(&adev->dev->kobj, amdgpu_vram_mgr_attributes);
return 0;
  }
  


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[Bug 205291] Cannot switch off Radeon HD 4330/4350/4550 with vgaswitcheroo

2020-05-07 Thread bugzilla-daemon
https://bugzilla.kernel.org/show_bug.cgi?id=205291

K J Petrie (kernel.b...@kjpetrie.co.uk) changed:

   What|Removed |Added

 Status|RESOLVED|REOPENED
 Resolution|CODE_FIX|---

--- Comment #12 from K J Petrie (kernel.b...@kjpetrie.co.uk) ---
Reopening as the problem has returned with 5.6.11, although the rattling sound
from the speaker (bug 207437) has now gone!

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[drm-tip:drm-tip 3/9] drivers/gpu/drm/i915/gt/intel_engine_cs.c:1428:31: error: 'struct intel_context' has no member named 'lrc_desc'

2020-05-07 Thread kbuild test robot
tree:   git://anongit.freedesktop.org/drm/drm-tip drm-tip
head:   6c0ee41a7c3201ef2a89800234803a95f65989be
commit: e81df648fc5bcd0fa702df401e02b7914c76ff71 [3/9] Merge remote-tracking 
branch 'drm/drm-next' into drm-tip
config: i386-allyesconfig (attached as .config)
compiler: gcc-7 (Ubuntu 7.5.0-6ubuntu2) 7.5.0
reproduce:
git checkout e81df648fc5bcd0fa702df401e02b7914c76ff71
# save the attached .config to linux build tree
make ARCH=i386 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kbuild test robot 

Note: the drm-tip/drm-tip HEAD 6c0ee41a7c3201ef2a89800234803a95f65989be builds 
fine.
  It only hurts bisectibility.

All error/warnings (new ones prefixed by >>):

   In file included from include/asm-generic/bug.h:19:0,
from arch/x86/include/asm/bug.h:83,
from include/linux/bug.h:5,
from include/linux/seq_file.h:7,
from include/drm/drm_print.h:31,
from drivers/gpu/drm/i915/gt/intel_engine_cs.c:25:
   drivers/gpu/drm/i915/gt/intel_engine_cs.c: In function 
'intel_engine_print_registers':
>> drivers/gpu/drm/i915/gt/intel_engine_cs.c:1428:31: error: 'struct 
>> intel_context' has no member named 'lrc_desc'
 upper_32_bits(rq->context->lrc_desc));
  ^
   include/linux/kernel.h:183:35: note: in definition of macro 'upper_32_bits'
#define upper_32_bits(n) ((u32)(((n) >> 16) >> 16))
  ^
   drivers/gpu/drm/i915/gt/intel_engine_cs.c:1440:31: error: 'struct 
intel_context' has no member named 'lrc_desc'
 upper_32_bits(rq->context->lrc_desc));
  ^
   include/linux/kernel.h:183:35: note: in definition of macro 'upper_32_bits'
#define upper_32_bits(n) ((u32)(((n) >> 16) >> 16))
  ^
--
   drivers/gpu/drm/i915/gt/intel_lrc.c: In function '__execlists_schedule_in':
>> drivers/gpu/drm/i915/gt/intel_lrc.c:1256:35: error: 'struct 
>> intel_engine_execlists' has no member named 'ccid'
 ce->lrc.ccid |= engine->execlists.ccid;
  ^
   In file included from include/linux/interrupt.h:6:0,
from drivers/gpu/drm/i915/gt/intel_lrc.c:134:
   drivers/gpu/drm/i915/gt/intel_lrc.c: In function 'timeslice_yield':
>> drivers/gpu/drm/i915/gt/intel_lrc.c:1804:34: error: 'struct intel_context' 
>> has no member named 'lrc_desc'
 return upper_32_bits(rq->context->lrc_desc) == READ_ONCE(el->yield);
 ^
   include/linux/kernel.h:183:35: note: in definition of macro 'upper_32_bits'
#define upper_32_bits(n) ((u32)(((n) >> 16) >> 16))
  ^
   drivers/gpu/drm/i915/gt/intel_lrc.c: In function 'active_context':
   drivers/gpu/drm/i915/gt/intel_lrc.c:2850:32: error: 'struct intel_context' 
has no member named 'lrc_desc'
  if (upper_32_bits(rq->context->lrc_desc) == ccid) {
   ^
   include/linux/kernel.h:183:35: note: in definition of macro 'upper_32_bits'
#define upper_32_bits(n) ((u32)(((n) >> 16) >> 16))
  ^
   drivers/gpu/drm/i915/gt/intel_lrc.c:2859:32: error: 'struct intel_context' 
has no member named 'lrc_desc'
  if (upper_32_bits(rq->context->lrc_desc) == ccid) {
   ^
   include/linux/kernel.h:183:35: note: in definition of macro 'upper_32_bits'
#define upper_32_bits(n) ((u32)(((n) >> 16) >> 16))
  ^
   drivers/gpu/drm/i915/gt/intel_lrc.c: In function 
'intel_execlists_submission_setup':
   drivers/gpu/drm/i915/gt/intel_lrc.c:4668:12: error: 'struct 
intel_engine_execlists' has no member named 'ccid'
  execlists->ccid |= engine->instance << (GEN11_ENGINE_INSTANCE_SHIFT - 32);
   ^~
   drivers/gpu/drm/i915/gt/intel_lrc.c:4669:12: error: 'struct 
intel_engine_execlists' has no member named 'ccid'
  execlists->ccid |= engine->class << (GEN11_ENGINE_CLASS_SHIFT - 32);
   ^~
   drivers/gpu/drm/i915/gt/intel_lrc.c: In function 'timeslice_yield':
>> drivers/gpu/drm/i915/gt/intel_lrc.c:1805:1: warning: control reaches end of 
>> non-void function [-Wreturn-type]
}
^

vim +1428 drivers/gpu/drm/i915/gt/intel_engine_cs.c

2229adc81380c46 drivers/gpu/drm/i915/gt/intel_engine_cs.c Chris Wilson  
 2019-10-16  1318  
eca153603f2f020 drivers/gpu/drm/i915/gt/intel_engine_cs.c Chris Wilson  
 2019-06-18  1319  static void intel_engine_print_registers(struct 
intel_engine_cs *engine,
3ceda3a4a856336 drivers/gpu/drm/i915/intel_engine_cs.cChris Wilson  
 2018-02-12  1320struct drm_printer *m)
f636edb214a5ffd drivers/gpu/drm/i915/intel_engine_cs.cChris Wilson  
 2017-10-09  1321  {
f636edb214a5ffd drivers/gpu/drm/i915/intel_engine_cs.cChris Wilson   

[PATCH v2 16/17] dt-bindings: mali-midgard: Allow dma-coherent

2020-05-07 Thread Andre Przywara
Add the boolean dma-coherent property to the list of allowed properties,
since some boards (Arm Juno) integrate the GPU this way.

Signed-off-by: Andre Przywara 
---
 Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml 
b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml
index 0407e45eb8c4..5d7165385e1f 100644
--- a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml
+++ b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml
@@ -87,6 +87,8 @@ properties:
   "#cooling-cells":
 const: 2
 
+  dma-coherent: true
+
 required:
   - compatible
   - reg
-- 
2.17.1

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[PATCH v11 14/14] drm/i915/psr: Use new DP VSC SDP compute routine on PSR

2020-05-07 Thread Gwan-gyeong Mun
In order to use a common VSC SDP Colorimetry calculating code on PSR,
it uses a new psr vsc sdp compute routine.
Because PSR routine has its own scenario and timings of writing a VSC SDP,
the current PSR routine needs to have its own drm_dp_vsc_sdp structure
member variable on struct i915_psr.

In order to calculate colorimetry information, intel_psr_update()
function and intel_psr_enable() function extend a drm_connector_state
argument.

There are no changes to PSR mechanism.

v3: Replace a structure name to drm_dp_vsc_sdp from intel_dp_vsc_sdp
v4: Rebased
v8: Rebased
v10: When a PSR is enabled, it needs to add DP_SDP_VSC to
 infoframes.enable.
 It is needed for comparing between HW and pipe_state of VSC_SDP.
V11: If PSR is disabled by flag, it don't enable psr on pipe compute.

Signed-off-by: Gwan-gyeong Mun 
Reviewed-by: Uma Shankar 
---
 drivers/gpu/drm/i915/display/intel_ddi.c |  4 +-
 drivers/gpu/drm/i915/display/intel_psr.c | 58 
 drivers/gpu/drm/i915/display/intel_psr.h |  6 ++-
 drivers/gpu/drm/i915/i915_drv.h  |  1 +
 4 files changed, 26 insertions(+), 43 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c 
b/drivers/gpu/drm/i915/display/intel_ddi.c
index d88431ebb34e..b4d20b33b9fd 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3682,7 +3682,7 @@ static void intel_enable_ddi_dp(struct intel_atomic_state 
*state,
intel_dp_stop_link_train(intel_dp);
 
intel_edp_backlight_on(crtc_state, conn_state);
-   intel_psr_enable(intel_dp, crtc_state);
+   intel_psr_enable(intel_dp, crtc_state, conn_state);
intel_dp_set_infoframes(encoder, true, crtc_state, conn_state);
intel_edp_drrs_enable(intel_dp, crtc_state);
 
@@ -3865,7 +3865,7 @@ static void intel_ddi_update_pipe_dp(struct 
intel_atomic_state *state,
 
intel_ddi_set_dp_msa(crtc_state, conn_state);
 
-   intel_psr_update(intel_dp, crtc_state);
+   intel_psr_update(intel_dp, crtc_state, conn_state);
intel_dp_set_infoframes(encoder, true, crtc_state, conn_state);
intel_edp_drrs_enable(intel_dp, crtc_state);
 
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c 
b/drivers/gpu/drm/i915/display/intel_psr.c
index a0569fdfeb16..dcb2dcde0078 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -30,6 +30,7 @@
 #include "intel_display_types.h"
 #include "intel_psr.h"
 #include "intel_sprite.h"
+#include "intel_hdmi.h"
 
 /**
  * DOC: Panel Self Refresh (PSR/SRD)
@@ -357,39 +358,6 @@ void intel_psr_init_dpcd(struct intel_dp *intel_dp)
}
 }
 
-static void intel_psr_setup_vsc(struct intel_dp *intel_dp,
-   const struct intel_crtc_state *crtc_state)
-{
-   struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
-   struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
-   struct dp_sdp psr_vsc;
-
-   if (dev_priv->psr.psr2_enabled) {
-   /* Prepare VSC Header for SU as per EDP 1.4 spec, Table 6.11 */
-   memset(&psr_vsc, 0, sizeof(psr_vsc));
-   psr_vsc.sdp_header.HB0 = 0;
-   psr_vsc.sdp_header.HB1 = 0x7;
-   if (dev_priv->psr.colorimetry_support) {
-   psr_vsc.sdp_header.HB2 = 0x5;
-   psr_vsc.sdp_header.HB3 = 0x13;
-   } else {
-   psr_vsc.sdp_header.HB2 = 0x4;
-   psr_vsc.sdp_header.HB3 = 0xe;
-   }
-   } else {
-   /* Prepare VSC packet as per EDP 1.3 spec, Table 3.10 */
-   memset(&psr_vsc, 0, sizeof(psr_vsc));
-   psr_vsc.sdp_header.HB0 = 0;
-   psr_vsc.sdp_header.HB1 = 0x7;
-   psr_vsc.sdp_header.HB2 = 0x2;
-   psr_vsc.sdp_header.HB3 = 0x8;
-   }
-
-   intel_dig_port->write_infoframe(&intel_dig_port->base,
-   crtc_state,
-   DP_SDP_VSC, &psr_vsc, sizeof(psr_vsc));
-}
-
 static void hsw_psr_setup_aux(struct intel_dp *intel_dp)
 {
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
@@ -756,6 +724,8 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
if (intel_dp != dev_priv->psr.dp)
return;
 
+if (!psr_global_enabled(dev_priv))
+   return;
/*
 * HSW spec explicitly says PSR is tied to port A.
 * BDW+ platforms have a instance of PSR registers per transcoder but
@@ -798,6 +768,7 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
 
crtc_state->has_psr = true;
crtc_state->has_psr2 = intel_psr2_config_valid(intel_dp, crtc_state);
+   crtc_state->infoframes.enable |= 
intel_hdmi_infoframe_enable(DP_SDP_VSC);
 }
 
 static void intel_psr_activate(struct intel_dp *intel_dp)
@@ -880,9 +851,12 @@ static void intel_psr_enable_sou

[PATCH v11 04/14] drm/i915: Include HDMI DRM infoframe in the crtc state dump

2020-05-07 Thread Gwan-gyeong Mun
Dump out the HDMI Dynamic Range and Mastering (DRM) infoframe in the
normal crtc state dump.

Signed-off-by: Gwan-gyeong Mun 
Reviewed-by: Uma Shankar 
---
 drivers/gpu/drm/i915/display/intel_display.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index fd6d63b03489..93f8ae9471e7 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -13023,6 +13023,9 @@ static void intel_dump_pipe_config(const struct 
intel_crtc_state *pipe_config,
if (pipe_config->infoframes.enable &
intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_VENDOR))
intel_dump_infoframe(dev_priv, &pipe_config->infoframes.hdmi);
+   if (pipe_config->infoframes.enable &
+   intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_DRM))
+   intel_dump_infoframe(dev_priv, &pipe_config->infoframes.drm);
 
drm_dbg_kms(&dev_priv->drm, "requested mode:\n");
drm_mode_debug_printmodeline(&pipe_config->hw.mode);
-- 
2.25.0

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[PATCH v11 05/14] drm/i915: Include DP HDR Metadata Infoframe SDP in the crtc state dump

2020-05-07 Thread Gwan-gyeong Mun
Dump out the DP HDR Metadata Infoframe SDP in the normal crtc state dump.

HDMI Dynamic Range and Mastering (DRM) infoframe and DP HDR Metadata
Infoframe SDP use the same member variable in infoframes of crtc state.

Signed-off-by: Gwan-gyeong Mun 
Reviewed-by: Uma Shankar 
---
 drivers/gpu/drm/i915/display/intel_display.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index 93f8ae9471e7..172574a60ddd 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -13026,6 +13026,9 @@ static void intel_dump_pipe_config(const struct 
intel_crtc_state *pipe_config,
if (pipe_config->infoframes.enable &
intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_DRM))
intel_dump_infoframe(dev_priv, &pipe_config->infoframes.drm);
+   if (pipe_config->infoframes.enable &
+   intel_hdmi_infoframe_enable(HDMI_PACKET_TYPE_GAMUT_METADATA))
+   intel_dump_infoframe(dev_priv, &pipe_config->infoframes.drm);
 
drm_dbg_kms(&dev_priv->drm, "requested mode:\n");
drm_mode_debug_printmodeline(&pipe_config->hw.mode);
-- 
2.25.0

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[PATCH v11 08/14] drm/i915: Add state readout for DP HDR Metadata Infoframe SDP

2020-05-07 Thread Gwan-gyeong Mun
Added state readout for DP HDR Metadata Infoframe SDP.

v9: Rebased
v10: Rebased

Signed-off-by: Gwan-gyeong Mun 
Reviewed-by: Uma Shankar 
---
 drivers/gpu/drm/i915/display/intel_ddi.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c 
b/drivers/gpu/drm/i915/display/intel_ddi.c
index 4cfb749dea0c..109c60710310 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -4234,6 +4234,9 @@ void intel_ddi_get_config(struct intel_encoder *encoder,
pipe_config->fec_enable);
}
 
+   pipe_config->infoframes.enable |=
+   intel_hdmi_infoframes_enabled(encoder, pipe_config);
+
break;
case TRANS_DDI_MODE_SELECT_DP_MST:
pipe_config->output_types |= BIT(INTEL_OUTPUT_DP_MST);
@@ -4245,6 +4248,9 @@ void intel_ddi_get_config(struct intel_encoder *encoder,

REG_FIELD_GET(TRANS_DDI_MST_TRANSPORT_SELECT_MASK, temp);
 
intel_dp_get_m_n(intel_crtc, pipe_config);
+
+   pipe_config->infoframes.enable |=
+   intel_hdmi_infoframes_enabled(encoder, pipe_config);
break;
default:
break;
@@ -4299,6 +4305,8 @@ void intel_ddi_get_config(struct intel_encoder *encoder,
 
if (INTEL_GEN(dev_priv) >= 8)
bdw_get_trans_port_sync_config(pipe_config);
+
+   intel_read_dp_sdp(encoder, pipe_config, 
HDMI_PACKET_TYPE_GAMUT_METADATA);
 }
 
 static enum intel_output_type
-- 
2.25.0

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[PATCH v11 02/14] drm/i915/dp: Read out DP SDPs

2020-05-07 Thread Gwan-gyeong Mun
It adds code to read the DP SDPs from the video DIP and unpack them into
the crtc state.

It adds routines that read out DP VSC SDP and DP HDR Metadata Infoframe SDP
In order to unpack DP VSC SDP, it adds intel_dp_vsc_sdp_unpack() function.
It follows DP 1.4a spec. [Table 2-116: VSC SDP Header Bytes] and
[Table 2-117: VSC SDP Payload for DB16 through DB18]

In order to unpack DP HDR Metadata Infoframe SDP, it adds
intel_dp_hdr_metadata_infoframe_sdp_unpack(). And it follows DP 1.4a spec.
([Table 2-125: INFOFRAME SDP v1.2 Header Bytes] and
[Table 2-126: INFOFRAME SDP v1.2 Payload Data Bytes - DB0 through DB31])
and CTA-861-G spec. [Table-42 Dynamic Range and Mastering InfoFrame].

A naming rule and style of intel_read_dp_sdp() function references
intel_read_infoframe() function of intel_hdmi.c

v2: Minor style fix
v3: Replace a structure name to drm_dp_vsc_sdp from intel_dp_vsc_sdp
v4: Use struct drm_device logging macros
v5: Addressed review comments from Uma
  - Polish commit message and comments
  - Combine the if checks of sdp.HB2 and sdp.HB3
  - Add 6bpc to unpacking of VSC SDP

Signed-off-by: Gwan-gyeong Mun 
Reviewed-by: Uma Shankar 
---
 drivers/gpu/drm/i915/display/intel_dp.c | 187 
 drivers/gpu/drm/i915/display/intel_dp.h |   3 +
 2 files changed, 190 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
b/drivers/gpu/drm/i915/display/intel_dp.c
index 6952b0295096..691f96519d07 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -4971,6 +4971,193 @@ void intel_dp_set_infoframes(struct intel_encoder 
*encoder,
intel_write_dp_sdp(encoder, crtc_state, 
HDMI_PACKET_TYPE_GAMUT_METADATA);
 }
 
+static int intel_dp_vsc_sdp_unpack(struct drm_dp_vsc_sdp *vsc,
+  const void *buffer, size_t size)
+{
+   const struct dp_sdp *sdp = buffer;
+
+   if (size < sizeof(struct dp_sdp))
+   return -EINVAL;
+
+   memset(vsc, 0, size);
+
+   if (sdp->sdp_header.HB0 != 0)
+   return -EINVAL;
+
+   if (sdp->sdp_header.HB1 != DP_SDP_VSC)
+   return -EINVAL;
+
+   vsc->sdp_type = sdp->sdp_header.HB1;
+   vsc->revision = sdp->sdp_header.HB2;
+   vsc->length = sdp->sdp_header.HB3;
+
+   if ((sdp->sdp_header.HB2 == 0x2 && sdp->sdp_header.HB3 == 0x8) ||
+   (sdp->sdp_header.HB2 == 0x4 && sdp->sdp_header.HB3 == 0xe)) {
+   /*
+* - HB2 = 0x2, HB3 = 0x8
+*   VSC SDP supporting 3D stereo + PSR
+* - HB2 = 0x4, HB3 = 0xe
+*   VSC SDP supporting 3D stereo + PSR2 with Y-coordinate of
+*   first scan line of the SU region (applies to eDP v1.4b
+*   and higher).
+*/
+   return 0;
+   } else if (sdp->sdp_header.HB2 == 0x5 && sdp->sdp_header.HB3 == 0x13) {
+   /*
+* - HB2 = 0x5, HB3 = 0x13
+*   VSC SDP supporting 3D stereo + PSR2 + Pixel 
Encoding/Colorimetry
+*   Format.
+*/
+   vsc->pixelformat = (sdp->db[16] >> 4) & 0xf;
+   vsc->colorimetry = sdp->db[16] & 0xf;
+   vsc->dynamic_range = (sdp->db[17] >> 7) & 0x1;
+
+   switch (sdp->db[17] & 0x7) {
+   case 0x0:
+   vsc->bpc = 6;
+   break;
+   case 0x1:
+   vsc->bpc = 8;
+   break;
+   case 0x2:
+   vsc->bpc = 10;
+   break;
+   case 0x3:
+   vsc->bpc = 12;
+   break;
+   case 0x4:
+   vsc->bpc = 16;
+   break;
+   default:
+   MISSING_CASE(sdp->db[17] & 0x7);
+   return -EINVAL;
+   }
+
+   vsc->content_type = sdp->db[18] & 0x7;
+   } else {
+   return -EINVAL;
+   }
+
+   return 0;
+}
+
+static int
+intel_dp_hdr_metadata_infoframe_sdp_unpack(struct hdmi_drm_infoframe 
*drm_infoframe,
+  const void *buffer, size_t size)
+{
+   int ret;
+
+   const struct dp_sdp *sdp = buffer;
+
+   if (size < sizeof(struct dp_sdp))
+   return -EINVAL;
+
+   if (sdp->sdp_header.HB0 != 0)
+   return -EINVAL;
+
+   if (sdp->sdp_header.HB1 != HDMI_INFOFRAME_TYPE_DRM)
+   return -EINVAL;
+
+   /*
+* Least Significant Eight Bits of (Data Byte Count – 1)
+* 1Dh (i.e., Data Byte Count = 30 bytes).
+*/
+   if (sdp->sdp_header.HB2 != 0x1D)
+   return -EINVAL;
+
+   /* Most Significant Two Bits of (Data Byte Count – 1), Clear to 00b. */
+   if ((sdp->sdp_header.HB3 & 0x3) != 0)
+   return -EINVAL;
+
+   /* INFOFRAME SDP Version Number *

[PATCH v11 09/14] drm/i915: Add state readout for DP VSC SDP

2020-05-07 Thread Gwan-gyeong Mun
Added state readout for DP VSC SDP and enabled state validation
for DP VSC SDP.

v2: Minor style fix
v3: Replace a structure name to drm_dp_vsc_sdp from intel_dp_vsc_sdp
v4: Use struct drm_device logging macros
v10: Skip checking of VSC SDP when a crtc config has psr.

Signed-off-by: Gwan-gyeong Mun 
Reviewed-by: Uma Shankar 
---
 drivers/gpu/drm/i915/display/intel_ddi.c |  1 +
 drivers/gpu/drm/i915/display/intel_display.c | 44 
 2 files changed, 45 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c 
b/drivers/gpu/drm/i915/display/intel_ddi.c
index 109c60710310..dc232cef867f 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -4307,6 +4307,7 @@ void intel_ddi_get_config(struct intel_encoder *encoder,
bdw_get_trans_port_sync_config(pipe_config);
 
intel_read_dp_sdp(encoder, pipe_config, 
HDMI_PACKET_TYPE_GAMUT_METADATA);
+   intel_read_dp_sdp(encoder, pipe_config, DP_SDP_VSC);
 }
 
 static enum intel_output_type
diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index d1c722dde77a..a7a1729a99bb 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -13489,6 +13489,13 @@ intel_compare_infoframe(const union hdmi_infoframe *a,
return memcmp(a, b, sizeof(*a)) == 0;
 }
 
+static bool
+intel_compare_dp_vsc_sdp(const struct drm_dp_vsc_sdp *a,
+const struct drm_dp_vsc_sdp *b)
+{
+   return memcmp(a, b, sizeof(*a)) == 0;
+}
+
 static void
 pipe_config_infoframe_mismatch(struct drm_i915_private *dev_priv,
   bool fastset, const char *name,
@@ -13514,6 +13521,31 @@ pipe_config_infoframe_mismatch(struct drm_i915_private 
*dev_priv,
}
 }
 
+static void
+pipe_config_dp_vsc_sdp_mismatch(struct drm_i915_private *dev_priv,
+   bool fastset, const char *name,
+   const struct drm_dp_vsc_sdp *a,
+   const struct drm_dp_vsc_sdp *b)
+{
+   if (fastset) {
+   if (!drm_debug_enabled(DRM_UT_KMS))
+   return;
+
+   drm_dbg_kms(&dev_priv->drm,
+   "fastset mismatch in %s dp sdp\n", name);
+   drm_dbg_kms(&dev_priv->drm, "expected:\n");
+   drm_dp_vsc_sdp_log(KERN_DEBUG, dev_priv->drm.dev, a);
+   drm_dbg_kms(&dev_priv->drm, "found:\n");
+   drm_dp_vsc_sdp_log(KERN_DEBUG, dev_priv->drm.dev, b);
+   } else {
+   drm_err(&dev_priv->drm, "mismatch in %s dp sdp\n", name);
+   drm_err(&dev_priv->drm, "expected:\n");
+   drm_dp_vsc_sdp_log(KERN_ERR, dev_priv->drm.dev, a);
+   drm_err(&dev_priv->drm, "found:\n");
+   drm_dp_vsc_sdp_log(KERN_ERR, dev_priv->drm.dev, b);
+   }
+}
+
 static void __printf(4, 5)
 pipe_config_mismatch(bool fastset, const struct intel_crtc *crtc,
 const char *name, const char *format, ...)
@@ -13715,6 +13747,17 @@ intel_pipe_config_compare(const struct 
intel_crtc_state *current_config,
} \
 } while (0)
 
+#define PIPE_CONF_CHECK_DP_VSC_SDP(name) do { \
+   if (!current_config->has_psr && !pipe_config->has_psr && \
+   !intel_compare_dp_vsc_sdp(¤t_config->infoframes.name, \
+ &pipe_config->infoframes.name)) { \
+   pipe_config_dp_vsc_sdp_mismatch(dev_priv, fastset, 
__stringify(name), \
+   
¤t_config->infoframes.name, \
+   &pipe_config->infoframes.name); 
\
+   ret = false; \
+   } \
+} while (0)
+
 #define PIPE_CONF_CHECK_COLOR_LUT(name1, name2, bit_precision) do { \
if (current_config->name1 != pipe_config->name1) { \
pipe_config_mismatch(fastset, crtc, __stringify(name1), \
@@ -13892,6 +13935,7 @@ intel_pipe_config_compare(const struct intel_crtc_state 
*current_config,
PIPE_CONF_CHECK_INFOFRAME(spd);
PIPE_CONF_CHECK_INFOFRAME(hdmi);
PIPE_CONF_CHECK_INFOFRAME(drm);
+   PIPE_CONF_CHECK_DP_VSC_SDP(vsc);
 
PIPE_CONF_CHECK_X(sync_mode_slaves_mask);
PIPE_CONF_CHECK_I(master_transcoder);
-- 
2.25.0

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[PATCH v11 01/14] video/hdmi: Add Unpack only function for DRM infoframe

2020-05-07 Thread Gwan-gyeong Mun
It adds an unpack only function for DRM infoframe for dynamic range and
mastering infoframe readout.
It unpacks the information data block contained in the binary buffer into
a structured frame of the HDMI Dynamic Range and Mastering (DRM)
information frame.

In contrast to hdmi_drm_infoframe_unpack() function, it does not verify
a checksum.

It can be used for unpacking a DP HDR Metadata Infoframe SDP case.
DP HDR Metadata Infoframe SDP uses the same Dynamic Range and Mastering
(DRM) information (CTA-861-G spec.) such as HDMI DRM infoframe.
But DP SDP header and payload structure are different from HDMI DRM
Infoframe. Therefore unpacking DRM infoframe for DP requires skipping of
a verifying checksum.

v9: Add clear comments to hdmi_drm_infoframe_unpack_only() and
hdmi_drm_infoframe_unpack() (Laurent Pinchart)

Signed-off-by: Gwan-gyeong Mun 
Reviewed-by: Uma Shankar 
Cc: Laurent Pinchart 
Cc: Ville Syrjala 
---
 drivers/video/hdmi.c | 65 +++-
 include/linux/hdmi.h |  2 ++
 2 files changed, 48 insertions(+), 19 deletions(-)

diff --git a/drivers/video/hdmi.c b/drivers/video/hdmi.c
index 856a8c4e84a2..e70792b3e367 100644
--- a/drivers/video/hdmi.c
+++ b/drivers/video/hdmi.c
@@ -1768,20 +1768,21 @@ hdmi_vendor_any_infoframe_unpack(union 
hdmi_vendor_any_infoframe *frame,
 }
 
 /**
- * hdmi_drm_infoframe_unpack() - unpack binary buffer to a HDMI DRM infoframe
+ * hdmi_drm_infoframe_unpack_only() - unpack binary buffer of CTA-861-G DRM
+ *infoframe DataBytes to a HDMI DRM
+ *infoframe
  * @frame: HDMI DRM infoframe
  * @buffer: source buffer
  * @size: size of buffer
  *
- * Unpacks the information contained in binary @buffer into a structured
- * @frame of the HDMI Dynamic Range and Mastering (DRM) information frame.
- * Also verifies the checksum as required by section 5.3.5 of the HDMI 1.4
- * specification.
+ * Unpacks CTA-861-G DRM infoframe DataBytes contained in the binary @buffer
+ * into a structured @frame of the HDMI Dynamic Range and Mastering (DRM)
+ * infoframe.
  *
  * Returns 0 on success or a negative error code on failure.
  */
-static int hdmi_drm_infoframe_unpack(struct hdmi_drm_infoframe *frame,
-const void *buffer, size_t size)
+int hdmi_drm_infoframe_unpack_only(struct hdmi_drm_infoframe *frame,
+  const void *buffer, size_t size)
 {
const u8 *ptr = buffer;
const u8 *temp;
@@ -1790,23 +1791,13 @@ static int hdmi_drm_infoframe_unpack(struct 
hdmi_drm_infoframe *frame,
int ret;
int i;
 
-   if (size < HDMI_INFOFRAME_SIZE(DRM))
-   return -EINVAL;
-
-   if (ptr[0] != HDMI_INFOFRAME_TYPE_DRM ||
-   ptr[1] != 1 ||
-   ptr[2] != HDMI_DRM_INFOFRAME_SIZE)
-   return -EINVAL;
-
-   if (hdmi_infoframe_checksum(buffer, HDMI_INFOFRAME_SIZE(DRM)) != 0)
+   if (size < HDMI_DRM_INFOFRAME_SIZE)
return -EINVAL;
 
ret = hdmi_drm_infoframe_init(frame);
if (ret)
return ret;
 
-   ptr += HDMI_INFOFRAME_HEADER_SIZE;
-
frame->eotf = ptr[0] & 0x7;
frame->metadata_type = ptr[1] & 0x7;
 
@@ -1814,7 +1805,7 @@ static int hdmi_drm_infoframe_unpack(struct 
hdmi_drm_infoframe *frame,
for (i = 0; i < 3; i++) {
x_lsb = *temp++;
x_msb = *temp++;
-   frame->display_primaries[i].x =  (x_msb << 8) | x_lsb;
+   frame->display_primaries[i].x = (x_msb << 8) | x_lsb;
y_lsb = *temp++;
y_msb = *temp++;
frame->display_primaries[i].y = (y_msb << 8) | y_lsb;
@@ -1830,6 +1821,42 @@ static int hdmi_drm_infoframe_unpack(struct 
hdmi_drm_infoframe *frame,
 
return 0;
 }
+EXPORT_SYMBOL(hdmi_drm_infoframe_unpack_only);
+
+/**
+ * hdmi_drm_infoframe_unpack() - unpack binary buffer to a HDMI DRM infoframe
+ * @frame: HDMI DRM infoframe
+ * @buffer: source buffer
+ * @size: size of buffer
+ *
+ * Unpacks the CTA-861-G DRM infoframe contained in the binary @buffer into
+ * a structured @frame of the HDMI Dynamic Range and Mastering (DRM)
+ * infoframe. It also verifies the checksum as required by section 5.3.5 of
+ * the HDMI 1.4 specification.
+ *
+ * Returns 0 on success or a negative error code on failure.
+ */
+static int hdmi_drm_infoframe_unpack(struct hdmi_drm_infoframe *frame,
+const void *buffer, size_t size)
+{
+   const u8 *ptr = buffer;
+   int ret;
+
+   if (size < HDMI_INFOFRAME_SIZE(DRM))
+   return -EINVAL;
+
+   if (ptr[0] != HDMI_INFOFRAME_TYPE_DRM ||
+   ptr[1] != 1 ||
+   ptr[2] != HDMI_DRM_INFOFRAME_SIZE)
+   return -EINVAL;
+
+   if (hdmi_infoframe_checksum(buffer, HDMI_INFOFRAME_SIZE(DRM)) != 0)
+   return -EINVAL;
+
+   ret = hdmi_drm_infoframe_unpack_only(

[PATCH v11 00/14] In order to readout DP SDPs, refactors the handling of DP SDPs

2020-05-07 Thread Gwan-gyeong Mun
In order to readout DP SDPs (Secondary Data Packet: DP HDR Metadata
Infoframe SDP, DP VSC SDP), it refactors handling DP SDPs codes.
It adds new compute routines for DP HDR Metadata Infoframe SDP
and DP VSC SDP. 
And new writing routines of DP SDPs (Secondary Data Packet) that uses
computed configs.
New reading routines of DP SDPs are added for readout.
It adds a logging function for DP VSC SDP.
When receiving video it is very useful to be able to log DP VSC SDP.
This greatly simplifies debugging.
In order to use a common VSC SDP Colorimetry calculating code on PSR,
it uses a new psr vsc sdp compute routine.

v2: Minor style fix
v3: 
  - Add a new drm data structure for DP VSC SDP
  - Replace a structure name to drm_dp_vsc_sdp from intel_dp_vsc_sdp
  - Move logging functions to drm core [Jani N]
And use drm core's DP VSC SDP logging function
  - Explicitly disable unused DIPs (AVI, GCP, VS, SPD, DRM. They will be
used for HDMI), when intel_dp_set_infoframes() function will be called.
v4:
  - Use struct drm_device logging macros
  - Rebased
v5:
  - Use intel_de_*() functions for register access
  - Add warning where a bpc is 6 and a pixel format is RGB.
  - Addressed review comments from Uma
Add kernel docs for added data structures
Rename enum dp_colorspace to dp_pixelformat
Polish commit message and comments
Combine the if checks of sdp.HB2 and sdp.HB3
Add 6bpc to packining and unpacking of VSC SDP
v6: Fix enabled infoframe states of lspcon
v7: Fix the wrong check of combination bpc 6 and RGB pixelformat
v8: Rebased
v9: Add clear comments to hdmi_drm_infoframe_unpack_only() and
hdmi_drm_infoframe_unpack() (Laurent Pinchart)
v10:
  - Fix packing of VSC SDP where Pixel Encoding/Colorimetry Format is not
supported
  - When a PSR is enabled, it needs to add DP_SDP_VSC to infoframes.enable.
  - Change a checking of PSR state.
  - Skip checking of VSC SDP when a crtc config has psr.
  - Rebased
V11: If PSR is disabled by flag, it don't enable psr on pipe compute

Gwan-gyeong Mun (14):
  video/hdmi: Add Unpack only function for DRM infoframe
  drm/i915/dp: Read out DP SDPs
  drm: Add logging function for DP VSC SDP
  drm/i915: Include HDMI DRM infoframe in the crtc state dump
  drm/i915: Include DP HDR Metadata Infoframe SDP in the crtc state dump
  drm/i915: Include DP VSC SDP in the crtc state dump
  drm/i915: Program DP SDPs with computed configs
  drm/i915: Add state readout for DP HDR Metadata Infoframe SDP
  drm/i915: Add state readout for DP VSC SDP
  drm/i915: Fix enabled infoframe states of lspcon
  drm/i915: Program DP SDPs on pipe updates
  drm/i915: Stop sending DP SDPs on ddi disable
  drm/i915/dp: Add compute routine for DP PSR VSC SDP
  drm/i915/psr: Use new DP VSC SDP compute routine on PSR

 drivers/gpu/drm/drm_dp_helper.c  | 174 
 drivers/gpu/drm/i915/display/intel_ddi.c |  19 +-
 drivers/gpu/drm/i915/display/intel_display.c |  63 +++
 drivers/gpu/drm/i915/display/intel_dp.c  | 406 ++-
 drivers/gpu/drm/i915/display/intel_dp.h  |  15 +-
 drivers/gpu/drm/i915/display/intel_lspcon.c  |   2 +-
 drivers/gpu/drm/i915/display/intel_psr.c |  58 +--
 drivers/gpu/drm/i915/display/intel_psr.h |   6 +-
 drivers/gpu/drm/i915/i915_drv.h  |   1 +
 drivers/video/hdmi.c |  65 ++-
 include/drm/drm_dp_helper.h  |   3 +
 include/linux/hdmi.h |   2 +
 12 files changed, 551 insertions(+), 263 deletions(-)

-- 
2.25.0

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[PATCH v11 10/14] drm/i915: Fix enabled infoframe states of lspcon

2020-05-07 Thread Gwan-gyeong Mun
Compared to implementation of DP and HDMI's encoder->infoframes_enabled,
the lspcon's implementation returns its active state. (we expect enabled
infoframe states of HW.) It leads to pipe state mismatch error
when ddi_get_config is called.

Because the current implementation of lspcon is not ready to support
readout infoframes, we need to return 0 here.

In order to support readout to lspcon, we need to implement read_infoframe
and infoframes_enabled. And set_infoframes also have to set an appropriate
bit on crtc_state->infoframes.enable

Cc: Ville Syrjälä 
Signed-off-by: Gwan-gyeong Mun 
Reviewed-by: Uma Shankar 
---
 drivers/gpu/drm/i915/display/intel_lspcon.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c 
b/drivers/gpu/drm/i915/display/intel_lspcon.c
index d807c5648c87..6ff7b226f0a1 100644
--- a/drivers/gpu/drm/i915/display/intel_lspcon.c
+++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
@@ -522,7 +522,7 @@ u32 lspcon_infoframes_enabled(struct intel_encoder *encoder,
  const struct intel_crtc_state *pipe_config)
 {
/* FIXME actually read this from the hw */
-   return enc_to_intel_lspcon(encoder)->active;
+   return 0;
 }
 
 void lspcon_resume(struct intel_lspcon *lspcon)
-- 
2.25.0

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[PATCH v11 07/14] drm/i915: Program DP SDPs with computed configs

2020-05-07 Thread Gwan-gyeong Mun
In order to use computed config for DP SDPs (DP VSC SDP and DP HDR Metadata
Infoframe SDP), it replaces intel_dp_vsc_enable() function and
intel_dp_hdr_metadata_enable() function to intel_dp_set_infoframes()
function.
And it removes unused functions.

Before:
 intel_dp_vsc_enable() and intel_dp_hdr_metadata_enable() compute sdp
 configs and program sdp registers on enable callback of encoder.

After:
 It separates computing of sdp configs and programming of sdp register.
 The compute config callback of encoder calls computing sdp configs.
 The enable callback of encoder calls programming sdp register.

v3: Rebased
v5: Polish commit message [Uma]
v10: Rebased

Signed-off-by: Gwan-gyeong Mun 
Reviewed-by: Uma Shankar 
---
 drivers/gpu/drm/i915/display/intel_ddi.c |   3 +-
 drivers/gpu/drm/i915/display/intel_dp.c  | 229 ---
 drivers/gpu/drm/i915/display/intel_dp.h  |   6 -
 3 files changed, 1 insertion(+), 237 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c 
b/drivers/gpu/drm/i915/display/intel_ddi.c
index 5601673c3f30..4cfb749dea0c 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3681,8 +3681,7 @@ static void intel_enable_ddi_dp(struct intel_atomic_state 
*state,
 
intel_edp_backlight_on(crtc_state, conn_state);
intel_psr_enable(intel_dp, crtc_state);
-   intel_dp_vsc_enable(intel_dp, crtc_state, conn_state);
-   intel_dp_hdr_metadata_enable(intel_dp, crtc_state, conn_state);
+   intel_dp_set_infoframes(encoder, true, crtc_state, conn_state);
intel_edp_drrs_enable(intel_dp, crtc_state);
 
if (crtc_state->has_audio)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
b/drivers/gpu/drm/i915/display/intel_dp.c
index 691f96519d07..3325a60bd297 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -5158,235 +5158,6 @@ void intel_read_dp_sdp(struct intel_encoder *encoder,
}
 }
 
-static void
-intel_dp_setup_vsc_sdp(struct intel_dp *intel_dp,
-  const struct intel_crtc_state *crtc_state,
-  const struct drm_connector_state *conn_state)
-{
-   struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
-   struct dp_sdp vsc_sdp = {};
-
-   /* Prepare VSC Header for SU as per DP 1.4a spec, Table 2-119 */
-   vsc_sdp.sdp_header.HB0 = 0;
-   vsc_sdp.sdp_header.HB1 = 0x7;
-
-   /*
-* VSC SDP supporting 3D stereo, PSR2, and Pixel Encoding/
-* Colorimetry Format indication.
-*/
-   vsc_sdp.sdp_header.HB2 = 0x5;
-
-   /*
-* VSC SDP supporting 3D stereo, + PSR2, + Pixel Encoding/
-* Colorimetry Format indication (HB2 = 05h).
-*/
-   vsc_sdp.sdp_header.HB3 = 0x13;
-
-   /* DP 1.4a spec, Table 2-120 */
-   switch (crtc_state->output_format) {
-   case INTEL_OUTPUT_FORMAT_YCBCR444:
-   vsc_sdp.db[16] = 0x1 << 4; /* YCbCr 444 : DB16[7:4] = 1h */
-   break;
-   case INTEL_OUTPUT_FORMAT_YCBCR420:
-   vsc_sdp.db[16] = 0x3 << 4; /* YCbCr 420 : DB16[7:4] = 3h */
-   break;
-   case INTEL_OUTPUT_FORMAT_RGB:
-   default:
-   /* RGB: DB16[7:4] = 0h */
-   break;
-   }
-
-   switch (conn_state->colorspace) {
-   case DRM_MODE_COLORIMETRY_BT709_YCC:
-   vsc_sdp.db[16] |= 0x1;
-   break;
-   case DRM_MODE_COLORIMETRY_XVYCC_601:
-   vsc_sdp.db[16] |= 0x2;
-   break;
-   case DRM_MODE_COLORIMETRY_XVYCC_709:
-   vsc_sdp.db[16] |= 0x3;
-   break;
-   case DRM_MODE_COLORIMETRY_SYCC_601:
-   vsc_sdp.db[16] |= 0x4;
-   break;
-   case DRM_MODE_COLORIMETRY_OPYCC_601:
-   vsc_sdp.db[16] |= 0x5;
-   break;
-   case DRM_MODE_COLORIMETRY_BT2020_CYCC:
-   case DRM_MODE_COLORIMETRY_BT2020_RGB:
-   vsc_sdp.db[16] |= 0x6;
-   break;
-   case DRM_MODE_COLORIMETRY_BT2020_YCC:
-   vsc_sdp.db[16] |= 0x7;
-   break;
-   case DRM_MODE_COLORIMETRY_DCI_P3_RGB_D65:
-   case DRM_MODE_COLORIMETRY_DCI_P3_RGB_THEATER:
-   vsc_sdp.db[16] |= 0x4; /* DCI-P3 (SMPTE RP 431-2) */
-   break;
-   default:
-   /* sRGB (IEC 61966-2-1) / ITU-R BT.601: DB16[0:3] = 0h */
-
-   /* RGB->YCBCR color conversion uses the BT.709 color space. */
-   if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420)
-   vsc_sdp.db[16] |= 0x1; /* 0x1, ITU-R BT.709 */
-   break;
-   }
-
-   /*
-* For pixel encoding formats YCbCr444, YCbCr422, YCbCr420, and Y Only,
-* the following Component Bit Depth values are defined:
-* 001b = 8bpc.
-* 010b = 10bpc.
-* 011b = 12bpc.
-* 100b = 16bpc.
-*/
-   switch 

[PATCH v11 03/14] drm: Add logging function for DP VSC SDP

2020-05-07 Thread Gwan-gyeong Mun
When receiving video it is very useful to be able to log DP VSC SDP.
This greatly simplifies debugging.

v2: Minor style fix
v3: Move logging functions to drm core [Jani N]
v5: Rebased
v10: Rebased

Signed-off-by: Gwan-gyeong Mun 
Reviewed-by: Uma Shankar 
---
 drivers/gpu/drm/drm_dp_helper.c | 174 
 include/drm/drm_dp_helper.h |   3 +
 2 files changed, 177 insertions(+)

diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
index 612a59ec8116..43e57632b00a 100644
--- a/drivers/gpu/drm/drm_dp_helper.c
+++ b/drivers/gpu/drm/drm_dp_helper.c
@@ -1629,3 +1629,177 @@ int drm_dp_set_phy_test_pattern(struct drm_dp_aux *aux,
return 0;
 }
 EXPORT_SYMBOL(drm_dp_set_phy_test_pattern);
+
+static const char *dp_pixelformat_get_name(enum dp_pixelformat pixelformat)
+{
+   if (pixelformat < 0 || pixelformat > DP_PIXELFORMAT_RESERVED)
+   return "Invalid";
+
+   switch (pixelformat) {
+   case DP_PIXELFORMAT_RGB:
+   return "RGB";
+   case DP_PIXELFORMAT_YUV444:
+   return "YUV444";
+   case DP_PIXELFORMAT_YUV422:
+   return "YUV422";
+   case DP_PIXELFORMAT_YUV420:
+   return "YUV420";
+   case DP_PIXELFORMAT_Y_ONLY:
+   return "Y_ONLY";
+   case DP_PIXELFORMAT_RAW:
+   return "RAW";
+   default:
+   return "Reserved";
+   }
+}
+
+static const char *dp_colorimetry_get_name(enum dp_pixelformat pixelformat,
+  enum dp_colorimetry colorimetry)
+{
+   if (pixelformat < 0 || pixelformat > DP_PIXELFORMAT_RESERVED)
+   return "Invalid";
+
+   switch (colorimetry) {
+   case DP_COLORIMETRY_DEFAULT:
+   switch (pixelformat) {
+   case DP_PIXELFORMAT_RGB:
+   return "sRGB";
+   case DP_PIXELFORMAT_YUV444:
+   case DP_PIXELFORMAT_YUV422:
+   case DP_PIXELFORMAT_YUV420:
+   return "BT.601";
+   case DP_PIXELFORMAT_Y_ONLY:
+   return "DICOM PS3.14";
+   case DP_PIXELFORMAT_RAW:
+   return "Custom Color Profile";
+   default:
+   return "Reserved";
+   }
+   case DP_COLORIMETRY_RGB_WIDE_FIXED: /* and DP_COLORIMETRY_BT709_YCC */
+   switch (pixelformat) {
+   case DP_PIXELFORMAT_RGB:
+   return "Wide Fixed";
+   case DP_PIXELFORMAT_YUV444:
+   case DP_PIXELFORMAT_YUV422:
+   case DP_PIXELFORMAT_YUV420:
+   return "BT.709";
+   default:
+   return "Reserved";
+   }
+   case DP_COLORIMETRY_RGB_WIDE_FLOAT: /* and DP_COLORIMETRY_XVYCC_601 */
+   switch (pixelformat) {
+   case DP_PIXELFORMAT_RGB:
+   return "Wide Float";
+   case DP_PIXELFORMAT_YUV444:
+   case DP_PIXELFORMAT_YUV422:
+   case DP_PIXELFORMAT_YUV420:
+   return "xvYCC 601";
+   default:
+   return "Reserved";
+   }
+   case DP_COLORIMETRY_OPRGB: /* and DP_COLORIMETRY_XVYCC_709 */
+   switch (pixelformat) {
+   case DP_PIXELFORMAT_RGB:
+   return "OpRGB";
+   case DP_PIXELFORMAT_YUV444:
+   case DP_PIXELFORMAT_YUV422:
+   case DP_PIXELFORMAT_YUV420:
+   return "xvYCC 709";
+   default:
+   return "Reserved";
+   }
+   case DP_COLORIMETRY_DCI_P3_RGB: /* and DP_COLORIMETRY_SYCC_601 */
+   switch (pixelformat) {
+   case DP_PIXELFORMAT_RGB:
+   return "DCI-P3";
+   case DP_PIXELFORMAT_YUV444:
+   case DP_PIXELFORMAT_YUV422:
+   case DP_PIXELFORMAT_YUV420:
+   return "sYCC 601";
+   default:
+   return "Reserved";
+   }
+   case DP_COLORIMETRY_RGB_CUSTOM: /* and DP_COLORIMETRY_OPYCC_601 */
+   switch (pixelformat) {
+   case DP_PIXELFORMAT_RGB:
+   return "Custom Profile";
+   case DP_PIXELFORMAT_YUV444:
+   case DP_PIXELFORMAT_YUV422:
+   case DP_PIXELFORMAT_YUV420:
+   return "OpYCC 601";
+   default:
+   return "Reserved";
+   }
+   case DP_COLORIMETRY_BT2020_RGB: /* and DP_COLORIMETRY_BT2020_CYCC */
+   switch (pixelformat) {
+   case DP_PIXELFORMAT_RGB:
+   return "BT.2020 RGB";
+   case DP_PIXELFORMAT_YUV444:
+   case DP_PIXELFORMAT_YUV422:
+   case DP_PIXELFORMAT_YUV420:
+   re

[PATCH v11 11/14] drm/i915: Program DP SDPs on pipe updates

2020-05-07 Thread Gwan-gyeong Mun
Call intel_dp_set_infoframes() function on pipe updates to make sure
that we send VSC SDP and HDR Metadata Infoframe SDP (when applicable)
on fastsets.

Signed-off-by: Gwan-gyeong Mun 
Reviewed-by: Uma Shankar 
---
 drivers/gpu/drm/i915/display/intel_ddi.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c 
b/drivers/gpu/drm/i915/display/intel_ddi.c
index dc232cef867f..e0862b899f1b 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3864,6 +3864,7 @@ static void intel_ddi_update_pipe_dp(struct 
intel_atomic_state *state,
intel_ddi_set_dp_msa(crtc_state, conn_state);
 
intel_psr_update(intel_dp, crtc_state);
+   intel_dp_set_infoframes(encoder, true, crtc_state, conn_state);
intel_edp_drrs_enable(intel_dp, crtc_state);
 
intel_panel_update_backlight(state, encoder, crtc_state, conn_state);
-- 
2.25.0

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[PATCH v11 06/14] drm/i915: Include DP VSC SDP in the crtc state dump

2020-05-07 Thread Gwan-gyeong Mun
Dump out the DP VSC SDP in the normal crtc state dump

v3: Replace a structure name to drm_dp_vsc_sdp from intel_dp_vsc_sdp
Use drm core's DP VSC SDP logging function

Signed-off-by: Gwan-gyeong Mun 
Reviewed-by: Uma Shankar 
---
 drivers/gpu/drm/i915/display/intel_display.c | 13 +
 1 file changed, 13 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index 172574a60ddd..d1c722dde77a 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -12866,6 +12866,16 @@ intel_dump_infoframe(struct drm_i915_private *dev_priv,
hdmi_infoframe_log(KERN_DEBUG, dev_priv->drm.dev, frame);
 }
 
+static void
+intel_dump_dp_vsc_sdp(struct drm_i915_private *dev_priv,
+ const struct drm_dp_vsc_sdp *vsc)
+{
+   if (!drm_debug_enabled(DRM_UT_KMS))
+   return;
+
+   drm_dp_vsc_sdp_log(KERN_DEBUG, dev_priv->drm.dev, vsc);
+}
+
 #define OUTPUT_TYPE(x) [INTEL_OUTPUT_ ## x] = #x
 
 static const char * const output_type_str[] = {
@@ -13029,6 +13039,9 @@ static void intel_dump_pipe_config(const struct 
intel_crtc_state *pipe_config,
if (pipe_config->infoframes.enable &
intel_hdmi_infoframe_enable(HDMI_PACKET_TYPE_GAMUT_METADATA))
intel_dump_infoframe(dev_priv, &pipe_config->infoframes.drm);
+   if (pipe_config->infoframes.enable &
+   intel_hdmi_infoframe_enable(DP_SDP_VSC))
+   intel_dump_dp_vsc_sdp(dev_priv, &pipe_config->infoframes.vsc);
 
drm_dbg_kms(&dev_priv->drm, "requested mode:\n");
drm_mode_debug_printmodeline(&pipe_config->hw.mode);
-- 
2.25.0

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[PATCH v11 13/14] drm/i915/dp: Add compute routine for DP PSR VSC SDP

2020-05-07 Thread Gwan-gyeong Mun
In order to use a common VSC SDP Colorimetry calculating code on PSR,
it adds a compute routine for PSR VSC SDP.
As PSR routine can not use infoframes.vsc of crtc state, it also adds new
writing of DP SDPs (Secondary Data Packet) for PSR.
PSR routine has its own scenario and timings of writing a VSC SDP.

v3: Replace a structure name to drm_dp_vsc_sdp from intel_dp_vsc_sdp
v4: Use struct drm_device logging macros
v10: 1) Fix packing of VSC SDP where Pixel Encoding/Colorimetry Format is
not supported.
 2) Change a checking of PSR state.

Signed-off-by: Gwan-gyeong Mun 
Reviewed-by: Uma Shankar 
---
 drivers/gpu/drm/i915/display/intel_dp.c | 66 -
 drivers/gpu/drm/i915/display/intel_dp.h |  8 +++
 2 files changed, 72 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
b/drivers/gpu/drm/i915/display/intel_dp.c
index 3325a60bd297..67edbe06bd6e 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2487,8 +2487,8 @@ static void intel_dp_compute_vsc_sdp(struct intel_dp 
*intel_dp,
 {
struct drm_dp_vsc_sdp *vsc = &crtc_state->infoframes.vsc;
 
-   /* When PSR is enabled, VSC SDP is handled by PSR routine */
-   if (intel_psr_enabled(intel_dp))
+   /* When a crtc state has PSR, VSC SDP will be handled by PSR routine */
+   if (crtc_state->has_psr)
return;
 
if (!intel_dp_needs_vsc_sdp(crtc_state, conn_state))
@@ -2500,6 +2500,42 @@ static void intel_dp_compute_vsc_sdp(struct intel_dp 
*intel_dp,
 &crtc_state->infoframes.vsc);
 }
 
+void intel_dp_compute_psr_vsc_sdp(struct intel_dp *intel_dp,
+ const struct intel_crtc_state *crtc_state,
+ const struct drm_connector_state *conn_state,
+ struct drm_dp_vsc_sdp *vsc)
+{
+   struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
+
+   vsc->sdp_type = DP_SDP_VSC;
+
+   if (dev_priv->psr.psr2_enabled) {
+   if (dev_priv->psr.colorimetry_support &&
+   intel_dp_needs_vsc_sdp(crtc_state, conn_state)) {
+   /* [PSR2, +Colorimetry] */
+   intel_dp_compute_vsc_colorimetry(crtc_state, conn_state,
+vsc);
+   } else {
+   /*
+* [PSR2, -Colorimetry]
+* Prepare VSC Header for SU as per eDP 1.4 spec, Table 
6-11
+* 3D stereo + PSR/PSR2 + Y-coordinate.
+*/
+   vsc->revision = 0x4;
+   vsc->length = 0xe;
+   }
+   } else {
+   /*
+* [PSR1]
+* Prepare VSC Header for SU as per DP 1.4 spec, Table 2-118
+* VSC SDP supporting 3D stereo + PSR (applies to eDP v1.3 or
+* higher).
+*/
+   vsc->revision = 0x2;
+   vsc->length = 0x8;
+   }
+}
+
 static void
 intel_dp_compute_hdr_metadata_infoframe_sdp(struct intel_dp *intel_dp,
struct intel_crtc_state *crtc_state,
@@ -4791,6 +4827,13 @@ static ssize_t intel_dp_vsc_sdp_pack(const struct 
drm_dp_vsc_sdp *vsc,
sdp->sdp_header.HB2 = vsc->revision; /* Revision Number */
sdp->sdp_header.HB3 = vsc->length; /* Number of Valid Data Bytes */
 
+   /*
+* Only revision 0x5 supports Pixel Encoding/Colorimetry Format as
+* per DP 1.4a spec.
+*/
+   if (vsc->revision != 0x5)
+   goto out;
+
/* VSC SDP Payload for DB16 through DB18 */
/* Pixel Encoding and Colorimetry Formats  */
sdp->db[16] = (vsc->pixelformat & 0xf) << 4; /* DB16[7:4] */
@@ -4823,6 +4866,7 @@ static ssize_t intel_dp_vsc_sdp_pack(const struct 
drm_dp_vsc_sdp *vsc,
/* Content Type */
sdp->db[18] = vsc->content_type & 0x7;
 
+out:
return length;
 }
 
@@ -4935,6 +4979,24 @@ static void intel_write_dp_sdp(struct intel_encoder 
*encoder,
intel_dig_port->write_infoframe(encoder, crtc_state, type, &sdp, len);
 }
 
+void intel_write_dp_vsc_sdp(struct intel_encoder *encoder,
+   const struct intel_crtc_state *crtc_state,
+   struct drm_dp_vsc_sdp *vsc)
+{
+   struct intel_digital_port *intel_dig_port = enc_to_dig_port(encoder);
+   struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+   struct dp_sdp sdp = {};
+   ssize_t len;
+
+   len = intel_dp_vsc_sdp_pack(vsc, &sdp, sizeof(sdp));
+
+   if (drm_WARN_ON(&dev_priv->drm, len < 0))
+   return;
+
+   intel_dig_port->write_infoframe(encoder, crtc_state, DP_SDP_VSC,
+   &sdp, len);
+}
+
 void intel_dp_set_infoframes(struct intel_encoder

[PATCH v11 12/14] drm/i915: Stop sending DP SDPs on ddi disable

2020-05-07 Thread Gwan-gyeong Mun
Call intel_dp_set_infoframes(false) function on intel_ddi_post_disable_dp()
to make sure not to send VSC SDP and HDR Metadata Infoframe SDP.

v5: Polish commit message [Uma]

Signed-off-by: Gwan-gyeong Mun 
Reviewed-by: Uma Shankar 
---
 drivers/gpu/drm/i915/display/intel_ddi.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c 
b/drivers/gpu/drm/i915/display/intel_ddi.c
index e0862b899f1b..d88431ebb34e 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3472,6 +3472,8 @@ static void intel_ddi_post_disable_dp(struct 
intel_atomic_state *state,
  INTEL_OUTPUT_DP_MST);
enum phy phy = intel_port_to_phy(dev_priv, encoder->port);
 
+   intel_dp_set_infoframes(encoder, false, old_crtc_state, old_conn_state);
+
/*
 * Power down sink before disabling the port, otherwise we end
 * up getting interrupts from the sink on detecting link loss.
-- 
2.25.0

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[Bug 207613] New: Won't boot

2020-05-07 Thread bugzilla-daemon
https://bugzilla.kernel.org/show_bug.cgi?id=207613

Bug ID: 207613
   Summary: Won't boot
   Product: Drivers
   Version: 2.5
Kernel Version: 5.7.0.994
  Hardware: x86-64
OS: Linux
  Tree: Mainline
Status: NEW
  Severity: high
  Priority: P1
 Component: Video(DRI - non Intel)
  Assignee: drivers_video-...@kernel-bugs.osdl.org
  Reporter: m...@trentu.ca
Regression: No

Created attachment 288979
  --> https://bugzilla.kernel.org/attachment.cgi?id=288979&action=edit
dmesg from 5.7.0.994 boot attempt

Applies to a 2015 5k iMac 27" with AMD r9390x video card. I was asked to file
this as I have been testing 5.3, 5.4, 5.6 and 5.7 kernel, all of which boot
very slowly (> 3 minutes to working desktop), and also have delayed wakeup from
display sleep (~2 minutes) and delayed shutdown (~ 2 minutes). dmesg and
systemd analysis for these boots have been posted in
bugs.launchpad.net/bugs/1875211.

I have been asked to test several of the 5.7 rc kernels and the latest version
(5.7.0.994). Only one of these versions would boot at all (rc3); the other rc
kernels would only get as far as the login screen, and 5.7.0.994 wouldn't get
even that far. Attached is the dmesg to the 5.7.0.994 boot attempt.

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[PATCH AUTOSEL 5.6 21/50] drm/amd/display: blank dp stream before re-train the link

2020-05-07 Thread Sasha Levin
From: Xiaodong Yan 

[ Upstream commit 718a5569b6fa6e1f49f1ae76a3c18acb4ddb74f1 ]

[Why]
When link loss happened, monitor can not light up if only re-train the
link.

[How]
Blank all the DP streams on this link before re-train the link, and then
unblank the stream

Signed-off-by: Xiaodong Yan 
Reviewed-by: Tony Cheng 
Acked-by: Rodrigo Siqueira 
Signed-off-by: Alex Deucher 
Signed-off-by: Sasha Levin 
---
 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 12 
 1 file changed, 12 insertions(+)

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 
b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
index fd9e69634c50a..1b6c75a4dd60a 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
@@ -2885,6 +2885,12 @@ bool dc_link_handle_hpd_rx_irq(struct dc_link *link, 
union hpd_irq_data *out_hpd
sizeof(hpd_irq_dpcd_data),
"Status: ");
 
+   for (i = 0; i < MAX_PIPES; i++) {
+   pipe_ctx = 
&link->dc->current_state->res_ctx.pipe_ctx[i];
+   if (pipe_ctx && pipe_ctx->stream && 
pipe_ctx->stream->link == link)
+   link->dc->hwss.blank_stream(pipe_ctx);
+   }
+
for (i = 0; i < MAX_PIPES; i++) {
pipe_ctx = 
&link->dc->current_state->res_ctx.pipe_ctx[i];
if (pipe_ctx && pipe_ctx->stream && 
pipe_ctx->stream->link == link)
@@ -2904,6 +2910,12 @@ bool dc_link_handle_hpd_rx_irq(struct dc_link *link, 
union hpd_irq_data *out_hpd
if (pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST)
dc_link_reallocate_mst_payload(link);
 
+   for (i = 0; i < MAX_PIPES; i++) {
+   pipe_ctx = 
&link->dc->current_state->res_ctx.pipe_ctx[i];
+   if (pipe_ctx && pipe_ctx->stream && 
pipe_ctx->stream->link == link)
+   link->dc->hwss.unblank_stream(pipe_ctx, 
&previous_link_settings);
+   }
+
status = false;
if (out_link_loss)
*out_link_loss = true;
-- 
2.20.1

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[PATCH AUTOSEL 5.6 25/50] dma-buf: Fix SET_NAME ioctl uapi

2020-05-07 Thread Sasha Levin
From: Daniel Vetter 

[ Upstream commit a5bff92eaac45bdf6221badf9505c26792fdf99e ]

The uapi is the same on 32 and 64 bit, but the number isn't. Everyone
who botched this please re-read:

https://www.kernel.org/doc/html/v5.4-preprc-cpu/ioctl/botching-up-ioctls.html

Also, the type argument for the ioctl macros is for the type the void
__user *arg pointer points at, which in this case would be the
variable-sized char[] of a 0 terminated string. So this was botched in
more than just the usual ways.

Cc: Sumit Semwal 
Cc: Chenbo Feng 
Cc: Greg Hackmann 
Cc: Daniel Vetter 
Cc: linux-me...@vger.kernel.org
Cc: linaro-mm-...@lists.linaro.org
Cc: minc...@kernel.org
Cc: sur...@google.com
Cc: jenhaoc...@google.com
Cc: Martin Liu 
Signed-off-by: Daniel Vetter 
Tested-by: Martin Liu 
Reviewed-by: Martin Liu 
Signed-off-by: Sumit Semwal 
  [sumits: updated some checkpatch fixes, corrected author email]
Link: 
https://patchwork.freedesktop.org/patch/msgid/20200407133002.3486387-1-daniel.vet...@ffwll.ch
Signed-off-by: Sasha Levin 
---
 drivers/dma-buf/dma-buf.c| 3 ++-
 include/uapi/linux/dma-buf.h | 6 ++
 2 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/dma-buf/dma-buf.c b/drivers/dma-buf/dma-buf.c
index c343c7c10b4cc..e7589d91de8fb 100644
--- a/drivers/dma-buf/dma-buf.c
+++ b/drivers/dma-buf/dma-buf.c
@@ -388,7 +388,8 @@ static long dma_buf_ioctl(struct file *file,
 
return ret;
 
-   case DMA_BUF_SET_NAME:
+   case DMA_BUF_SET_NAME_A:
+   case DMA_BUF_SET_NAME_B:
return dma_buf_set_name(dmabuf, (const char __user *)arg);
 
default:
diff --git a/include/uapi/linux/dma-buf.h b/include/uapi/linux/dma-buf.h
index dbc7092e04b5a..7f30393b92c3b 100644
--- a/include/uapi/linux/dma-buf.h
+++ b/include/uapi/linux/dma-buf.h
@@ -39,6 +39,12 @@ struct dma_buf_sync {
 
 #define DMA_BUF_BASE   'b'
 #define DMA_BUF_IOCTL_SYNC _IOW(DMA_BUF_BASE, 0, struct dma_buf_sync)
+
+/* 32/64bitness of this uapi was botched in android, there's no difference
+ * between them in actual uapi, they're just different numbers.
+ */
 #define DMA_BUF_SET_NAME   _IOW(DMA_BUF_BASE, 1, const char *)
+#define DMA_BUF_SET_NAME_A _IOW(DMA_BUF_BASE, 1, u32)
+#define DMA_BUF_SET_NAME_B _IOW(DMA_BUF_BASE, 1, u64)
 
 #endif
-- 
2.20.1

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[PATCH AUTOSEL 5.6 33/50] drm/amdgpu: bump version for invalidate L2 before SDMA IBs

2020-05-07 Thread Sasha Levin
From: Marek Olšák 

[ Upstream commit 9017a4897a20658f010bebea825262963c10afa6 ]

This fixes GPU hangs due to cache coherency issues.
Bump the driver version. Split out from the original patch.

Signed-off-by: Marek Olšák 
Reviewed-by: Christian König 
Tested-by: Pierre-Eric Pelloux-Prayer 
Signed-off-by: Alex Deucher 
Signed-off-by: Sasha Levin 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 42f4febe24c6d..8d45a2b662aeb 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -85,9 +85,10 @@
  * - 3.34.0 - Non-DC can flip correctly between buffers with different pitches
  * - 3.35.0 - Add drm_amdgpu_info_device::tcc_disabled_mask
  * - 3.36.0 - Allow reading more status registers on si/cik
+ * - 3.37.0 - L2 is invalidated before SDMA IBs, needed for correctness
  */
 #define KMS_DRIVER_MAJOR   3
-#define KMS_DRIVER_MINOR   36
+#define KMS_DRIVER_MINOR   37
 #define KMS_DRIVER_PATCHLEVEL  0
 
 int amdgpu_vram_limit = 0;
-- 
2.20.1

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[PATCH AUTOSEL 5.6 35/50] drm/amd/display: check if REFCLK_CNTL register is present

2020-05-07 Thread Sasha Levin
From: Dmytro Laktyushkin 

[ Upstream commit 3159d41db3a04330c31ece32f8b29752fc114848 ]

Check before programming the register since it isn't present on
all IPs using this code.

Signed-off-by: Dmytro Laktyushkin 
Reviewed-by: Eric Bernstein 
Acked-by: Aurabindo Pillai 
Signed-off-by: Alex Deucher 
Signed-off-by: Sasha Levin 
---
 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 
b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
index a444fed941849..ad422e00f9fec 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
@@ -2306,7 +2306,8 @@ void dcn20_fpga_init_hw(struct dc *dc)
 
REG_UPDATE(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_REFDIV, 2);
REG_UPDATE(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_ENABLE, 1);
-   REG_WRITE(REFCLK_CNTL, 0);
+   if (REG(REFCLK_CNTL))
+   REG_WRITE(REFCLK_CNTL, 0);
//
 
 
-- 
2.20.1

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[PATCH AUTOSEL 5.6 36/50] drm/amd/display: Defer cursor update around VUPDATE for all ASIC

2020-05-07 Thread Sasha Levin
From: Nicholas Kazlauskas 

[ Upstream commit fdfd2a858590d318cfee483bd1c73e00f77533af ]

[Why]
Fixes the following scenario:

- Flip has been prepared sometime during the frame, update pending
- Cursor update happens right when VUPDATE would happen
- OPTC lock acquired, VUPDATE is blocked until next frame
- Flip is delayed potentially infinitely

With the igt@kms_cursor_legacy cursor-vs-flip-legacy test we can
observe nearly *13* frames of delay for some flips on Navi.

[How]
Apply the Raven workaround generically. When close enough to VUPDATE
block cursor updates from occurring from the dc_stream_set_cursor_*
helpers.

This could perhaps be a little smarter by checking if there were
pending updates or flips earlier in the frame on the HUBP side before
applying the delay, but this should be fine for now.

This fixes the kms_cursor_legacy test.

Signed-off-by: Nicholas Kazlauskas 
Reviewed-by: Aric Cyr 
Acked-by: Aurabindo Pillai 
Signed-off-by: Alex Deucher 
Signed-off-by: Sasha Levin 
---
 .../gpu/drm/amd/display/dc/core/dc_stream.c   | 28 +--
 1 file changed, 14 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c 
b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c
index 6ddbb00ed37a5..8c20e9e907b2f 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c
@@ -239,24 +239,24 @@ static void delay_cursor_until_vupdate(struct pipe_ctx 
*pipe_ctx, struct dc *dc)
struct dc_stream_state *stream = pipe_ctx->stream;
unsigned int us_per_line;
 
-   if (stream->ctx->asic_id.chip_family == FAMILY_RV &&
-   ASICREV_IS_RAVEN(stream->ctx->asic_id.hw_internal_rev)) 
{
+   if (!dc->hwss.get_vupdate_offset_from_vsync)
+   return;
 
-   vupdate_line = dc->hwss.get_vupdate_offset_from_vsync(pipe_ctx);
-   if (!dc_stream_get_crtc_position(dc, &stream, 1, &vpos, &nvpos))
-   return;
+   vupdate_line = dc->hwss.get_vupdate_offset_from_vsync(pipe_ctx);
+   if (!dc_stream_get_crtc_position(dc, &stream, 1, &vpos, &nvpos))
+   return;
 
-   if (vpos >= vupdate_line)
-   return;
+   if (vpos >= vupdate_line)
+   return;
 
-   us_per_line = stream->timing.h_total * 1 / 
stream->timing.pix_clk_100hz;
-   lines_to_vupdate = vupdate_line - vpos;
-   us_to_vupdate = lines_to_vupdate * us_per_line;
+   us_per_line =
+   stream->timing.h_total * 1 / stream->timing.pix_clk_100hz;
+   lines_to_vupdate = vupdate_line - vpos;
+   us_to_vupdate = lines_to_vupdate * us_per_line;
 
-   /* 70 us is a conservative estimate of cursor update time*/
-   if (us_to_vupdate < 70)
-   udelay(us_to_vupdate);
-   }
+   /* 70 us is a conservative estimate of cursor update time*/
+   if (us_to_vupdate < 70)
+   udelay(us_to_vupdate);
 #endif
 }
 
-- 
2.20.1

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[PATCH AUTOSEL 5.6 32/50] drm/amd/powerplay: avoid using pm_en before it is initialized revised

2020-05-07 Thread Sasha Levin
From: Tiecheng Zhou 

[ Upstream commit 690ae30be163d5262feae01335b2a6f30569e5aa ]

hwmgr->pm_en is initialized at hwmgr_hw_init.

during amdgpu_device_init, there is amdgpu_asic_reset that calls to
soc15_asic_reset (for V320 usecase, Vega10 asic), in which:
1) soc15_asic_reset_method calls to pp_get_asic_baco_capability (pm_en)
2) soc15_asic_baco_reset calls to pp_set_asic_baco_state (pm_en)

pm_en is used in the above two cases while it has not yet been initialized

So avoid using pm_en in the above two functions for V320 passthrough.

Reviewed-by: Evan Quan 
Signed-off-by: Tiecheng Zhou 
Signed-off-by: Alex Deucher 
Signed-off-by: Sasha Levin 
---
 drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c 
b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
index c195575366a3b..e4e5a53b2b4ea 100644
--- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
+++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
@@ -1435,7 +1435,8 @@ static int pp_get_asic_baco_capability(void *handle, bool 
*cap)
if (!hwmgr)
return -EINVAL;
 
-   if (!hwmgr->pm_en || !hwmgr->hwmgr_func->get_asic_baco_capability)
+   if (!(hwmgr->not_vf && amdgpu_dpm) ||
+   !hwmgr->hwmgr_func->get_asic_baco_capability)
return 0;
 
mutex_lock(&hwmgr->smu_lock);
@@ -1469,7 +1470,8 @@ static int pp_set_asic_baco_state(void *handle, int state)
if (!hwmgr)
return -EINVAL;
 
-   if (!hwmgr->pm_en || !hwmgr->hwmgr_func->set_asic_baco_state)
+   if (!(hwmgr->not_vf && amdgpu_dpm) ||
+   !hwmgr->hwmgr_func->set_asic_baco_state)
return 0;
 
mutex_lock(&hwmgr->smu_lock);
-- 
2.20.1

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[PATCH AUTOSEL 5.4 19/35] dma-buf: Fix SET_NAME ioctl uapi

2020-05-07 Thread Sasha Levin
From: Daniel Vetter 

[ Upstream commit a5bff92eaac45bdf6221badf9505c26792fdf99e ]

The uapi is the same on 32 and 64 bit, but the number isn't. Everyone
who botched this please re-read:

https://www.kernel.org/doc/html/v5.4-preprc-cpu/ioctl/botching-up-ioctls.html

Also, the type argument for the ioctl macros is for the type the void
__user *arg pointer points at, which in this case would be the
variable-sized char[] of a 0 terminated string. So this was botched in
more than just the usual ways.

Cc: Sumit Semwal 
Cc: Chenbo Feng 
Cc: Greg Hackmann 
Cc: Daniel Vetter 
Cc: linux-me...@vger.kernel.org
Cc: linaro-mm-...@lists.linaro.org
Cc: minc...@kernel.org
Cc: sur...@google.com
Cc: jenhaoc...@google.com
Cc: Martin Liu 
Signed-off-by: Daniel Vetter 
Tested-by: Martin Liu 
Reviewed-by: Martin Liu 
Signed-off-by: Sumit Semwal 
  [sumits: updated some checkpatch fixes, corrected author email]
Link: 
https://patchwork.freedesktop.org/patch/msgid/20200407133002.3486387-1-daniel.vet...@ffwll.ch
Signed-off-by: Sasha Levin 
---
 drivers/dma-buf/dma-buf.c| 3 ++-
 include/uapi/linux/dma-buf.h | 6 ++
 2 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/dma-buf/dma-buf.c b/drivers/dma-buf/dma-buf.c
index 0fb0358f00736..adc88e1dc999a 100644
--- a/drivers/dma-buf/dma-buf.c
+++ b/drivers/dma-buf/dma-buf.c
@@ -388,7 +388,8 @@ static long dma_buf_ioctl(struct file *file,
 
return ret;
 
-   case DMA_BUF_SET_NAME:
+   case DMA_BUF_SET_NAME_A:
+   case DMA_BUF_SET_NAME_B:
return dma_buf_set_name(dmabuf, (const char __user *)arg);
 
default:
diff --git a/include/uapi/linux/dma-buf.h b/include/uapi/linux/dma-buf.h
index dbc7092e04b5a..7f30393b92c3b 100644
--- a/include/uapi/linux/dma-buf.h
+++ b/include/uapi/linux/dma-buf.h
@@ -39,6 +39,12 @@ struct dma_buf_sync {
 
 #define DMA_BUF_BASE   'b'
 #define DMA_BUF_IOCTL_SYNC _IOW(DMA_BUF_BASE, 0, struct dma_buf_sync)
+
+/* 32/64bitness of this uapi was botched in android, there's no difference
+ * between them in actual uapi, they're just different numbers.
+ */
 #define DMA_BUF_SET_NAME   _IOW(DMA_BUF_BASE, 1, const char *)
+#define DMA_BUF_SET_NAME_A _IOW(DMA_BUF_BASE, 1, u32)
+#define DMA_BUF_SET_NAME_B _IOW(DMA_BUF_BASE, 1, u64)
 
 #endif
-- 
2.20.1

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[PATCH AUTOSEL 5.6 37/50] drm/amd/display: Update downspread percent to match spreadsheet for DCN2.1

2020-05-07 Thread Sasha Levin
From: Sung Lee 

[ Upstream commit 668a6741f809f2d15d125cfe2b39661e8f1655ea ]

[WHY]
The downspread percentage was copied over from a previous version
of the display_mode_lib spreadsheet. This value has been updated,
and the previous value is too high to allow for such modes as
4K120hz. The new value is sufficient for such modes.

[HOW]
Update the value in dcn21_resource to match the spreadsheet.

Signed-off-by: Sung Lee 
Reviewed-by: Yongqiang Sun 
Acked-by: Aurabindo Pillai 
Signed-off-by: Alex Deucher 
Signed-off-by: Sasha Levin 
---
 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c 
b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
index 33d0a176841a5..122d3e734c59a 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
@@ -250,7 +250,7 @@ struct _vcs_dpi_soc_bounding_box_st dcn2_1_soc = {
.dram_channel_width_bytes = 4,
.fabric_datapath_to_dcn_data_return_bytes = 32,
.dcn_downspread_percent = 0.5,
-   .downspread_percent = 0.5,
+   .downspread_percent = 0.38,
.dram_page_open_time_ns = 50.0,
.dram_rw_turnaround_time_ns = 17.5,
.dram_return_buffer_per_channel_bytes = 8192,
-- 
2.20.1

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[PATCH AUTOSEL 5.6 39/50] drm/qxl: lost qxl_bo_kunmap_atomic_page in qxl_image_init_helper()

2020-05-07 Thread Sasha Levin
From: Vasily Averin 

[ Upstream commit 5b5703dbafae74adfbe298a56a81694172caf5e6 ]

v2: removed TODO reminder

Signed-off-by: Vasily Averin 
Link: 
http://patchwork.freedesktop.org/patch/msgid/a4e0ae09-a73c-1c62-04ef-3f990d41b...@virtuozzo.com
Signed-off-by: Gerd Hoffmann 
Signed-off-by: Sasha Levin 
---
 drivers/gpu/drm/qxl/qxl_image.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/qxl/qxl_image.c b/drivers/gpu/drm/qxl/qxl_image.c
index 43688ecdd8a04..60ab7151b84dc 100644
--- a/drivers/gpu/drm/qxl/qxl_image.c
+++ b/drivers/gpu/drm/qxl/qxl_image.c
@@ -212,7 +212,8 @@ qxl_image_init_helper(struct qxl_device *qdev,
break;
default:
DRM_ERROR("unsupported image bit depth\n");
-   return -EINVAL; /* TODO: cleanup */
+   qxl_bo_kunmap_atomic_page(qdev, image_bo, ptr);
+   return -EINVAL;
}
image->u.bitmap.flags = QXL_BITMAP_TOP_DOWN;
image->u.bitmap.x = width;
-- 
2.20.1

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[PATCH AUTOSEL 5.4 25/35] drm/amd/powerplay: avoid using pm_en before it is initialized revised

2020-05-07 Thread Sasha Levin
From: Tiecheng Zhou 

[ Upstream commit 690ae30be163d5262feae01335b2a6f30569e5aa ]

hwmgr->pm_en is initialized at hwmgr_hw_init.

during amdgpu_device_init, there is amdgpu_asic_reset that calls to
soc15_asic_reset (for V320 usecase, Vega10 asic), in which:
1) soc15_asic_reset_method calls to pp_get_asic_baco_capability (pm_en)
2) soc15_asic_baco_reset calls to pp_set_asic_baco_state (pm_en)

pm_en is used in the above two cases while it has not yet been initialized

So avoid using pm_en in the above two functions for V320 passthrough.

Reviewed-by: Evan Quan 
Signed-off-by: Tiecheng Zhou 
Signed-off-by: Alex Deucher 
Signed-off-by: Sasha Levin 
---
 drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c 
b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
index d306cc7119976..8bb5fbef7de0f 100644
--- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
+++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
@@ -1425,7 +1425,8 @@ static int pp_get_asic_baco_capability(void *handle, bool 
*cap)
if (!hwmgr)
return -EINVAL;
 
-   if (!hwmgr->pm_en || !hwmgr->hwmgr_func->get_asic_baco_capability)
+   if (!(hwmgr->not_vf && amdgpu_dpm) ||
+   !hwmgr->hwmgr_func->get_asic_baco_capability)
return 0;
 
mutex_lock(&hwmgr->smu_lock);
@@ -1459,7 +1460,8 @@ static int pp_set_asic_baco_state(void *handle, int state)
if (!hwmgr)
return -EINVAL;
 
-   if (!hwmgr->pm_en || !hwmgr->hwmgr_func->set_asic_baco_state)
+   if (!(hwmgr->not_vf && amdgpu_dpm) ||
+   !hwmgr->hwmgr_func->set_asic_baco_state)
return 0;
 
mutex_lock(&hwmgr->smu_lock);
-- 
2.20.1

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[PATCH AUTOSEL 5.4 27/35] drm/amd/display: check if REFCLK_CNTL register is present

2020-05-07 Thread Sasha Levin
From: Dmytro Laktyushkin 

[ Upstream commit 3159d41db3a04330c31ece32f8b29752fc114848 ]

Check before programming the register since it isn't present on
all IPs using this code.

Signed-off-by: Dmytro Laktyushkin 
Reviewed-by: Eric Bernstein 
Acked-by: Aurabindo Pillai 
Signed-off-by: Alex Deucher 
Signed-off-by: Sasha Levin 
---
 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 
b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
index e933f6a369f92..083c42e521f5c 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
@@ -2015,7 +2015,8 @@ static void dcn20_fpga_init_hw(struct dc *dc)
 
REG_UPDATE(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_REFDIV, 2);
REG_UPDATE(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_ENABLE, 1);
-   REG_WRITE(REFCLK_CNTL, 0);
+   if (REG(REFCLK_CNTL))
+   REG_WRITE(REFCLK_CNTL, 0);
//
 
 
-- 
2.20.1

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[PATCH AUTOSEL 5.4 28/35] drm/amd/display: Update downspread percent to match spreadsheet for DCN2.1

2020-05-07 Thread Sasha Levin
From: Sung Lee 

[ Upstream commit 668a6741f809f2d15d125cfe2b39661e8f1655ea ]

[WHY]
The downspread percentage was copied over from a previous version
of the display_mode_lib spreadsheet. This value has been updated,
and the previous value is too high to allow for such modes as
4K120hz. The new value is sufficient for such modes.

[HOW]
Update the value in dcn21_resource to match the spreadsheet.

Signed-off-by: Sung Lee 
Reviewed-by: Yongqiang Sun 
Acked-by: Aurabindo Pillai 
Signed-off-by: Alex Deucher 
Signed-off-by: Sasha Levin 
---
 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c 
b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
index 161bf7caf3ae0..bb7add5ea2273 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
@@ -247,7 +247,7 @@ struct _vcs_dpi_soc_bounding_box_st dcn2_1_soc = {
.dram_channel_width_bytes = 4,
.fabric_datapath_to_dcn_data_return_bytes = 32,
.dcn_downspread_percent = 0.5,
-   .downspread_percent = 0.5,
+   .downspread_percent = 0.38,
.dram_page_open_time_ns = 50.0,
.dram_rw_turnaround_time_ns = 17.5,
.dram_return_buffer_per_channel_bytes = 8192,
-- 
2.20.1

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[PATCH AUTOSEL 5.4 30/35] drm/qxl: lost qxl_bo_kunmap_atomic_page in qxl_image_init_helper()

2020-05-07 Thread Sasha Levin
From: Vasily Averin 

[ Upstream commit 5b5703dbafae74adfbe298a56a81694172caf5e6 ]

v2: removed TODO reminder

Signed-off-by: Vasily Averin 
Link: 
http://patchwork.freedesktop.org/patch/msgid/a4e0ae09-a73c-1c62-04ef-3f990d41b...@virtuozzo.com
Signed-off-by: Gerd Hoffmann 
Signed-off-by: Sasha Levin 
---
 drivers/gpu/drm/qxl/qxl_image.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/qxl/qxl_image.c b/drivers/gpu/drm/qxl/qxl_image.c
index 43688ecdd8a04..60ab7151b84dc 100644
--- a/drivers/gpu/drm/qxl/qxl_image.c
+++ b/drivers/gpu/drm/qxl/qxl_image.c
@@ -212,7 +212,8 @@ qxl_image_init_helper(struct qxl_device *qdev,
break;
default:
DRM_ERROR("unsupported image bit depth\n");
-   return -EINVAL; /* TODO: cleanup */
+   qxl_bo_kunmap_atomic_page(qdev, image_bo, ptr);
+   return -EINVAL;
}
image->u.bitmap.flags = QXL_BITMAP_TOP_DOWN;
image->u.bitmap.x = width;
-- 
2.20.1

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[PATCH AUTOSEL 4.19 17/20] drm/qxl: lost qxl_bo_kunmap_atomic_page in qxl_image_init_helper()

2020-05-07 Thread Sasha Levin
From: Vasily Averin 

[ Upstream commit 5b5703dbafae74adfbe298a56a81694172caf5e6 ]

v2: removed TODO reminder

Signed-off-by: Vasily Averin 
Link: 
http://patchwork.freedesktop.org/patch/msgid/a4e0ae09-a73c-1c62-04ef-3f990d41b...@virtuozzo.com
Signed-off-by: Gerd Hoffmann 
Signed-off-by: Sasha Levin 
---
 drivers/gpu/drm/qxl/qxl_image.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/qxl/qxl_image.c b/drivers/gpu/drm/qxl/qxl_image.c
index 7fbcc35e8ad35..c89c10055641e 100644
--- a/drivers/gpu/drm/qxl/qxl_image.c
+++ b/drivers/gpu/drm/qxl/qxl_image.c
@@ -210,7 +210,8 @@ qxl_image_init_helper(struct qxl_device *qdev,
break;
default:
DRM_ERROR("unsupported image bit depth\n");
-   return -EINVAL; /* TODO: cleanup */
+   qxl_bo_kunmap_atomic_page(qdev, image_bo, ptr);
+   return -EINVAL;
}
image->u.bitmap.flags = QXL_BITMAP_TOP_DOWN;
image->u.bitmap.x = width;
-- 
2.20.1

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[PATCH AUTOSEL 4.14 13/16] drm/qxl: lost qxl_bo_kunmap_atomic_page in qxl_image_init_helper()

2020-05-07 Thread Sasha Levin
From: Vasily Averin 

[ Upstream commit 5b5703dbafae74adfbe298a56a81694172caf5e6 ]

v2: removed TODO reminder

Signed-off-by: Vasily Averin 
Link: 
http://patchwork.freedesktop.org/patch/msgid/a4e0ae09-a73c-1c62-04ef-3f990d41b...@virtuozzo.com
Signed-off-by: Gerd Hoffmann 
Signed-off-by: Sasha Levin 
---
 drivers/gpu/drm/qxl/qxl_image.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/qxl/qxl_image.c b/drivers/gpu/drm/qxl/qxl_image.c
index 7fbcc35e8ad35..c89c10055641e 100644
--- a/drivers/gpu/drm/qxl/qxl_image.c
+++ b/drivers/gpu/drm/qxl/qxl_image.c
@@ -210,7 +210,8 @@ qxl_image_init_helper(struct qxl_device *qdev,
break;
default:
DRM_ERROR("unsupported image bit depth\n");
-   return -EINVAL; /* TODO: cleanup */
+   qxl_bo_kunmap_atomic_page(qdev, image_bo, ptr);
+   return -EINVAL;
}
image->u.bitmap.flags = QXL_BITMAP_TOP_DOWN;
image->u.bitmap.x = width;
-- 
2.20.1

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[PATCH AUTOSEL 4.9 09/11] drm/qxl: lost qxl_bo_kunmap_atomic_page in qxl_image_init_helper()

2020-05-07 Thread Sasha Levin
From: Vasily Averin 

[ Upstream commit 5b5703dbafae74adfbe298a56a81694172caf5e6 ]

v2: removed TODO reminder

Signed-off-by: Vasily Averin 
Link: 
http://patchwork.freedesktop.org/patch/msgid/a4e0ae09-a73c-1c62-04ef-3f990d41b...@virtuozzo.com
Signed-off-by: Gerd Hoffmann 
Signed-off-by: Sasha Levin 
---
 drivers/gpu/drm/qxl/qxl_image.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/qxl/qxl_image.c b/drivers/gpu/drm/qxl/qxl_image.c
index 7fbcc35e8ad35..c89c10055641e 100644
--- a/drivers/gpu/drm/qxl/qxl_image.c
+++ b/drivers/gpu/drm/qxl/qxl_image.c
@@ -210,7 +210,8 @@ qxl_image_init_helper(struct qxl_device *qdev,
break;
default:
DRM_ERROR("unsupported image bit depth\n");
-   return -EINVAL; /* TODO: cleanup */
+   qxl_bo_kunmap_atomic_page(qdev, image_bo, ptr);
+   return -EINVAL;
}
image->u.bitmap.flags = QXL_BITMAP_TOP_DOWN;
image->u.bitmap.x = width;
-- 
2.20.1

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[PATCH AUTOSEL 4.4 8/9] drm/qxl: lost qxl_bo_kunmap_atomic_page in qxl_image_init_helper()

2020-05-07 Thread Sasha Levin
From: Vasily Averin 

[ Upstream commit 5b5703dbafae74adfbe298a56a81694172caf5e6 ]

v2: removed TODO reminder

Signed-off-by: Vasily Averin 
Link: 
http://patchwork.freedesktop.org/patch/msgid/a4e0ae09-a73c-1c62-04ef-3f990d41b...@virtuozzo.com
Signed-off-by: Gerd Hoffmann 
Signed-off-by: Sasha Levin 
---
 drivers/gpu/drm/qxl/qxl_image.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/qxl/qxl_image.c b/drivers/gpu/drm/qxl/qxl_image.c
index 7fbcc35e8ad35..c89c10055641e 100644
--- a/drivers/gpu/drm/qxl/qxl_image.c
+++ b/drivers/gpu/drm/qxl/qxl_image.c
@@ -210,7 +210,8 @@ qxl_image_init_helper(struct qxl_device *qdev,
break;
default:
DRM_ERROR("unsupported image bit depth\n");
-   return -EINVAL; /* TODO: cleanup */
+   qxl_bo_kunmap_atomic_page(qdev, image_bo, ptr);
+   return -EINVAL;
}
image->u.bitmap.flags = QXL_BITMAP_TOP_DOWN;
image->u.bitmap.x = width;
-- 
2.20.1

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Re: [PATCH 2/2] drm/panfrost: add devfreq regulator support

2020-05-07 Thread Steven Price

On 02/05/2020 23:07, Clément Péron wrote:

Hi Steven,

On Tue, 14 Apr 2020 at 15:10, Steven Price  wrote:


Hi Clément,

On 13/04/2020 18:28, Clément Péron wrote:

Hi Steven,






Getting a backtrace from the two occurrences, I see one added from:

(debugfs_create_dir) from [] (create_regulator+0xe0/0x220)
(create_regulator) from [] (_regulator_get+0x168/0x204)
(_regulator_get) from [] (regulator_bulk_get+0x64/0xf4)
(regulator_bulk_get) from []
(devm_regulator_bulk_get+0x40/0x74)
(devm_regulator_bulk_get) from []
(panfrost_device_init+0x1b4/0x48c [panfrost])
(panfrost_device_init [panfrost]) from []
(panfrost_probe+0x94/0x184 [panfrost])
(panfrost_probe [panfrost]) from []
(platform_drv_probe+0x48/0x94)

And the other:

(debugfs_create_dir) from [] (create_regulator+0xe0/0x220)
(create_regulator) from [] (_regulator_get+0x168/0x204)
(_regulator_get) from [] (dev_pm_opp_set_regulators+0x6c/0x184)
(dev_pm_opp_set_regulators) from []
(panfrost_devfreq_init+0x38/0x1ac [panfrost])
(panfrost_devfreq_init [panfrost]) from []
(panfrost_probe+0xc8/0x184 [panfrost])
(panfrost_probe [panfrost]) from []
(platform_drv_probe+0x48/0x94)

Both are created at /regulator/vdd_gpu


I'm preparing a new version with some clean from lima devfreq.
My working branch :
https://github.com/clementperon/linux/commits/panfrost_devfreq


I had a look at that branch and gave it a quick spin on my Firefly 
RK3288 and didn't notice any issues.



Two strange things I observe:
  - After 30sec the regulator is released by OPP ???
[   33.757627] vdd-gpu: disabling
Introduce the regulator support in this commit:
https://github.com/clementperon/linux/commit/be310c37b82010e293b7f129ccdcb711a2abb2ce


I can't see anything wrong with this commit, but equally in my DTS I 
have a "regulator-always-on" for vdd_gpu. My initial thought was that 
this could be runtime PM of the GPU - but I can't see how 
panfrost_device_suspend() would end up turning off the regulator. So 
unless there's some way that the regulator itself suspends (but it 
should know it's in use) I've no clue why this would be happening.


Since you've got a reproduction - can you get a backtrace where the 
regulator is getting disabled?



  - The Cooling map is not probe correctly :
[2.545756] panfrost 180.gpu: [drm:panfrost_devfreq_init
[panfrost]] Failed to register cooling device
Introduce in this commit :
https://github.com/clementperon/linux/commit/0252c38fd55ad78366ac4b1714e285c88db34557

Do you have an hint about what I'm missing ?


Sorry, my knowledge of the cooling framework is very limited. What 
you've got looks plausible, but I'm afraid I can't really help beyond 
that! As before - can you try adding some printk()s in e.g. 
of_devfreq_cooling_register_power() and find out where it is bailing out?


Steve
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Re: [PATCH v4 1/6] drm/bridge: ti-sn65dsi86: Export bridge GPIOs to Linux

2020-05-07 Thread Doug Anderson
Hi,

On Thu, Apr 30, 2020 at 12:46 PM Douglas Anderson  wrote:
>
> The ti-sn65dsi86 MIPI DSI to eDP bridge chip has 4 pins on it that can
> be used as GPIOs in a system.  Each pin can be configured as input,
> output, or a special function for the bridge chip.  These are:
> - GPIO1: SUSPEND Input
> - GPIO2: DSIA VSYNC
> - GPIO3: DSIA HSYNC or VSYNC
> - GPIO4: PWM

One suggestion that came off-list is to change the code to make the
numbering match up better with the datasheet.  Right now if you want
GPIO 2 you have to refer to it like:

hpd-gpios = <&sn65dsi86_bridge 1 GPIO_ACTIVE_HIGH>;

That's because the code right now numbers things starting at 0 even if
the datasheet numbers things starting at 1.

I'm planning to spin the series later today for this.  While at it,
I'll squash my yaml bindings fixup into the bindings patch in this
series.  If someone would rather I wait and not spin yet, please yell.
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[PATCH V3 10/15] arch/kmap: Define kmap_atomic_prot() for all arch's

2020-05-07 Thread ira . weiny
From: Ira Weiny 

To support kmap_atomic_prot(), all architectures need to support
protections passed to their kmap_atomic_high() function.  Pass
protections into kmap_atomic_high() and change the name to
kmap_atomic_high_prot() to match.

Then define kmap_atomic_prot() as a core function which calls
kmap_atomic_high_prot() when needed.

Finally, redefine kmap_atomic() as a wrapper of kmap_atomic_prot() with
the default kmap_prot exported by the architectures.

Reviewed-by: Christoph Hellwig 
Signed-off-by: Ira Weiny 

---
Changes from V1:
Adjust for bisect-ability
Adjust for removing kunmap_atomic_high
Remove kmap_atomic_high_prot declarations
---
 arch/arc/mm/highmem.c |  6 +++---
 arch/arm/mm/highmem.c |  6 +++---
 arch/csky/mm/highmem.c|  6 +++---
 arch/microblaze/include/asm/highmem.h | 16 
 arch/mips/mm/highmem.c|  6 +++---
 arch/nds32/mm/highmem.c   |  6 +++---
 arch/powerpc/include/asm/highmem.h| 17 -
 arch/sparc/mm/highmem.c   |  6 +++---
 arch/x86/include/asm/highmem.h| 14 --
 arch/xtensa/mm/highmem.c  |  6 +++---
 include/linux/highmem.h   |  7 ---
 11 files changed, 25 insertions(+), 71 deletions(-)

diff --git a/arch/arc/mm/highmem.c b/arch/arc/mm/highmem.c
index 5d3eab4ac0b0..479b0d72d3cf 100644
--- a/arch/arc/mm/highmem.c
+++ b/arch/arc/mm/highmem.c
@@ -49,7 +49,7 @@
 extern pte_t * pkmap_page_table;
 static pte_t * fixmap_page_table;
 
-void *kmap_atomic_high(struct page *page)
+void *kmap_atomic_high_prot(struct page *page, pgprot_t prot)
 {
int idx, cpu_idx;
unsigned long vaddr;
@@ -59,11 +59,11 @@ void *kmap_atomic_high(struct page *page)
vaddr = FIXMAP_ADDR(idx);
 
set_pte_at(&init_mm, vaddr, fixmap_page_table + idx,
-  mk_pte(page, kmap_prot));
+  mk_pte(page, prot));
 
return (void *)vaddr;
 }
-EXPORT_SYMBOL(kmap_atomic_high);
+EXPORT_SYMBOL(kmap_atomic_high_prot);
 
 void kunmap_atomic_high(void *kv)
 {
diff --git a/arch/arm/mm/highmem.c b/arch/arm/mm/highmem.c
index ac8394655a6e..e013f6b81328 100644
--- a/arch/arm/mm/highmem.c
+++ b/arch/arm/mm/highmem.c
@@ -31,7 +31,7 @@ static inline pte_t get_fixmap_pte(unsigned long vaddr)
return *ptep;
 }
 
-void *kmap_atomic_high(struct page *page)
+void *kmap_atomic_high_prot(struct page *page, pgprot_t prot)
 {
unsigned int idx;
unsigned long vaddr;
@@ -67,11 +67,11 @@ void *kmap_atomic_high(struct page *page)
 * in place, so the contained TLB flush ensures the TLB is updated
 * with the new mapping.
 */
-   set_fixmap_pte(idx, mk_pte(page, kmap_prot));
+   set_fixmap_pte(idx, mk_pte(page, prot));
 
return (void *)vaddr;
 }
-EXPORT_SYMBOL(kmap_atomic_high);
+EXPORT_SYMBOL(kmap_atomic_high_prot);
 
 void kunmap_atomic_high(void *kvaddr)
 {
diff --git a/arch/csky/mm/highmem.c b/arch/csky/mm/highmem.c
index f4311669b5bb..3ae5c8cd7619 100644
--- a/arch/csky/mm/highmem.c
+++ b/arch/csky/mm/highmem.c
@@ -21,7 +21,7 @@ EXPORT_SYMBOL(kmap_flush_tlb);
 
 EXPORT_SYMBOL(kmap);
 
-void *kmap_atomic_high(struct page *page)
+void *kmap_atomic_high_prot(struct page *page, pgprot_t prot)
 {
unsigned long vaddr;
int idx, type;
@@ -32,12 +32,12 @@ void *kmap_atomic_high(struct page *page)
 #ifdef CONFIG_DEBUG_HIGHMEM
BUG_ON(!pte_none(*(kmap_pte - idx)));
 #endif
-   set_pte(kmap_pte-idx, mk_pte(page, kmap_prot));
+   set_pte(kmap_pte-idx, mk_pte(page, prot));
flush_tlb_one((unsigned long)vaddr);
 
return (void *)vaddr;
 }
-EXPORT_SYMBOL(kmap_atomic_high);
+EXPORT_SYMBOL(kmap_atomic_high_prot);
 
 void kunmap_atomic_high(void *kvaddr)
 {
diff --git a/arch/microblaze/include/asm/highmem.h 
b/arch/microblaze/include/asm/highmem.h
index 90d96239152f..d7c55cfd27bd 100644
--- a/arch/microblaze/include/asm/highmem.h
+++ b/arch/microblaze/include/asm/highmem.h
@@ -51,22 +51,6 @@ extern pte_t *pkmap_page_table;
 #define PKMAP_NR(virt)  ((virt - PKMAP_BASE) >> PAGE_SHIFT)
 #define PKMAP_ADDR(nr)  (PKMAP_BASE + ((nr) << PAGE_SHIFT))
 
-extern void *kmap_atomic_high_prot(struct page *page, pgprot_t prot);
-static inline void *kmap_atomic_prot(struct page *page, pgprot_t prot)
-{
-   preempt_disable();
-   pagefault_disable();
-   if (!PageHighMem(page))
-   return page_address(page);
-
-   return kmap_atomic_high_prot(page, prot);
-}
-
-static inline void *kmap_atomic_high(struct page *page)
-{
-   return kmap_atomic_high_prot(page, kmap_prot);
-}
-
 #define flush_cache_kmaps(){ flush_icache(); flush_dcache(); }
 
 #endif /* __KERNEL__ */
diff --git a/arch/mips/mm/highmem.c b/arch/mips/mm/highmem.c
index 87023bd1a33c..37e244cdb14e 100644
--- a/arch/mips/mm/highmem.c
+++ b/arch/mips/mm/highmem.c
@@ -18,7 +18,7 @@ void kmap_flush_tlb(unsigned long addr)
 }
 EXPORT_

[PATCH V3 14/15] sparc: Remove unnecessary includes

2020-05-07 Thread ira . weiny
From: Ira Weiny 

linux/highmem.h has not been needed for the pte_offset_map =>
kmap_atomic use in sparc for some time (~2002)

Remove this include.

Suggested-by: Al Viro 
Signed-off-by: Ira Weiny 

---
Changes from V2:
New Patch for this series
---
 arch/sparc/mm/io-unit.c | 1 -
 arch/sparc/mm/iommu.c   | 1 -
 2 files changed, 2 deletions(-)

diff --git a/arch/sparc/mm/io-unit.c b/arch/sparc/mm/io-unit.c
index 289276b99b01..08238d989cfd 100644
--- a/arch/sparc/mm/io-unit.c
+++ b/arch/sparc/mm/io-unit.c
@@ -10,7 +10,6 @@
 #include 
 #include 
 #include 
-#include  /* pte_offset_map => kmap_atomic */
 #include 
 #include 
 #include 
diff --git a/arch/sparc/mm/iommu.c b/arch/sparc/mm/iommu.c
index b00dde13681b..f1e08e30b64e 100644
--- a/arch/sparc/mm/iommu.c
+++ b/arch/sparc/mm/iommu.c
@@ -12,7 +12,6 @@
 #include 
 #include 
 #include 
-#include  /* pte_offset_map => kmap_atomic */
 #include 
 #include 
 #include 
-- 
2.25.1

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[PATCH V3 03/15] arch/kmap: Remove redundant arch specific kmaps

2020-05-07 Thread ira . weiny
From: Ira Weiny 

The kmap code for all the architectures is almost 100% identical.

Lift the common code to the core.  Use ARCH_HAS_KMAP_FLUSH_TLB to
indicate if an arch defines kmap_flush_tlb() and call if if needed.

This also has the benefit of changing kmap() on a number of
architectures to be an inline call rather than an actual function.

Reviewed-by: Christoph Hellwig 
Signed-off-by: Ira Weiny 
---
 arch/arc/include/asm/highmem.h|  2 --
 arch/arc/mm/highmem.c | 10 --
 arch/arm/include/asm/highmem.h|  2 --
 arch/arm/mm/highmem.c |  9 -
 arch/csky/include/asm/highmem.h   |  4 ++--
 arch/csky/mm/highmem.c| 14 --
 arch/microblaze/include/asm/highmem.h |  9 -
 arch/mips/include/asm/highmem.h   |  4 ++--
 arch/mips/mm/highmem.c| 14 +++---
 arch/nds32/include/asm/highmem.h  |  2 --
 arch/nds32/mm/highmem.c   | 12 
 arch/powerpc/include/asm/highmem.h|  9 -
 arch/sparc/include/asm/highmem.h  |  9 -
 arch/x86/include/asm/highmem.h|  2 --
 arch/x86/mm/highmem_32.c  |  9 -
 arch/xtensa/include/asm/highmem.h |  9 -
 include/linux/highmem.h   | 18 ++
 17 files changed, 29 insertions(+), 109 deletions(-)

diff --git a/arch/arc/include/asm/highmem.h b/arch/arc/include/asm/highmem.h
index 042e92921c4c..96eb67c86961 100644
--- a/arch/arc/include/asm/highmem.h
+++ b/arch/arc/include/asm/highmem.h
@@ -30,8 +30,6 @@
 
 #include 
 
-extern void *kmap(struct page *page);
-extern void *kmap_high(struct page *page);
 extern void *kmap_atomic(struct page *page);
 extern void __kunmap_atomic(void *kvaddr);
 extern void kunmap_high(struct page *page);
diff --git a/arch/arc/mm/highmem.c b/arch/arc/mm/highmem.c
index 39ef7b9a3aa9..4db13a6b9f3b 100644
--- a/arch/arc/mm/highmem.c
+++ b/arch/arc/mm/highmem.c
@@ -49,16 +49,6 @@
 extern pte_t * pkmap_page_table;
 static pte_t * fixmap_page_table;
 
-void *kmap(struct page *page)
-{
-   might_sleep();
-   if (!PageHighMem(page))
-   return page_address(page);
-
-   return kmap_high(page);
-}
-EXPORT_SYMBOL(kmap);
-
 void *kmap_atomic(struct page *page)
 {
int idx, cpu_idx;
diff --git a/arch/arm/include/asm/highmem.h b/arch/arm/include/asm/highmem.h
index eb4e4207cd3c..c917522541de 100644
--- a/arch/arm/include/asm/highmem.h
+++ b/arch/arm/include/asm/highmem.h
@@ -20,7 +20,6 @@
 
 extern pte_t *pkmap_page_table;
 
-extern void *kmap_high(struct page *page);
 extern void kunmap_high(struct page *page);
 
 /*
@@ -63,7 +62,6 @@ static inline void *kmap_high_get(struct page *page)
  * when CONFIG_HIGHMEM is not set.
  */
 #ifdef CONFIG_HIGHMEM
-extern void *kmap(struct page *page);
 extern void kunmap(struct page *page);
 extern void *kmap_atomic(struct page *page);
 extern void __kunmap_atomic(void *kvaddr);
diff --git a/arch/arm/mm/highmem.c b/arch/arm/mm/highmem.c
index cc6eb79ef20c..e8ba37c36590 100644
--- a/arch/arm/mm/highmem.c
+++ b/arch/arm/mm/highmem.c
@@ -31,15 +31,6 @@ static inline pte_t get_fixmap_pte(unsigned long vaddr)
return *ptep;
 }
 
-void *kmap(struct page *page)
-{
-   might_sleep();
-   if (!PageHighMem(page))
-   return page_address(page);
-   return kmap_high(page);
-}
-EXPORT_SYMBOL(kmap);
-
 void kunmap(struct page *page)
 {
might_sleep();
diff --git a/arch/csky/include/asm/highmem.h b/arch/csky/include/asm/highmem.h
index a345a2f2c22e..9d0516e38110 100644
--- a/arch/csky/include/asm/highmem.h
+++ b/arch/csky/include/asm/highmem.h
@@ -30,10 +30,10 @@ extern pte_t *pkmap_page_table;
 #define PKMAP_NR(virt)  ((virt-PKMAP_BASE) >> PAGE_SHIFT)
 #define PKMAP_ADDR(nr)  (PKMAP_BASE + ((nr) << PAGE_SHIFT))
 
-extern void *kmap_high(struct page *page);
 extern void kunmap_high(struct page *page);
 
-extern void *kmap(struct page *page);
+#define ARCH_HAS_KMAP_FLUSH_TLB
+extern void kmap_flush_tlb(unsigned long addr);
 extern void kunmap(struct page *page);
 extern void *kmap_atomic(struct page *page);
 extern void __kunmap_atomic(void *kvaddr);
diff --git a/arch/csky/mm/highmem.c b/arch/csky/mm/highmem.c
index 690d678649d1..4a3c273bc8b9 100644
--- a/arch/csky/mm/highmem.c
+++ b/arch/csky/mm/highmem.c
@@ -13,18 +13,12 @@ static pte_t *kmap_pte;
 
 unsigned long highstart_pfn, highend_pfn;
 
-void *kmap(struct page *page)
+void kmap_flush_tlb(unsigned long addr)
 {
-   void *addr;
-
-   might_sleep();
-   if (!PageHighMem(page))
-   return page_address(page);
-   addr = kmap_high(page);
-   flush_tlb_one((unsigned long)addr);
-
-   return addr;
+   flush_tlb_one(addr);
 }
+EXPORT_SYMBOL(kmap_flush_tlb);
+
 EXPORT_SYMBOL(kmap);
 
 void kunmap(struct page *page)
diff --git a/arch/microblaze/include/asm/highmem.h 
b/arch/microblaze/include/asm/highmem.h
index 99ced7278b5c..8c5bfd228bd8 100644
--- a/arch/microblaze/in

[PATCH V3 05/15] {x86,powerpc,microblaze}/kmap: Move preempt disable

2020-05-07 Thread ira . weiny
From: Ira Weiny 

During this kmap() conversion series we must maintain bisect-ability.
To do this, kmap_atomic_prot() in x86, powerpc, and microblaze need to
remain functional.

Create a temporary inline version of kmap_atomic_prot within these
architectures so we can rework their kmap_atomic() calls and then lift
kmap_atomic_prot() to the core.

Reviewed-by: Christoph Hellwig 
Suggested-by: Al Viro 
Signed-off-by: Ira Weiny 

---
Changes from V2:
Fix microblaze not being static inline

Changes from V1:
New patch
---
 arch/microblaze/include/asm/highmem.h | 11 ++-
 arch/microblaze/mm/highmem.c  | 10 ++
 arch/powerpc/include/asm/highmem.h| 11 ++-
 arch/powerpc/mm/highmem.c |  9 ++---
 arch/x86/include/asm/highmem.h| 11 ++-
 arch/x86/mm/highmem_32.c  | 10 ++
 6 files changed, 36 insertions(+), 26 deletions(-)

diff --git a/arch/microblaze/include/asm/highmem.h 
b/arch/microblaze/include/asm/highmem.h
index 0c94046f2d58..c38d920a1171 100644
--- a/arch/microblaze/include/asm/highmem.h
+++ b/arch/microblaze/include/asm/highmem.h
@@ -51,7 +51,16 @@ extern pte_t *pkmap_page_table;
 #define PKMAP_NR(virt)  ((virt - PKMAP_BASE) >> PAGE_SHIFT)
 #define PKMAP_ADDR(nr)  (PKMAP_BASE + ((nr) << PAGE_SHIFT))
 
-extern void *kmap_atomic_prot(struct page *page, pgprot_t prot);
+extern void *kmap_atomic_high_prot(struct page *page, pgprot_t prot);
+static inline void *kmap_atomic_prot(struct page *page, pgprot_t prot)
+{
+   preempt_disable();
+   pagefault_disable();
+   if (!PageHighMem(page))
+   return page_address(page);
+
+   return kmap_atomic_high_prot(page, prot);
+}
 extern void __kunmap_atomic(void *kvaddr);
 
 static inline void *kmap_atomic(struct page *page)
diff --git a/arch/microblaze/mm/highmem.c b/arch/microblaze/mm/highmem.c
index d7569f77fa15..0e3efaa8a004 100644
--- a/arch/microblaze/mm/highmem.c
+++ b/arch/microblaze/mm/highmem.c
@@ -32,18 +32,12 @@
  */
 #include 
 
-void *kmap_atomic_prot(struct page *page, pgprot_t prot)
+void *kmap_atomic_high_prot(struct page *page, pgprot_t prot)
 {
 
unsigned long vaddr;
int idx, type;
 
-   preempt_disable();
-   pagefault_disable();
-   if (!PageHighMem(page))
-   return page_address(page);
-
-
type = kmap_atomic_idx_push();
idx = type + KM_TYPE_NR*smp_processor_id();
vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
@@ -55,7 +49,7 @@ void *kmap_atomic_prot(struct page *page, pgprot_t prot)
 
return (void *) vaddr;
 }
-EXPORT_SYMBOL(kmap_atomic_prot);
+EXPORT_SYMBOL(kmap_atomic_high_prot);
 
 void __kunmap_atomic(void *kvaddr)
 {
diff --git a/arch/powerpc/include/asm/highmem.h 
b/arch/powerpc/include/asm/highmem.h
index ba3371977d49..d049806a8354 100644
--- a/arch/powerpc/include/asm/highmem.h
+++ b/arch/powerpc/include/asm/highmem.h
@@ -59,7 +59,16 @@ extern pte_t *pkmap_page_table;
 #define PKMAP_NR(virt)  ((virt-PKMAP_BASE) >> PAGE_SHIFT)
 #define PKMAP_ADDR(nr)  (PKMAP_BASE + ((nr) << PAGE_SHIFT))
 
-extern void *kmap_atomic_prot(struct page *page, pgprot_t prot);
+extern void *kmap_atomic_high_prot(struct page *page, pgprot_t prot);
+static inline void *kmap_atomic_prot(struct page *page, pgprot_t prot)
+{
+   preempt_disable();
+   pagefault_disable();
+   if (!PageHighMem(page))
+   return page_address(page);
+
+   return kmap_atomic_high_prot(page, prot);
+}
 extern void __kunmap_atomic(void *kvaddr);
 
 static inline void *kmap_atomic(struct page *page)
diff --git a/arch/powerpc/mm/highmem.c b/arch/powerpc/mm/highmem.c
index 320c1672b2ae..f075cef6d663 100644
--- a/arch/powerpc/mm/highmem.c
+++ b/arch/powerpc/mm/highmem.c
@@ -30,16 +30,11 @@
  * be used in IRQ contexts, so in some (very limited) cases we need
  * it.
  */
-void *kmap_atomic_prot(struct page *page, pgprot_t prot)
+void *kmap_atomic_high_prot(struct page *page, pgprot_t prot)
 {
unsigned long vaddr;
int idx, type;
 
-   preempt_disable();
-   pagefault_disable();
-   if (!PageHighMem(page))
-   return page_address(page);
-
type = kmap_atomic_idx_push();
idx = type + KM_TYPE_NR*smp_processor_id();
vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
@@ -49,7 +44,7 @@ void *kmap_atomic_prot(struct page *page, pgprot_t prot)
 
return (void*) vaddr;
 }
-EXPORT_SYMBOL(kmap_atomic_prot);
+EXPORT_SYMBOL(kmap_atomic_high_prot);
 
 void __kunmap_atomic(void *kvaddr)
 {
diff --git a/arch/x86/include/asm/highmem.h b/arch/x86/include/asm/highmem.h
index 90b96594d6c5..61f47fef40e5 100644
--- a/arch/x86/include/asm/highmem.h
+++ b/arch/x86/include/asm/highmem.h
@@ -58,7 +58,16 @@ extern unsigned long highstart_pfn, highend_pfn;
 #define PKMAP_NR(virt)  ((virt-PKMAP_BASE) >> PAGE_SHIFT)
 #define PKMAP_ADDR(nr)  (PKMAP_BASE + ((nr) << PAGE_SHIFT))
 
-void *kmap_atomic_prot(struct page *page, pgprot_t prot);
+extern v

[PATCH V3 04/15] arch/kunmap: Remove duplicate kunmap implementations

2020-05-07 Thread ira . weiny
From: Ira Weiny 

All architectures do exactly the same thing for kunmap(); remove all the
duplicate definitions and lift the call to the core.

This also has the benefit of changing kmap_unmap() on a number of
architectures to be an inline call rather than an actual function.

Reviewed-by: Christoph Hellwig 
Signed-off-by: Ira Weiny 
---
 arch/arc/include/asm/highmem.h| 10 --
 arch/arm/include/asm/highmem.h|  3 ---
 arch/arm/mm/highmem.c |  9 -
 arch/csky/include/asm/highmem.h   |  3 ---
 arch/csky/mm/highmem.c|  9 -
 arch/microblaze/include/asm/highmem.h |  9 -
 arch/mips/include/asm/highmem.h   |  3 ---
 arch/mips/mm/highmem.c|  9 -
 arch/nds32/include/asm/highmem.h  |  3 ---
 arch/nds32/mm/highmem.c   | 10 --
 arch/powerpc/include/asm/highmem.h|  9 -
 arch/sparc/include/asm/highmem.h  | 10 --
 arch/x86/include/asm/highmem.h|  4 
 arch/x86/mm/highmem_32.c  |  9 -
 arch/xtensa/include/asm/highmem.h | 10 --
 include/linux/highmem.h   |  9 +
 16 files changed, 9 insertions(+), 110 deletions(-)

diff --git a/arch/arc/include/asm/highmem.h b/arch/arc/include/asm/highmem.h
index 96eb67c86961..8387a5596a91 100644
--- a/arch/arc/include/asm/highmem.h
+++ b/arch/arc/include/asm/highmem.h
@@ -32,7 +32,6 @@
 
 extern void *kmap_atomic(struct page *page);
 extern void __kunmap_atomic(void *kvaddr);
-extern void kunmap_high(struct page *page);
 
 extern void kmap_init(void);
 
@@ -41,15 +40,6 @@ static inline void flush_cache_kmaps(void)
flush_cache_all();
 }
 
-static inline void kunmap(struct page *page)
-{
-   might_sleep();
-   if (!PageHighMem(page))
-   return;
-   kunmap_high(page);
-}
-
-
 #endif
 
 #endif
diff --git a/arch/arm/include/asm/highmem.h b/arch/arm/include/asm/highmem.h
index c917522541de..736f65283e7b 100644
--- a/arch/arm/include/asm/highmem.h
+++ b/arch/arm/include/asm/highmem.h
@@ -20,8 +20,6 @@
 
 extern pte_t *pkmap_page_table;
 
-extern void kunmap_high(struct page *page);
-
 /*
  * The reason for kmap_high_get() is to ensure that the currently kmap'd
  * page usage count does not decrease to zero while we're using its
@@ -62,7 +60,6 @@ static inline void *kmap_high_get(struct page *page)
  * when CONFIG_HIGHMEM is not set.
  */
 #ifdef CONFIG_HIGHMEM
-extern void kunmap(struct page *page);
 extern void *kmap_atomic(struct page *page);
 extern void __kunmap_atomic(void *kvaddr);
 extern void *kmap_atomic_pfn(unsigned long pfn);
diff --git a/arch/arm/mm/highmem.c b/arch/arm/mm/highmem.c
index e8ba37c36590..c700b32350ee 100644
--- a/arch/arm/mm/highmem.c
+++ b/arch/arm/mm/highmem.c
@@ -31,15 +31,6 @@ static inline pte_t get_fixmap_pte(unsigned long vaddr)
return *ptep;
 }
 
-void kunmap(struct page *page)
-{
-   might_sleep();
-   if (!PageHighMem(page))
-   return;
-   kunmap_high(page);
-}
-EXPORT_SYMBOL(kunmap);
-
 void *kmap_atomic(struct page *page)
 {
unsigned int idx;
diff --git a/arch/csky/include/asm/highmem.h b/arch/csky/include/asm/highmem.h
index 9d0516e38110..be11c5b67122 100644
--- a/arch/csky/include/asm/highmem.h
+++ b/arch/csky/include/asm/highmem.h
@@ -30,11 +30,8 @@ extern pte_t *pkmap_page_table;
 #define PKMAP_NR(virt)  ((virt-PKMAP_BASE) >> PAGE_SHIFT)
 #define PKMAP_ADDR(nr)  (PKMAP_BASE + ((nr) << PAGE_SHIFT))
 
-extern void kunmap_high(struct page *page);
-
 #define ARCH_HAS_KMAP_FLUSH_TLB
 extern void kmap_flush_tlb(unsigned long addr);
-extern void kunmap(struct page *page);
 extern void *kmap_atomic(struct page *page);
 extern void __kunmap_atomic(void *kvaddr);
 extern void *kmap_atomic_pfn(unsigned long pfn);
diff --git a/arch/csky/mm/highmem.c b/arch/csky/mm/highmem.c
index 4a3c273bc8b9..e9952211264b 100644
--- a/arch/csky/mm/highmem.c
+++ b/arch/csky/mm/highmem.c
@@ -21,15 +21,6 @@ EXPORT_SYMBOL(kmap_flush_tlb);
 
 EXPORT_SYMBOL(kmap);
 
-void kunmap(struct page *page)
-{
-   might_sleep();
-   if (!PageHighMem(page))
-   return;
-   kunmap_high(page);
-}
-EXPORT_SYMBOL(kunmap);
-
 void *kmap_atomic(struct page *page)
 {
unsigned long vaddr;
diff --git a/arch/microblaze/include/asm/highmem.h 
b/arch/microblaze/include/asm/highmem.h
index 8c5bfd228bd8..0c94046f2d58 100644
--- a/arch/microblaze/include/asm/highmem.h
+++ b/arch/microblaze/include/asm/highmem.h
@@ -51,18 +51,9 @@ extern pte_t *pkmap_page_table;
 #define PKMAP_NR(virt)  ((virt - PKMAP_BASE) >> PAGE_SHIFT)
 #define PKMAP_ADDR(nr)  (PKMAP_BASE + ((nr) << PAGE_SHIFT))
 
-extern void kunmap_high(struct page *page);
 extern void *kmap_atomic_prot(struct page *page, pgprot_t prot);
 extern void __kunmap_atomic(void *kvaddr);
 
-static inline void kunmap(struct page *page)
-{
-   might_sleep();
-   if (!PageHighMem(page))
-   return;
-   kunmap_high(page);
-}

[PATCH V3 02/15] arch/xtensa: Move kmap build bug out of the way

2020-05-07 Thread ira . weiny
From: Ira Weiny 

Move the kmap() build bug to kmap_init() to facilitate patches to lift
kmap() to the core.

Reviewed-by: Christoph Hellwig 
Signed-off-by: Ira Weiny 

---
Changes from V1:
combine code onto 1 line.
---
 arch/xtensa/include/asm/highmem.h | 5 -
 arch/xtensa/mm/highmem.c  | 4 
 2 files changed, 4 insertions(+), 5 deletions(-)

diff --git a/arch/xtensa/include/asm/highmem.h 
b/arch/xtensa/include/asm/highmem.h
index 413848cc1e56..a9587c85be85 100644
--- a/arch/xtensa/include/asm/highmem.h
+++ b/arch/xtensa/include/asm/highmem.h
@@ -68,11 +68,6 @@ void kunmap_high(struct page *page);
 
 static inline void *kmap(struct page *page)
 {
-   /* Check if this memory layout is broken because PKMAP overlaps
-* page table.
-*/
-   BUILD_BUG_ON(PKMAP_BASE <
-TLBTEMP_BASE_1 + TLBTEMP_SIZE);
might_sleep();
if (!PageHighMem(page))
return page_address(page);
diff --git a/arch/xtensa/mm/highmem.c b/arch/xtensa/mm/highmem.c
index 184ceadccc1a..da734a2ed641 100644
--- a/arch/xtensa/mm/highmem.c
+++ b/arch/xtensa/mm/highmem.c
@@ -88,6 +88,10 @@ void __init kmap_init(void)
 {
unsigned long kmap_vstart;
 
+   /* Check if this memory layout is broken because PKMAP overlaps
+* page table.
+*/
+   BUILD_BUG_ON(PKMAP_BASE < TLBTEMP_BASE_1 + TLBTEMP_SIZE);
/* cache the first kmap pte */
kmap_vstart = __fix_to_virt(FIX_KMAP_BEGIN);
kmap_pte = kmap_get_fixmap_pte(kmap_vstart);
-- 
2.25.1

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[PATCH V3 06/15] arch/kmap_atomic: Consolidate duplicate code

2020-05-07 Thread ira . weiny
From: Ira Weiny 

Every arch has the same code to ensure atomic operations and a check for
!HIGHMEM page.

Remove the duplicate code by defining a core kmap_atomic() which only
calls the arch specific kmap_atomic_high() when the page is high memory.

Reviewed-by: Christoph Hellwig 
Signed-off-by: Ira Weiny 

---
Changes from V1:
Adjust to preserve bisect-ability
Remove unneeded kmap_atomic_high declarations
---
 arch/arc/include/asm/highmem.h|  1 -
 arch/arc/mm/highmem.c |  9 ++---
 arch/arm/include/asm/highmem.h|  1 -
 arch/arm/mm/highmem.c |  9 ++---
 arch/csky/include/asm/highmem.h   |  1 -
 arch/csky/mm/highmem.c|  9 ++---
 arch/microblaze/include/asm/highmem.h |  4 ++--
 arch/mips/include/asm/highmem.h   |  1 -
 arch/mips/mm/cache.c  |  2 +-
 arch/mips/mm/highmem.c| 18 ++
 arch/nds32/include/asm/highmem.h  |  1 -
 arch/nds32/mm/highmem.c   |  9 ++---
 arch/powerpc/include/asm/highmem.h|  4 ++--
 arch/powerpc/mm/highmem.c |  6 --
 arch/sparc/include/asm/highmem.h  |  1 -
 arch/sparc/mm/highmem.c   |  9 ++---
 arch/x86/include/asm/highmem.h|  5 -
 arch/x86/mm/highmem_32.c  | 14 --
 arch/xtensa/include/asm/highmem.h |  1 -
 arch/xtensa/mm/highmem.c  |  9 ++---
 include/linux/highmem.h   | 23 +++
 21 files changed, 46 insertions(+), 91 deletions(-)

diff --git a/arch/arc/include/asm/highmem.h b/arch/arc/include/asm/highmem.h
index 8387a5596a91..db425cd38545 100644
--- a/arch/arc/include/asm/highmem.h
+++ b/arch/arc/include/asm/highmem.h
@@ -30,7 +30,6 @@
 
 #include 
 
-extern void *kmap_atomic(struct page *page);
 extern void __kunmap_atomic(void *kvaddr);
 
 extern void kmap_init(void);
diff --git a/arch/arc/mm/highmem.c b/arch/arc/mm/highmem.c
index 4db13a6b9f3b..0964b011c29f 100644
--- a/arch/arc/mm/highmem.c
+++ b/arch/arc/mm/highmem.c
@@ -49,16 +49,11 @@
 extern pte_t * pkmap_page_table;
 static pte_t * fixmap_page_table;
 
-void *kmap_atomic(struct page *page)
+void *kmap_atomic_high(struct page *page)
 {
int idx, cpu_idx;
unsigned long vaddr;
 
-   preempt_disable();
-   pagefault_disable();
-   if (!PageHighMem(page))
-   return page_address(page);
-
cpu_idx = kmap_atomic_idx_push();
idx = cpu_idx + KM_TYPE_NR * smp_processor_id();
vaddr = FIXMAP_ADDR(idx);
@@ -68,7 +63,7 @@ void *kmap_atomic(struct page *page)
 
return (void *)vaddr;
 }
-EXPORT_SYMBOL(kmap_atomic);
+EXPORT_SYMBOL(kmap_atomic_high);
 
 void __kunmap_atomic(void *kv)
 {
diff --git a/arch/arm/include/asm/highmem.h b/arch/arm/include/asm/highmem.h
index 736f65283e7b..8c80bfe18a34 100644
--- a/arch/arm/include/asm/highmem.h
+++ b/arch/arm/include/asm/highmem.h
@@ -60,7 +60,6 @@ static inline void *kmap_high_get(struct page *page)
  * when CONFIG_HIGHMEM is not set.
  */
 #ifdef CONFIG_HIGHMEM
-extern void *kmap_atomic(struct page *page);
 extern void __kunmap_atomic(void *kvaddr);
 extern void *kmap_atomic_pfn(unsigned long pfn);
 #endif
diff --git a/arch/arm/mm/highmem.c b/arch/arm/mm/highmem.c
index c700b32350ee..075fdc235091 100644
--- a/arch/arm/mm/highmem.c
+++ b/arch/arm/mm/highmem.c
@@ -31,18 +31,13 @@ static inline pte_t get_fixmap_pte(unsigned long vaddr)
return *ptep;
 }
 
-void *kmap_atomic(struct page *page)
+void *kmap_atomic_high(struct page *page)
 {
unsigned int idx;
unsigned long vaddr;
void *kmap;
int type;
 
-   preempt_disable();
-   pagefault_disable();
-   if (!PageHighMem(page))
-   return page_address(page);
-
 #ifdef CONFIG_DEBUG_HIGHMEM
/*
 * There is no cache coherency issue when non VIVT, so force the
@@ -76,7 +71,7 @@ void *kmap_atomic(struct page *page)
 
return (void *)vaddr;
 }
-EXPORT_SYMBOL(kmap_atomic);
+EXPORT_SYMBOL(kmap_atomic_high);
 
 void __kunmap_atomic(void *kvaddr)
 {
diff --git a/arch/csky/include/asm/highmem.h b/arch/csky/include/asm/highmem.h
index be11c5b67122..8ceee12f9bc1 100644
--- a/arch/csky/include/asm/highmem.h
+++ b/arch/csky/include/asm/highmem.h
@@ -32,7 +32,6 @@ extern pte_t *pkmap_page_table;
 
 #define ARCH_HAS_KMAP_FLUSH_TLB
 extern void kmap_flush_tlb(unsigned long addr);
-extern void *kmap_atomic(struct page *page);
 extern void __kunmap_atomic(void *kvaddr);
 extern void *kmap_atomic_pfn(unsigned long pfn);
 extern struct page *kmap_atomic_to_page(void *ptr);
diff --git a/arch/csky/mm/highmem.c b/arch/csky/mm/highmem.c
index e9952211264b..63d74b47eee6 100644
--- a/arch/csky/mm/highmem.c
+++ b/arch/csky/mm/highmem.c
@@ -21,16 +21,11 @@ EXPORT_SYMBOL(kmap_flush_tlb);
 
 EXPORT_SYMBOL(kmap);
 
-void *kmap_atomic(struct page *page)
+void *kmap_atomic_high(struct page *page)
 {
unsigned long vaddr;
int idx, type

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