[PATCH] drm/radeon/kms: add hw_i2c module option
From 05f313069127e7dfbd28e4d8ff2142657650aeee Mon Sep 17 00:00:00 2001 From: Alex Deucher alexdeuc...@gmail.com Date: Wed, 17 Mar 2010 02:07:37 -0400 Subject: [PATCH] drm/radeon/kms: add hw_i2c module option Turn off hw i2c by default except for mm i2c which is hw only until we sort out the remaining prescale issues on older chips. hw i2c can be enabled with hw_i2c=1. Signed-off-by: Alex Deucher alexdeuc...@gmail.com --- drivers/gpu/drm/radeon/radeon.h |1 + drivers/gpu/drm/radeon/radeon_drv.c |4 drivers/gpu/drm/radeon/radeon_i2c.c |8 +--- 3 files changed, 10 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index 7003f6c..ae9a15a 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h @@ -91,6 +91,7 @@ extern int radeon_tv; extern int radeon_new_pll; extern int radeon_dynpm; extern int radeon_audio; +extern int radeon_hw_i2c; /* * Copy from radeon_drv.h so we don't have to include both and have conflicting diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c index 6eec0ec..1de124f 100644 --- a/drivers/gpu/drm/radeon/radeon_drv.c +++ b/drivers/gpu/drm/radeon/radeon_drv.c @@ -91,6 +91,7 @@ int radeon_tv = 1; int radeon_new_pll = -1; int radeon_dynpm = -1; int radeon_audio = 1; +int radeon_hw_i2c = 0; MODULE_PARM_DESC(no_wb, Disable AGP writeback for scratch registers); module_param_named(no_wb, radeon_no_wb, int, 0444); @@ -134,6 +135,9 @@ module_param_named(dynpm, radeon_dynpm, int, 0444); MODULE_PARM_DESC(audio, Audio enable (0 = disable)); module_param_named(audio, radeon_audio, int, 0444); +MODULE_PARM_DESC(hw_i2c, hw i2c engine enable (0 = disable)); +module_param_named(hw_i2c, radeon_hw_i2c, int, 0444); + static int radeon_suspend(struct drm_device *dev, pm_message_t state) { drm_radeon_private_t *dev_priv = dev-dev_private; diff --git a/drivers/gpu/drm/radeon/radeon_i2c.c b/drivers/gpu/drm/radeon/radeon_i2c.c index 352110f..5def6f5 100644 --- a/drivers/gpu/drm/radeon/radeon_i2c.c +++ b/drivers/gpu/drm/radeon/radeon_i2c.c @@ -879,9 +879,11 @@ struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev, i2c-adapter.owner = THIS_MODULE; i2c-dev = dev; i2c_set_adapdata(i2c-adapter, i2c); - if (rec-hw_capable - ((rdev-family = CHIP_RS480) || -((rdev-family = CHIP_RV515) (rdev-family = CHIP_R580 { + if (rec-mm_i2c || + (rec-hw_capable +radeon_hw_i2c +((rdev-family = CHIP_RS480) || + ((rdev-family = CHIP_RV515) (rdev-family = CHIP_R580) { /* set the radeon hw i2c adapter */ sprintf(i2c-adapter.name, Radeon i2c hw bus %s, name); i2c-adapter.algo = radeon_i2c_algo; -- 1.5.6.3 0001-drm-radeon-kms-add-hw_i2c-module-option.patch Description: application/mbox -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev-- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
Re: [PATCHES] radeon kms pm patches
2010/3/17 Alex Deucher alexdeuc...@gmail.com: On Mon, Mar 15, 2010 at 3:30 AM, Alex Deucher alexdeuc...@gmail.com wrote: On Sun, Mar 14, 2010 at 7:01 PM, Alex Deucher alexdeuc...@gmail.com wrote: This weekend I finally got some time to sit down with kms pm, and I created a new patch set (against drm-radeon-testing). For those that want to play with the i2c stuff for thermal chips, you'll probably grab my recent i2c patches as well. You can grab my latest pm patches here: http://people.freedesktop.org/~agd5f/pm2/ Updated patches rebased against airlied's new drm-radeon-testing along with the fixes noted in Rafal's comments: http://people.freedesktop.org/~agd5f/pm2/ Another set of updated patches against drm-radeon-testing: http://people.freedesktop.org/~agd5f/pm2/ These implement much the remaining pm functionality. So far they are working well here. these patches add: - memory reclocking - pcie lane changes - update display watermarks as bandwidth changes - allow power management with multi-head - reset power mode on exit Nice, looks alright, thanks. Will test later if I manage before leaving for skiing. Do you know if we could ever recolck memory on multiple CRTCs? If not, what's the reason? -- Rafał -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
[Bug 27083] Commit use lcd pll limits when available in drm-radeon-testing breaks my laptop lvds
http://bugs.freedesktop.org/show_bug.cgi?id=27083 --- Comment #7 from Stefano Carignano scary@gmail.com 2010-03-17 01:43:39 PST --- the second patch didn't break anything here as well :) -- Configure bugmail: http://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
Re: Unmappable VRAM patchset V4
On Mon, Mar 01, 2010 at 01:03:38PM +0100, Thomas Hellstrom wrote: Dave Airlie wrote: On Fri, Feb 26, 2010 at 3:01 AM, Jerome Glisse jgli...@redhat.com wrote: Updated patchset, to apply cleanly on top of TTM split no_wait argument. Compile tested for nouveau+vmwgfx, test in progress for radeon. So with the new change radeon won't wait for bo reserving other bo in fault path but will wait the GPU (hoping it doesn't lockup ;)) This should address concern about the wait/locking issue. Thomas any time for this yet? I'd like to pull this in obviously, but it would be nice to know if Jerome has addressed all concerns. Dave. Hi Dave! My schedule is currently a bit tight. I think the immediate deadlock concerns are met, but I'd to take a deeper look at some things that look a bit suspicious, but I think the overall approach is ok. I'll hopefully be able to do a review on wednesday. /Thomas Thomas any chance to review this ? NVidia patch already need update and i would like to avoid having this bitrot too much. Cheers, Jerome -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
Re: [PATCH 1/4] drm/ttm: split no_wait argument in 2 GPU or reserve wait
Jerome Glisse wrote: There is case where we want to be able to wait only for the GPU while not waiting for other buffer to be unreserved. This patch split the no_wait argument all the way down in the whole ttm path so that upper level can decide on what to wait on or not. This patch break the API to other modules, update to others driver are following in separate patches. Signed-off-by: Jerome Glisse jgli...@redhat.com Acked-by: Thomas Hellstrom thellst...@vmware.com --- drivers/gpu/drm/ttm/ttm_bo.c | 57 drivers/gpu/drm/ttm/ttm_bo_util.c |9 -- include/drm/ttm/ttm_bo_api.h |6 ++- include/drm/ttm/ttm_bo_driver.h | 29 +++--- 4 files changed, 60 insertions(+), 41 deletions(-) diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c index c7320ce..d2b2482 100644 --- a/drivers/gpu/drm/ttm/ttm_bo.c +++ b/drivers/gpu/drm/ttm/ttm_bo.c @@ -357,7 +357,8 @@ static int ttm_bo_add_ttm(struct ttm_buffer_object *bo, bool zero_alloc) static int ttm_bo_handle_move_mem(struct ttm_buffer_object *bo, struct ttm_mem_reg *mem, - bool evict, bool interruptible, bool no_wait) + bool evict, bool interruptible, + bool no_wait_reserve, bool no_wait_gpu) { struct ttm_bo_device *bdev = bo-bdev; bool old_is_pci = ttm_mem_reg_is_pci(bdev, bo-mem); @@ -402,12 +403,12 @@ static int ttm_bo_handle_move_mem(struct ttm_buffer_object *bo, if (!(old_man-flags TTM_MEMTYPE_FLAG_FIXED) !(new_man-flags TTM_MEMTYPE_FLAG_FIXED)) - ret = ttm_bo_move_ttm(bo, evict, no_wait, mem); + ret = ttm_bo_move_ttm(bo, evict, no_wait_reserve, no_wait_gpu, mem); else if (bdev-driver-move) ret = bdev-driver-move(bo, evict, interruptible, - no_wait, mem); + no_wait_reserve, no_wait_gpu, mem); else - ret = ttm_bo_move_memcpy(bo, evict, no_wait, mem); + ret = ttm_bo_move_memcpy(bo, evict, no_wait_reserve, no_wait_gpu, mem); if (ret) goto out_err; @@ -606,7 +607,7 @@ void ttm_bo_unref(struct ttm_buffer_object **p_bo) EXPORT_SYMBOL(ttm_bo_unref); static int ttm_bo_evict(struct ttm_buffer_object *bo, bool interruptible, - bool no_wait) + bool no_wait_reserve, bool no_wait_gpu) { struct ttm_bo_device *bdev = bo-bdev; struct ttm_bo_global *glob = bo-glob; @@ -615,7 +616,7 @@ static int ttm_bo_evict(struct ttm_buffer_object *bo, bool interruptible, int ret = 0; spin_lock(bo-lock); - ret = ttm_bo_wait(bo, false, interruptible, no_wait); + ret = ttm_bo_wait(bo, false, interruptible, no_wait_gpu); spin_unlock(bo-lock); if (unlikely(ret != 0)) { @@ -638,7 +639,7 @@ static int ttm_bo_evict(struct ttm_buffer_object *bo, bool interruptible, placement.num_busy_placement = 0; bdev-driver-evict_flags(bo, placement); ret = ttm_bo_mem_space(bo, placement, evict_mem, interruptible, - no_wait); + no_wait_reserve, no_wait_gpu); if (ret) { if (ret != -ERESTARTSYS) { printk(KERN_ERR TTM_PFX @@ -650,7 +651,7 @@ static int ttm_bo_evict(struct ttm_buffer_object *bo, bool interruptible, } ret = ttm_bo_handle_move_mem(bo, evict_mem, true, interruptible, - no_wait); + no_wait_reserve, no_wait_gpu); if (ret) { if (ret != -ERESTARTSYS) printk(KERN_ERR TTM_PFX Buffer eviction failed\n); @@ -670,7 +671,8 @@ out: static int ttm_mem_evict_first(struct ttm_bo_device *bdev, uint32_t mem_type, - bool interruptible, bool no_wait) + bool interruptible, bool no_wait_reserve, + bool no_wait_gpu) { struct ttm_bo_global *glob = bdev-glob; struct ttm_mem_type_manager *man = bdev-man[mem_type]; @@ -687,11 +689,11 @@ retry: bo = list_first_entry(man-lru, struct ttm_buffer_object, lru); kref_get(bo-list_kref); - ret = ttm_bo_reserve_locked(bo, false, true, false, 0); + ret = ttm_bo_reserve_locked(bo, false, no_wait_reserve, false, 0); if (unlikely(ret == -EBUSY)) { spin_unlock(glob-lru_lock); - if (likely(!no_wait)) + if (likely(!no_wait_gpu)) ret = ttm_bo_wait_unreserved(bo, interruptible); kref_put(bo-list_kref, ttm_bo_release_list); @@ -713,7 +715,7 @@ retry: while (put_count--)
Re: [PATCH 1/9] drm/ttm: ttm_fault callback to allow driver to handle bo placement V2
Jerome Glisse wrote: On fault the driver is given the opportunity to perform any operation it sees fit in order to place the buffer into a CPU visible area of memory. This patch doesn't break TTM users, nouveau, vmwgfx and radeon should keep working properly. Future patch will take advantage of this infrastructure and remove the old path from TTM once driver are converted. V2 return VM_FAULT_NOPAGE if callback return -EBUSY or -ERESTARTSYS Signed-off-by: Jerome Glisse jgli...@redhat.com Jerome, See inline comments below and 1) Please make sure the patch passes checkpatch.pl without warnings or errors before submitting. This patch has 14 warnings. 2) There are a number of line spacing changes (empty newline changes) and line break changes. Please remove them from the patch. --- drivers/gpu/drm/ttm/ttm_bo.c |3 +- drivers/gpu/drm/ttm/ttm_bo_util.c | 92 + drivers/gpu/drm/ttm/ttm_bo_vm.c | 56 -- include/drm/ttm/ttm_bo_api.h |1 + include/drm/ttm/ttm_bo_driver.h | 30 5 files changed, 105 insertions(+), 77 deletions(-) diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c index c7320ce..28f3fcf 100644 --- a/drivers/gpu/drm/ttm/ttm_bo.c +++ b/drivers/gpu/drm/ttm/ttm_bo.c @@ -1581,7 +1581,8 @@ void ttm_bo_unmap_virtual(struct ttm_buffer_object *bo) if (!bdev-dev_mapping) return; - + if (bdev-driver-io_mem_free) + bdev-driver-io_mem_free(bdev, bo-mem); unmap_mapping_range(bdev-dev_mapping, offset, holelen, 1); } The user-space mappings must be taken down *before* the IO space is released, but please also see at the bottom for a design change for this. EXPORT_SYMBOL(ttm_bo_unmap_virtual); diff --git a/drivers/gpu/drm/ttm/ttm_bo_util.c b/drivers/gpu/drm/ttm/ttm_bo_util.c index 3f72fe1..10c5fc6 100644 --- a/drivers/gpu/drm/ttm/ttm_bo_util.c +++ b/drivers/gpu/drm/ttm/ttm_bo_util.c @@ -84,26 +84,36 @@ int ttm_mem_reg_ioremap(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem, void **virtual) { struct ttm_mem_type_manager *man = bdev-man[mem-mem_type]; - unsigned long bus_offset; - unsigned long bus_size; - unsigned long bus_base; + struct ttm_bus_placement pl; int ret; void *addr; *virtual = NULL; - ret = ttm_bo_pci_offset(bdev, mem, bus_base, bus_offset, bus_size); - if (ret || bus_size == 0) - return ret; + if (bdev-driver-io_mem_reserve) { + ret = bdev-driver-io_mem_reserve(bdev, mem, pl); + if (unlikely(ret != 0)) { + return ret; + } + } else { + ret = ttm_bo_pci_offset(bdev, mem, pl.base, pl.offset, pl.size); + if (unlikely(ret != 0) || pl.size == 0) { + return ret; + } + pl.is_iomem = (pl.size != 0); I fail to see how pl.size can be == 0 here? + } if (!(man-flags TTM_MEMTYPE_FLAG_NEEDS_IOREMAP)) - addr = (void *)(((u8 *) man-io_addr) + bus_offset); + addr = (void *)(pl.base + pl.offset); This is incorrect. man-io_addr is the virtual kernel address of an existing iomap covering the whole aperture, if the driver has choosen to set up one. This is not practical on 32-bit systems, due to the limited vmalloc / ioremap space but may well be on 64-bit system. else { if (mem-placement TTM_PL_FLAG_WC) - addr = ioremap_wc(bus_base + bus_offset, bus_size); + addr = ioremap_wc(pl.base + pl.offset, pl.size); else - addr = ioremap_nocache(bus_base + bus_offset, bus_size); - if (!addr) + addr = ioremap_nocache(pl.base + pl.offset, pl.size); + if (!addr) { + if (bdev-driver-io_mem_free) + bdev-driver-io_mem_free(bdev, mem); return -ENOMEM; + } } *virtual = addr; return 0; @@ -118,6 +128,8 @@ void ttm_mem_reg_iounmap(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem, if (virtual (man-flags TTM_MEMTYPE_FLAG_NEEDS_IOREMAP)) iounmap(virtual); + if (bdev-driver-io_mem_free) + bdev-driver-io_mem_free(bdev, mem); } static int ttm_copy_io_page(void *dst, void *src, unsigned long page) @@ -440,13 +452,12 @@ int ttm_bo_kmap(struct ttm_buffer_object *bo, unsigned long start_page, unsigned long num_pages, struct ttm_bo_kmap_obj *map) { + struct ttm_bus_placement pl; int ret; - unsigned long bus_base; - unsigned long bus_offset; - unsigned long bus_size; BUG_ON(!list_empty(bo-swap)); map-virtual = NULL; + map-bo = bo; if
Re: Unmappable VRAM patchset V4
Jerome Glisse wrote: On Mon, Mar 01, 2010 at 01:03:38PM +0100, Thomas Hellstrom wrote: Dave Airlie wrote: On Fri, Feb 26, 2010 at 3:01 AM, Jerome Glisse jgli...@redhat.com wrote: Updated patchset, to apply cleanly on top of TTM split no_wait argument. Compile tested for nouveau+vmwgfx, test in progress for radeon. So with the new change radeon won't wait for bo reserving other bo in fault path but will wait the GPU (hoping it doesn't lockup ;)) This should address concern about the wait/locking issue. Thomas any time for this yet? I'd like to pull this in obviously, but it would be nice to know if Jerome has addressed all concerns. Dave. Hi Dave! My schedule is currently a bit tight. I think the immediate deadlock concerns are met, but I'd to take a deeper look at some things that look a bit suspicious, but I think the overall approach is ok. I'll hopefully be able to do a review on wednesday. /Thomas Thomas any chance to review this ? NVidia patch already need update and i would like to avoid having this bitrot too much. Cheers, Jerome Jerome, I've reviewed the TTM patch, see previous mail. I'll look at the vmware patch and briefly the other ones as soon as we've sorted out how to address the issues raised in the review. Thanks, /Thomas -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
Re: Commit 96a4c8d50de20da865296a380b996f73204d6b34 breaks PowerBook LVDS
On Tue, 2010-03-16 at 10:56 -0400, Alex Deucher wrote: 2010/3/16 Michel Dänzer mic...@daenzer.net: Commit 96a4c8d50de20da865296a380b996f73204d6b34 ('drm/radeon/kms: fix i2c prescale calc on older radeons') breaks LVDS on my RV350 PowerBook again. Reverting just that commit on top of drm-radeon-testing commit 589468458fa964c2020e23e4d9353be2ef8bd3be fixes it. Do any of the suggestions on bug 26430 help? http://bugs.freedesktop.org/show_bug.cgi?id=26430 I've tried i2c_clock = 50/10/100 and m = loop - 1, no luck. I also added debugging output to verify that sclk seems sane the calculations seem to take effect as expected: [ 59.138772] [drm] sclk=44550 [ 59.138775] [drm] nm=2227 [ 59.138779] [drm] loop=48 n=47 m=46 = prescale=0x2f2e So, did that commit actually fix anything? :} It regresses at least for me and doesn't seem to help for the bug it claims it 'should fix'... -- Earthling Michel Dänzer |http://www.vmware.com Libre software enthusiast | Debian, X and DRI developer -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
Re: [PATCHES] radeon kms pm patches
2010/3/17 Rafał Miłecki zaj...@gmail.com: 2010/3/17 Alex Deucher alexdeuc...@gmail.com: On Mon, Mar 15, 2010 at 3:30 AM, Alex Deucher alexdeuc...@gmail.com wrote: On Sun, Mar 14, 2010 at 7:01 PM, Alex Deucher alexdeuc...@gmail.com wrote: This weekend I finally got some time to sit down with kms pm, and I created a new patch set (against drm-radeon-testing). For those that want to play with the i2c stuff for thermal chips, you'll probably grab my recent i2c patches as well. You can grab my latest pm patches here: http://people.freedesktop.org/~agd5f/pm2/ Updated patches rebased against airlied's new drm-radeon-testing along with the fixes noted in Rafal's comments: http://people.freedesktop.org/~agd5f/pm2/ Another set of updated patches against drm-radeon-testing: http://people.freedesktop.org/~agd5f/pm2/ These implement much the remaining pm functionality. So far they are working well here. these patches add: - memory reclocking - pcie lane changes - update display watermarks as bandwidth changes - allow power management with multi-head - reset power mode on exit Nice, looks alright, thanks. Will test later if I manage before leaving for skiing. Thanks. Do you know if we could ever recolck memory on multiple CRTCs? If not, what's the reason? I think so. It works now more or less, there's just an occasional jitter on the head not synced. I'm trying to find out how we do it internally. Alex -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
Re: Commit 96a4c8d50de20da865296a380b996f73204d6b34 breaks PowerBook LVDS
2010/3/17 Michel Dänzer mic...@daenzer.net: On Tue, 2010-03-16 at 10:56 -0400, Alex Deucher wrote: 2010/3/16 Michel Dänzer mic...@daenzer.net: Commit 96a4c8d50de20da865296a380b996f73204d6b34 ('drm/radeon/kms: fix i2c prescale calc on older radeons') breaks LVDS on my RV350 PowerBook again. Reverting just that commit on top of drm-radeon-testing commit 589468458fa964c2020e23e4d9353be2ef8bd3be fixes it. Do any of the suggestions on bug 26430 help? http://bugs.freedesktop.org/show_bug.cgi?id=26430 I've tried i2c_clock = 50/10/100 and m = loop - 1, no luck. I also added debugging output to verify that sclk seems sane the calculations seem to take effect as expected: [ 59.138772] [drm] sclk=44550 [ 59.138775] [drm] nm=2227 [ 59.138779] [drm] loop=48 n=47 m=46 = prescale=0x2f2e So, did that commit actually fix anything? :} It regresses at least for me and doesn't seem to help for the bug it claims it 'should fix'... It fixed r1xx for me. Also, the prescale is actually applied to the sclk, to I think it was just luck that it worked with the reference clock. It just happened to be the right combination of numbers... All my cards worked fine with both algos :/ Alex -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
[PATCH] drm/radeon/kms: avoid possible oops (call gart_fini before gart_disable)
radeon_gart_fini might call GART unbind callback function which might try to access GART table but if gart_disable is call first the GART table will be unmapped so any access to it will oops. Signed-off-by: Jerome Glisse jgli...@redhat.com --- drivers/gpu/drm/radeon/r100.c |2 +- drivers/gpu/drm/radeon/r300.c |2 +- drivers/gpu/drm/radeon/r600.c |2 +- drivers/gpu/drm/radeon/rs400.c |2 +- drivers/gpu/drm/radeon/rs600.c |2 +- drivers/gpu/drm/radeon/rv770.c |2 +- 6 files changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c index 9fef5cc..7a1180d 100644 --- a/drivers/gpu/drm/radeon/r100.c +++ b/drivers/gpu/drm/radeon/r100.c @@ -236,9 +236,9 @@ int r100_pci_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr) void r100_pci_gart_fini(struct radeon_device *rdev) { + radeon_gart_fini(rdev); r100_pci_gart_disable(rdev); radeon_gart_table_ram_free(rdev); - radeon_gart_fini(rdev); } int r100_irq_set(struct radeon_device *rdev) diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c index 6a0b550..756bd4d 100644 --- a/drivers/gpu/drm/radeon/r300.c +++ b/drivers/gpu/drm/radeon/r300.c @@ -170,9 +170,9 @@ void rv370_pcie_gart_disable(struct radeon_device *rdev) void rv370_pcie_gart_fini(struct radeon_device *rdev) { + radeon_gart_fini(rdev); rv370_pcie_gart_disable(rdev); radeon_gart_table_vram_free(rdev); - radeon_gart_fini(rdev); } void r300_fence_ring_emit(struct radeon_device *rdev, diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index 3df2ab1..a948947 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c @@ -492,9 +492,9 @@ void r600_pcie_gart_disable(struct radeon_device *rdev) void r600_pcie_gart_fini(struct radeon_device *rdev) { + radeon_gart_fini(rdev); r600_pcie_gart_disable(rdev); radeon_gart_table_vram_free(rdev); - radeon_gart_fini(rdev); } void r600_agp_enable(struct radeon_device *rdev) diff --git a/drivers/gpu/drm/radeon/rs400.c b/drivers/gpu/drm/radeon/rs400.c index a9e06b0..e8065bd 100644 --- a/drivers/gpu/drm/radeon/rs400.c +++ b/drivers/gpu/drm/radeon/rs400.c @@ -203,9 +203,9 @@ void rs400_gart_disable(struct radeon_device *rdev) void rs400_gart_fini(struct radeon_device *rdev) { + radeon_gart_fini(rdev); rs400_gart_disable(rdev); radeon_gart_table_ram_free(rdev); - radeon_gart_fini(rdev); } int rs400_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr) diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c index 5c73c0f..7d8ae42 100644 --- a/drivers/gpu/drm/radeon/rs600.c +++ b/drivers/gpu/drm/radeon/rs600.c @@ -340,9 +340,9 @@ void rs600_gart_disable(struct radeon_device *rdev) void rs600_gart_fini(struct radeon_device *rdev) { + radeon_gart_fini(rdev); rs600_gart_disable(rdev); radeon_gart_table_vram_free(rdev); - radeon_gart_fini(rdev); } #define R600_PTE_VALID (1 0) diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c index 3f477e7..2b8a4e1 100644 --- a/drivers/gpu/drm/radeon/rv770.c +++ b/drivers/gpu/drm/radeon/rv770.c @@ -126,9 +126,9 @@ void rv770_pcie_gart_disable(struct radeon_device *rdev) void rv770_pcie_gart_fini(struct radeon_device *rdev) { + radeon_gart_fini(rdev); rv770_pcie_gart_disable(rdev); radeon_gart_table_vram_free(rdev); - radeon_gart_fini(rdev); } -- 1.6.6.1 -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
[Bug 27132] piglit comparison between F12 7.7-4 and 7.9-git
http://bugs.freedesktop.org/show_bug.cgi?id=27132 --- Comment #1 from Chris Rankin ranki...@googlemail.com 2010-03-17 08:51:19 PST --- Created an attachment (id=34146) -- (http://bugs.freedesktop.org/attachment.cgi?id=34146) core from glean/vertProg1 -- Configure bugmail: http://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
[Bug 27132] piglit comparison between F12 7.7-4 and 7.9-git
http://bugs.freedesktop.org/show_bug.cgi?id=27132 --- Comment #2 from Chris Rankin ranki...@googlemail.com 2010-03-17 08:52:02 PST --- Created an attachment (id=34147) -- (http://bugs.freedesktop.org/attachment.cgi?id=34147) Core from glean/pbo -o -v -- Configure bugmail: http://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
Re: Unmappable VRAM patchset V4
On Wed, Mar 17, 2010 at 02:01:47PM +0100, Thomas Hellstrom wrote: Jerome Glisse wrote: On Mon, Mar 01, 2010 at 01:03:38PM +0100, Thomas Hellstrom wrote: Dave Airlie wrote: On Fri, Feb 26, 2010 at 3:01 AM, Jerome Glisse jgli...@redhat.com wrote: Updated patchset, to apply cleanly on top of TTM split no_wait argument. Compile tested for nouveau+vmwgfx, test in progress for radeon. So with the new change radeon won't wait for bo reserving other bo in fault path but will wait the GPU (hoping it doesn't lockup ;)) This should address concern about the wait/locking issue. Thomas any time for this yet? I'd like to pull this in obviously, but it would be nice to know if Jerome has addressed all concerns. Dave. Hi Dave! My schedule is currently a bit tight. I think the immediate deadlock concerns are met, but I'd to take a deeper look at some things that look a bit suspicious, but I think the overall approach is ok. I'll hopefully be able to do a review on wednesday. /Thomas Thomas any chance to review this ? NVidia patch already need update and i would like to avoid having this bitrot too much. Cheers, Jerome Jerome, I've reviewed the TTM patch, see previous mail. I'll look at the vmware patch and briefly the other ones as soon as we've sorted out how to address the issues raised in the review. Thanks, /Thomas Will redo a patch tomorrow to try to address issue you pointed. Cheers, Jerome -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
[Bug 27132] piglit comparison between F12 7.7-4 and 7.9-git
http://bugs.freedesktop.org/show_bug.cgi?id=27132 --- Comment #3 from Chris Rankin ranki...@googlemail.com 2010-03-17 08:53:01 PST --- Created an attachment (id=34148) -- (http://bugs.freedesktop.org/attachment.cgi?id=34148) Core from 'encil -auto' (?) -- Configure bugmail: http://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
[Bug 27132] piglit comparison between F12 7.7-4 and 7.9-git
http://bugs.freedesktop.org/show_bug.cgi?id=27132 --- Comment #5 from Chris Rankin ranki...@googlemail.com 2010-03-17 08:54:39 PST --- Created an attachment (id=34150) -- (http://bugs.freedesktop.org/attachment.cgi?id=34150) Core from 'o' (?) -- Configure bugmail: http://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
[Bug 27132] piglit comparison between F12 7.7-4 and 7.9-git
http://bugs.freedesktop.org/show_bug.cgi?id=27132 --- Comment #6 from Chris Rankin ranki...@googlemail.com 2010-03-17 08:55:31 PST --- Created an attachment (id=34151) -- (http://bugs.freedesktop.org/attachment.cgi?id=34151) Core from 'fbo-flushing -auto' -- Configure bugmail: http://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
[Bug 27132] piglit comparison between F12 7.7-4 and 7.9-git
http://bugs.freedesktop.org/show_bug.cgi?id=27132 --- Comment #7 from Chris Rankin ranki...@googlemail.com 2010-03-17 08:56:16 PST --- Created an attachment (id=34152) -- (http://bugs.freedesktop.org/attachment.cgi?id=34152) Core from 'small -auto' (?) -- Configure bugmail: http://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
Re: Regression in i915 on 2.6.34-rc1
On Monday 15 March 2010 11:51:01 am Bjorn Helgaas wrote: On Saturday 13 March 2010 08:02:24 pm Bjorn Helgaas wrote: On Sat, 2010-03-13 at 13:46 -0700, Pete Zaitcev wrote: On Fri, 12 Mar 2010 22:37:56 -0700 Bjorn Helgaas bjorn.helg...@hp.com wrote: Thanks for the report. Would you mind posting the entire dmesg log, /proc/iomem contents, and lspci -vv output somewhere (maybe in bugzilla)? Done, new bug: http://bugzilla.kernel.org/show_bug.cgi?id=15533 Any luck testing the patch from the bugzilla? I'd really like to get this figured out so we can get the fix in the next -rc and move on to the next _CRS issue :-) Bjorn -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
Re: [PATCH 3/3] Install headers to $(includedir)/libdrm
On Fri, 26 Feb 2010 19:07:24 +0100, Julien Cristau jcris...@debian.org wrote: Avoids conflicts with kernel headers. Signed-off-by: Julien Cristau jcris...@debian.org Applied this series, plus moving the intel file. Thanks! pgp9aozTfnYtg.pgp Description: PGP signature -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev-- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
Re: [patch] i915: fix small leak on error path
On Sat, 6 Mar 2010 12:50:54 +0100, Daniel Vetter dan...@ffwll.ch wrote: Oh, dang. Thanks for catching this. Eric, please merge. Cc: sta...@kernel.org (for .33) Reviewed-by: Daniel Vetter dan...@ffwll.ch On Sat, Mar 06, 2010 at 02:05:39PM +0300, Dan Carpenter wrote: We should free params before returning. Signed-off-by: Dan Carpenter erro...@gmail.com Applied. Thanks! pgpeRvdLq2cWd.pgp Description: PGP signature -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev-- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
[PATCH 0/7] drm/ttm: Pool allocator
When allocating wc/uc pages cache state transition requires cache flush which is expensive operation. To avoid cache flushes allocation of wc/uc pages should be done in large groups when only single cache flush is required for whole group of pages. In some cases drivers need t oallocate and deallocate many pages in a short time frame. In this case we can avoid cache flushes if we keep pages in the pool before actually freeing them later. arch/x86 was missing set_pages_array_wc and set_memory_array_wc. Patch 6 and 7 add missing functions and hooks set_pages_array_wc to the pool allocator. -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
[PATCH 7/7] drm/ttm: Use set_pages_array_wc instead of set_memory_wc.
Using single call to set multiple pages to wc reduces number of expensive cache flushes. Signed-off-by: Pauli Nieminen suok...@gmail.com --- drivers/gpu/drm/ttm/ttm_page_alloc.c | 12 +--- 1 files changed, 1 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/ttm/ttm_page_alloc.c b/drivers/gpu/drm/ttm/ttm_page_alloc.c index af91994..111c70b 100644 --- a/drivers/gpu/drm/ttm/ttm_page_alloc.c +++ b/drivers/gpu/drm/ttm/ttm_page_alloc.c @@ -124,17 +124,7 @@ static struct ttm_pool_manager _manager = { .page_alloc_inited = ATOMIC_INIT(0) }; -#ifdef CONFIG_X86 -/* TODO: add this to x86 like _uc, this version here is inefficient */ -static int set_pages_array_wc(struct page **pages, int addrinarray) -{ - int i; - - for (i = 0; i addrinarray; i++) - set_memory_wc((unsigned long)page_address(pages[i]), 1); - return 0; -} -#else +#ifndef CONFIG_X86 static int set_pages_array_wb(struct page **pages, int addrinarray) { #ifdef TTM_HAS_AGP -- 1.6.3.3 -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
[PATCH 6/7] arch/x86: Add array variants for setting memory to wc caching.
Setting single memory pages at a time to wc takes a lot time in cache flush. To reduce number of cache flush set_pages_array_wc and set_memory_array_wc can be used to set multiple pages to WC with single cache flush. This improves allocation performance for wc cached pages in drm/ttm. Signed-off-by: Pauli Nieminen suok...@gmail.com --- arch/x86/include/asm/cacheflush.h |2 + arch/x86/mm/pageattr.c| 53 +++- 2 files changed, 47 insertions(+), 8 deletions(-) diff --git a/arch/x86/include/asm/cacheflush.h b/arch/x86/include/asm/cacheflush.h index 634c40a..d92d63a 100644 --- a/arch/x86/include/asm/cacheflush.h +++ b/arch/x86/include/asm/cacheflush.h @@ -139,9 +139,11 @@ int set_memory_np(unsigned long addr, int numpages); int set_memory_4k(unsigned long addr, int numpages); int set_memory_array_uc(unsigned long *addr, int addrinarray); +int set_memory_array_wc(unsigned long *addr, int addrinarray); int set_memory_array_wb(unsigned long *addr, int addrinarray); int set_pages_array_uc(struct page **pages, int addrinarray); +int set_pages_array_wc(struct page **pages, int addrinarray); int set_pages_array_wb(struct page **pages, int addrinarray); /* diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c index cf07c26..0c98a75 100644 --- a/arch/x86/mm/pageattr.c +++ b/arch/x86/mm/pageattr.c @@ -997,7 +997,8 @@ out_err: } EXPORT_SYMBOL(set_memory_uc); -int set_memory_array_uc(unsigned long *addr, int addrinarray) +int _set_memory_array(unsigned long *addr, int addrinarray, + unsigned long new_type) { int i, j; int ret; @@ -1007,13 +1008,19 @@ int set_memory_array_uc(unsigned long *addr, int addrinarray) */ for (i = 0; i addrinarray; i++) { ret = reserve_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE, - _PAGE_CACHE_UC_MINUS, NULL); + new_type, NULL); if (ret) goto out_free; } ret = change_page_attr_set(addr, addrinarray, __pgprot(_PAGE_CACHE_UC_MINUS), 1); + + if (!ret new_type == _PAGE_CACHE_WC) + ret = change_page_attr_set_clr(addr, addrinarray, + __pgprot(_PAGE_CACHE_WC), + __pgprot(_PAGE_CACHE_MASK), + 0, CPA_ARRAY, NULL); if (ret) goto out_free; @@ -1025,8 +1032,19 @@ out_free: return ret; } + +int set_memory_array_uc(unsigned long *addr, int addrinarray) +{ + return _set_memory_array(addr, addrinarray, _PAGE_CACHE_UC_MINUS); +} EXPORT_SYMBOL(set_memory_array_uc); +int set_memory_array_wc(unsigned long *addr, int addrinarray) +{ + return _set_memory_array(addr, addrinarray, _PAGE_CACHE_WC); +} +EXPORT_SYMBOL(set_memory_array_wc); + int _set_memory_wc(unsigned long addr, int numpages) { int ret; @@ -1153,26 +1171,34 @@ int set_pages_uc(struct page *page, int numpages) } EXPORT_SYMBOL(set_pages_uc); -int set_pages_array_uc(struct page **pages, int addrinarray) +static int _set_pages_array(struct page **pages, int addrinarray, + unsigned long new_type) { unsigned long start; unsigned long end; int i; int free_idx; + int ret; for (i = 0; i addrinarray; i++) { if (PageHighMem(pages[i])) continue; start = page_to_pfn(pages[i]) PAGE_SHIFT; end = start + PAGE_SIZE; - if (reserve_memtype(start, end, _PAGE_CACHE_UC_MINUS, NULL)) + if (reserve_memtype(start, end, new_type, NULL)) goto err_out; } - if (cpa_set_pages_array(pages, addrinarray, - __pgprot(_PAGE_CACHE_UC_MINUS)) == 0) { - return 0; /* Success */ - } + ret = cpa_set_pages_array(pages, addrinarray, + __pgprot(_PAGE_CACHE_UC_MINUS)); + if (!ret new_type == _PAGE_CACHE_WC) + ret = change_page_attr_set_clr(NULL, addrinarray, + __pgprot(_PAGE_CACHE_WC), + __pgprot(_PAGE_CACHE_MASK), + 0, CPA_PAGES_ARRAY, pages); + if (ret) + goto err_out; + return 0; /* Success */ err_out: free_idx = i; for (i = 0; i free_idx; i++) { @@ -1184,8 +1210,19 @@ err_out: } return -EINVAL; } + +int set_pages_array_uc(struct page **pages, int addrinarray) +{ + return _set_pages_array(pages, addrinarray, _PAGE_CACHE_UC_MINUS); +} EXPORT_SYMBOL(set_pages_array_uc); +int set_pages_array_wc(struct page **pages, int addrinarray) +{ + return _set_pages_array(pages,
[PATCH 3/7] drm/radeon/kms: Add ttm page pool debugfs file.
ttm_page_pool file is hooked ttm_page_alloc_debugfs for pool allocator state. Signed-off-by: Pauli Nieminen suok...@gmail.com --- drivers/gpu/drm/radeon/radeon_ttm.c | 13 ++--- 1 files changed, 10 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c index 43c5ab3..fc787e8 100644 --- a/drivers/gpu/drm/radeon/radeon_ttm.c +++ b/drivers/gpu/drm/radeon/radeon_ttm.c @@ -33,6 +33,7 @@ #include ttm/ttm_bo_driver.h #include ttm/ttm_placement.h #include ttm/ttm_module.h +#include ttm/ttm_page_alloc.h #include drm/drmP.h #include drm/radeon_drm.h #include linux/seq_file.h @@ -744,8 +745,8 @@ static int radeon_mm_dump_table(struct seq_file *m, void *data) static int radeon_ttm_debugfs_init(struct radeon_device *rdev) { #if defined(CONFIG_DEBUG_FS) - static struct drm_info_list radeon_mem_types_list[RADEON_DEBUGFS_MEM_TYPES]; - static char radeon_mem_types_names[RADEON_DEBUGFS_MEM_TYPES][32]; + static struct drm_info_list radeon_mem_types_list[RADEON_DEBUGFS_MEM_TYPES+1]; + static char radeon_mem_types_names[RADEON_DEBUGFS_MEM_TYPES+1][32]; unsigned i; for (i = 0; i RADEON_DEBUGFS_MEM_TYPES; i++) { @@ -762,7 +763,13 @@ static int radeon_ttm_debugfs_init(struct radeon_device *rdev) radeon_mem_types_list[i].data = rdev-mman.bdev.man[TTM_PL_TT].manager; } - return radeon_debugfs_add_files(rdev, radeon_mem_types_list, RADEON_DEBUGFS_MEM_TYPES); + /* Add ttm page pool to debugfs */ + sprintf(radeon_mem_types_names[i], ttm_page_pool); + radeon_mem_types_list[i].name = radeon_mem_types_names[i]; + radeon_mem_types_list[i].show = ttm_page_alloc_debugfs; + radeon_mem_types_list[i].driver_features = 0; + radeon_mem_types_list[i].data = NULL; + return radeon_debugfs_add_files(rdev, radeon_mem_types_list, RADEON_DEBUGFS_MEM_TYPES+1); #endif return 0; -- 1.6.3.3 -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
[PATCH 2/7] drm/ttm: Add debugfs output entry to pool allocator.
ttm_page_alloc_debugfs can be registered to output the state of pools. Debugfs file will output number of pages freed from the pool, number of pages in pool now and the lowes number of pages in pool since previous shrink. Signed-off-by: Pauli Nieminen suok...@gmail.com --- drivers/gpu/drm/ttm/ttm_page_alloc.c | 46 + include/drm/ttm/ttm_page_alloc.h |4 +++ 2 files changed, 44 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/ttm/ttm_page_alloc.c b/drivers/gpu/drm/ttm/ttm_page_alloc.c index 768d479..206bee9 100644 --- a/drivers/gpu/drm/ttm/ttm_page_alloc.c +++ b/drivers/gpu/drm/ttm/ttm_page_alloc.c @@ -34,6 +34,7 @@ #include linux/spinlock.h #include linux/highmem.h #include linux/mm_types.h +#include linux/module.h #include linux/jiffies.h #include linux/timer.h #include linux/workqueue.h @@ -73,6 +74,9 @@ struct ttm_page_pool { unsignednpages; unsignednlowpages; unsignedalloc_size; + char*name; + unsigned long nfrees; + unsigned long nrefills; }; #define NUM_POOLS 4 @@ -240,6 +244,7 @@ static bool ttm_page_pool_free_pages_locked(struct ttm_page_pool *pool, { unsigned tmp; pool-npages -= freed_pages; + pool-nfrees += freed_pages; /* Calculate number of pages taken from nlowpages * npages_to_free = 1/2*nlowpages = * nlowpages_delta = 2*freed_pages @@ -320,6 +325,7 @@ restart: } pool-npages -= freed_pages; + pool-nfrees += freed_pages; /* set nlowpages to zero to prevent extra freeing in thsi patch. * nlowpages is reseted later after all work has been finnished. **/ @@ -537,6 +543,7 @@ static void ttm_page_pool_fill_locked(struct ttm_page_pool *pool, if (!r) { list_splice(new_pages, pool-list); + ++pool-nrefills; pool-npages += pool-alloc_size; /* Have to remmber to update the low number of pages * too */ @@ -724,14 +731,16 @@ void ttm_put_pages(struct list_head *pages, int flags, round_jiffies(_manager.free_interval)); } -static void ttm_page_pool_init_locked(struct ttm_page_pool *pool, int flags) +static void ttm_page_pool_init_locked(struct ttm_page_pool *pool, int flags, + char *name) { spin_lock_init(pool-lock); pool-fill_lock = false; INIT_LIST_HEAD(pool-list); - pool-npages = pool-nlowpages = 0; + pool-npages = pool-nlowpages = pool-nfrees = 0; pool-alloc_size = NUM_PAGES_TO_ALLOC; pool-gfp_flags = flags; + pool-name = name; } int ttm_page_alloc_init(struct ttm_mem_global *glob) @@ -741,13 +750,15 @@ int ttm_page_alloc_init(struct ttm_mem_global *glob) printk(KERN_INFO [ttm] Initializing pool allocator.\n); - ttm_page_pool_init_locked(_manager.wc_pool, GFP_HIGHUSER); + ttm_page_pool_init_locked(_manager.wc_pool, GFP_HIGHUSER, wc); - ttm_page_pool_init_locked(_manager.uc_pool, GFP_HIGHUSER); + ttm_page_pool_init_locked(_manager.uc_pool, GFP_HIGHUSER, uc); - ttm_page_pool_init_locked(_manager.wc_pool_dma32, GFP_USER | GFP_DMA32); + ttm_page_pool_init_locked(_manager.wc_pool_dma32, GFP_USER | GFP_DMA32, + wc dma); - ttm_page_pool_init_locked(_manager.uc_pool_dma32, GFP_USER | GFP_DMA32); + ttm_page_pool_init_locked(_manager.uc_pool_dma32, GFP_USER | GFP_DMA32, + uc dma); _manager.free_interval = msecs_to_jiffies(PAGE_FREE_INTERVAL); _manager.small_allocation = SMALL_ALLOCATION; @@ -773,3 +784,26 @@ void ttm_page_alloc_fini() for (i = 0; i NUM_POOLS; ++i) ttm_page_pool_free(_manager.pools[i], FREE_ALL_PAGES); } + +int ttm_page_alloc_debugfs(struct seq_file *m, void *data) +{ + struct ttm_page_pool *p; + unsigned i; + char *h[] = {pool, refills, pages freed, size, min size}; + if (atomic_read(_manager.page_alloc_inited) == 0) { + seq_printf(m, No pool allocator running.\n); + return 0; + } + seq_printf(m, %6s %12s %13s %8s %8s\n, + h[0], h[1], h[2], h[3], h[4]); + for (i = 0; i NUM_POOLS; ++i) { + p = _manager.pools[i]; + + seq_printf(m, %6s %12ld %13ld %8d %8d\n, + p-name, p-nrefills, + p-nfrees, p-npages, + p-nlowpages); + } + return 0; +} +EXPORT_SYMBOL(ttm_page_alloc_debugfs); diff --git a/include/drm/ttm/ttm_page_alloc.h b/include/drm/ttm/ttm_page_alloc.h index 485514a..2df0caa 100644 --- a/include/drm/ttm/ttm_page_alloc.h +++ b/include/drm/ttm/ttm_page_alloc.h @@ -61,4 +61,8 @@ int
[PATCH 4/7] drm/nouveau: Add ttm page pool debugfs file.
ttm_page_pool file is hooked ttm_page_alloc_debugfs for pool allocator state. Signed-off-by: Pauli Nieminen suok...@gmail.com --- drivers/gpu/drm/nouveau/nouveau_debugfs.c |3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nouveau_debugfs.c b/drivers/gpu/drm/nouveau/nouveau_debugfs.c index 8ff9ef5..59416c8 100644 --- a/drivers/gpu/drm/nouveau/nouveau_debugfs.c +++ b/drivers/gpu/drm/nouveau/nouveau_debugfs.c @@ -33,6 +33,8 @@ #include drmP.h #include nouveau_drv.h +#include ttm/ttm_page_alloc.h + static int nouveau_debugfs_channel_info(struct seq_file *m, void *data) { @@ -160,6 +162,7 @@ static struct drm_info_list nouveau_debugfs_list[] = { { chipset, nouveau_debugfs_chipset_info, 0, NULL }, { memory, nouveau_debugfs_memory_info, 0, NULL }, { vbios.rom, nouveau_debugfs_vbios_image, 0, NULL }, + { ttm_page_pool, ttm_page_alloc_debugfs, 0, NULL }, }; #define NOUVEAU_DEBUGFS_ENTRIES ARRAY_SIZE(nouveau_debugfs_list) -- 1.6.3.3 -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
[PATCH 5/7] drm/ttm: Dynamically scale the allocation sizes of pools.
If we need large number of pages allocations in short time frame allocating large number of pages in single operation performs better than many small operations. If there is less allocation operations allocating large number of pages in a fill operation would waste memory and performance. The allocation sizes of pools is doubled everytime refill is done more than once between shrink calls. While the size is halfed happens if there is no refills for manager-shrink_alloc_interval seconds. Signed-off-by: Pauli Nieminen suok...@gmail.com --- drivers/gpu/drm/ttm/ttm_page_alloc.c | 105 ++ 1 files changed, 81 insertions(+), 24 deletions(-) diff --git a/drivers/gpu/drm/ttm/ttm_page_alloc.c b/drivers/gpu/drm/ttm/ttm_page_alloc.c index 206bee9..af91994 100644 --- a/drivers/gpu/drm/ttm/ttm_page_alloc.c +++ b/drivers/gpu/drm/ttm/ttm_page_alloc.c @@ -47,8 +47,9 @@ #define NUM_PAGES_TO_ALLOC 256 -#define SMALL_ALLOCATION 64 +#define SMALL_ALLOCATION 16 #define FREE_ALL_PAGES 1 +#define SHRINK_ALLOC_INTERVAL 8 /* times are in msecs */ #define PAGE_FREE_INTERVAL 1000 @@ -63,7 +64,10 @@ * @gfp_flags: Flags to pass for alloc_page. * @npages: Number of pages in pool * @nlowpages: Minimum nubmer of pages in pool since previous shrink + * @freed_pages: Number of pages freed in this shrinker run. * @alloc_size: Allocation sizes of this pool. + * @last_refill: Number of shrink calls (with more than alloc_size pages free) + * since last refill call. * operation. */ struct ttm_page_pool { @@ -73,7 +77,9 @@ struct ttm_page_pool { int gfp_flags; unsignednpages; unsignednlowpages; + unsignedfreed_pages; unsignedalloc_size; + unsignedlast_refill; char*name; unsigned long nfrees; unsigned long nrefills; @@ -101,6 +107,7 @@ struct ttm_pool_manager { atomic_tpage_alloc_inited; struct delayed_work work; unsignedsmall_allocation; + unsignedshrink_alloc_interval; union { struct ttm_page_poolpools[NUM_POOLS]; @@ -199,17 +206,33 @@ static void ttm_pages_put(struct page *pages[], unsigned npages) **/ static bool ttm_reset_pools(struct ttm_pool_manager *manager) { + struct ttm_page_pool *pool; unsigned long irq_flags; - bool pages_in_pool = false; + bool more_delayed_work = false; unsigned i; for (i = 0; i NUM_POOLS; ++i) { - spin_lock_irqsave(manager-pools[i].lock, irq_flags); - manager-pools[i].nlowpages = manager-pools[i].npages; - pages_in_pool = pages_in_pool - || manager-pools[i].npages manager-pools[i].alloc_size; - spin_unlock_irqrestore(manager-pools[i].lock, irq_flags); + pool = manager-pools[i]; + spin_lock_irqsave(pool-lock, irq_flags); + /** +* Check if pool has shrink work in a second. +**/ + if (pool-alloc_size manager-small_allocation) { + /* Reduce pool sizes if there is no refills for +* manager-shrink_alloc_interval seconds. */ + if (++pool-last_refill % manager-shrink_alloc_interval == 0) + pool-alloc_size /= 2; + + more_delayed_work = true; + } else + more_delayed_work = more_delayed_work + || pool-npages pool-alloc_size; + + pool-nlowpages = pool-npages; + pool-freed_pages = 0; + + spin_unlock_irqrestore(pool-lock, irq_flags); } - return pages_in_pool; + return more_delayed_work; } /** @@ -220,16 +243,19 @@ static bool ttm_reset_pools(struct ttm_pool_manager *manager) static unsigned ttm_page_pool_get_npages_to_free_locked(struct ttm_page_pool *pool) { unsigned r; + unsigned low = pool-nlowpages - pool-freed_pages; + if (pool-nlowpages pool-freed_pages) + low = 0; /* If less than alloc sizes was the lowest number of pages we don't * free any */ - if (pool-nlowpages pool-alloc_size) + if (low pool-alloc_size) return 0; /* leave half of unused pages to pool */ - r = (pool-nlowpages - pool-alloc_size)/2; + r = (low - pool-alloc_size)/2; if (r) return r; /* make sure we remove all pages even when there is rounding down */ - if (pool-nlowpages) + if (low) return 1; return 0; } @@ -251,12 +277,12 @@ static bool
[PATCH 1/7] drm/ttm: add pool wc/uc page allocator
On AGP system we might allocate/free routinely uncached or wc memory, changing page from cached (wb) to uc or wc is very expensive and involves a lot of flushing. To improve performance this allocator use a pool of uc,wc pages. Pools are protected with spinlocks to allow multiple threads to allocate pages simultanously. Expensive operations are done outside of spinlock to maximize concurrency. Pools are linked lists of pages that were recently freed. Shrink callback is used for removing pages from pool. Half of pages not used between two subsequent shrink calls will be freed. Pool fill is using separate spinlock to protect that parallel allocations won't result exceess allocations to the pool. To prevent dead lock chances fill_lock is locked with spin_trylock if it is not locked. Based on Jerome Glisse's and Dave Airlie's pool allocator. Signed-off-by: Jerome Glisse jgli...@redhat.com Signed-off-by: Dave Airlie airl...@redhat.com Signed-off-by: Pauli Nieminen suok...@gmail.com --- drivers/gpu/drm/ttm/Makefile |2 +- drivers/gpu/drm/ttm/ttm_memory.c |7 +- drivers/gpu/drm/ttm/ttm_page_alloc.c | 775 ++ drivers/gpu/drm/ttm/ttm_tt.c | 44 +- include/drm/ttm/ttm_page_alloc.h | 64 +++ 5 files changed, 867 insertions(+), 25 deletions(-) create mode 100644 drivers/gpu/drm/ttm/ttm_page_alloc.c create mode 100644 include/drm/ttm/ttm_page_alloc.h diff --git a/drivers/gpu/drm/ttm/Makefile b/drivers/gpu/drm/ttm/Makefile index 1e138f5..4256e20 100644 --- a/drivers/gpu/drm/ttm/Makefile +++ b/drivers/gpu/drm/ttm/Makefile @@ -4,6 +4,6 @@ ccflags-y := -Iinclude/drm ttm-y := ttm_agp_backend.o ttm_memory.o ttm_tt.o ttm_bo.o \ ttm_bo_util.o ttm_bo_vm.o ttm_module.o ttm_global.o \ - ttm_object.o ttm_lock.o ttm_execbuf_util.o + ttm_object.o ttm_lock.o ttm_execbuf_util.o ttm_page_alloc.o obj-$(CONFIG_DRM_TTM) += ttm.o diff --git a/drivers/gpu/drm/ttm/ttm_memory.c b/drivers/gpu/drm/ttm/ttm_memory.c index eb143e0..e4c7cea 100644 --- a/drivers/gpu/drm/ttm/ttm_memory.c +++ b/drivers/gpu/drm/ttm/ttm_memory.c @@ -27,6 +27,7 @@ #include ttm/ttm_memory.h #include ttm/ttm_module.h +#include ttm/ttm_page_alloc.h #include linux/spinlock.h #include linux/sched.h #include linux/wait.h @@ -394,6 +395,7 @@ int ttm_mem_global_init(struct ttm_mem_global *glob) Zone %7s: Available graphics memory: %llu kiB.\n, zone-name, (unsigned long long) zone-max_mem 10); } + ttm_page_alloc_init(glob); return 0; out_no_zone: ttm_mem_global_release(glob); @@ -406,6 +408,9 @@ void ttm_mem_global_release(struct ttm_mem_global *glob) unsigned int i; struct ttm_mem_zone *zone; + /* let the page allocator first stop the shrink work. */ + ttm_page_alloc_fini(); + flush_workqueue(glob-swap_queue); destroy_workqueue(glob-swap_queue); glob-swap_queue = NULL; @@ -413,7 +418,7 @@ void ttm_mem_global_release(struct ttm_mem_global *glob) zone = glob-zones[i]; kobject_del(zone-kobj); kobject_put(zone-kobj); - } + } kobject_del(glob-kobj); kobject_put(glob-kobj); } diff --git a/drivers/gpu/drm/ttm/ttm_page_alloc.c b/drivers/gpu/drm/ttm/ttm_page_alloc.c new file mode 100644 index 000..768d479 --- /dev/null +++ b/drivers/gpu/drm/ttm/ttm_page_alloc.c @@ -0,0 +1,775 @@ +/* + * Copyright (c) Red Hat Inc. + + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the Software), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: Dave Airlie airl...@redhat.com + * Jerome Glisse jgli...@redhat.com + * Pauli Nieminen suok...@gmail.com + */ + +/* simple list based uncached page pool + * - Pool collects resently freed pages for reuse + * - Use page-lru to keep a free list + * - doesn't track currently in use pages + */ +#include
Re: [PATCH] drm/i915: Convert some trace events to DEFINE_TRACE
On Thu, 11 Mar 2010 16:41:45 +0800, Li Zefan l...@cn.fujitsu.com wrote: Use DECLARE_EVENT_CLASS to remove duplicate code: textdata bss dec hex filename 146552732 15 1740243fa i915_trace_points.o.orig 116252732 10 14367381f i915_trace_points.o 8 events are converted: i915_gem_object: i915_gem_object_{unbind, destroy} i915_gem_request: i915_gem_request_{complete, retire, wait_begin, wait_end} i915_ring:i915_ring_{wait_begin, wait_end} No functional change. Applied to -next. Thanks! pgp7RE1XbJgQv.pgp Description: PGP signature -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev-- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
[Bug 27141] New: piglit glean/vertProg1 core dumps with RV790
http://bugs.freedesktop.org/show_bug.cgi?id=27141 Summary: piglit glean/vertProg1 core dumps with RV790 Product: Mesa Version: git Platform: x86-64 (AMD64) OS/Version: Linux (All) Status: NEW Severity: major Priority: medium Component: Drivers/DRI/R600 AssignedTo: dri-devel@lists.sourceforge.net ReportedBy: ranki...@googlemail.com The vertProg1 test core dumps because ctx-DrawBuffer is NULL in the radeonFlush() function: Core was generated by `bin/glean -r foo -t vertProg1'. Program terminated with signal 11, Segmentation fault. #0 0x7f7f4f7ed36a in radeonFlush (ctx=0x1cd9b30) at radeon_common.c:1129 1129if ((ctx-DrawBuffer-Name == 0) radeon-front_buffer_dirty) { Missing separate debuginfos, use: debuginfo-install expat-2.0.1-8.fc12.x86_64 glibc-2.11.1-1.x86_64 libICE-1.0.6-1.fc12.x86_64 libSM-1.1.0-7.fc12.x86_64 libX11-1.3-1.fc12.x86_64 libXau-1.0.5-1.fc12.x86_64 libXdamage-1.1.2-1.fc12.x86_64 libXext-1.1-2.fc12.x86_64 libXfixes-4.0.4-1.fc12.x86_64 libXi-1.3-2.fc12.x86_64 libXmu-1.0.5-1.fc12.x86_64 libXt-1.0.7-1.fc12.x86_64 libXxf86vm-1.1.0-1.fc12.x86_64 libdrm-2.4.18-0.1.fc12.x86_64 libgcc-4.4.3-4.fc12.x86_64 libjpeg-6b-46.fc12.x86_64 libstdc++-4.4.3-4.fc12.x86_64 libtiff-3.9.2-3.fc12.x86_64 libuuid-2.16.2-7.fc12.x86_64 libxcb-1.5-1.fc12.x86_64 zlib-1.2.3-23.fc12.x86_64 (gdb) print ctx $1 = (GLcontext *) 0x1cd9b30 (gdb) print ctx-DrawBuffer $2 = (GLframebuffer *) 0x0 -- Configure bugmail: http://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
[Bug 27142] New: piglit glean/pbo -o -v test dumps core
http://bugs.freedesktop.org/show_bug.cgi?id=27142 Summary: piglit glean/pbo -o -v test dumps core Product: Mesa Version: git Platform: x86-64 (AMD64) OS/Version: Linux (All) Status: NEW Severity: normal Priority: medium Component: Drivers/DRI/R600 AssignedTo: dri-devel@lists.sourceforge.net ReportedBy: ranki...@googlemail.com This test passes NULL as a destination address to memcpy(): Core was generated by `bin/glean -r foo -t pbo -o -v'. Program terminated with signal 11, Segmentation fault. #0 0x003963882fe1 in memcpy () from /lib64/libc.so.6 Missing separate debuginfos, use: debuginfo-install expat-2.0.1-8.fc12.x86_64 glibc-2.11.1-1.x86_64 libICE-1.0.6-1.fc12.x86_64 libSM-1.1.0-7.fc12.x86_64 libX11-1.3-1.fc12.x86_64 libXau-1.0.5-1.fc12.x86_64 libXdamage-1.1.2-1.fc12.x86_64 libXext-1.1-2.fc12.x86_64 libXfixes-4.0.4-1.fc12.x86_64 libXi-1.3-2.fc12.x86_64 libXmu-1.0.5-1.fc12.x86_64 libXt-1.0.7-1.fc12.x86_64 libXxf86vm-1.1.0-1.fc12.x86_64 libdrm-2.4.18-0.1.fc12.x86_64 libgcc-4.4.3-4.fc12.x86_64 libjpeg-6b-46.fc12.x86_64 libstdc++-4.4.3-4.fc12.x86_64 libtiff-3.9.2-3.fc12.x86_64 libuuid-2.16.2-7.fc12.x86_64 libxcb-1.5-1.fc12.x86_64 zlib-1.2.3-23.fc12.x86_64 (gdb) where #0 0x003963882fe1 in memcpy () from /lib64/libc.so.6 #1 0x7ff6de05baba in copy_rows (dst=0x0, dststride=value optimized out, src=0x7ff6dd917000, srcstride=value optimized out, numrows=100, rowsize=value optimized out) at radeon_texture.c:68 #2 0x7ff6de04c359 in do_blit_readpixels (ctx=value optimized out, x=value optimized out, y=value optimized out, width=100, height=100, format=32993, type=5121, pack=0x1c6b7d0, pixels=0x0) at radeon_pixel_read.c:165 #3 radeonReadPixels (ctx=value optimized out, x=value optimized out, y=value optimized out, width=100, height=100, format=32993, type=5121, pack=0x1c6b7d0, pixels=0x0) at radeon_pixel_read.c:182 #4 0x7ff6de0bae78 in _mesa_ReadPixels (x=value optimized out, y=value optimized out, width=100, height=100, format=32993, type=5121, pixels=0x0) at main/readpix.c:200 #5 0x004d5d88 in GLEAN::PBOTest::testDrawPixels (this=0x79ec20) at /home/chris/Programs/piglit/tests/glean/tpbo.cpp:299 #6 0x004d865b in GLEAN::PBOTest::testFunctionality (this=0x79ec20, r= ...) at /home/chris/Programs/piglit/tests/glean/tpbo.cpp:1110 #7 0x004d8c70 in GLEAN::PBOTest::runSubTests (this=0x79ec20, r=...) at /home/chris/Programs/piglit/tests/glean/tpbo.cpp:1247 #8 0x004d8d00 in GLEAN::PBOTest::runOne (this=0x79ec20, r=..., w=...) at /home/chris/Programs/piglit/tests/glean/tpbo.cpp:1264 #9 0x00498af2 in GLEAN::BaseTestGLEAN::MultiTestResult::run ( this=0x79ec20, environment=...) at /home/chris/Programs/piglit/tests/glean/tbase.h:320 #10 0x004906ec in main (argc=7, argv=0x7fff82f7f1a8) at /home/chris/Programs/piglit/tests/glean/main.cpp:141 -- Configure bugmail: http://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
[Bug 27144] New: piglit glean/depthStencil test core dumps with RV790
http://bugs.freedesktop.org/show_bug.cgi?id=27144 Summary: piglit glean/depthStencil test core dumps with RV790 Product: Mesa Version: git Platform: x86-64 (AMD64) OS/Version: Linux (All) Status: NEW Severity: normal Priority: medium Component: Drivers/DRI/R600 AssignedTo: dri-devel@lists.sourceforge.net ReportedBy: ranki...@googlemail.com Program terminated with signal 11, Segmentation fault. #0 0x7f1d9af0cfdb in radeonWriteDepthSpan_s8_z24 ( ctx=value optimized out, rb=0x30588d0, n=value optimized out, x=value optimized out, y=971, values=value optimized out, mask=0x0) at ../../../../../src/mesa/drivers/dri/common/depthtmp.h:61 61 WRITE_DEPTH( x1, y, depth[i] ); Missing separate debuginfos, use: debuginfo-install expat-2.0.1-8.fc12.x86_64 glibc-2.11.1-1.x86_64 libICE-1.0.6-1.fc12.x86_64 libSM-1.1.0-7.fc12.x86_64 libX11-1.3-1.fc12.x86_64 libXau-1.0.5-1.fc12.x86_64 libXdamage-1.1.2-1.fc12.x86_64 libXext-1.1-2.fc12.x86_64 libXfixes-4.0.4-1.fc12.x86_64 libXi-1.3-2.fc12.x86_64 libXmu-1.0.5-1.fc12.x86_64 libXt-1.0.7-1.fc12.x86_64 libXxf86vm-1.1.0-1.fc12.x86_64 libdrm-2.4.18-0.1.fc12.x86_64 libgcc-4.4.3-4.fc12.x86_64 libjpeg-6b-46.fc12.x86_64 libstdc++-4.4.3-4.fc12.x86_64 libtiff-3.9.2-3.fc12.x86_64 libuuid-2.16.2-7.fc12.x86_64 libxcb-1.5-1.fc12.x86_64 zlib-1.2.3-23.fc12.x86_64 (gdb) where #0 0x7f1d9af0cfdb in radeonWriteDepthSpan_s8_z24 ( ctx=value optimized out, rb=0x30588d0, n=value optimized out, x=value optimized out, y=971, values=value optimized out, mask=0x0) at ../../../../../src/mesa/drivers/dri/common/depthtmp.h:61 #1 0x7f1d9afe56f8 in draw_depth_stencil_pixels (ctx=0x2b51c00, x=0, y=0, width=1000, height=972, type=34042, unpack=0x2b618e8, pixels=0x3332b70) at swrast/s_drawpix.c:667 #2 0x7f1d9afe59a4 in _swrast_DrawPixels (ctx=0x2b51c00, x=value optimized out, y=value optimized out, width=1000, height=1000, format=34041, type=34042, unpack=0x2b618e8, pixels=value optimized out) at swrast/s_drawpix.c:812 #3 0x7f1d9b01bb29 in _mesa_meta_DrawPixels (ctx=0x2b51c00, x=value optimized out, y=value optimized out, width=value optimized out, height=value optimized out, format=value optimized out, type=34042, unpack=0x2b618e8, pixels=0x3332b70) at drivers/common/meta.c:1798 #4 0x7f1d9b043c05 in _mesa_DrawPixels (width=1000, height=1000, format=34041, type=34042, pixels=0x3332b70) at main/drawpix.c:119 #5 0x004b4583 in GLEAN::DepthStencilTest::readPixelsRate ( this=0x79dd00, format=34041, type=34042) at /home/chris/Programs/piglit/tests/glean/tdepthstencil.cpp:245 #6 0x004b470e in GLEAN::DepthStencilTest::testPerformance ( this=0x79dd00, r=...) at /home/chris/Programs/piglit/tests/glean/tdepthstencil.cpp:274 #7 0x004b484c in GLEAN::DepthStencilTest::runOne (this=0x79dd00, r=..., w=...) at /home/chris/Programs/piglit/tests/glean/tdepthstencil.cpp:307 #8 0x004b5e52 in GLEAN::BaseTestGLEAN::DepthStencilResult::run ( this=0x79dd00, environment=...) at /home/chris/Programs/piglit/tests/glean/tbase.h:320 #9 0x004906ec in main (argc=5, argv=0x7fff4f4c68d8) at /home/chris/Programs/piglit/tests/glean/main.cpp:141 -- Configure bugmail: http://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
[Bug 27147] New: piglit fdo23670-drawpix_stencil -auto test dumps core with RV790
http://bugs.freedesktop.org/show_bug.cgi?id=27147 Summary: piglit fdo23670-drawpix_stencil -auto test dumps core with RV790 Product: Mesa Version: git Platform: x86-64 (AMD64) OS/Version: Linux (All) Status: NEW Severity: normal Priority: medium Component: Drivers/DRI/R600 AssignedTo: dri-devel@lists.sourceforge.net ReportedBy: ranki...@googlemail.com Core was generated by `bin/fdo23670-drawpix_stencil -auto'. Program terminated with signal 11, Segmentation fault. #0 Process_Export (pAsm=0x23cc660, type=0, export_starting_index=value optimized out, export_count=1, starting_register_number=value optimized out, is_depth_export=0 '\000') at r700_assembler.c:6350 6350ucWriteMask = pAsm-pucOutMask[starting_register_number - pAsm-starting_export_register_number]; Missing separate debuginfos, use: debuginfo-install expat-2.0.1-8.fc12.x86_64 glew-1.5.1-3.fc12.x86_64 glibc-2.11.1-1.x86_64 libICE-1.0.6-1.fc12.x86_64 libSM-1.1.0-7.fc12.x86_64 libX11-1.3-1.fc12.x86_64 libXau-1.0.5-1.fc12.x86_64 libXdamage-1.1.2-1.fc12.x86_64 libXext-1.1-2.fc12.x86_64 libXfixes-4.0.4-1.fc12.x86_64 libXi-1.3-2.fc12.x86_64 libXmu-1.0.5-1.fc12.x86_64 libXt-1.0.7-1.fc12.x86_64 libXxf86vm-1.1.0-1.fc12.x86_64 libdrm-2.4.18-0.1.fc12.x86_64 libgcc-4.4.3-4.fc12.x86_64 libjpeg-6b-46.fc12.x86_64 libstdc++-4.4.3-4.fc12.x86_64 libtiff-3.9.2-3.fc12.x86_64 libuuid-2.16.2-7.fc12.x86_64 libxcb-1.5-1.fc12.x86_64 zlib-1.2.3-23.fc12.x86_64 (gdb) print pAsm-pucOutMask[starting_register_number - pAsm-starting_export_register_number] Cannot access memory at address 0x1023e597e -- Configure bugmail: http://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
[Bug 27141] piglit glean/vertProg1 core dumps with RV790
http://bugs.freedesktop.org/show_bug.cgi?id=27141 --- Comment #1 from Chris Rankin ranki...@googlemail.com 2010-03-17 15:46:41 PST --- This same bug seems to be triggered by bin/vp-bad-program -auto. -- Configure bugmail: http://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
[Bug 27148] New: Failed assertion in piglit test 'bin/fbo-flushing -auto' with RV790
http://bugs.freedesktop.org/show_bug.cgi?id=27148 Summary: Failed assertion in piglit test 'bin/fbo-flushing -auto' with RV790 Product: Mesa Version: git Platform: x86-64 (AMD64) OS/Version: Linux (All) Status: NEW Severity: normal Priority: medium Component: Drivers/DRI/R600 AssignedTo: dri-devel@lists.sourceforge.net ReportedBy: ranki...@googlemail.com fbo-flushing: /home/chris/Programs/piglit/tests/fbo/fbo-flushing.c:79: piglit_display: Assertion `__glewCheckFramebufferStatusEXT(0x8D40) == 0x8CD5' failed. Aborted (core dumped) Core was generated by `bin/fbo-flushing -auto'. Program terminated with signal 6, Aborted. #0 0x0039638326c5 in raise () from /lib64/libc.so.6 Missing separate debuginfos, use: debuginfo-install expat-2.0.1-8.fc12.x86_64 glew-1.5.1-3.fc12.x86_64 glibc-2.11.1-1.x86_64 libICE-1.0.6-1.fc12.x86_64 libSM-1.1.0-7.fc12.x86_64 libX11-1.3-1.fc12.x86_64 libXau-1.0.5-1.fc12.x86_64 libXdamage-1.1.2-1.fc12.x86_64 libXext-1.1-2.fc12.x86_64 libXfixes-4.0.4-1.fc12.x86_64 libXi-1.3-2.fc12.x86_64 libXmu-1.0.5-1.fc12.x86_64 libXt-1.0.7-1.fc12.x86_64 libXxf86vm-1.1.0-1.fc12.x86_64 libdrm-2.4.18-0.1.fc12.x86_64 libgcc-4.4.3-4.fc12.x86_64 libjpeg-6b-46.fc12.x86_64 libstdc++-4.4.3-4.fc12.x86_64 libtiff-3.9.2-3.fc12.x86_64 libuuid-2.16.2-7.fc12.x86_64 libxcb-1.5-1.fc12.x86_64 zlib-1.2.3-23.fc12.x86_64 (gdb) where #0 0x0039638326c5 in raise () from /lib64/libc.so.6 #1 0x003963833ea5 in abort () from /lib64/libc.so.6 #2 0x00396382b7b5 in __assert_fail () from /lib64/libc.so.6 #3 0x00402950 in piglit_display () at /home/chris/Programs/piglit/tests/fbo/fbo-flushing.c:78 #4 0x00403fb9 in display () at /home/chris/Programs/piglit/tests/util/piglit-framework.c:44 #5 0x7fa56dc583bb in processWindowWorkList (window=0x2296310) at glut_event.c:1307 #6 0x7fa56dc59224 in __glutProcessWindowWorkLists () at glut_event.c:1358 #7 glutMainLoop () at glut_event.c:1379 #8 0x00404149 in main (argc=1, argv=0x7fffadb4ad18) at /home/chris/Programs/piglit/tests/util/piglit-framework.c:94 -- Configure bugmail: http://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
[Bug 27149] New: Failed assertion in piglit test 'fbo-pbo-readpixels-small -auto' with RV790
http://bugs.freedesktop.org/show_bug.cgi?id=27149 Summary: Failed assertion in piglit test 'fbo-pbo-readpixels- small -auto' with RV790 Product: Mesa Version: git Platform: x86-64 (AMD64) OS/Version: Linux (All) Status: NEW Severity: normal Priority: medium Component: Drivers/DRI/R600 AssignedTo: dri-devel@lists.sourceforge.net ReportedBy: ranki...@googlemail.com $ bin/fbo-pbo-readpixels-small -auto framebuffer incomplete (status = 0x8cdd) Aborted (core dumped) Core was generated by `bin/fbo-pbo-readpixels-small -auto'. Program terminated with signal 6, Aborted. #0 0x0039638326c5 in raise () from /lib64/libc.so.6 Missing separate debuginfos, use: debuginfo-install expat-2.0.1-8.fc12.x86_64 glew-1.5.1-3.fc12.x86_64 glibc-2.11.1-1.x86_64 libICE-1.0.6-1.fc12.x86_64 libSM-1.1.0-7.fc12.x86_64 libX11-1.3-1.fc12.x86_64 libXau-1.0.5-1.fc12.x86_64 libXdamage-1.1.2-1.fc12.x86_64 libXext-1.1-2.fc12.x86_64 libXfixes-4.0.4-1.fc12.x86_64 libXi-1.3-2.fc12.x86_64 libXmu-1.0.5-1.fc12.x86_64 libXt-1.0.7-1.fc12.x86_64 libXxf86vm-1.1.0-1.fc12.x86_64 libdrm-2.4.18-0.1.fc12.x86_64 libgcc-4.4.3-4.fc12.x86_64 libjpeg-6b-46.fc12.x86_64 libstdc++-4.4.3-4.fc12.x86_64 libtiff-3.9.2-3.fc12.x86_64 libuuid-2.16.2-7.fc12.x86_64 libxcb-1.5-1.fc12.x86_64 zlib-1.2.3-23.fc12.x86_64 (gdb) where #0 0x0039638326c5 in raise () from /lib64/libc.so.6 #1 0x003963833ea5 in abort () from /lib64/libc.so.6 #2 0x00402b2e in make_fbo (fbo=0x7fff4cf908b0, tex=0x7fff4cf908ac) at /home/chris/Programs/piglit/tests/fbo/fbo-pbo-readpixels-small.c:72 #3 0x00402bcf in piglit_display () at /home/chris/Programs/piglit/tests/fbo/fbo-pbo-readpixels-small.c:97 #4 0x0040434d in display () at /home/chris/Programs/piglit/tests/util/piglit-framework.c:44 #5 0x7f2ea198f3bb in processWindowWorkList (window=0x1faf320) at glut_event.c:1307 #6 0x7f2ea1990224 in __glutProcessWindowWorkLists () at glut_event.c:1358 #7 glutMainLoop () at glut_event.c:1379 #8 0x004044dd in main (argc=1, argv=0x7fff4cf90bf8) at /home/chris/Programs/piglit/tests/util/piglit-framework.c:94 -- Configure bugmail: http://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
Re: [PATCHES] radeon kms pm patches
2010/3/17 Alex Deucher alexdeuc...@gmail.com: Another set of updated patches against drm-radeon-testing: http://people.freedesktop.org/~agd5f/pm2/ Not serious thing, but still it's warning... # git am pm2/0001* Applying: drm/radeon/kms/atom: make sure tables are valid /home/drm-2.6/.git/rebase-apply/patch:475: space before tab in indent. if (atom_parse_data_header(mode_info-atom_context, index, NULL, frev, crev, data_offset)) { /home/drm-2.6/.git/rebase-apply/patch:476: space before tab in indent. power_info = (union power_info *)(mode_info-atom_context-bios + data_offset); warning: 2 lines add whitespace errors. -- Rafał -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
Re: [PATCH 6/7] arch/x86: Add array variants for setting memory to wc caching.
On Thu, Mar 18, 2010 at 6:50 AM, Pauli Nieminen suok...@gmail.com wrote: Setting single memory pages at a time to wc takes a lot time in cache flush. To reduce number of cache flush set_pages_array_wc and set_memory_array_wc can be used to set multiple pages to WC with single cache flush. I don't think this is correct, I've cc'ed Suresh and Venki who looked at this before, but I think there is an array in the x86 code that stores the state and it only has a single bit in it, it needs to be expanded in order to at WC support. Dave. This improves allocation performance for wc cached pages in drm/ttm. Signed-off-by: Pauli Nieminen suok...@gmail.com --- arch/x86/include/asm/cacheflush.h | 2 + arch/x86/mm/pageattr.c | 53 +++- 2 files changed, 47 insertions(+), 8 deletions(-) diff --git a/arch/x86/include/asm/cacheflush.h b/arch/x86/include/asm/cacheflush.h index 634c40a..d92d63a 100644 --- a/arch/x86/include/asm/cacheflush.h +++ b/arch/x86/include/asm/cacheflush.h @@ -139,9 +139,11 @@ int set_memory_np(unsigned long addr, int numpages); int set_memory_4k(unsigned long addr, int numpages); int set_memory_array_uc(unsigned long *addr, int addrinarray); +int set_memory_array_wc(unsigned long *addr, int addrinarray); int set_memory_array_wb(unsigned long *addr, int addrinarray); int set_pages_array_uc(struct page **pages, int addrinarray); +int set_pages_array_wc(struct page **pages, int addrinarray); int set_pages_array_wb(struct page **pages, int addrinarray); /* diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c index cf07c26..0c98a75 100644 --- a/arch/x86/mm/pageattr.c +++ b/arch/x86/mm/pageattr.c @@ -997,7 +997,8 @@ out_err: } EXPORT_SYMBOL(set_memory_uc); -int set_memory_array_uc(unsigned long *addr, int addrinarray) +int _set_memory_array(unsigned long *addr, int addrinarray, + unsigned long new_type) { int i, j; int ret; @@ -1007,13 +1008,19 @@ int set_memory_array_uc(unsigned long *addr, int addrinarray) */ for (i = 0; i addrinarray; i++) { ret = reserve_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE, - _PAGE_CACHE_UC_MINUS, NULL); + new_type, NULL); if (ret) goto out_free; } ret = change_page_attr_set(addr, addrinarray, __pgprot(_PAGE_CACHE_UC_MINUS), 1); + + if (!ret new_type == _PAGE_CACHE_WC) + ret = change_page_attr_set_clr(addr, addrinarray, + __pgprot(_PAGE_CACHE_WC), + __pgprot(_PAGE_CACHE_MASK), + 0, CPA_ARRAY, NULL); if (ret) goto out_free; @@ -1025,8 +1032,19 @@ out_free: return ret; } + +int set_memory_array_uc(unsigned long *addr, int addrinarray) +{ + return _set_memory_array(addr, addrinarray, _PAGE_CACHE_UC_MINUS); +} EXPORT_SYMBOL(set_memory_array_uc); +int set_memory_array_wc(unsigned long *addr, int addrinarray) +{ + return _set_memory_array(addr, addrinarray, _PAGE_CACHE_WC); +} +EXPORT_SYMBOL(set_memory_array_wc); + int _set_memory_wc(unsigned long addr, int numpages) { int ret; @@ -1153,26 +1171,34 @@ int set_pages_uc(struct page *page, int numpages) } EXPORT_SYMBOL(set_pages_uc); -int set_pages_array_uc(struct page **pages, int addrinarray) +static int _set_pages_array(struct page **pages, int addrinarray, + unsigned long new_type) { unsigned long start; unsigned long end; int i; int free_idx; + int ret; for (i = 0; i addrinarray; i++) { if (PageHighMem(pages[i])) continue; start = page_to_pfn(pages[i]) PAGE_SHIFT; end = start + PAGE_SIZE; - if (reserve_memtype(start, end, _PAGE_CACHE_UC_MINUS, NULL)) + if (reserve_memtype(start, end, new_type, NULL)) goto err_out; } - if (cpa_set_pages_array(pages, addrinarray, - __pgprot(_PAGE_CACHE_UC_MINUS)) == 0) { - return 0; /* Success */ - } + ret = cpa_set_pages_array(pages, addrinarray, + __pgprot(_PAGE_CACHE_UC_MINUS)); + if (!ret new_type == _PAGE_CACHE_WC) + ret = change_page_attr_set_clr(NULL, addrinarray, + __pgprot(_PAGE_CACHE_WC), + __pgprot(_PAGE_CACHE_MASK), + 0, CPA_PAGES_ARRAY, pages); + if (ret) + goto err_out; + return 0; /* Success */ err_out: free_idx = i;
[PATCH] drm/radeon/kms: remove lvds quirks
From 8081a7f7b74310d9cfd03637741d59d8fd66d1e5 Mon Sep 17 00:00:00 2001 From: Alex Deucher alexdeuc...@gmail.com Date: Wed, 17 Mar 2010 19:50:59 -0400 Subject: [PATCH] drm/radeon/kms: remove lvds quirks - no longer needed with the latest new pll algo fixes. - also don't use lcd pll limits. They don't seem to work well for all systems. If we have a case where they are useful, we can set the flag for that case. fixes fdo bug 27083 Signed-off-by: Alex Deucher alexdeuc...@gmail.com --- drivers/gpu/drm/radeon/atombios_crtc.c |6 -- drivers/gpu/drm/radeon/radeon_atombios.c | 27 --- 2 files changed, 0 insertions(+), 33 deletions(-) diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c index 1532f3e..fb11fc1 100644 --- a/drivers/gpu/drm/radeon/atombios_crtc.c +++ b/drivers/gpu/drm/radeon/atombios_crtc.c @@ -526,12 +526,6 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc, /* DVO wants 2x pixel clock if the DVO chip is in 12 bit mode */ if (radeon_encoder-encoder_id == ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1) adjusted_clock = mode-clock * 2; - /* LVDS PLL quirks */ - if (encoder-encoder_type == DRM_MODE_ENCODER_LVDS) { - struct radeon_encoder_atom_dig *dig = radeon_encoder-enc_priv; - pll-algo = dig-pll_algo; - pll-flags |= RADEON_PLL_IS_LCD; - } } else { if (encoder-encoder_type != DRM_MODE_ENCODER_DAC) pll-flags |= RADEON_PLL_NO_ODD_POST_DIV; diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c index 8a5846b..2219bca 100644 --- a/drivers/gpu/drm/radeon/radeon_atombios.c +++ b/drivers/gpu/drm/radeon/radeon_atombios.c @@ -1120,30 +1120,6 @@ static struct radeon_atom_ss *radeon_atombios_get_ss_info(struct return ss; } -static void radeon_atom_apply_lvds_quirks(struct drm_device *dev, - struct radeon_encoder_atom_dig *lvds) -{ - - /* Toshiba A300-1BU laptop panel doesn't like new pll divider algo */ - if ((dev-pdev-device == 0x95c4) - (dev-pdev-subsystem_vendor == 0x1179) - (dev-pdev-subsystem_device == 0xff50)) { - if ((lvds-native_mode.hdisplay == 1280) - (lvds-native_mode.vdisplay == 800)) - lvds-pll_algo = PLL_ALGO_LEGACY; - } - - /* Dell Studio 15 laptop panel doesn't like new pll divider algo */ - if ((dev-pdev-device == 0x95c4) - (dev-pdev-subsystem_vendor == 0x1028) - (dev-pdev-subsystem_device == 0x029f)) { - if ((lvds-native_mode.hdisplay == 1280) - (lvds-native_mode.vdisplay == 800)) - lvds-pll_algo = PLL_ALGO_LEGACY; - } - -} - union lvds_info { struct _ATOM_LVDS_INFO info; struct _ATOM_LVDS_INFO_V12 info_12; @@ -1223,9 +1199,6 @@ struct radeon_encoder_atom_dig *radeon_atombios_get_lvds_info(struct lvds-pll_algo = PLL_ALGO_LEGACY; } - /* LVDS quirks */ - radeon_atom_apply_lvds_quirks(dev, lvds); - encoder-native_mode = lvds-native_mode; } return lvds; -- 1.5.6.3 0001-drm-radeon-kms-remove-lvds-quirks.patch Description: application/mbox -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev-- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
Re: My goal
On Thu, Mar 11, 2010 at 1:51 PM, James Simmons jsimm...@infradead.org wrote: Okay all the discussion about multiple display brings me to why I'm doing this. I'm attempting to revive the linux console project. I'm in a position to again work on this project. About 4 years ago the eproject managed to get multi-seat working. My goal is to get there again. My first goal is to get my netbook to act has a multiseat system for two. With a plugged in external montior and a USB keyboard run two concurrent X sessions both running OpenGL applications at the same time. I set out to do this 10 years ago and I want to finally accomplish this. Okay I took an afternoon to flesh out my design and got something working here, I'll try and setup a videod demo later (if I can find a camera). But I can now run two *separate* X servers on different outputs of the same GPU. http://people.freedesktop.org/~airlied/multiseat/ has the kernel + libdrm patch, this is hacked for *my* X1900 (the radeon driver hardcodes a seat - crtc/connector/encoder mapping that should be dynamically setup from userspace via the drm control node. The libdrm patches adds an env var to pick device node (probably needs to be secured). With this I can and some proper xorg.conf to pick the correct input devices DRM_DEVICE_PATH=/dev/dri/renderD128 /opt/xorg/bin/Xorg -retro DRM_DEVICE_PATH=/dev/dri/renderD129 /opt/xorg/bin/Xorg :1 -sharevts -novtswitch -retro I can run two independent X servers on the same GPU. Hopefully this gives you some idea of where I was planning on heading with this. Dave. -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
Re: [PATCHES] radeon kms pm patches
2010/3/17 Alex Deucher alexdeuc...@gmail.com Another set of updated patches against drm-radeon-testing: http://people.freedesktop.org/~agd5f/pm2/ These implement much the remaining pm functionality. So far they are working well here. these patches add: - memory reclocking - pcie lane changes - update display watermarks as bandwidth changes - allow power management with multi-head - reset power mode on exit It seems memory reclocking and SIMDs setting is disabled for r6xx with currently available patches...? Otherwise it seems to work fine. -- Rafał -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
Re: [Mesa3d-dev] DRI SDK and modularized drivers.
On Wed, Mar 17, 2010 at 12:28:39AM +0100, Luc Verhaegen wrote: Modularized dri drivers and an SDK enabled mesa tree are available in my personal git repos at http://cgit.freedesktop.org/~libv/ The SDK enabled mesa tree adds to the mesa build system to create shared libraries libmesadri and libmesadricommon. It creates the relevant .pc files and installs the necessary headers include/mesa/ (and updates glcore.h). The patch is about 300 lines each time, and only adjusts the build system. The modularized drivers are fully autotooled and can be built and installed the familiar way once the dependencies are available (currently, libdrm and the dri sdk, and some driver specific libdrms for i9xx and radeon). These drivers are i810, i9xx (i915 and i965), mach64, mga, r128, radeon (also includes r200, r300 and r600), savage, sis, tdfx and unichrome. This work was done for currently 16 versions between mesa 7.0 and the freshly tagged 7.8-rc1, all were extensively and oft repeatedly built through. 5 versions were also run tested (glxinfo, glxgears) for the radeon and unichrome drivers, and the swrast driver was also tested several times. Such a large range of versions was handled to prove the long term feasability of this. This work satisfies my requirements from my TODO: Mesa slide from my fosdem talk, for which the slides are available at: http://people.freedesktop.org/~libv/graphics_driver_stack_(FOSDEM2010_-_slides)$ This only handles the DRI part of things, gallium seems to be more in flux atm, and from what i hear, it should be easier to have modular drivers there. Comments, additions, changes? Thanks, Luc Verhaegen. After giving the mesa3d-dev list the opportunity to have a whole day of deafening silence, maybe the other lists should join in on that fun :p Luc Verhaegen. -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
Re: [PATCHES] radeon kms pm patches
2010/3/17 Rafał Miłecki zaj...@gmail.com: 2010/3/17 Alex Deucher alexdeuc...@gmail.com: Another set of updated patches against drm-radeon-testing: http://people.freedesktop.org/~agd5f/pm2/ Not serious thing, but still it's warning... # git am pm2/0001* Applying: drm/radeon/kms/atom: make sure tables are valid /home/drm-2.6/.git/rebase-apply/patch:475: space before tab in indent. if (atom_parse_data_header(mode_info-atom_context, index, NULL, frev, crev, data_offset)) { /home/drm-2.6/.git/rebase-apply/patch:476: space before tab in indent. power_info = (union power_info *)(mode_info-atom_context-bios + data_offset); warning: 2 lines add whitespace errors. Looks like I was a little too quirk with that patch :) I'll get that fixed up. Alex -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
Re: [PATCHES] radeon kms pm patches
2010/3/17 Rafał Miłecki zaj...@gmail.com: 2010/3/17 Alex Deucher alexdeuc...@gmail.com Another set of updated patches against drm-radeon-testing: http://people.freedesktop.org/~agd5f/pm2/ These implement much the remaining pm functionality. So far they are working well here. these patches add: - memory reclocking - pcie lane changes - update display watermarks as bandwidth changes - allow power management with multi-head - reset power mode on exit It seems memory reclocking and SIMDs setting is disabled for r6xx with currently available patches...? It re-clocks memory (for single head anyway), r600_set_power_state(): /* set memory clock */ if (rdev-asic-set_memory_clock (mclk != rdev-pm.current_mclk)) { radeon_sync_with_vblank(rdev); radeon_pm_debug_check_in_vbl(rdev, false); radeon_set_memory_clock(rdev, mclk); radeon_pm_debug_check_in_vbl(rdev, true); rdev-pm.current_mclk = mclk; DRM_INFO(Setting: m: %d\n, mclk); } The simd stuff is still disabled at the moment. Otherwise it seems to work fine. Thanks for testing. Alex -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel
[Bug 27083] Commit use lcd pll limits when available in drm-radeon-testing breaks my laptop lvds
http://bugs.freedesktop.org/show_bug.cgi?id=27083 Alex Deucher ag...@yahoo.com changed: What|Removed |Added Status|NEW |RESOLVED Resolution||FIXED --- Comment #8 from Alex Deucher ag...@yahoo.com 2010-03-17 20:30:41 PST --- I've sent the combined patch to Dave. thanks! -- Configure bugmail: http://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. -- Download Intel#174; Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev -- ___ Dri-devel mailing list Dri-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/dri-devel