Re: [PATCH v4 3/3] drm/bridge: anx7625: add MIPI DPI input feature support
Hi Hsin-Yi, thanks for the comment, I'll change it in the next serial.
As video-interfaces.yaml not exist in drm-next, I'm waiting for 5.12-rc1 to
apply to drm-misc, then I'll upstream patch v5.
Thanks,
Xin
On Wed, Feb 24, 2021 at 05:55:39PM +0800, Hsin-Yi Wang wrote:
> On Thu, Jan 28, 2021 at 11:10 AM Xin Ji wrote:
> >
> > Add MIPI rx DPI input support
> >
> > Reported-by: kernel test robot
> > Signed-off-by: Xin Ji
> > ---
> > drivers/gpu/drm/bridge/analogix/anx7625.c | 326
> > --
> > drivers/gpu/drm/bridge/analogix/anx7625.h | 20 +-
> > 2 files changed, 285 insertions(+), 61 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c
> > b/drivers/gpu/drm/bridge/analogix/anx7625.c
> > index 04536cc..628ae43 100644
> > --- a/drivers/gpu/drm/bridge/analogix/anx7625.c
> > +++ b/drivers/gpu/drm/bridge/analogix/anx7625.c
> > @@ -150,18 +150,18 @@ static int anx7625_write_and(struct anx7625_data *ctx,
> > return anx7625_reg_write(ctx, client, offset, (val & (mask)));
> > }
> >
> > -static int anx7625_write_and_or(struct anx7625_data *ctx,
> > - struct i2c_client *client,
> > - u8 offset, u8 and_mask, u8 or_mask)
> > +static int anx7625_config_bit_matrix(struct anx7625_data *ctx)
> > {
> > - int val;
> > + int i, ret;
> >
> > - val = anx7625_reg_read(ctx, client, offset);
> > - if (val < 0)
> > - return val;
> > + ret = anx7625_write_or(ctx, ctx->i2c.tx_p2_client,
> > + AUDIO_CONTROL_REGISTER, 0x80);
> > + for (i = 0; i < 13; i++)
> > + ret |= anx7625_reg_write(ctx, ctx->i2c.tx_p2_client,
> > +VIDEO_BIT_MATRIX_12 + i,
> > +0x18 + i);
> >
> > - return anx7625_reg_write(ctx, client,
> > -offset, (val & and_mask) | (or_mask));
> > + return ret;
> > }
> >
> > static int anx7625_read_ctrl_status_p0(struct anx7625_data *ctx)
> > @@ -195,6 +195,60 @@ static int wait_aux_op_finish(struct anx7625_data *ctx)
> > return 0;
> > }
> >
> > +static int anx7625_aux_dpcd_read(struct anx7625_data *ctx,
> > +u8 addrh, u8 addrm, u8 addrl,
> > +u8 len, u8 *buf)
> > +{
> > + struct device *dev = >client->dev;
> > + int ret;
> > + u8 cmd;
> > +
> > + if (len > MAX_DPCD_BUFFER_SIZE) {
> > + DRM_DEV_ERROR(dev, "exceed aux buffer len.\n");
> > + return -EINVAL;
> > + }
> > +
> > + cmd = ((len - 1) << 4) | 0x09;
> > +
> > + /* Set command and length */
> > + ret = anx7625_reg_write(ctx, ctx->i2c.rx_p0_client,
> > + AP_AUX_COMMAND, cmd);
> > +
> > + /* Set aux access address */
> > + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client,
> > +AP_AUX_ADDR_7_0, addrl);
> > + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client,
> > +AP_AUX_ADDR_15_8, addrm);
> > + ret |= anx7625_write_and(ctx, ctx->i2c.rx_p0_client,
> > +AP_AUX_ADDR_19_16, addrh);
> > +
> > + /* Enable aux access */
> > + ret |= anx7625_write_or(ctx, ctx->i2c.rx_p0_client,
> > + AP_AUX_CTRL_STATUS, AP_AUX_CTRL_OP_EN);
> > +
> > + if (ret < 0) {
> > + DRM_DEV_ERROR(dev, "cannot access aux related register.\n");
> > + return -EIO;
> > + }
> > +
> > + usleep_range(2000, 2100);
> > +
> > + ret = wait_aux_op_finish(ctx);
> > + if (ret) {
> > + DRM_DEV_ERROR(dev, "aux IO error: wait aux op finish.\n");
> > + return ret;
> > + }
> > +
> > + ret = anx7625_reg_block_read(ctx, ctx->i2c.rx_p0_client,
> > +AP_AUX_BUFF_START, len, buf);
> > + if (ret < 0) {
> > + DRM_DEV_ERROR(dev, "read dpcd register failed\n");
> > + return -EIO;
> > + }
> > +
> > + return 0;
> > +}
> > +
> > static int anx7625_video_mute_control(struct anx7625_data *ctx,
> > u8 status)
> > {
> > @@ -219,38 +273,6 @@ static int anx7625_video_mute_control(struct
> > anx7625_data *ctx,
> > return ret;
> > }
> >
> > -static int anx7625_config_audio_input(struct anx7625_data *ctx)
> > -{
> > - struct device *dev = >client->dev;
> > - int ret;
> > -
> > - /* Channel num */
> > - ret = anx7625_reg_write(ctx, ctx->i2c.tx_p2_client,
> > - AUDIO_CHANNEL_STATUS_6, I2S_CH_2 << 5);
> > -
> > - /* FS */
> > - ret |= anx7625_write_and_or(ctx, ctx->i2c.tx_p2_client,
> > - AUDIO_CHANNEL_STATUS_4,
> > -
Re: [PATCH v4 3/3] drm/bridge: anx7625: add MIPI DPI input feature support
On Wed, Feb 24, 2021 at 5:55 PM Hsin-Yi Wang wrote:
>
> On Thu, Jan 28, 2021 at 11:10 AM Xin Ji wrote:
> >
> > Add MIPI rx DPI input support
> >
> > Reported-by: kernel test robot
> > Signed-off-by: Xin Ji
> > ---
> > drivers/gpu/drm/bridge/analogix/anx7625.c | 326
> > --
> > drivers/gpu/drm/bridge/analogix/anx7625.h | 20 +-
> > 2 files changed, 285 insertions(+), 61 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c
> > b/drivers/gpu/drm/bridge/analogix/anx7625.c
> > index 04536cc..628ae43 100644
> > --- a/drivers/gpu/drm/bridge/analogix/anx7625.c
> > +++ b/drivers/gpu/drm/bridge/analogix/anx7625.c
> > @@ -150,18 +150,18 @@ static int anx7625_write_and(struct anx7625_data *ctx,
> > return anx7625_reg_write(ctx, client, offset, (val & (mask)));
> > }
> >
> > -static int anx7625_write_and_or(struct anx7625_data *ctx,
> > - struct i2c_client *client,
> > - u8 offset, u8 and_mask, u8 or_mask)
> > +static int anx7625_config_bit_matrix(struct anx7625_data *ctx)
> > {
> > - int val;
> > + int i, ret;
> >
> > - val = anx7625_reg_read(ctx, client, offset);
> > - if (val < 0)
> > - return val;
> > + ret = anx7625_write_or(ctx, ctx->i2c.tx_p2_client,
> > + AUDIO_CONTROL_REGISTER, 0x80);
> > + for (i = 0; i < 13; i++)
> > + ret |= anx7625_reg_write(ctx, ctx->i2c.tx_p2_client,
> > +VIDEO_BIT_MATRIX_12 + i,
> > +0x18 + i);
> >
> > - return anx7625_reg_write(ctx, client,
> > -offset, (val & and_mask) | (or_mask));
> > + return ret;
> > }
> >
> > static int anx7625_read_ctrl_status_p0(struct anx7625_data *ctx)
> > @@ -195,6 +195,60 @@ static int wait_aux_op_finish(struct anx7625_data *ctx)
> > return 0;
> > }
> >
> > +static int anx7625_aux_dpcd_read(struct anx7625_data *ctx,
> > +u8 addrh, u8 addrm, u8 addrl,
> > +u8 len, u8 *buf)
> > +{
> > + struct device *dev = >client->dev;
> > + int ret;
> > + u8 cmd;
> > +
> > + if (len > MAX_DPCD_BUFFER_SIZE) {
> > + DRM_DEV_ERROR(dev, "exceed aux buffer len.\n");
> > + return -EINVAL;
> > + }
> > +
> > + cmd = ((len - 1) << 4) | 0x09;
> > +
> > + /* Set command and length */
> > + ret = anx7625_reg_write(ctx, ctx->i2c.rx_p0_client,
> > + AP_AUX_COMMAND, cmd);
> > +
> > + /* Set aux access address */
> > + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client,
> > +AP_AUX_ADDR_7_0, addrl);
> > + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client,
> > +AP_AUX_ADDR_15_8, addrm);
> > + ret |= anx7625_write_and(ctx, ctx->i2c.rx_p0_client,
> > +AP_AUX_ADDR_19_16, addrh);
> > +
> > + /* Enable aux access */
> > + ret |= anx7625_write_or(ctx, ctx->i2c.rx_p0_client,
> > + AP_AUX_CTRL_STATUS, AP_AUX_CTRL_OP_EN);
> > +
> > + if (ret < 0) {
> > + DRM_DEV_ERROR(dev, "cannot access aux related register.\n");
> > + return -EIO;
> > + }
> > +
> > + usleep_range(2000, 2100);
> > +
> > + ret = wait_aux_op_finish(ctx);
> > + if (ret) {
> > + DRM_DEV_ERROR(dev, "aux IO error: wait aux op finish.\n");
> > + return ret;
> > + }
> > +
> > + ret = anx7625_reg_block_read(ctx, ctx->i2c.rx_p0_client,
> > +AP_AUX_BUFF_START, len, buf);
> > + if (ret < 0) {
> > + DRM_DEV_ERROR(dev, "read dpcd register failed\n");
> > + return -EIO;
> > + }
> > +
> > + return 0;
> > +}
> > +
> > static int anx7625_video_mute_control(struct anx7625_data *ctx,
> > u8 status)
> > {
> > @@ -219,38 +273,6 @@ static int anx7625_video_mute_control(struct
> > anx7625_data *ctx,
> > return ret;
> > }
> >
> > -static int anx7625_config_audio_input(struct anx7625_data *ctx)
> > -{
> > - struct device *dev = >client->dev;
> > - int ret;
> > -
> > - /* Channel num */
> > - ret = anx7625_reg_write(ctx, ctx->i2c.tx_p2_client,
> > - AUDIO_CHANNEL_STATUS_6, I2S_CH_2 << 5);
> > -
> > - /* FS */
> > - ret |= anx7625_write_and_or(ctx, ctx->i2c.tx_p2_client,
> > - AUDIO_CHANNEL_STATUS_4,
> > - 0xf0, AUDIO_FS_48K);
> > - /* Word length */
> > - ret |= anx7625_write_and_or(ctx, ctx->i2c.tx_p2_client,
> > - AUDIO_CHANNEL_STATUS_5,
> > -
Re: [PATCH v4 3/3] drm/bridge: anx7625: add MIPI DPI input feature support
On Thu, Jan 28, 2021 at 11:10 AM Xin Ji wrote:
>
> Add MIPI rx DPI input support
>
> Reported-by: kernel test robot
> Signed-off-by: Xin Ji
> ---
> drivers/gpu/drm/bridge/analogix/anx7625.c | 326
> --
> drivers/gpu/drm/bridge/analogix/anx7625.h | 20 +-
> 2 files changed, 285 insertions(+), 61 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c
> b/drivers/gpu/drm/bridge/analogix/anx7625.c
> index 04536cc..628ae43 100644
> --- a/drivers/gpu/drm/bridge/analogix/anx7625.c
> +++ b/drivers/gpu/drm/bridge/analogix/anx7625.c
> @@ -150,18 +150,18 @@ static int anx7625_write_and(struct anx7625_data *ctx,
> return anx7625_reg_write(ctx, client, offset, (val & (mask)));
> }
>
> -static int anx7625_write_and_or(struct anx7625_data *ctx,
> - struct i2c_client *client,
> - u8 offset, u8 and_mask, u8 or_mask)
> +static int anx7625_config_bit_matrix(struct anx7625_data *ctx)
> {
> - int val;
> + int i, ret;
>
> - val = anx7625_reg_read(ctx, client, offset);
> - if (val < 0)
> - return val;
> + ret = anx7625_write_or(ctx, ctx->i2c.tx_p2_client,
> + AUDIO_CONTROL_REGISTER, 0x80);
> + for (i = 0; i < 13; i++)
> + ret |= anx7625_reg_write(ctx, ctx->i2c.tx_p2_client,
> +VIDEO_BIT_MATRIX_12 + i,
> +0x18 + i);
>
> - return anx7625_reg_write(ctx, client,
> -offset, (val & and_mask) | (or_mask));
> + return ret;
> }
>
> static int anx7625_read_ctrl_status_p0(struct anx7625_data *ctx)
> @@ -195,6 +195,60 @@ static int wait_aux_op_finish(struct anx7625_data *ctx)
> return 0;
> }
>
> +static int anx7625_aux_dpcd_read(struct anx7625_data *ctx,
> +u8 addrh, u8 addrm, u8 addrl,
> +u8 len, u8 *buf)
> +{
> + struct device *dev = >client->dev;
> + int ret;
> + u8 cmd;
> +
> + if (len > MAX_DPCD_BUFFER_SIZE) {
> + DRM_DEV_ERROR(dev, "exceed aux buffer len.\n");
> + return -EINVAL;
> + }
> +
> + cmd = ((len - 1) << 4) | 0x09;
> +
> + /* Set command and length */
> + ret = anx7625_reg_write(ctx, ctx->i2c.rx_p0_client,
> + AP_AUX_COMMAND, cmd);
> +
> + /* Set aux access address */
> + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client,
> +AP_AUX_ADDR_7_0, addrl);
> + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client,
> +AP_AUX_ADDR_15_8, addrm);
> + ret |= anx7625_write_and(ctx, ctx->i2c.rx_p0_client,
> +AP_AUX_ADDR_19_16, addrh);
> +
> + /* Enable aux access */
> + ret |= anx7625_write_or(ctx, ctx->i2c.rx_p0_client,
> + AP_AUX_CTRL_STATUS, AP_AUX_CTRL_OP_EN);
> +
> + if (ret < 0) {
> + DRM_DEV_ERROR(dev, "cannot access aux related register.\n");
> + return -EIO;
> + }
> +
> + usleep_range(2000, 2100);
> +
> + ret = wait_aux_op_finish(ctx);
> + if (ret) {
> + DRM_DEV_ERROR(dev, "aux IO error: wait aux op finish.\n");
> + return ret;
> + }
> +
> + ret = anx7625_reg_block_read(ctx, ctx->i2c.rx_p0_client,
> +AP_AUX_BUFF_START, len, buf);
> + if (ret < 0) {
> + DRM_DEV_ERROR(dev, "read dpcd register failed\n");
> + return -EIO;
> + }
> +
> + return 0;
> +}
> +
> static int anx7625_video_mute_control(struct anx7625_data *ctx,
> u8 status)
> {
> @@ -219,38 +273,6 @@ static int anx7625_video_mute_control(struct
> anx7625_data *ctx,
> return ret;
> }
>
> -static int anx7625_config_audio_input(struct anx7625_data *ctx)
> -{
> - struct device *dev = >client->dev;
> - int ret;
> -
> - /* Channel num */
> - ret = anx7625_reg_write(ctx, ctx->i2c.tx_p2_client,
> - AUDIO_CHANNEL_STATUS_6, I2S_CH_2 << 5);
> -
> - /* FS */
> - ret |= anx7625_write_and_or(ctx, ctx->i2c.tx_p2_client,
> - AUDIO_CHANNEL_STATUS_4,
> - 0xf0, AUDIO_FS_48K);
> - /* Word length */
> - ret |= anx7625_write_and_or(ctx, ctx->i2c.tx_p2_client,
> - AUDIO_CHANNEL_STATUS_5,
> - 0xf0, AUDIO_W_LEN_24_24MAX);
> - /* I2S */
> - ret |= anx7625_write_or(ctx, ctx->i2c.tx_p2_client,
> - AUDIO_CHANNEL_STATUS_6, I2S_SLAVE_MODE);
> - ret |= anx7625_write_and(ctx, ctx->i2c.tx_p2_client,
> -AUDIO_CONTROL_REGISTER,
Re: [PATCH v4 3/3] drm/bridge: anx7625: add MIPI DPI input feature support
On Fri, Feb 05, 2021 at 01:33:46PM +0100, Robert Foss wrote:
> Hey Xin,
Hi Robert Foss, thanks for the comment, I'll split this patch at this seria.
Thanks,
Xin
>
> On Thu, 28 Jan 2021 at 04:12, Xin Ji wrote:
> >
> > Add MIPI rx DPI input support
> >
> > Reported-by: kernel test robot
> > Signed-off-by: Xin Ji
> > ---
> > drivers/gpu/drm/bridge/analogix/anx7625.c | 326
> > --
> > drivers/gpu/drm/bridge/analogix/anx7625.h | 20 +-
> > 2 files changed, 285 insertions(+), 61 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c
> > b/drivers/gpu/drm/bridge/analogix/anx7625.c
> > index 04536cc..628ae43 100644
> > --- a/drivers/gpu/drm/bridge/analogix/anx7625.c
> > +++ b/drivers/gpu/drm/bridge/analogix/anx7625.c
> > @@ -150,18 +150,18 @@ static int anx7625_write_and(struct anx7625_data *ctx,
> > return anx7625_reg_write(ctx, client, offset, (val & (mask)));
> > }
> >
> > -static int anx7625_write_and_or(struct anx7625_data *ctx,
> > - struct i2c_client *client,
> > - u8 offset, u8 and_mask, u8 or_mask)
> > +static int anx7625_config_bit_matrix(struct anx7625_data *ctx)
> > {
> > - int val;
> > + int i, ret;
> >
> > - val = anx7625_reg_read(ctx, client, offset);
> > - if (val < 0)
> > - return val;
> > + ret = anx7625_write_or(ctx, ctx->i2c.tx_p2_client,
> > + AUDIO_CONTROL_REGISTER, 0x80);
> > + for (i = 0; i < 13; i++)
> > + ret |= anx7625_reg_write(ctx, ctx->i2c.tx_p2_client,
> > +VIDEO_BIT_MATRIX_12 + i,
> > +0x18 + i);
> >
> > - return anx7625_reg_write(ctx, client,
> > -offset, (val & and_mask) | (or_mask));
> > + return ret;
> > }
> >
> > static int anx7625_read_ctrl_status_p0(struct anx7625_data *ctx)
> > @@ -195,6 +195,60 @@ static int wait_aux_op_finish(struct anx7625_data *ctx)
> > return 0;
> > }
> >
> > +static int anx7625_aux_dpcd_read(struct anx7625_data *ctx,
> > +u8 addrh, u8 addrm, u8 addrl,
> > +u8 len, u8 *buf)
> > +{
> > + struct device *dev = >client->dev;
> > + int ret;
> > + u8 cmd;
> > +
> > + if (len > MAX_DPCD_BUFFER_SIZE) {
> > + DRM_DEV_ERROR(dev, "exceed aux buffer len.\n");
> > + return -EINVAL;
> > + }
> > +
> > + cmd = ((len - 1) << 4) | 0x09;
> > +
> > + /* Set command and length */
> > + ret = anx7625_reg_write(ctx, ctx->i2c.rx_p0_client,
> > + AP_AUX_COMMAND, cmd);
> > +
> > + /* Set aux access address */
> > + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client,
> > +AP_AUX_ADDR_7_0, addrl);
> > + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client,
> > +AP_AUX_ADDR_15_8, addrm);
> > + ret |= anx7625_write_and(ctx, ctx->i2c.rx_p0_client,
> > +AP_AUX_ADDR_19_16, addrh);
> > +
> > + /* Enable aux access */
> > + ret |= anx7625_write_or(ctx, ctx->i2c.rx_p0_client,
> > + AP_AUX_CTRL_STATUS, AP_AUX_CTRL_OP_EN);
> > +
> > + if (ret < 0) {
> > + DRM_DEV_ERROR(dev, "cannot access aux related register.\n");
> > + return -EIO;
> > + }
> > +
> > + usleep_range(2000, 2100);
> > +
> > + ret = wait_aux_op_finish(ctx);
> > + if (ret) {
> > + DRM_DEV_ERROR(dev, "aux IO error: wait aux op finish.\n");
> > + return ret;
> > + }
> > +
> > + ret = anx7625_reg_block_read(ctx, ctx->i2c.rx_p0_client,
> > +AP_AUX_BUFF_START, len, buf);
> > + if (ret < 0) {
> > + DRM_DEV_ERROR(dev, "read dpcd register failed\n");
> > + return -EIO;
> > + }
> > +
> > + return 0;
> > +}
> > +
> > static int anx7625_video_mute_control(struct anx7625_data *ctx,
> > u8 status)
> > {
> > @@ -219,38 +273,6 @@ static int anx7625_video_mute_control(struct
> > anx7625_data *ctx,
> > return ret;
> > }
> >
> > -static int anx7625_config_audio_input(struct anx7625_data *ctx)
> > -{
> > - struct device *dev = >client->dev;
> > - int ret;
> > -
> > - /* Channel num */
> > - ret = anx7625_reg_write(ctx, ctx->i2c.tx_p2_client,
> > - AUDIO_CHANNEL_STATUS_6, I2S_CH_2 << 5);
> > -
> > - /* FS */
> > - ret |= anx7625_write_and_or(ctx, ctx->i2c.tx_p2_client,
> > - AUDIO_CHANNEL_STATUS_4,
> > - 0xf0, AUDIO_FS_48K);
> > - /* Word length */
> > - ret |= anx7625_write_and_or(ctx,
Re: [PATCH v4 3/3] drm/bridge: anx7625: add MIPI DPI input feature support
Hey Xin,
On Thu, 28 Jan 2021 at 04:12, Xin Ji wrote:
>
> Add MIPI rx DPI input support
>
> Reported-by: kernel test robot
> Signed-off-by: Xin Ji
> ---
> drivers/gpu/drm/bridge/analogix/anx7625.c | 326
> --
> drivers/gpu/drm/bridge/analogix/anx7625.h | 20 +-
> 2 files changed, 285 insertions(+), 61 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c
> b/drivers/gpu/drm/bridge/analogix/anx7625.c
> index 04536cc..628ae43 100644
> --- a/drivers/gpu/drm/bridge/analogix/anx7625.c
> +++ b/drivers/gpu/drm/bridge/analogix/anx7625.c
> @@ -150,18 +150,18 @@ static int anx7625_write_and(struct anx7625_data *ctx,
> return anx7625_reg_write(ctx, client, offset, (val & (mask)));
> }
>
> -static int anx7625_write_and_or(struct anx7625_data *ctx,
> - struct i2c_client *client,
> - u8 offset, u8 and_mask, u8 or_mask)
> +static int anx7625_config_bit_matrix(struct anx7625_data *ctx)
> {
> - int val;
> + int i, ret;
>
> - val = anx7625_reg_read(ctx, client, offset);
> - if (val < 0)
> - return val;
> + ret = anx7625_write_or(ctx, ctx->i2c.tx_p2_client,
> + AUDIO_CONTROL_REGISTER, 0x80);
> + for (i = 0; i < 13; i++)
> + ret |= anx7625_reg_write(ctx, ctx->i2c.tx_p2_client,
> +VIDEO_BIT_MATRIX_12 + i,
> +0x18 + i);
>
> - return anx7625_reg_write(ctx, client,
> -offset, (val & and_mask) | (or_mask));
> + return ret;
> }
>
> static int anx7625_read_ctrl_status_p0(struct anx7625_data *ctx)
> @@ -195,6 +195,60 @@ static int wait_aux_op_finish(struct anx7625_data *ctx)
> return 0;
> }
>
> +static int anx7625_aux_dpcd_read(struct anx7625_data *ctx,
> +u8 addrh, u8 addrm, u8 addrl,
> +u8 len, u8 *buf)
> +{
> + struct device *dev = >client->dev;
> + int ret;
> + u8 cmd;
> +
> + if (len > MAX_DPCD_BUFFER_SIZE) {
> + DRM_DEV_ERROR(dev, "exceed aux buffer len.\n");
> + return -EINVAL;
> + }
> +
> + cmd = ((len - 1) << 4) | 0x09;
> +
> + /* Set command and length */
> + ret = anx7625_reg_write(ctx, ctx->i2c.rx_p0_client,
> + AP_AUX_COMMAND, cmd);
> +
> + /* Set aux access address */
> + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client,
> +AP_AUX_ADDR_7_0, addrl);
> + ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client,
> +AP_AUX_ADDR_15_8, addrm);
> + ret |= anx7625_write_and(ctx, ctx->i2c.rx_p0_client,
> +AP_AUX_ADDR_19_16, addrh);
> +
> + /* Enable aux access */
> + ret |= anx7625_write_or(ctx, ctx->i2c.rx_p0_client,
> + AP_AUX_CTRL_STATUS, AP_AUX_CTRL_OP_EN);
> +
> + if (ret < 0) {
> + DRM_DEV_ERROR(dev, "cannot access aux related register.\n");
> + return -EIO;
> + }
> +
> + usleep_range(2000, 2100);
> +
> + ret = wait_aux_op_finish(ctx);
> + if (ret) {
> + DRM_DEV_ERROR(dev, "aux IO error: wait aux op finish.\n");
> + return ret;
> + }
> +
> + ret = anx7625_reg_block_read(ctx, ctx->i2c.rx_p0_client,
> +AP_AUX_BUFF_START, len, buf);
> + if (ret < 0) {
> + DRM_DEV_ERROR(dev, "read dpcd register failed\n");
> + return -EIO;
> + }
> +
> + return 0;
> +}
> +
> static int anx7625_video_mute_control(struct anx7625_data *ctx,
> u8 status)
> {
> @@ -219,38 +273,6 @@ static int anx7625_video_mute_control(struct
> anx7625_data *ctx,
> return ret;
> }
>
> -static int anx7625_config_audio_input(struct anx7625_data *ctx)
> -{
> - struct device *dev = >client->dev;
> - int ret;
> -
> - /* Channel num */
> - ret = anx7625_reg_write(ctx, ctx->i2c.tx_p2_client,
> - AUDIO_CHANNEL_STATUS_6, I2S_CH_2 << 5);
> -
> - /* FS */
> - ret |= anx7625_write_and_or(ctx, ctx->i2c.tx_p2_client,
> - AUDIO_CHANNEL_STATUS_4,
> - 0xf0, AUDIO_FS_48K);
> - /* Word length */
> - ret |= anx7625_write_and_or(ctx, ctx->i2c.tx_p2_client,
> - AUDIO_CHANNEL_STATUS_5,
> - 0xf0, AUDIO_W_LEN_24_24MAX);
> - /* I2S */
> - ret |= anx7625_write_or(ctx, ctx->i2c.tx_p2_client,
> - AUDIO_CHANNEL_STATUS_6, I2S_SLAVE_MODE);
> - ret |= anx7625_write_and(ctx, ctx->i2c.tx_p2_client,
> -
