COOPRATION/TRANSFER

2022-01-10 Thread MB & ASSOCIADOS ABG
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Thanks & Best regards,
MARTIN BARENO ESQ.
MB & ASSOCIADOS ABG
Email: mb.realaboga...@outlook.com
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[PATCH v2 1/1] drm/bridge: anx7625: send DPCD command to downstream

2022-01-10 Thread Xin Ji
Send DPCD command to downstream before anx7625 power down,
let downstream monitor enter into standby mode.

Signed-off-by: Xin Ji 
---
 drivers/gpu/drm/bridge/analogix/anx7625.c | 40 ---
 1 file changed, 35 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c 
b/drivers/gpu/drm/bridge/analogix/anx7625.c
index 33383f83255d..fd2217ae455e 100644
--- a/drivers/gpu/drm/bridge/analogix/anx7625.c
+++ b/drivers/gpu/drm/bridge/analogix/anx7625.c
@@ -129,6 +129,23 @@ static int anx7625_reg_write(struct anx7625_data *ctx,
return ret;
 }
 
+static int anx7625_reg_block_write(struct anx7625_data *ctx,
+  struct i2c_client *client,
+  u8 reg_addr, u8 len, u8 *buf)
+{
+   int ret;
+   struct device *dev = >dev;
+
+   i2c_access_workaround(ctx, client);
+
+   ret = i2c_smbus_write_i2c_block_data(client, reg_addr, len, buf);
+   if (ret < 0)
+   DRM_DEV_ERROR(dev, "write i2c block failed id=%x\n:%x",
+ client->addr, reg_addr);
+
+   return ret;
+}
+
 static int anx7625_write_or(struct anx7625_data *ctx,
struct i2c_client *client,
u8 offset, u8 mask)
@@ -214,8 +231,8 @@ static int wait_aux_op_finish(struct anx7625_data *ctx)
return 0;
 }
 
-static int anx7625_aux_dpcd_read(struct anx7625_data *ctx,
-u32 address, u8 len, u8 *buf)
+static int anx7625_aux_dpcd_trans(struct anx7625_data *ctx, u8 op,
+ u32 address, u8 len, u8 *buf)
 {
struct device *dev = >client->dev;
int ret;
@@ -231,8 +248,7 @@ static int anx7625_aux_dpcd_read(struct anx7625_data *ctx,
addrm = (address >> 8) & 0xFF;
addrh = (address >> 16) & 0xFF;
 
-   cmd = DPCD_CMD(len, DPCD_READ);
-   cmd = ((len - 1) << 4) | 0x09;
+   cmd = DPCD_CMD(len, op);
 
/* Set command and length */
ret = anx7625_reg_write(ctx, ctx->i2c.rx_p0_client,
@@ -246,6 +262,9 @@ static int anx7625_aux_dpcd_read(struct anx7625_data *ctx,
ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p0_client,
 AP_AUX_ADDR_19_16, addrh);
 
+   if (op == DPCD_WRITE)
+   ret |= anx7625_reg_block_write(ctx, ctx->i2c.rx_p0_client,
+  AP_AUX_BUFF_START, len, buf);
/* Enable aux access */
ret |= anx7625_write_or(ctx, ctx->i2c.rx_p0_client,
AP_AUX_CTRL_STATUS, AP_AUX_CTRL_OP_EN);
@@ -263,6 +282,11 @@ static int anx7625_aux_dpcd_read(struct anx7625_data *ctx,
return ret;
}
 
+   /* Write done */
+   if (op == DPCD_WRITE)
+   return 0;
+
+   /* Read done, read out dpcd data */
ret = anx7625_reg_block_read(ctx, ctx->i2c.rx_p0_client,
 AP_AUX_BUFF_START, len, buf);
if (ret < 0) {
@@ -845,7 +869,7 @@ static int anx7625_hdcp_enable(struct anx7625_data *ctx)
}
 
/* Read downstream capability */
-   anx7625_aux_dpcd_read(ctx, 0x68028, 1, );
+   anx7625_aux_dpcd_trans(ctx, DPCD_READ, 0x68028, 1, );
if (!(bcap & 0x01)) {
pr_warn("downstream not support HDCP 1.4, cap(%x).\n", bcap);
return 0;
@@ -918,6 +942,7 @@ static void anx7625_dp_stop(struct anx7625_data *ctx)
 {
struct device *dev = >client->dev;
int ret;
+   u8 data;
 
DRM_DEV_DEBUG_DRIVER(dev, "stop dp output\n");
 
@@ -929,6 +954,11 @@ static void anx7625_dp_stop(struct anx7625_data *ctx)
ret |= anx7625_write_and(ctx, ctx->i2c.tx_p2_client, 0x08, 0x7f);
 
ret |= anx7625_video_mute_control(ctx, 1);
+
+   DRM_DEV_DEBUG_DRIVER(dev, "notify downstream enter into standby\n");
+   /* Downstream monitor enter into standby mode */
+   data = 2;
+   ret |= anx7625_aux_dpcd_trans(ctx, DPCD_WRITE, 0x000600, 1, );
if (ret < 0)
DRM_DEV_ERROR(dev, "IO error : mute video fail\n");
 
-- 
2.25.1

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