Re: [edk2] [PATCH] CorebootPayloadPkg: Use correct BytesPerScanLine

[You, Benjamin]

Hi Arthur,

I agree with your suggestion that Payload interpret BytesPerScanLine and 
Horizontal Resolution properly such that a 1366 display can be handled well.

The functioning will depend on Coreboot interpreting properly too. However
fixing the Payload will not cause any regression anyway.

I am still not very clear about some cases in Coreboot as below:

> -Original Message-
> From: Arthur Heymans [mailto:art...@aheymans.xyz]
> Sent: Friday, January 26, 2018 5:09 PM
> To: You, Benjamin 
> Cc: edk2-devel@lists.01.org
> Subject: Re: [edk2] [PATCH] CorebootPayloadPkg: Use correct BytesPerScanLine
> 
> "You, Benjamin"  writes:
> 
> >
> > I noticed in coreboot-4.7\src\include\edid.h, there are following comments:
> >
> > /* 3 variables needed for coreboot framebuffer.
> >  * In most cases, they are the same as the ha
> >  * and va variables, but not always, as in the
> >  * case of a 1366 wide display.
> >  */
> > u32 x_resolution;
> > u32 y_resolution;
> > u32 bytes_per_line;
> >
> > And in coreboot-4.7\src\lib\edid.c:
> >
> > edid->bytes_per_line = ALIGN_UP(edid->mode.ha *
> > div_round_up(fb_bpp, 8), row_byte_alignment);
> > edid->x_resolution = edid->bytes_per_line / (fb_bpp / 8);
> >
> 
> This is how x_resolution initially gets set after the EDID is read, but
> it is further modified to satisfy the display controllers needs,
> e.g. src/northbridge/intel/gm45/gma.c:
> 
> edid->bytes_per_line = (edid->bytes_per_line + 63) & ~63;

This line does not change the value of edid->bytes_per_line since it is 
already rounded up to 64 by previous calculation in edid.c:

  edid->bytes_per_line = ALIGN_UP(edid->mode.ha *
div_round_up(fb_bpp, 8), row_byte_alignment);

> 
> before it gets send to code that sets up the coreboot tables from which
> payloads extract this information:
> 
> set_vbe_mode_info_valid(edid, lfb);
> 
> There are also other code paths that don't use src/lib/edid.c to set up
> the framebuffer.
> 
> In src/drivers/intel/gma/hires_fb/gma.adb we have:
> x_resolution => word32 (fb.Width),
> y_resolution => word32 (fb.Height),
> bytes_per_line   => 4 * word32 (fb.Stride),
>
>From the same file, I found:
Stride  => ((Width_Type (min_h) + 63) / 64) * 64

This line seems to expand Stride to 64 alignment in the unit of Pixel, not
Byte. I thought line padding is on 64 byte alignment, not on 64 pixel 
alignment.
 
> 
> > Above calculations derive x_resolution from the roundup value of
> > bytes_per_line. In case of 1366 display, it would produce a x_resolution of
> > 1376, which is larger than 1366 but satisfies the equation of
> > bytes_per_line == (HorizontalResolution * (BitsPerPixel / 8)
> >
> 
> It is only initialized to that when the EDID is read. The code that
> actually sets up the hardware further modifies it or passes on the value
> it needs to bytes_per_line.
> 
> > It appears this is what Coreboot produces right now. Not sure if there are
> > other cases leading to Coreboot producing framebuffer parameters NOT
> > satisfying the above equation.
> >
> 
> well given that other code touches edid_bytes_per_lines, there are many
> examples where this is not satisfied.
> 
> > BTW, do you think the above calculation of x_resolution hides the
> > information of display and should be fixed?
> >
> >> So tianocore should use the value coreboot provides it instead of trying
> >> to compute/guess it.
> >>
> >> > Thanks,
> >> >
> >> > - ben
> >> >
> >>
> >> I hope this clarifies it.
> >>
> >> Arthur
> >>
> >> >> -Original Message-
> >> >> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of
> >> >> art...@aheymans.xyz
> >> >> Sent: Wednesday, January 24, 2018 6:58 PM
> >> >> To: edk2-devel@lists.01.org
> >> >> Cc: Arthur Heymans 
> >> >> Subject: [edk2] [PATCH] CorebootPayloadPkg: Use correct
> BytesPerScanLine
> >> >>
> >> >> From: Arthur Heymans 
> >> >>
> >> >> Fetch BytesPerScanLine from coreboot table to reflect how the actual
> >> >> framebuffer is set up instead of guessing it from the horizontal
> >> >> resolution.
> >> >>
> >> >> This fixes a garbled display when HorizontalResolution * (BitsPerPixel
> >> >> / 8) and pFbInfo->BytesPerScanLine don't match.
> >> >>
> >> >> Contributed-under: TianoCore Contribution Agreement 1.1
> >> >> Signed-off-by: Arthur Heymans 
> >> >>
> >> >> diff --git a/CorebootPayloadPkg/FbGop/FbGop.c
> >> >> b/CorebootPayloadPkg/FbGop/FbGop.c
> >> >> index 37d6def7f7..6790617033 100644
> >> >> --- a/CorebootPayloadPkg/FbGop/FbGop.c
> >> >> +++ b/CorebootPayloadPkg/FbGop/FbGop.c
> >> >> @@ -822,7 +822,7 @@ FbGopCheckForVbe (
> >> >>BitsPerPixel = pFbInfo->BitsPerPixel;
> >> >>HorizontalResolution = pFbInfo->HorizontalResolution;
> >> >>VerticalResolution   = pFbInfo->VerticalResolution;

Re: [edk2] [PATCH edk2-platforms v1 13/14] Hisilicon/Library: Add OsBootLib

[Huangming (Mark)]

On 2018/1/23 18:23, Leif Lindholm wrote:
> On Thu, Jan 18, 2018 at 11:01:42PM +0800, Ming Huang wrote:
>> OsBootLib can create OS option after upgrade firmware.
> 
> I will respond more strongly that Ard did:
> 
> I have seen functionality like this implemented in publicly available
> systems - laptops, desktops.
> Without exception, they end up in bug reports saying "my system
> refuses to boot after installation/upgrade".
> Without exception, they add to existing negative perceptions of UEFI
> in general in certain market spaces.
> 
> Presumably this is trying to address a real problem you have faced.
> Please bring this issue to the table for discussion, so that we can
> agree on an appropriate way of resolving it.
> 
> Regardless, this code will not be included in 18.02.
> 
> /
> Leif
> 
> .
> 

The problem is that OS boot option is lost after upgrade firmware.
It is inconvenient for using. OsBootLib can help this.

OsBootLib retain the options installed by OS, and create OS boot option
after upgrade firmware if grub file is existed in EFI partition and in 
mUefiOsBootFiles,
and delete redundant options in the same GPT.

-- 
Best Regards,

Ming

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Re: [edk2] [Patch] BaseTools: Enhance parse performance by optimize ValueExpressionEx

[Andrew Fish]

Any data on the performance improvement?

Thanks,

Andrew Fish

> On Jan 26, 2018, at 8:28 AM, Yonghong Zhu  wrote:
> 
> From: Yunhua Feng 
> 
> Optimize ValueExpressionEx function to enhance meta-data file parse
> performance.
> 
> Cc: Liming Gao 
> Cc: Yonghong Zhu 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Yunhua Feng 
> ---
> BaseTools/Source/Python/AutoGen/AutoGen.py |  16 +-
> BaseTools/Source/Python/Common/Expression.py   | 286 +++--
> BaseTools/Source/Python/Workspace/DscBuildData.py  |  19 +-
> .../Source/Python/Workspace/MetaFileParser.py  |   8 -
> BaseTools/Source/Python/build/BuildReport.py   |   9 +-
> 5 files changed, 167 insertions(+), 171 deletions(-)
> 
> diff --git a/BaseTools/Source/Python/AutoGen/AutoGen.py 
> b/BaseTools/Source/Python/AutoGen/AutoGen.py
> index ab178c9..1cf50e8 100644
> --- a/BaseTools/Source/Python/AutoGen/AutoGen.py
> +++ b/BaseTools/Source/Python/AutoGen/AutoGen.py
> @@ -1243,10 +1243,11 @@ class PlatformAutoGen(AutoGen):
> self.FvTargetList = self.Workspace.FvTargetList
> self.AllPcdList = []
> # get the original module/package/platform objects
> self.BuildDatabase = Workspace.BuildDatabase
> self.DscBuildDataObj = Workspace.Platform
> +self._GuidDict = Workspace._GuidDict
> 
> # flag indicating if the makefile/C-code file has been created or not
> self.IsMakeFileCreated  = False
> self.IsCodeFileCreated  = False
> 
> @@ -2461,26 +2462,13 @@ class PlatformAutoGen(AutoGen):
> if FromPcd.DatumType not in [None, '']:
> ToPcd.DatumType = FromPcd.DatumType
> if FromPcd.SkuInfoList not in [None, '', []]:
> ToPcd.SkuInfoList = FromPcd.SkuInfoList
> # Add Flexible PCD format parse
> -PcdValue = ToPcd.DefaultValue
> -if PcdValue:
> -try:
> -ToPcd.DefaultValue = ValueExpression(PcdValue)(True)
> -except WrnExpression, Value:
> -ToPcd.DefaultValue = Value.result
> -except BadExpression, Value:
> -EdkLogger.error('Parser', FORMAT_INVALID, 'PCD [%s.%s] 
> Value "%s", %s' %(ToPcd.TokenSpaceGuidCName, ToPcd.TokenCName, 
> ToPcd.DefaultValue, Value),
> -File=self.MetaFile)
> if ToPcd.DefaultValue:
> -_GuidDict = {}
> -for Pkg in self.PackageList:
> -Guids = Pkg.Guids
> -_GuidDict.update(Guids)
> try:
> -ToPcd.DefaultValue = 
> ValueExpressionEx(ToPcd.DefaultValue, ToPcd.DatumType, _GuidDict)(True)
> +ToPcd.DefaultValue = 
> ValueExpressionEx(ToPcd.DefaultValue, ToPcd.DatumType, self._GuidDict)(True)
> except BadExpression, Value:
> EdkLogger.error('Parser', FORMAT_INVALID, 'PCD [%s.%s] 
> Value "%s", %s' %(ToPcd.TokenSpaceGuidCName, ToPcd.TokenCName, 
> ToPcd.DefaultValue, Value),
> File=self.MetaFile)
> 
> # check the validation of datum
> diff --git a/BaseTools/Source/Python/Common/Expression.py 
> b/BaseTools/Source/Python/Common/Expression.py
> index 55fa06d..d62fb48 100644
> --- a/BaseTools/Source/Python/Common/Expression.py
> +++ b/BaseTools/Source/Python/Common/Expression.py
> @@ -1,9 +1,9 @@
> ## @file
> # This file is used to parse and evaluate expression in directive or PCD 
> value.
> #
> -# Copyright (c) 2011 - 2017, Intel Corporation. All rights reserved.
> +# Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.
> # This program and the accompanying materials
> # are licensed and made available under the terms and conditions of the BSD 
> License
> # which accompanies this distribution.The full text of the license may be 
> found at
> # http://opensource.org/licenses/bsd-license.php
> #
> @@ -249,13 +249,10 @@ class ValueExpression(object):
> self._NoProcess = False
> if type(Expression) != type(''):
> self._Expr = Expression
> self._NoProcess = True
> return
> -if Expression.strip().startswith('{') and 
> Expression.strip().endswith('}'):
> -self._Expr = Expression
> -self._NoProcess = True
> 
> self._Expr = ReplaceExprMacro(Expression.strip(),
>   SymbolTable,
>   SupportedInMacroList)
> 
> @@ -291,17 +288,19 @@ class ValueExpression(object):
> self._Expr = self._Expr.strip()
> if RealValue and Depth == 0:
> self._Token = self._Expr
> if self.__IsNumberToken():
> return self._Expr
> -
> +Token = ''
> try:

Re: [edk2] [PATCH] BeagleBoardPkg: reroute Firmware Vendor Pcd to MdeModulePkg

[Leif Lindholm]

On Fri, Jan 26, 2018 at 05:35:38PM +, Ard Biesheuvel wrote:
> >> > --- a/BeagleBoardPkg/BeagleBoardPkg.dsc
> >> > +++ b/BeagleBoardPkg/BeagleBoardPkg.dsc
> >> > @@ -262,7 +262,7 @@ [PcdsFeatureFlag.common]
> >> >gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE
> >> >
> >> >  [PcdsFixedAtBuild.common]
> >> > -  gArmPlatformTokenSpaceGuid.PcdFirmwareVendor|"Beagle Board"
> >> > +  gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVendor|"Beagle Board"
> >>
> >> That should probably be L"Beagle Board"
> >
> > Good point.
> > Happy with me folding that in?
> 
> Sure
> 
> Reviewed-by: Ard Biesheuvel 

Thanks - pushed as 06c1f423e1.
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Re: [edk2] [PATCH] BeagleBoardPkg: reroute Firmware Vendor Pcd to MdeModulePkg

[Ard Biesheuvel]

On 26 January 2018 at 17:34, Leif Lindholm  wrote:
> On Fri, Jan 26, 2018 at 05:31:25PM +, Ard Biesheuvel wrote:
>> On 26 January 2018 at 17:30, Leif Lindholm  wrote:
>> > Commit f9669f09fb53 ("ArmPlatformPkg: retire obsolete PCDs") got rid of
>> > the unfortunate ARM-specific variant of PcdFirmwareVendor.
>> >
>> > However, BeagleBoard was still using it, so the change broke the build.
>> > Fix this by moving BeagleBoard to use the MdeModulePkg one instead.
>> >
>> > Contributed-under: TianoCore Contribution Agreement 1.1
>> > Signed-off-by: Leif Lindholm 
>> > ---
>> >  BeagleBoardPkg/BeagleBoardPkg.dsc | 2 +-
>> >  1 file changed, 1 insertion(+), 1 deletion(-)
>> >
>> > diff --git a/BeagleBoardPkg/BeagleBoardPkg.dsc 
>> > b/BeagleBoardPkg/BeagleBoardPkg.dsc
>> > index 5d87ee3891..cef2e095d4 100644
>> > --- a/BeagleBoardPkg/BeagleBoardPkg.dsc
>> > +++ b/BeagleBoardPkg/BeagleBoardPkg.dsc
>> > @@ -262,7 +262,7 @@ [PcdsFeatureFlag.common]
>> >gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE
>> >
>> >  [PcdsFixedAtBuild.common]
>> > -  gArmPlatformTokenSpaceGuid.PcdFirmwareVendor|"Beagle Board"
>> > +  gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVendor|"Beagle Board"
>>
>> That should probably be L"Beagle Board"
>
> Good point.
> Happy with me folding that in?
>

Sure

Reviewed-by: Ard Biesheuvel 
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Re: [edk2] [PATCH] BeagleBoardPkg: reroute Firmware Vendor Pcd to MdeModulePkg

[Leif Lindholm]

On Fri, Jan 26, 2018 at 05:31:25PM +, Ard Biesheuvel wrote:
> On 26 January 2018 at 17:30, Leif Lindholm  wrote:
> > Commit f9669f09fb53 ("ArmPlatformPkg: retire obsolete PCDs") got rid of
> > the unfortunate ARM-specific variant of PcdFirmwareVendor.
> >
> > However, BeagleBoard was still using it, so the change broke the build.
> > Fix this by moving BeagleBoard to use the MdeModulePkg one instead.
> >
> > Contributed-under: TianoCore Contribution Agreement 1.1
> > Signed-off-by: Leif Lindholm 
> > ---
> >  BeagleBoardPkg/BeagleBoardPkg.dsc | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/BeagleBoardPkg/BeagleBoardPkg.dsc 
> > b/BeagleBoardPkg/BeagleBoardPkg.dsc
> > index 5d87ee3891..cef2e095d4 100644
> > --- a/BeagleBoardPkg/BeagleBoardPkg.dsc
> > +++ b/BeagleBoardPkg/BeagleBoardPkg.dsc
> > @@ -262,7 +262,7 @@ [PcdsFeatureFlag.common]
> >gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE
> >
> >  [PcdsFixedAtBuild.common]
> > -  gArmPlatformTokenSpaceGuid.PcdFirmwareVendor|"Beagle Board"
> > +  gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVendor|"Beagle Board"
> 
> That should probably be L"Beagle Board"

Good point.
Happy with me folding that in?

> 
> >
> >gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength|100
> >gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength|100
> > --
> > 2.11.0
> >
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Re: [edk2] [PATCH] BeagleBoardPkg: reroute Firmware Vendor Pcd to MdeModulePkg

[Ard Biesheuvel]

On 26 January 2018 at 17:30, Leif Lindholm  wrote:
> Commit f9669f09fb53 ("ArmPlatformPkg: retire obsolete PCDs") got rid of
> the unfortunate ARM-specific variant of PcdFirmwareVendor.
>
> However, BeagleBoard was still using it, so the change broke the build.
> Fix this by moving BeagleBoard to use the MdeModulePkg one instead.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Leif Lindholm 
> ---
>  BeagleBoardPkg/BeagleBoardPkg.dsc | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/BeagleBoardPkg/BeagleBoardPkg.dsc 
> b/BeagleBoardPkg/BeagleBoardPkg.dsc
> index 5d87ee3891..cef2e095d4 100644
> --- a/BeagleBoardPkg/BeagleBoardPkg.dsc
> +++ b/BeagleBoardPkg/BeagleBoardPkg.dsc
> @@ -262,7 +262,7 @@ [PcdsFeatureFlag.common]
>gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE
>
>  [PcdsFixedAtBuild.common]
> -  gArmPlatformTokenSpaceGuid.PcdFirmwareVendor|"Beagle Board"
> +  gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVendor|"Beagle Board"

That should probably be L"Beagle Board"


>
>gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength|100
>gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength|100
> --
> 2.11.0
>
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[edk2] [PATCH] BeagleBoardPkg: reroute Firmware Vendor Pcd to MdeModulePkg

[Leif Lindholm]

Commit f9669f09fb53 ("ArmPlatformPkg: retire obsolete PCDs") got rid of
the unfortunate ARM-specific variant of PcdFirmwareVendor.

However, BeagleBoard was still using it, so the change broke the build.
Fix this by moving BeagleBoard to use the MdeModulePkg one instead.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Leif Lindholm 
---
 BeagleBoardPkg/BeagleBoardPkg.dsc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/BeagleBoardPkg/BeagleBoardPkg.dsc 
b/BeagleBoardPkg/BeagleBoardPkg.dsc
index 5d87ee3891..cef2e095d4 100644
--- a/BeagleBoardPkg/BeagleBoardPkg.dsc
+++ b/BeagleBoardPkg/BeagleBoardPkg.dsc
@@ -262,7 +262,7 @@ [PcdsFeatureFlag.common]
   gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE
 
 [PcdsFixedAtBuild.common]
-  gArmPlatformTokenSpaceGuid.PcdFirmwareVendor|"Beagle Board"
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVendor|"Beagle Board"
 
   gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength|100
   gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength|100
-- 
2.11.0

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[edk2] [PATCH] Platform/ARM/VExpress: refine the check for DVI support

[Thomas Abraham]

The base models could have different values for the revision ID field
in the System ID register. Base models do not have support for DVI
and so the revision ID field should also be masked out when checking
for the presence of DVI support.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Thomas Abraham 
---
 .../VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c| 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git 
a/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c 
b/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c
index 3f3ceb3..89ba130 100644
--- 
a/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c
+++ 
b/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c
@@ -264,7 +264,7 @@ LcdPlatformSetMode (
   SysId = MmioRead32 (ARM_VE_SYS_ID_REG);
   if (SysId != ARM_RTSM_SYS_ID) {
 // Take out the FVP GIC variant to reduce the permutations.
-SysId &= ~ARM_FVP_SYS_ID_VARIANT_MASK;
+SysId &= ~(ARM_FVP_SYS_ID_VARIANT_MASK | ARM_FVP_SYS_ID_REV_MASK);
 if (SysId != ARM_FVP_BASE_BOARD_SYS_ID) {
   // Set the DVI into the new mode
   Status = ArmPlatformSysConfigSet (SYS_CFG_DVIMODE, 
mResolutions[ModeNumber].Mode);
--
2.7.4

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[edk2] [Patch] BaseTools: Enhance parse performance by optimize ValueExpressionEx

[Yonghong Zhu]

From: Yunhua Feng 

Optimize ValueExpressionEx function to enhance meta-data file parse
performance.

Cc: Liming Gao 
Cc: Yonghong Zhu 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yunhua Feng 
---
 BaseTools/Source/Python/AutoGen/AutoGen.py |  16 +-
 BaseTools/Source/Python/Common/Expression.py   | 286 +++--
 BaseTools/Source/Python/Workspace/DscBuildData.py  |  19 +-
 .../Source/Python/Workspace/MetaFileParser.py  |   8 -
 BaseTools/Source/Python/build/BuildReport.py   |   9 +-
 5 files changed, 167 insertions(+), 171 deletions(-)

diff --git a/BaseTools/Source/Python/AutoGen/AutoGen.py 
b/BaseTools/Source/Python/AutoGen/AutoGen.py
index ab178c9..1cf50e8 100644
--- a/BaseTools/Source/Python/AutoGen/AutoGen.py
+++ b/BaseTools/Source/Python/AutoGen/AutoGen.py
@@ -1243,10 +1243,11 @@ class PlatformAutoGen(AutoGen):
 self.FvTargetList = self.Workspace.FvTargetList
 self.AllPcdList = []
 # get the original module/package/platform objects
 self.BuildDatabase = Workspace.BuildDatabase
 self.DscBuildDataObj = Workspace.Platform
+self._GuidDict = Workspace._GuidDict
 
 # flag indicating if the makefile/C-code file has been created or not
 self.IsMakeFileCreated  = False
 self.IsCodeFileCreated  = False
 
@@ -2461,26 +2462,13 @@ class PlatformAutoGen(AutoGen):
 if FromPcd.DatumType not in [None, '']:
 ToPcd.DatumType = FromPcd.DatumType
 if FromPcd.SkuInfoList not in [None, '', []]:
 ToPcd.SkuInfoList = FromPcd.SkuInfoList
 # Add Flexible PCD format parse
-PcdValue = ToPcd.DefaultValue
-if PcdValue:
-try:
-ToPcd.DefaultValue = ValueExpression(PcdValue)(True)
-except WrnExpression, Value:
-ToPcd.DefaultValue = Value.result
-except BadExpression, Value:
-EdkLogger.error('Parser', FORMAT_INVALID, 'PCD [%s.%s] 
Value "%s", %s' %(ToPcd.TokenSpaceGuidCName, ToPcd.TokenCName, 
ToPcd.DefaultValue, Value),
-File=self.MetaFile)
 if ToPcd.DefaultValue:
-_GuidDict = {}
-for Pkg in self.PackageList:
-Guids = Pkg.Guids
-_GuidDict.update(Guids)
 try:
-ToPcd.DefaultValue = ValueExpressionEx(ToPcd.DefaultValue, 
ToPcd.DatumType, _GuidDict)(True)
+ToPcd.DefaultValue = ValueExpressionEx(ToPcd.DefaultValue, 
ToPcd.DatumType, self._GuidDict)(True)
 except BadExpression, Value:
 EdkLogger.error('Parser', FORMAT_INVALID, 'PCD [%s.%s] 
Value "%s", %s' %(ToPcd.TokenSpaceGuidCName, ToPcd.TokenCName, 
ToPcd.DefaultValue, Value),
 File=self.MetaFile)
 
 # check the validation of datum
diff --git a/BaseTools/Source/Python/Common/Expression.py 
b/BaseTools/Source/Python/Common/Expression.py
index 55fa06d..d62fb48 100644
--- a/BaseTools/Source/Python/Common/Expression.py
+++ b/BaseTools/Source/Python/Common/Expression.py
@@ -1,9 +1,9 @@
 ## @file
 # This file is used to parse and evaluate expression in directive or PCD value.
 #
-# Copyright (c) 2011 - 2017, Intel Corporation. All rights reserved.
+# Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.
 # This program and the accompanying materials
 # are licensed and made available under the terms and conditions of the BSD 
License
 # which accompanies this distribution.The full text of the license may be 
found at
 # http://opensource.org/licenses/bsd-license.php
 #
@@ -249,13 +249,10 @@ class ValueExpression(object):
 self._NoProcess = False
 if type(Expression) != type(''):
 self._Expr = Expression
 self._NoProcess = True
 return
-if Expression.strip().startswith('{') and 
Expression.strip().endswith('}'):
-self._Expr = Expression
-self._NoProcess = True
 
 self._Expr = ReplaceExprMacro(Expression.strip(),
   SymbolTable,
   SupportedInMacroList)
 
@@ -291,17 +288,19 @@ class ValueExpression(object):
 self._Expr = self._Expr.strip()
 if RealValue and Depth == 0:
 self._Token = self._Expr
 if self.__IsNumberToken():
 return self._Expr
-
+Token = ''
 try:
 Token = self._GetToken()
-if type(Token) == type('') and Token.startswith('{') and 
Token.endswith('}') and self._Idx >= self._Len:
-return self._Expr
 except BadExpression:
 pass
+if type(Token) == type('') and 

Re: [edk2] [patch] UefiCpuPkg/S3Resume: Add more perf enrty for S3 phase

[Laszlo Ersek]

On 01/26/18 07:02, Gao, Liming wrote:
> Laszlo:
>   Here is PERF macro PERF_START_EX(Handle, Token, Module, TimeStamp, 
> Identifier). 
> 
>   Handle is the image handle or device handle. PerfLib can base on Handle to 
> get its FILE guid. 
>   Token is the measured token name. 
>   Module is the measured module name. PERF_START macro is added before 
> gEfiCallerBaseName is supported. Some old PERF_START uses Token only. This 
> patch just copies one and add it. So, it doesn't use gEfiCallerBaseName. I 
> agree to use gEfiCallerBaseName better.
>   TimeStamp is current tick. 
>   Identifier will be mapped into progressId in edk2 extended FPDT record from 
> new performance 
> https://lists.01.org/pipermail/edk2-devel/2018-January/020345.html. New 
> performance will save each PERF into one record. It means START PERF entry is 
> one record, END PERF entry is another record. When DP or OS tool parses 
> record, they need to know the record is Start or End. Then, the different 
> ProgressId will be used for Start and End. 

The question is how the Start and End records are coupled. They need to
be tied together because otherwise it is not possible to calculate a
time difference. I thought that Identifier partook in the coupling. So,
apparently, only Token is used in the coupling, and Identifier is just
an informative progress code.

Thanks
Laszlo


>> -Original Message-
>> From: Laszlo Ersek [mailto:ler...@redhat.com]
>> Sent: Thursday, January 25, 2018 8:44 PM
>> To: Bi, Dandan ; edk2-devel@lists.01.org
>> Cc: Dong, Eric ; Gao, Liming 
>> Subject: Re: [patch] UefiCpuPkg/S3Resume: Add more perf enrty for S3 phase
>>
>> On 01/25/18 05:56, Bi, Dandan wrote:
>>> Hi Laszlo,
>>>
>>> Thank you for your comments.
>>>
>>> Yes. The PERF_INMODULE_START_ID macro is from
>> "ExtendedFirmwarePerformance.h" which is added in the new performance
>> infrastructure patches([ mail subject: patch 0/8] Update EDKII Performance
>> infrastructure based on ACPI FPDT table). That is the dependency I mean.
>>>
>>> I will send V2 of this patch and the patch which remove Pref code after "new
>> performance infrastructure" patches have been committed . Then I will refine
>> the commit message of these two patches, add commit  hash value of "new
>> performance infrastructure" patches if I need to reference it.
>>
>> Thank you.
>>
>> I had some other questions lower down, about the PERF_START_EX()
>> arguments. Can you please help me understand those better?
>>
>> Thanks!
>> Laszlo
>>
>>>
>>> Thanks,
>>> Dandan
>>>
>>> -Original Message-
>>> From: Laszlo Ersek [mailto:ler...@redhat.com]
>>> Sent: Wednesday, January 24, 2018 11:45 PM
>>> To: Bi, Dandan ; edk2-devel@lists.01.org
>>> Cc: Dong, Eric ; Gao, Liming 
>>> Subject: Re: [patch] UefiCpuPkg/S3Resume: Add more perf enrty for S3
>> phase
>>>
>>> On 01/24/18 08:59, Dandan Bi wrote:
 Add more perf entry to hook BootScriptDonePpi/EndOfPeiPpi/
 EndOfS3Resume.

 Notes: This patch depends on the new performance infrastructure.
>>>
>>> Since this statement is going into the commit log, please be more specific
>> about the "new performance infrastructure" (TianoCore BZ or commit hashes
>> etc).
>>>
>>> Also, how is the dependency established? For example, OVMF uses
>> BasePerformanceLibNull; so I think it will see no changes.
>>>
>>> Do you mean the PERF_INMODULE_START_ID macro, from
>> "ExtendedFirmwarePerformance.h"? Ah, that's not committed yet. In this
>> case, please add a reference to the mailing list message (subject and archive
>> URL) that adds it.
>>>
>>> (Actually, the best solution is to reference the TianoCore BZ, and then add
>> the mailing list URL for each patch set submission to the TianoCore BZ.)
>>>

 Cc: Eric Dong 
 Cc: Laszlo Ersek 
 Cc: Liming Gao 
 Contributed-under: TianoCore Contribution Agreement 1.1
 Signed-off-by: Dandan Bi 
 ---
  UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c | 15
 ++-
  1 file changed, 14 insertions(+), 1 deletion(-)

 diff --git a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c
 b/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c
 index b597ac7..d7d2a4d 100644
 --- a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c
 +++ b/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c
 @@ -2,11 +2,11 @@
This module produces the EFI_PEI_S3_RESUME2_PPI.
This module works with StandAloneBootScriptExecutor to S3 resume to
>> OS.
This module will execute the boot script saved during last boot and 
 after
>> that,
control is passed to OS waking up handler.

 -  Copyright (c) 2006 - 2017, Intel Corporation. All rights
 reserved.
 +  Copyright (c) 2006 - 2018, Intel Corporation. All rights

Re: [edk2] [PATCH 0/2] User UnicodeCollation in StrinCmp

[Carsey, Jaben]

for series.
Reviewed-by: Jaben Carsey 

> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of
> Ruiyu Ni
> Sent: Friday, January 26, 2018 1:51 AM
> To: edk2-devel@lists.01.org
> Subject: [edk2] [PATCH 0/2] User UnicodeCollation in StrinCmp
> Importance: High
> 
> Ruiyu Ni (2):
>   ShellPkg/CommandLib: Locate proper UnicodeCollation instance
>   ShellPkg/Level2Command: Use UnicodeCollation in StrinCmp
> 
>  .../UefiShellCommandLib/UefiShellCommandLib.c  | 76
> ++
>  .../UefiShellCommandLib/UefiShellCommandLib.h  |  3 +-
>  ShellPkg/Library/UefiShellLevel2CommandsLib/Cd.c   |  4 +-
>  ShellPkg/Library/UefiShellLevel2CommandsLib/Cp.c   |  4 +-
>  .../Library/UefiShellLevel2CommandsLib/TimeDate.c  |  6 +-
>  .../UefiShellLevel2CommandsLib.c   | 65 +-
>  .../UefiShellLevel2CommandsLib.h   | 15 +++--
>  7 files changed, 116 insertions(+), 57 deletions(-)
> 
> --
> 2.15.1.windows.2
> 
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Re: [edk2] [PATCH v5 0/6] Add ARM support for VS2017

[Ard Biesheuvel]

On 26 January 2018 at 15:05, Gao, Liming  wrote:
> After the change in ArmPkg is reviewed, I will help push this patch serial.
>

That change is

Reviewed-by: Ard Biesheuvel 

Thanks.

>> -Original Message-
>> From: Pete Batard [mailto:p...@akeo.ie]
>> Sent: Thursday, January 25, 2018 7:32 PM
>> To: Gao, Liming ; edk2-devel@lists.01.org
>> Cc: ard.biesheu...@linaro.org; eug...@hp.com
>> Subject: Re: [PATCH v5 0/6] Add ARM support for VS2017
>>
>> Thanks Liming.
>>
>>  From the way you framed your comment, I'm not completely sure if
>> there's action still needed on my side...
>>
>> Do I actually need to resubmit a patch set with "Reviewed By"?
>> Or, now that each patch should have flagged as reviewed, are we simply
>> supposed to wait for formal integration?
>>
>> Regards,
>>
>> /Pete
>>
>> On 2018.01.25 10:27, Gao, Liming wrote:
>> > Pete:
>> >The changes in BaseTools and MdePkg are good to me. You can add my R-B.
>> >
>> >> -Original Message-
>> >> From: Pete Batard [mailto:p...@akeo.ie]
>> >> Sent: Friday, January 12, 2018 9:33 PM
>> >> To: edk2-devel@lists.01.org
>> >> Cc: Gao, Liming ; ard.biesheu...@linaro.org;
>> >> eug...@hp.com
>> >> Subject: [PATCH v5 0/6] Add ARM support for VS2017
>> >>
>> >> (Same as v4, except for the AREA names where we replaced the RVCT macros,
>> >> in
>> >> patch 4/6, so that it matches what would have been produced with the
>> >> macros)
>> >>
>> >>
>> >> The following series adds ARM compilation support for the VS2017 
>> >> toolchain.
>> >> * PATCH 1 targets the disabling of VS Level 4 warnings. The disabled 
>> >> warnings
>> >>   for ARM are now aligned with IA32 and X64.
>> >> * PATCH 2 adds a NULL handler for the base stack check, since this is a 
>> >> GCC
>> >>   functionality.
>> >> * PATCH 3 updates MdePkg/Library/BaseLib so that the RVCT assembly
>> >> sources
>> >>   are also used for MSFT.
>> >> * PATCH 4 adds the required compiler intrinsics replacements for division,
>> >>   shift, by reusing the RVCT code, as well as memset/memcpy.
>> >> * PATCH 5 adds variable argument handlers for print output. Note that this
>> >>   is done without relying on any external headers, with the VA_ARG macro
>> >>   having been reverse engineered from MSFT ARM assembly output.
>> >> * PATCH 6 enables the selection of ARM in the conf templates.
>> >>
>> >> With these patches, VS2017 toolchain users should be able to compile
>> >> regular UEFI ARM applications using EDK2. Note that, unlike ARM64 support,
>> >> ARM support does not require a specific update of Visual Studio 2017, as
>> >> the ARM toolchain has been available from the very first release.
>> >>
>> >> Additional notes:
>> >>
>> >> We tested compiling and running the full UEFI Shell with this series, as
>> >> well as a small set of applications and drivers, and found no issues.
>> >> With an additional patch [1], it is also possible to use this proposal to
>> >> compile a complete QEMU ARM firmware. As the patch shows, the changes
>> >> that
>> >> need to be applied to the EDK2 sources to achieve this are actually very
>> >> minimal.
>> >>
>> >> However, the generated firmware does not currently boot, possibly because
>> >> of the following warnings being generated by the MS compiler:
>> >> - ArmCpuDxe.dll : warning LNK4072: section count 118 exceeds max (96);
>> >> image may not run
>> >> - UiApp.dll : warning LNK4072: section count 113 exceeds max (96); image 
>> >> may
>> >> not run
>> >>
>> >> As far as I could see, the section count max is hardcoded so a workaround
>> >> would be needed to address those.
>> >>
>> >> Also, because the VS2017 ARM compiler forces a section alignment of 4096
>> >> bytes (which in turn forces use to use /FILEALIGN:4096 as a linker option
>> >> for the firmware generation), the generated firmware exceeds 2MB and we
>> >> had to double its size to 4MB.
>> >>
>> >> At this stage, since the goal of this series is to allow users to compile
>> >> regular ARM UEFI applications using the VS2017 toolchain, I have no plans
>> >> to spend more time on the QEMU firmware issues, especially as I suspect
>> >> that reducing the firmware size back to 2 MB may not be achievable without
>> >> Microsoft altering their compiler. I am however hopeful that ARM
>> >> specialists can take this matter over eventually...
>> >>
>> >> Regards,
>> >>
>> >> /Pete
>> >>
>> >> [1]
>> >> https://github.com/pbatard/edk2/commit/c4ce41094a46f4f3dc7ccc64a906048
>> >> 13f037b13
>> >>
>> >> Pete Batard (6):
>> >>   MdePkg: Disable some Level 4 warnings for VS2017/ARM
>> >>   MdePkg/Library/BaseStackCheckLib: Add Null handler for VS2017/ARM
>> >>   MdePkg/Library/BaseLib: Enable VS2017/ARM builds
>> >>   ArmPkg/Library/CompilerIntrinsicsLib: Enable VS2017/ARM builds
>> >>   MdePkg/Include: Add VA list support for VS2017/ARM
>> >>   BaseTools/Conf: Add VS2017/ARM support
>> >>
>> >> 

Re: [edk2] [PATCH v5 0/6] Add ARM support for VS2017

[Gao, Liming]

After the change in ArmPkg is reviewed, I will help push this patch serial. 

> -Original Message-
> From: Pete Batard [mailto:p...@akeo.ie]
> Sent: Thursday, January 25, 2018 7:32 PM
> To: Gao, Liming ; edk2-devel@lists.01.org
> Cc: ard.biesheu...@linaro.org; eug...@hp.com
> Subject: Re: [PATCH v5 0/6] Add ARM support for VS2017
> 
> Thanks Liming.
> 
>  From the way you framed your comment, I'm not completely sure if
> there's action still needed on my side...
> 
> Do I actually need to resubmit a patch set with "Reviewed By"?
> Or, now that each patch should have flagged as reviewed, are we simply
> supposed to wait for formal integration?
> 
> Regards,
> 
> /Pete
> 
> On 2018.01.25 10:27, Gao, Liming wrote:
> > Pete:
> >The changes in BaseTools and MdePkg are good to me. You can add my R-B.
> >
> >> -Original Message-
> >> From: Pete Batard [mailto:p...@akeo.ie]
> >> Sent: Friday, January 12, 2018 9:33 PM
> >> To: edk2-devel@lists.01.org
> >> Cc: Gao, Liming ; ard.biesheu...@linaro.org;
> >> eug...@hp.com
> >> Subject: [PATCH v5 0/6] Add ARM support for VS2017
> >>
> >> (Same as v4, except for the AREA names where we replaced the RVCT macros,
> >> in
> >> patch 4/6, so that it matches what would have been produced with the
> >> macros)
> >>
> >>
> >> The following series adds ARM compilation support for the VS2017 toolchain.
> >> * PATCH 1 targets the disabling of VS Level 4 warnings. The disabled 
> >> warnings
> >>   for ARM are now aligned with IA32 and X64.
> >> * PATCH 2 adds a NULL handler for the base stack check, since this is a GCC
> >>   functionality.
> >> * PATCH 3 updates MdePkg/Library/BaseLib so that the RVCT assembly
> >> sources
> >>   are also used for MSFT.
> >> * PATCH 4 adds the required compiler intrinsics replacements for division,
> >>   shift, by reusing the RVCT code, as well as memset/memcpy.
> >> * PATCH 5 adds variable argument handlers for print output. Note that this
> >>   is done without relying on any external headers, with the VA_ARG macro
> >>   having been reverse engineered from MSFT ARM assembly output.
> >> * PATCH 6 enables the selection of ARM in the conf templates.
> >>
> >> With these patches, VS2017 toolchain users should be able to compile
> >> regular UEFI ARM applications using EDK2. Note that, unlike ARM64 support,
> >> ARM support does not require a specific update of Visual Studio 2017, as
> >> the ARM toolchain has been available from the very first release.
> >>
> >> Additional notes:
> >>
> >> We tested compiling and running the full UEFI Shell with this series, as
> >> well as a small set of applications and drivers, and found no issues.
> >> With an additional patch [1], it is also possible to use this proposal to
> >> compile a complete QEMU ARM firmware. As the patch shows, the changes
> >> that
> >> need to be applied to the EDK2 sources to achieve this are actually very
> >> minimal.
> >>
> >> However, the generated firmware does not currently boot, possibly because
> >> of the following warnings being generated by the MS compiler:
> >> - ArmCpuDxe.dll : warning LNK4072: section count 118 exceeds max (96);
> >> image may not run
> >> - UiApp.dll : warning LNK4072: section count 113 exceeds max (96); image 
> >> may
> >> not run
> >>
> >> As far as I could see, the section count max is hardcoded so a workaround
> >> would be needed to address those.
> >>
> >> Also, because the VS2017 ARM compiler forces a section alignment of 4096
> >> bytes (which in turn forces use to use /FILEALIGN:4096 as a linker option
> >> for the firmware generation), the generated firmware exceeds 2MB and we
> >> had to double its size to 4MB.
> >>
> >> At this stage, since the goal of this series is to allow users to compile
> >> regular ARM UEFI applications using the VS2017 toolchain, I have no plans
> >> to spend more time on the QEMU firmware issues, especially as I suspect
> >> that reducing the firmware size back to 2 MB may not be achievable without
> >> Microsoft altering their compiler. I am however hopeful that ARM
> >> specialists can take this matter over eventually...
> >>
> >> Regards,
> >>
> >> /Pete
> >>
> >> [1]
> >> https://github.com/pbatard/edk2/commit/c4ce41094a46f4f3dc7ccc64a906048
> >> 13f037b13
> >>
> >> Pete Batard (6):
> >>   MdePkg: Disable some Level 4 warnings for VS2017/ARM
> >>   MdePkg/Library/BaseStackCheckLib: Add Null handler for VS2017/ARM
> >>   MdePkg/Library/BaseLib: Enable VS2017/ARM builds
> >>   ArmPkg/Library/CompilerIntrinsicsLib: Enable VS2017/ARM builds
> >>   MdePkg/Include: Add VA list support for VS2017/ARM
> >>   BaseTools/Conf: Add VS2017/ARM support
> >>
> >> ArmPkg/Library/CompilerIntrinsicsLib/Arm/div.asm   | 43 
> >> +++--
> >> ArmPkg/Library/CompilerIntrinsicsLib/Arm/ldivmod.asm   | 40 
> >> ++--
> >> ArmPkg/Library/CompilerIntrinsicsLib/Arm/llsr.asm  | 22 +++--
> >> 

Re: [edk2] [PATCH] UefiCpuPkg/MpInitLib: Make sure AP uses correct StartupApSignal

[Zeng, Star]

Reviewed-by: Star Zeng 

-Original Message-
From: Ni, Ruiyu 
Sent: Thursday, January 25, 2018 3:37 PM
To: edk2-devel@lists.01.org
Cc: Zeng, Star ; Chiu, Chasel 
Subject: [PATCH] UefiCpuPkg/MpInitLib: Make sure AP uses correct StartupApSignal

From: Star Zeng 

Every processor's StartupApSignal is initialized in
MpInitLibInitialize() before calling CollectProcessorCount().
When SortApicId() is called from CollectProcessorCount(), AP Index
is re-assigned by APIC ID. But SortApicId() forgets to set the
correct StartupApSignal when sorting the AP.

The patch fixes this issue.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng 
Signed-off-by: Ruiyu Ni 
Cc: Star Zeng 
Cc: Chasel Chiu 
---
 UefiCpuPkg/Library/MpInitLib/MpLib.c | 9 +
 1 file changed, 9 insertions(+)

diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c 
b/UefiCpuPkg/Library/MpInitLib/MpLib.c
index 42011d6231..742f0c1f5e 100644
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.c
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c
@@ -330,6 +330,7 @@ SortApicId (
   CPU_INFO_IN_HOB   CpuInfo;
   UINT32ApCount;
   CPU_INFO_IN_HOB   *CpuInfoInHob;
+  volatile UINT32   *StartupApSignal;
 
   ApCount = CpuMpData->CpuCount - 1;
   CpuInfoInHob = (CPU_INFO_IN_HOB *) (UINTN) CpuMpData->CpuInfoInHob;
@@ -354,6 +355,14 @@ SortApicId (
   sizeof (CPU_INFO_IN_HOB)
   );
 CopyMem ([Index1], , sizeof (CPU_INFO_IN_HOB));
+
+//
+// Also exchange the StartupApSignal.
+//
+StartupApSignal = CpuMpData->CpuData[Index3].StartupApSignal;
+CpuMpData->CpuData[Index3].StartupApSignal =
+  CpuMpData->CpuData[Index1].StartupApSignal;
+CpuMpData->CpuData[Index1].StartupApSignal = StartupApSignal;
   }
 }
 
-- 
2.15.1.windows.2

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[edk2] [PATCH 1/2] ShellPkg/CommandLib: Locate proper UnicodeCollation instance

[Ruiyu Ni]

Original code locates the first UnicodeCollation instance in
DXE Core protocol database.
It's not correct considering multiple UnicodeCollation instances
exist in system.
The patch changes logic to find the one that matches the current
system language.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni 
Cc: Jaben Carsey 
---
 .../UefiShellCommandLib/UefiShellCommandLib.c  | 76 ++
 .../UefiShellCommandLib/UefiShellCommandLib.h  |  3 +-
 2 files changed, 67 insertions(+), 12 deletions(-)

diff --git a/ShellPkg/Library/UefiShellCommandLib/UefiShellCommandLib.c 
b/ShellPkg/Library/UefiShellCommandLib/UefiShellCommandLib.c
index c7984f11b2..0df252b420 100644
--- a/ShellPkg/Library/UefiShellCommandLib/UefiShellCommandLib.c
+++ b/ShellPkg/Library/UefiShellCommandLib/UefiShellCommandLib.c
@@ -1,7 +1,7 @@
 /** @file
   Provides interface to shell internal functions for shell commands.
 
-  Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.
+  Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.
   (C) Copyright 2013-2015 Hewlett-Packard Development Company, L.P.
   (C) Copyright 2016 Hewlett Packard Enterprise Development LP
 
@@ -72,14 +72,70 @@ CommandInit(
   VOID
   )
 {
-  EFI_STATUS Status;
+  UINTN   NumHandles;
+  EFI_HANDLE  *Handles;
+  EFI_UNICODE_COLLATION_PROTOCOL  *Uc;
+  CHAR8   *BestLanguage;
+  UINTN   Index;
+  EFI_STATUS  Status;
+  CHAR8   *PlatformLang;
+  
+  GetEfiGlobalVariable2 (EFI_PLATFORM_LANG_VARIABLE_NAME, 
(VOID**), NULL);
+  if (PlatformLang == NULL) {
+return EFI_UNSUPPORTED;
+  }
+
   if (gUnicodeCollation == NULL) {
-Status = gBS->LocateProtocol(, NULL, 
(VOID**));
-if (EFI_ERROR(Status)) {
-  return (EFI_DEVICE_ERROR);
+Status = gBS->LocateHandleBuffer (
+ByProtocol,
+,
+NULL,
+,
+
+);
+if (EFI_ERROR (Status)) {
+  NumHandles = 0;
+  Handles= NULL;
 }
+for (Index = 0; Index < NumHandles; Index++) {
+  //
+  // Open Unicode Collation Protocol
+  //
+  Status = gBS->OpenProtocol (
+  Handles[Index],
+  ,
+  (VOID **) ,
+  gImageHandle,
+  NULL,
+  EFI_OPEN_PROTOCOL_GET_PROTOCOL
+  );
+  if (EFI_ERROR (Status)) {
+continue;
+  }
+
+  //
+  // Find the best matching matching language from the supported languages
+  // of Unicode Collation2 protocol. 
+  //
+  BestLanguage = GetBestLanguage (
+   Uc->SupportedLanguages,
+   FALSE,
+   PlatformLang,
+   NULL
+   );
+  if (BestLanguage != NULL) {
+FreePool (BestLanguage);
+gUnicodeCollation = Uc;
+break;
+  }
+}
+if (Handles != NULL) {
+  FreePool (Handles);
+}
+FreePool (PlatformLang);
   }
-  return (EFI_SUCCESS);
+
+  return (gUnicodeCollation == NULL) ? EFI_UNSUPPORTED : EFI_SUCCESS;
 }
 
 /**
@@ -112,11 +168,9 @@ ShellCommandLibConstructor (
   mProfileListSize  = 0;
   mProfileList  = NULL;
 
-  if (gUnicodeCollation == NULL) {
-Status = gBS->LocateProtocol(, NULL, 
(VOID**));
-if (EFI_ERROR(Status)) {
-  return (EFI_DEVICE_ERROR);
-}
+  Status = CommandInit ();
+  if (EFI_ERROR (Status)) {
+return EFI_DEVICE_ERROR;
   }
 
   return (RETURN_SUCCESS);
diff --git a/ShellPkg/Library/UefiShellCommandLib/UefiShellCommandLib.h 
b/ShellPkg/Library/UefiShellCommandLib/UefiShellCommandLib.h
index b998656b4e..bcfde60c26 100644
--- a/ShellPkg/Library/UefiShellCommandLib/UefiShellCommandLib.h
+++ b/ShellPkg/Library/UefiShellCommandLib/UefiShellCommandLib.h
@@ -1,7 +1,7 @@
 /** @file
   Provides interface to shell internal functions for shell commands.
 
-  Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved. 
+  Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved. 
   (C) Copyright 2016 Hewlett Packard Enterprise Development LP
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD 
License
@@ -19,6 +19,7 @@
 #include 
 
 #include 
+#include 
 
 #include 
 #include 
-- 
2.15.1.windows.2

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[edk2] [PATCH 2/2] ShellPkg/Level2Command: Use UnicodeCollation in StrinCmp

[Ruiyu Ni]

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni 
Cc: Jaben Carsey 
---
 ShellPkg/Library/UefiShellLevel2CommandsLib/Cd.c   |  4 +-
 ShellPkg/Library/UefiShellLevel2CommandsLib/Cp.c   |  4 +-
 .../Library/UefiShellLevel2CommandsLib/TimeDate.c  |  6 +-
 .../UefiShellLevel2CommandsLib.c   | 65 +++---
 .../UefiShellLevel2CommandsLib.h   | 15 ++---
 5 files changed, 49 insertions(+), 45 deletions(-)

diff --git a/ShellPkg/Library/UefiShellLevel2CommandsLib/Cd.c 
b/ShellPkg/Library/UefiShellLevel2CommandsLib/Cd.c
index 9ae81763f7..d5dc9804d4 100644
--- a/ShellPkg/Library/UefiShellLevel2CommandsLib/Cd.c
+++ b/ShellPkg/Library/UefiShellLevel2CommandsLib/Cd.c
@@ -3,7 +3,7 @@
 
   (C) Copyright 2016 Hewlett Packard Enterprise Development LP
   (C) Copyright 2015 Hewlett-Packard Development Company, L.P.
-  Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.
+  Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD 
License
   which accompanies this distribution.  The full text of the license may be 
found at
@@ -102,7 +102,7 @@ IsCurrentFileSystem (
   if (((UINTN) Splitter1 - (UINTN) FullPath) != ((UINTN) Splitter2 - (UINTN) 
Cwd)) {
 return FALSE;
   } else {
-if (StrniCmp (FullPath, Cwd, ((UINTN) Splitter1 - (UINTN) FullPath) / 
sizeof (CHAR16)) == NULL) {
+if (StrniCmp (FullPath, Cwd, ((UINTN) Splitter1 - (UINTN) FullPath) / 
sizeof (CHAR16)) == 0) {
   return TRUE;
 } else {
   return FALSE;
diff --git a/ShellPkg/Library/UefiShellLevel2CommandsLib/Cp.c 
b/ShellPkg/Library/UefiShellLevel2CommandsLib/Cp.c
index b8f6d310f6..ae7528ddcf 100644
--- a/ShellPkg/Library/UefiShellLevel2CommandsLib/Cp.c
+++ b/ShellPkg/Library/UefiShellLevel2CommandsLib/Cp.c
@@ -2,7 +2,7 @@
   Main file for cp shell level 2 function.
 
   (C) Copyright 2015 Hewlett-Packard Development Company, L.P.
-  Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.
+  Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD 
License
   which accompanies this distribution.  The full text of the license may be 
found at
@@ -510,7 +510,7 @@ ValidateAndCopyFiles(
 
 if ( !EFI_ERROR(ShellIsDirectory(Node->FullName))
   && !EFI_ERROR(ShellIsDirectory(DestPath))
-  && StrniCmp(Node->FullName, DestPath, StrLen(DestPath)) == NULL
+  && StrniCmp(Node->FullName, DestPath, StrLen(DestPath)) == 0
   ){
   ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_CP_SD_PARENT), 
gShellLevel2HiiHandle, L"cp");  
   ShellStatus = SHELL_INVALID_PARAMETER;
diff --git a/ShellPkg/Library/UefiShellLevel2CommandsLib/TimeDate.c 
b/ShellPkg/Library/UefiShellLevel2CommandsLib/TimeDate.c
index 5383cffe87..0b7551a239 100644
--- a/ShellPkg/Library/UefiShellLevel2CommandsLib/TimeDate.c
+++ b/ShellPkg/Library/UefiShellLevel2CommandsLib/TimeDate.c
@@ -2,7 +2,7 @@
   Main file for time, timezone, and date shell level 2 and shell level 3 
functions.
 
   (C) Copyright 2012-2015 Hewlett-Packard Development Company, L.P.
-  Copyright (c) 2009 - 2014, Intel Corporation. All rights reserved.
+  Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD 
License
   which accompanies this distribution.  The full text of the license may be 
found at
@@ -550,7 +550,7 @@ ShellCommandRunTime (
   // perform level 3 operation here.
   //
   if ((TempLocation = ShellCommandLineGetValue(Package, L"-tz")) != 
NULL) {
-if (StrniCmp (TempLocation, L"_local", StrLen (TempLocation)) == 
NULL) {
+if (gUnicodeCollation->StriColl(gUnicodeCollation, (CHAR16 
*)TempLocation, L"_local") == 0) {
   Tz = EFI_UNSPECIFIED_TIMEZONE;
 } else if (TempLocation[0] == L'-') {
 
@@ -713,7 +713,7 @@ CheckAndSetTimeZone (
 return (SHELL_INVALID_PARAMETER);
   }
 
-  if (StrniCmp (TimeZoneString, L"_local", StrLen (TimeZoneString)) == NULL) {
+  if (gUnicodeCollation->StriColl(gUnicodeCollation, (CHAR16 *)TimeZoneString, 
L"_local") == 0) {
 Status = gRT->GetTime (, NULL);
 if (EFI_ERROR (Status)) {
   ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_GEN_UEFI_FUNC_WARN), 
gShellLevel2HiiHandle, L"gRT->GetTime", Status);
diff --git 
a/ShellPkg/Library/UefiShellLevel2CommandsLib/UefiShellLevel2CommandsLib.c 
b/ShellPkg/Library/UefiShellLevel2CommandsLib/UefiShellLevel2CommandsLib.c
index e9ce631892..36bc3552b5 100644
--- a/ShellPkg/Library/UefiShellLevel2CommandsLib/UefiShellLevel2CommandsLib.c
+++ 

[edk2] [PATCH 0/2] User UnicodeCollation in StrinCmp

[Ruiyu Ni]

Ruiyu Ni (2):
  ShellPkg/CommandLib: Locate proper UnicodeCollation instance
  ShellPkg/Level2Command: Use UnicodeCollation in StrinCmp

 .../UefiShellCommandLib/UefiShellCommandLib.c  | 76 ++
 .../UefiShellCommandLib/UefiShellCommandLib.h  |  3 +-
 ShellPkg/Library/UefiShellLevel2CommandsLib/Cd.c   |  4 +-
 ShellPkg/Library/UefiShellLevel2CommandsLib/Cp.c   |  4 +-
 .../Library/UefiShellLevel2CommandsLib/TimeDate.c  |  6 +-
 .../UefiShellLevel2CommandsLib.c   | 65 +-
 .../UefiShellLevel2CommandsLib.h   | 15 +++--
 7 files changed, 116 insertions(+), 57 deletions(-)

-- 
2.15.1.windows.2

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Re: [edk2] [PATCH 2/2] UefiCpuPkg/CpuDxe: remove all code to flush TLB for APs

[Wang, Jian J]

Right. I'll update the comments.

Regards,
Jian


> -Original Message-
> From: Ni, Ruiyu
> Sent: Friday, January 26, 2018 5:14 PM
> To: Wang, Jian J ; edk2-devel@lists.01.org
> Cc: Laszlo Ersek ; Yao, Jiewen ;
> Dong, Eric 
> Subject: Re: [edk2] [PATCH 2/2] UefiCpuPkg/CpuDxe: remove all code to flush
> TLB for APs
> 
> On 1/26/2018 5:03 PM, Jian J Wang wrote:
> > The reason doing this is that we found that calling StartupAllAps() to
> > flush TLB for all APs in CpuDxe driver after changing page attributes
> > will spend a lot of time to complete. If there are many page attributes
> > update requests, the whole system performance will be slowed down
> > explicitly, including any shell command and UI operation.
> >
> > The solution is removing the flush operation for AP in CpuDxe driver
> > and let AP flush TLB after woken up.
> >
> > Cc: Ruiyu Ni 
> > Cc: Jiewen Yao 
> > Cc: Eric Dong 
> > Cc: Laszlo Ersek 
> > Contributed-under: TianoCore Contribution Agreement 1.1
> > Signed-off-by: Jian J Wang 
> > ---
> >   UefiCpuPkg/CpuDxe/CpuPageTable.c | 85 
> > +++-
> >   1 file changed, 5 insertions(+), 80 deletions(-)
> >
> > diff --git a/UefiCpuPkg/CpuDxe/CpuPageTable.c
> b/UefiCpuPkg/CpuDxe/CpuPageTable.c
> > index a33ac5519e..a5bf0dfe28 100644
> > --- a/UefiCpuPkg/CpuDxe/CpuPageTable.c
> > +++ b/UefiCpuPkg/CpuDxe/CpuPageTable.c
> > @@ -89,70 +89,6 @@ PAGE_ATTRIBUTE_TABLE mPageAttributeTable[] = {
> >
> >   PAGE_TABLE_POOL   *mPageTablePool = NULL;
> >
> > -/**
> > -  Enable write protection function for AP.
> > -
> > -  @param[in,out] Buffer  The pointer to private data buffer.
> > -**/
> > -VOID
> > -EFIAPI
> > -SyncCpuEnableWriteProtection (
> > -  IN OUT VOID *Buffer
> > -  )
> > -{
> > -  AsmWriteCr0 (AsmReadCr0 () | BIT16);
> > -}
> > -
> > -/**
> > -  CpuFlushTlb function for AP.
> > -
> > -  @param[in,out] Buffer  The pointer to private data buffer.
> > -**/
> > -VOID
> > -EFIAPI
> > -SyncCpuFlushTlb (
> > -  IN OUT VOID *Buffer
> > -  )
> > -{
> > -  CpuFlushTlb();
> > -}
> > -
> > -/**
> > -  Sync memory page attributes for AP.
> > -
> > -  @param[in] ProcedureA pointer to the function to be run on 
> > enabled
> APs of
> > -  the system.
> > -**/
> > -VOID
> > -SyncMemoryPageAttributesAp (
> > -  IN EFI_AP_PROCEDUREProcedure
> > -  )
> > -{
> > -  EFI_STATUSStatus;
> > -  EFI_MP_SERVICES_PROTOCOL  *MpService;
> > -
> > -  Status = gBS->LocateProtocol (
> > -  ,
> > -  NULL,
> > -  (VOID **)
> > -  );
> > -  //
> > -  // Synchronize the update with all APs
> > -  //
> > -  if (!EFI_ERROR (Status)) {
> > -Status = MpService->StartupAllAPs (
> > -  MpService,  // This
> > -  Procedure,  // Procedure
> > -  FALSE,  // SingleThread
> > -  NULL,   // WaitEvent
> > -  0,  // TimeoutInMicrosecsond
> > -  NULL,   // ProcedureArgument
> > -  NULL// FailedCpuList
> > -  );
> > -ASSERT (Status == EFI_SUCCESS || Status == EFI_NOT_STARTED || Status
> == EFI_NOT_READY);
> > -  }
> > -}
> > -
> >   /**
> > Return current paging context.
> >
> > @@ -574,20 +510,6 @@ IsReadOnlyPageWriteProtected (
> > return ((AsmReadCr0 () & BIT16) != 0);
> >   }
> >
> > -/**
> > -  Disable write protection function for AP.
> > -
> > -  @param[in,out] Buffer  The pointer to private data buffer.
> > -**/
> > -VOID
> > -EFIAPI
> > -SyncCpuDisableWriteProtection (
> > -  IN OUT VOID *Buffer
> > -  )
> > -{
> > -  AsmWriteCr0 (AsmReadCr0() & ~BIT16);
> > -}
> > -
> >   /**
> >Disable Write Protect on pages marked as read-only.
> >   **/
> > @@ -835,10 +757,13 @@ AssignMemoryPageAttributes (
> > if (!EFI_ERROR(Status)) {
> >   if ((PagingContext == NULL) && IsModified) {
> > //
> > -  // Flush TLB as last step
> > +  // Flush TLB as last step.
> > +  //
> > +  // Note: Don't flush TLB for APs here. It will take a lot of time to
> > +  // complete, and then slow down boot performance of the whole system
> > +  // if page attributes are requested frequently to update.
> > //
> 
> Code change looks good. But comments look like we skip the sync due to
> performance. In fact, sync is unnecessary.
> How about comments like below (refine as you need):
> No need to flush TLB for APs here because:
> 1. when APs wake up from hlt, AP initialization code always sets CR3
> 2. when APs wake up from mwait/run loop, patch
> *UefiCpuPkg/MpInitLib: 

Re: [edk2] [PATCH 1/2] UefiCpuPkg/MpInitLib: force flushing TLB for AP in mwait loop mode

[Ni, Ruiyu]

On 1/26/2018 5:03 PM, Jian J Wang wrote:

The reason doing this is that we found that calling StartupAllAps() to
flush TLB for all APs in CpuDxe driver after changing page attributes
will spend a lot of time to complete. If there are many page attributes
update requests, the whole system performance will be slowed down
explicitly, including any shell command and UI operation.

The solution is removing the flush operation for AP in CpuDxe driver.
Since TLB is always flushed in HLT loop mode, we just need to enforce
a TLB flush for mwait loop mode.

Cc: Ruiyu Ni 
Cc: Jiewen Yao 
Cc: Eric Dong 
Cc: Laszlo Ersek 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang 
---
  UefiCpuPkg/Library/MpInitLib/MpLib.c | 6 ++
  1 file changed, 6 insertions(+)

diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c 
b/UefiCpuPkg/Library/MpInitLib/MpLib.c
index 6231968c74..175a4b49e5 100644
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.c
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c
@@ -630,6 +630,12 @@ ApWakeupFunction (
  // Restore AP's volatile registers saved
  //
  RestoreVolatileRegisters 
(>CpuData[ProcessorNumber].VolatileRegisters, TRUE);
+  } else {
+//
+// Due to performance concern, the CPU driver might not flush TLB for
+// APs on spot. AP itself needs to take care of it when woken up.
+//
+CpuFlushTlb ();
}
  
if (GetApState (>CpuData[ProcessorNumber]) == CpuStateReady) {



Reviewed-by: Ruiyu Ni 

--
Thanks,
Ray
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Re: [edk2] [PATCH 2/2] UefiCpuPkg/CpuDxe: remove all code to flush TLB for APs

[Ni, Ruiyu]

On 1/26/2018 5:03 PM, Jian J Wang wrote:

The reason doing this is that we found that calling StartupAllAps() to
flush TLB for all APs in CpuDxe driver after changing page attributes
will spend a lot of time to complete. If there are many page attributes
update requests, the whole system performance will be slowed down
explicitly, including any shell command and UI operation.

The solution is removing the flush operation for AP in CpuDxe driver
and let AP flush TLB after woken up.

Cc: Ruiyu Ni 
Cc: Jiewen Yao 
Cc: Eric Dong 
Cc: Laszlo Ersek 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang 
---
  UefiCpuPkg/CpuDxe/CpuPageTable.c | 85 +++-
  1 file changed, 5 insertions(+), 80 deletions(-)

diff --git a/UefiCpuPkg/CpuDxe/CpuPageTable.c b/UefiCpuPkg/CpuDxe/CpuPageTable.c
index a33ac5519e..a5bf0dfe28 100644
--- a/UefiCpuPkg/CpuDxe/CpuPageTable.c
+++ b/UefiCpuPkg/CpuDxe/CpuPageTable.c
@@ -89,70 +89,6 @@ PAGE_ATTRIBUTE_TABLE mPageAttributeTable[] = {
  
  PAGE_TABLE_POOL   *mPageTablePool = NULL;
  
-/**

-  Enable write protection function for AP.
-
-  @param[in,out] Buffer  The pointer to private data buffer.
-**/
-VOID
-EFIAPI
-SyncCpuEnableWriteProtection (
-  IN OUT VOID *Buffer
-  )
-{
-  AsmWriteCr0 (AsmReadCr0 () | BIT16);
-}
-
-/**
-  CpuFlushTlb function for AP.
-
-  @param[in,out] Buffer  The pointer to private data buffer.
-**/
-VOID
-EFIAPI
-SyncCpuFlushTlb (
-  IN OUT VOID *Buffer
-  )
-{
-  CpuFlushTlb();
-}
-
-/**
-  Sync memory page attributes for AP.
-
-  @param[in] ProcedureA pointer to the function to be run on 
enabled APs of
-  the system.
-**/
-VOID
-SyncMemoryPageAttributesAp (
-  IN EFI_AP_PROCEDUREProcedure
-  )
-{
-  EFI_STATUSStatus;
-  EFI_MP_SERVICES_PROTOCOL  *MpService;
-
-  Status = gBS->LocateProtocol (
-  ,
-  NULL,
-  (VOID **)
-  );
-  //
-  // Synchronize the update with all APs
-  //
-  if (!EFI_ERROR (Status)) {
-Status = MpService->StartupAllAPs (
-  MpService,  // This
-  Procedure,  // Procedure
-  FALSE,  // SingleThread
-  NULL,   // WaitEvent
-  0,  // TimeoutInMicrosecsond
-  NULL,   // ProcedureArgument
-  NULL// FailedCpuList
-  );
-ASSERT (Status == EFI_SUCCESS || Status == EFI_NOT_STARTED || Status == 
EFI_NOT_READY);
-  }
-}
-
  /**
Return current paging context.
  
@@ -574,20 +510,6 @@ IsReadOnlyPageWriteProtected (

return ((AsmReadCr0 () & BIT16) != 0);
  }
  
-/**

-  Disable write protection function for AP.
-
-  @param[in,out] Buffer  The pointer to private data buffer.
-**/
-VOID
-EFIAPI
-SyncCpuDisableWriteProtection (
-  IN OUT VOID *Buffer
-  )
-{
-  AsmWriteCr0 (AsmReadCr0() & ~BIT16);
-}
-
  /**
   Disable Write Protect on pages marked as read-only.
  **/
@@ -835,10 +757,13 @@ AssignMemoryPageAttributes (
if (!EFI_ERROR(Status)) {
  if ((PagingContext == NULL) && IsModified) {
//
-  // Flush TLB as last step
+  // Flush TLB as last step.
+  //
+  // Note: Don't flush TLB for APs here. It will take a lot of time to
+  // complete, and then slow down boot performance of the whole system
+  // if page attributes are requested frequently to update.
//


Code change looks good. But comments look like we skip the sync due to
performance. In fact, sync is unnecessary.
How about comments like below (refine as you need):
No need to flush TLB for APs here because:
1. when APs wake up from hlt, AP initialization code always sets CR3
2. when APs wake up from mwait/run loop, patch
   *UefiCpuPkg/MpInitLib: force flushing TLB for AP in mwait loop mode*
   sets CR3.

With the comments refine, Reviewed-by: Ruiyu Ni 



CpuFlushTlb();
-  SyncMemoryPageAttributesAp (SyncCpuFlushTlb);
  }
}
  




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[edk2] [PATCH 1/2] ShellPkg/CommandLib: Locate proper UnicodeCollation instance

[Ruiyu Ni]

Original code locates the first UnicodeCollation instance in
DXE Core protocol database.
It's not correct considering multiple UnicodeCollation instances
exist in system.
The patch changes logic to find the one that matches the current
system language.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni 
Cc: Jaben Carsey LocateProtocol(, NULL, 
(VOID**));
-if (EFI_ERROR(Status)) {
-  return (EFI_DEVICE_ERROR);
+Status = gBS->LocateHandleBuffer (
+ByProtocol,
+,
+NULL,
+,
+
+);
+if (EFI_ERROR (Status)) {
+  NumHandles = 0;
+  Handles= NULL;
 }
+for (Index = 0; Index < NumHandles; Index++) {
+  //
+  // Open Unicode Collation Protocol
+  //
+  Status = gBS->OpenProtocol (
+  Handles[Index],
+  ,
+  (VOID **) ,
+  gImageHandle,
+  NULL,
+  EFI_OPEN_PROTOCOL_GET_PROTOCOL
+  );
+  if (EFI_ERROR (Status)) {
+continue;
+  }
+
+  //
+  // Find the best matching matching language from the supported languages
+  // of Unicode Collation2 protocol. 
+  //
+  BestLanguage = GetBestLanguage (
+   Uc->SupportedLanguages,
+   FALSE,
+   PlatformLang,
+   NULL
+   );
+  if (BestLanguage != NULL) {
+FreePool (BestLanguage);
+gUnicodeCollation = Uc;
+break;
+  }
+}
+if (Handles != NULL) {
+  FreePool (Handles);
+}
+FreePool (PlatformLang);
   }
-  return (EFI_SUCCESS);
+
+  return (gUnicodeCollation == NULL) ? EFI_UNSUPPORTED : EFI_SUCCESS;
 }
 
 /**
@@ -112,11 +168,9 @@ ShellCommandLibConstructor (
   mProfileListSize  = 0;
   mProfileList  = NULL;
 
-  if (gUnicodeCollation == NULL) {
-Status = gBS->LocateProtocol(, NULL, 
(VOID**));
-if (EFI_ERROR(Status)) {
-  return (EFI_DEVICE_ERROR);
-}
+  Status = CommandInit ();
+  if (EFI_ERROR (Status)) {
+return EFI_DEVICE_ERROR;
   }
 
   return (RETURN_SUCCESS);
diff --git a/ShellPkg/Library/UefiShellCommandLib/UefiShellCommandLib.h 
b/ShellPkg/Library/UefiShellCommandLib/UefiShellCommandLib.h
index b998656b4e..bcfde60c26 100644
--- a/ShellPkg/Library/UefiShellCommandLib/UefiShellCommandLib.h
+++ b/ShellPkg/Library/UefiShellCommandLib/UefiShellCommandLib.h
@@ -1,7 +1,7 @@
 /** @file
   Provides interface to shell internal functions for shell commands.
 
-  Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved. 
+  Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved. 
   (C) Copyright 2016 Hewlett Packard Enterprise Development LP
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD 
License
@@ -19,6 +19,7 @@
 #include 
 
 #include 
+#include 
 
 #include 
 #include 
-- 
2.15.1.windows.2

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[edk2] [PATCH 2/2] ShellPkg/Level2Command: Use UnicodeCollation in StrinCmp

[Ruiyu Ni]

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni 
Cc: Jaben Carsey 
---
 ShellPkg/Library/UefiShellLevel2CommandsLib/Cd.c   |  4 +-
 ShellPkg/Library/UefiShellLevel2CommandsLib/Cp.c   |  4 +-
 .../Library/UefiShellLevel2CommandsLib/TimeDate.c  |  6 +-
 .../UefiShellLevel2CommandsLib.c   | 65 +++---
 .../UefiShellLevel2CommandsLib.h   | 15 ++---
 5 files changed, 49 insertions(+), 45 deletions(-)

diff --git a/ShellPkg/Library/UefiShellLevel2CommandsLib/Cd.c 
b/ShellPkg/Library/UefiShellLevel2CommandsLib/Cd.c
index 9ae81763f7..d5dc9804d4 100644
--- a/ShellPkg/Library/UefiShellLevel2CommandsLib/Cd.c
+++ b/ShellPkg/Library/UefiShellLevel2CommandsLib/Cd.c
@@ -3,7 +3,7 @@
 
   (C) Copyright 2016 Hewlett Packard Enterprise Development LP
   (C) Copyright 2015 Hewlett-Packard Development Company, L.P.
-  Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.
+  Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD 
License
   which accompanies this distribution.  The full text of the license may be 
found at
@@ -102,7 +102,7 @@ IsCurrentFileSystem (
   if (((UINTN) Splitter1 - (UINTN) FullPath) != ((UINTN) Splitter2 - (UINTN) 
Cwd)) {
 return FALSE;
   } else {
-if (StrniCmp (FullPath, Cwd, ((UINTN) Splitter1 - (UINTN) FullPath) / 
sizeof (CHAR16)) == NULL) {
+if (StrniCmp (FullPath, Cwd, ((UINTN) Splitter1 - (UINTN) FullPath) / 
sizeof (CHAR16)) == 0) {
   return TRUE;
 } else {
   return FALSE;
diff --git a/ShellPkg/Library/UefiShellLevel2CommandsLib/Cp.c 
b/ShellPkg/Library/UefiShellLevel2CommandsLib/Cp.c
index b8f6d310f6..ae7528ddcf 100644
--- a/ShellPkg/Library/UefiShellLevel2CommandsLib/Cp.c
+++ b/ShellPkg/Library/UefiShellLevel2CommandsLib/Cp.c
@@ -2,7 +2,7 @@
   Main file for cp shell level 2 function.
 
   (C) Copyright 2015 Hewlett-Packard Development Company, L.P.
-  Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.
+  Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD 
License
   which accompanies this distribution.  The full text of the license may be 
found at
@@ -510,7 +510,7 @@ ValidateAndCopyFiles(
 
 if ( !EFI_ERROR(ShellIsDirectory(Node->FullName))
   && !EFI_ERROR(ShellIsDirectory(DestPath))
-  && StrniCmp(Node->FullName, DestPath, StrLen(DestPath)) == NULL
+  && StrniCmp(Node->FullName, DestPath, StrLen(DestPath)) == 0
   ){
   ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_CP_SD_PARENT), 
gShellLevel2HiiHandle, L"cp");  
   ShellStatus = SHELL_INVALID_PARAMETER;
diff --git a/ShellPkg/Library/UefiShellLevel2CommandsLib/TimeDate.c 
b/ShellPkg/Library/UefiShellLevel2CommandsLib/TimeDate.c
index 5383cffe87..0b7551a239 100644
--- a/ShellPkg/Library/UefiShellLevel2CommandsLib/TimeDate.c
+++ b/ShellPkg/Library/UefiShellLevel2CommandsLib/TimeDate.c
@@ -2,7 +2,7 @@
   Main file for time, timezone, and date shell level 2 and shell level 3 
functions.
 
   (C) Copyright 2012-2015 Hewlett-Packard Development Company, L.P.
-  Copyright (c) 2009 - 2014, Intel Corporation. All rights reserved.
+  Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD 
License
   which accompanies this distribution.  The full text of the license may be 
found at
@@ -550,7 +550,7 @@ ShellCommandRunTime (
   // perform level 3 operation here.
   //
   if ((TempLocation = ShellCommandLineGetValue(Package, L"-tz")) != 
NULL) {
-if (StrniCmp (TempLocation, L"_local", StrLen (TempLocation)) == 
NULL) {
+if (gUnicodeCollation->StriColl(gUnicodeCollation, (CHAR16 
*)TempLocation, L"_local") == 0) {
   Tz = EFI_UNSPECIFIED_TIMEZONE;
 } else if (TempLocation[0] == L'-') {
 
@@ -713,7 +713,7 @@ CheckAndSetTimeZone (
 return (SHELL_INVALID_PARAMETER);
   }
 
-  if (StrniCmp (TimeZoneString, L"_local", StrLen (TimeZoneString)) == NULL) {
+  if (gUnicodeCollation->StriColl(gUnicodeCollation, (CHAR16 *)TimeZoneString, 
L"_local") == 0) {
 Status = gRT->GetTime (, NULL);
 if (EFI_ERROR (Status)) {
   ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_GEN_UEFI_FUNC_WARN), 
gShellLevel2HiiHandle, L"gRT->GetTime", Status);
diff --git 
a/ShellPkg/Library/UefiShellLevel2CommandsLib/UefiShellLevel2CommandsLib.c 
b/ShellPkg/Library/UefiShellLevel2CommandsLib/UefiShellLevel2CommandsLib.c
index e9ce631892..36bc3552b5 100644
--- a/ShellPkg/Library/UefiShellLevel2CommandsLib/UefiShellLevel2CommandsLib.c
+++ 

[edk2] [PATCH 0/2] User UnicodeCollation in StrinCmp

[Ruiyu Ni]

Ruiyu Ni (2):
  ShellPkg/CommandLib: Locate proper UnicodeCollation instance
  ShellPkg/Level2Command: Use UnicodeCollation in StrinCmp

 .../UefiShellCommandLib/UefiShellCommandLib.c  | 76 ++
 .../UefiShellCommandLib/UefiShellCommandLib.h  |  3 +-
 ShellPkg/Library/UefiShellLevel2CommandsLib/Cd.c   |  4 +-
 ShellPkg/Library/UefiShellLevel2CommandsLib/Cp.c   |  4 +-
 .../Library/UefiShellLevel2CommandsLib/TimeDate.c  |  6 +-
 .../UefiShellLevel2CommandsLib.c   | 65 +-
 .../UefiShellLevel2CommandsLib.h   | 15 +++--
 7 files changed, 116 insertions(+), 57 deletions(-)

-- 
2.15.1.windows.2

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[edk2] [PATCH 0/2] Fix bad performance in changing page attributes

[Jian J Wang]

There's a great performance down if we enable heap guard features.
This feature will frequently update page attribute to set/unset guard
pages, which is done by CpuArchProtocol.SetMemoryAttributes. In the
implementation of this method (in CpuDxe), it will call
MpProtocol.StartupAllAps() to flush TLB for all APs after updating
page attributes. We found that StartupAllAps() will spend a lot of
time to complete the flush operation. For example, listing a folder
content in shell will take 55s to complete. Normally it should take
less than 5s.

The solution is removing the flush operation for AP in CpuDxe driver
but let AP do it in its own wakeup code. There's no need to flush TLB
for AP who has no chance to run code.

Jian J Wang (2):
  UefiCpuPkg/MpInitLib: force flushing TLB for AP in mwait loop mode
  UefiCpuPkg/CpuDxe: remove all code to flush TLB for APs

 UefiCpuPkg/CpuDxe/CpuPageTable.c | 85 +++-
 UefiCpuPkg/Library/MpInitLib/MpLib.c |  6 +++
 2 files changed, 11 insertions(+), 80 deletions(-)

-- 
2.15.1.windows.2

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[edk2] [PATCH 1/2] UefiCpuPkg/MpInitLib: force flushing TLB for AP in mwait loop mode

[Jian J Wang]

The reason doing this is that we found that calling StartupAllAps() to
flush TLB for all APs in CpuDxe driver after changing page attributes
will spend a lot of time to complete. If there are many page attributes
update requests, the whole system performance will be slowed down
explicitly, including any shell command and UI operation.

The solution is removing the flush operation for AP in CpuDxe driver.
Since TLB is always flushed in HLT loop mode, we just need to enforce
a TLB flush for mwait loop mode.

Cc: Ruiyu Ni 
Cc: Jiewen Yao 
Cc: Eric Dong 
Cc: Laszlo Ersek 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang 
---
 UefiCpuPkg/Library/MpInitLib/MpLib.c | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c 
b/UefiCpuPkg/Library/MpInitLib/MpLib.c
index 6231968c74..175a4b49e5 100644
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.c
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c
@@ -630,6 +630,12 @@ ApWakeupFunction (
 // Restore AP's volatile registers saved
 //
 RestoreVolatileRegisters 
(>CpuData[ProcessorNumber].VolatileRegisters, TRUE);
+  } else {
+//
+// Due to performance concern, the CPU driver might not flush TLB for
+// APs on spot. AP itself needs to take care of it when woken up.
+//
+CpuFlushTlb ();
   }
 
   if (GetApState (>CpuData[ProcessorNumber]) == CpuStateReady) {
-- 
2.15.1.windows.2

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[edk2] [PATCH 2/2] UefiCpuPkg/CpuDxe: remove all code to flush TLB for APs

[Jian J Wang]

The reason doing this is that we found that calling StartupAllAps() to
flush TLB for all APs in CpuDxe driver after changing page attributes
will spend a lot of time to complete. If there are many page attributes
update requests, the whole system performance will be slowed down
explicitly, including any shell command and UI operation.

The solution is removing the flush operation for AP in CpuDxe driver
and let AP flush TLB after woken up.

Cc: Ruiyu Ni 
Cc: Jiewen Yao 
Cc: Eric Dong 
Cc: Laszlo Ersek 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang 
---
 UefiCpuPkg/CpuDxe/CpuPageTable.c | 85 +++-
 1 file changed, 5 insertions(+), 80 deletions(-)

diff --git a/UefiCpuPkg/CpuDxe/CpuPageTable.c b/UefiCpuPkg/CpuDxe/CpuPageTable.c
index a33ac5519e..a5bf0dfe28 100644
--- a/UefiCpuPkg/CpuDxe/CpuPageTable.c
+++ b/UefiCpuPkg/CpuDxe/CpuPageTable.c
@@ -89,70 +89,6 @@ PAGE_ATTRIBUTE_TABLE mPageAttributeTable[] = {
 
 PAGE_TABLE_POOL   *mPageTablePool = NULL;
 
-/**
-  Enable write protection function for AP.
-
-  @param[in,out] Buffer  The pointer to private data buffer.
-**/
-VOID
-EFIAPI
-SyncCpuEnableWriteProtection (
-  IN OUT VOID *Buffer
-  )
-{
-  AsmWriteCr0 (AsmReadCr0 () | BIT16);
-}
-
-/**
-  CpuFlushTlb function for AP.
-
-  @param[in,out] Buffer  The pointer to private data buffer.
-**/
-VOID
-EFIAPI
-SyncCpuFlushTlb (
-  IN OUT VOID *Buffer
-  )
-{
-  CpuFlushTlb();
-}
-
-/**
-  Sync memory page attributes for AP.
-
-  @param[in] ProcedureA pointer to the function to be run on 
enabled APs of
-  the system.
-**/
-VOID
-SyncMemoryPageAttributesAp (
-  IN EFI_AP_PROCEDUREProcedure
-  )
-{
-  EFI_STATUSStatus;
-  EFI_MP_SERVICES_PROTOCOL  *MpService;
-
-  Status = gBS->LocateProtocol (
-  ,
-  NULL,
-  (VOID **)
-  );
-  //
-  // Synchronize the update with all APs
-  //
-  if (!EFI_ERROR (Status)) {
-Status = MpService->StartupAllAPs (
-  MpService,  // This
-  Procedure,  // Procedure
-  FALSE,  // SingleThread
-  NULL,   // WaitEvent
-  0,  // TimeoutInMicrosecsond
-  NULL,   // ProcedureArgument
-  NULL// FailedCpuList
-  );
-ASSERT (Status == EFI_SUCCESS || Status == EFI_NOT_STARTED || Status == 
EFI_NOT_READY);
-  }
-}
-
 /**
   Return current paging context.
 
@@ -574,20 +510,6 @@ IsReadOnlyPageWriteProtected (
   return ((AsmReadCr0 () & BIT16) != 0);
 }
 
-/**
-  Disable write protection function for AP.
-
-  @param[in,out] Buffer  The pointer to private data buffer.
-**/
-VOID
-EFIAPI
-SyncCpuDisableWriteProtection (
-  IN OUT VOID *Buffer
-  )
-{
-  AsmWriteCr0 (AsmReadCr0() & ~BIT16);
-}
-
 /**
  Disable Write Protect on pages marked as read-only.
 **/
@@ -835,10 +757,13 @@ AssignMemoryPageAttributes (
   if (!EFI_ERROR(Status)) {
 if ((PagingContext == NULL) && IsModified) {
   //
-  // Flush TLB as last step
+  // Flush TLB as last step.
+  //
+  // Note: Don't flush TLB for APs here. It will take a lot of time to
+  // complete, and then slow down boot performance of the whole system
+  // if page attributes are requested frequently to update.
   //
   CpuFlushTlb();
-  SyncMemoryPageAttributesAp (SyncCpuFlushTlb);
 }
   }
 
-- 
2.15.1.windows.2

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Re: [edk2] [PATCH] CorebootPayloadPkg: Use correct BytesPerScanLine

[You, Benjamin]

Hi Arthur,

> -Original Message-
> From: Arthur Heymans [mailto:art...@aheymans.xyz]
> Sent: Thursday, January 25, 2018 5:03 PM
> To: You, Benjamin 
> Cc: edk2-devel@lists.01.org
> Subject: Re: [edk2] [PATCH] CorebootPayloadPkg: Use correct BytesPerScanLine
> 
> "You, Benjamin"  writes:
> 
> > Hi Arthur,
> >
> > Could you please give more details about your case that
> > HorizontalResolution * (BitsPerPixel / 8) and pFbInfo->BytesPerScanLine
> > don't match?
> >
> 
> On many devices, notably Intel hardware, the STRIDE needs to be 64 byte
> aligned when used in linear memory mode, which coreboot does. STRIDE is
> value that used to determine the line to line increment for the
> display. So what coreboot does when initializing the hardware to align
> (HorizontalResolution * (BitsPerPixel / 8)), 64 bytes up.
> 
> > I did a brief search in Coreboot source and found following comments in
> > coreboot-4.6\src\lib\edid.c:
> >
> >   /* In the case of (e.g.) 24 framebuffer bits per pixel, the convention
> >* nowadays seems to be to round it up to the nearest reasonable
> >* boundary, because otherwise the byte-packing is hideous.
> >
> > So it appears framebuffer BitsPerPixel will likely be 16 or 32, and the
> > following statement in the same file calculates:
> >
> >   edid->x_resolution = edid->bytes_per_line / (fb_bpp / 8);
> >
> > which results in bytes_per_line (already rounded up to be 32 or 64 byte
> > aligned) matching x_resolution * (fb_bpp / 8).
> >
> > There are cases that even if panel bits_per_pixel is 24, the framebuffer
> > bits_per_pixel is still 32, as shown in
> > coreboot-4.6\src\drivers\emulation\qemu\bochs.c:
> >
> >   edid.panel_bits_per_pixel = 24;
> >   edid_set_framebuffer_bits_per_pixel(, 32, 0);
> >
> > It would be good if you could help with more details on how the mismatch
> > happened in your case as I may have missed something.
> >
> 
> So long story short 'bytes_per_line' reflects how the actual hardware is
> set up, while using '(HorizontalResolution * (BitsPerPixel / 8)' is a
> guess which is only sometimes correct.
> 
> To give an example (on which this was actually a problem):
> let's say we have a display 1366 pixel horizontal resolution with 32
> bits per pixel.
> 
> HorizontalResolution * BitsPerPixel / 8 = 5464
> 
> But this value is not 64 byte aligned which the hardware expects so.
> 
> aligned value = ((HorizontalResolution * (BitsPerPixel / 8) + 63) & ~63
> = 5504
>

I noticed in coreboot-4.7\src\include\edid.h, there are following comments:

/* 3 variables needed for coreboot framebuffer.
 * In most cases, they are the same as the ha
 * and va variables, but not always, as in the
 * case of a 1366 wide display.
 */
u32 x_resolution;
u32 y_resolution;
u32 bytes_per_line;

And in coreboot-4.7\src\lib\edid.c:

edid->bytes_per_line = ALIGN_UP(edid->mode.ha *
div_round_up(fb_bpp, 8), row_byte_alignment);
edid->x_resolution = edid->bytes_per_line / (fb_bpp / 8);

Above calculations derive x_resolution from the roundup value of 
bytes_per_line. In case of 1366 display, it would produce a x_resolution of
1376, which is larger than 1366 but satisfies the equation of 
bytes_per_line == (HorizontalResolution * (BitsPerPixel / 8)

It appears this is what Coreboot produces right now. Not sure if there are 
other cases leading to Coreboot producing framebuffer parameters NOT 
satisfying the above equation.

BTW, do you think the above calculation of x_resolution hides the 
information of display and should be fixed?

> So tianocore should use the value coreboot provides it instead of trying
> to compute/guess it.
> 
> > Thanks,
> >
> > - ben
> >
> 
> I hope this clarifies it.
> 
> Arthur
> 
> >> -Original Message-
> >> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of
> >> art...@aheymans.xyz
> >> Sent: Wednesday, January 24, 2018 6:58 PM
> >> To: edk2-devel@lists.01.org
> >> Cc: Arthur Heymans 
> >> Subject: [edk2] [PATCH] CorebootPayloadPkg: Use correct BytesPerScanLine
> >>
> >> From: Arthur Heymans 
> >>
> >> Fetch BytesPerScanLine from coreboot table to reflect how the actual
> >> framebuffer is set up instead of guessing it from the horizontal
> >> resolution.
> >>
> >> This fixes a garbled display when HorizontalResolution * (BitsPerPixel
> >> / 8) and pFbInfo->BytesPerScanLine don't match.
> >>
> >> Contributed-under: TianoCore Contribution Agreement 1.1
> >> Signed-off-by: Arthur Heymans 
> >>
> >> diff --git a/CorebootPayloadPkg/FbGop/FbGop.c
> >> b/CorebootPayloadPkg/FbGop/FbGop.c
> >> index 37d6def7f7..6790617033 100644
> >> --- a/CorebootPayloadPkg/FbGop/FbGop.c
> >> +++ b/CorebootPayloadPkg/FbGop/FbGop.c
> >> @@ -822,7 +822,7 @@ FbGopCheckForVbe (
> >>BitsPerPixel = pFbInfo->BitsPerPixel;
> >>HorizontalResolution = 

[edk2] [PATCH edk2-non-osi v2 7/7] Hisilicon/D05: Update binary of trusted-firmware

[Heyi Guo]

1 Workarounds for CVE-2017-5715 on Cortex A57/A72/A73 and A75 #1214.
2 Upgrade trusted firmware to 1.4

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
Signed-off-by: Heyi Guo 
---
 Platform/Hisilicon/D05/bl1.bin | Bin 14344 -> 12424 bytes
 Platform/Hisilicon/D05/fip.bin | Bin 41493 -> 37546 bytes
 2 files changed, 0 insertions(+), 0 deletions(-)

diff --git a/Platform/Hisilicon/D05/bl1.bin b/Platform/Hisilicon/D05/bl1.bin
index 7341476..b95257c 100644
Binary files a/Platform/Hisilicon/D05/bl1.bin and 
b/Platform/Hisilicon/D05/bl1.bin differ
diff --git a/Platform/Hisilicon/D05/fip.bin b/Platform/Hisilicon/D05/fip.bin
index 496a9b8..5958293 100644
Binary files a/Platform/Hisilicon/D05/fip.bin and 
b/Platform/Hisilicon/D05/fip.bin differ
-- 
1.9.1

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[edk2] [PATCH edk2-non-osi v2 6/7] Hisilicon/D03: Update binary of trusted-firmware

[Heyi Guo]

1 Workarounds for CVE-2017-5715 on Cortex A57/A72/A73 and A75 #1214.
2 Upgrade trusted firmware to 1.4

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
Signed-off-by: Heyi Guo 
---
 Platform/Hisilicon/D03/bl1.bin | Bin 14336 -> 12416 bytes
 Platform/Hisilicon/D03/fip.bin | Bin 62513 -> 66758 bytes
 2 files changed, 0 insertions(+), 0 deletions(-)

diff --git a/Platform/Hisilicon/D03/bl1.bin b/Platform/Hisilicon/D03/bl1.bin
index cdaa743..19ceb9b 100644
Binary files a/Platform/Hisilicon/D03/bl1.bin and 
b/Platform/Hisilicon/D03/bl1.bin differ
diff --git a/Platform/Hisilicon/D03/fip.bin b/Platform/Hisilicon/D03/fip.bin
index ae4ed1a..e91b0da 100644
Binary files a/Platform/Hisilicon/D03/fip.bin and 
b/Platform/Hisilicon/D03/fip.bin differ
-- 
1.9.1

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[edk2] [PATCH edk2-non-osi v2 5/7] Hisilicon D03/D05: Update NativeOhci binary

[Heyi Guo]

Update NativeOhci bianry for changing DmaLib to CoherentDmaLib.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
Signed-off-by: Heyi Guo 
---
 Platform/Hisilicon/D03/Drivers/OhciDxe/NativeOhci.efi | Bin 21664 -> 22336 
bytes
 Platform/Hisilicon/D05/Drivers/OhciDxe/NativeOhci.efi | Bin 23328 -> 22624 
bytes
 2 files changed, 0 insertions(+), 0 deletions(-)

diff --git a/Platform/Hisilicon/D03/Drivers/OhciDxe/NativeOhci.efi 
b/Platform/Hisilicon/D03/Drivers/OhciDxe/NativeOhci.efi
index e1970fd..5472254 100644
Binary files a/Platform/Hisilicon/D03/Drivers/OhciDxe/NativeOhci.efi and 
b/Platform/Hisilicon/D03/Drivers/OhciDxe/NativeOhci.efi differ
diff --git a/Platform/Hisilicon/D05/Drivers/OhciDxe/NativeOhci.efi 
b/Platform/Hisilicon/D05/Drivers/OhciDxe/NativeOhci.efi
index 9e7dd0e..7f0ac10 100644
Binary files a/Platform/Hisilicon/D05/Drivers/OhciDxe/NativeOhci.efi and 
b/Platform/Hisilicon/D05/Drivers/OhciDxe/NativeOhci.efi differ
-- 
1.9.1

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[edk2] [PATCH edk2-non-osi v2 2/7] Hisilicon D0x: Fix network interface order issue

[Heyi Guo]

1. Rebuild SnpPV600Dxe binary for switching DmaLib to CoherentDmaLib.
2. Fixed bug:Confusing Ethernet port sequence.
Move the most right Ethernet port (when looking from the front of the
chassis) to the first one in BootManage for PXE boot.
https://bugs.linaro.org/show_bug.cgi?id=2657

Note:
This patch is related to "Open SnpPlatform source code" and
"Change DmaLib to CoherentDmaLib" in edk2-platform.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jason Zhang 
Signed-off-by: Ming Huang 
Signed-off-by: Heyi Guo 
Reviewed-by: Ard Biesheuvel 
---
 Platform/Hisilicon/D03/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.efi | Bin 26688 -> 
27392 bytes
 Platform/Hisilicon/D05/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.efi | Bin 28544 -> 
27680 bytes
 2 files changed, 0 insertions(+), 0 deletions(-)

diff --git a/Platform/Hisilicon/D03/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.efi 
b/Platform/Hisilicon/D03/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.efi
index 8ce6a6d..bcb3e4f 100644
Binary files a/Platform/Hisilicon/D03/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.efi 
and b/Platform/Hisilicon/D03/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.efi differ
diff --git a/Platform/Hisilicon/D05/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.efi 
b/Platform/Hisilicon/D05/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.efi
index bc7942a..582f645 100644
Binary files a/Platform/Hisilicon/D05/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.efi 
and b/Platform/Hisilicon/D05/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.efi differ
-- 
1.9.1

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[edk2] [PATCH edk2-non-osi v2 3/7] Hisilicon D0x: Delete SnpPlatform

[Heyi Guo]

An open-source version coming to edk2-platforms replaces this version.
This patch is related to "Open SnpPlatform source code" and
"Change DmaLib to CoherentDmaLib".

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
Signed-off-by: Heyi Guo 
Signed-off-by: Jason Zhang 
Reviewed-by: Ard Biesheuvel 
---
 Platform/Hisilicon/D03/Drivers/Net/SnpPlatform/SnpPlatform.efi | Bin 3040 -> 0 
bytes
 Platform/Hisilicon/D03/Drivers/Net/SnpPlatform/SnpPlatform.inf |  24 

 Platform/Hisilicon/D05/Drivers/Net/SnpPlatform/SnpPlatform.efi | Bin 3392 -> 0 
bytes
 Platform/Hisilicon/D05/Drivers/Net/SnpPlatform/SnpPlatform.inf |  24 

 4 files changed, 48 deletions(-)

diff --git a/Platform/Hisilicon/D03/Drivers/Net/SnpPlatform/SnpPlatform.efi 
b/Platform/Hisilicon/D03/Drivers/Net/SnpPlatform/SnpPlatform.efi
deleted file mode 100644
index 5e7d8bd..000
Binary files a/Platform/Hisilicon/D03/Drivers/Net/SnpPlatform/SnpPlatform.efi 
and /dev/null differ
diff --git a/Platform/Hisilicon/D03/Drivers/Net/SnpPlatform/SnpPlatform.inf 
b/Platform/Hisilicon/D03/Drivers/Net/SnpPlatform/SnpPlatform.inf
deleted file mode 100644
index 10b2003..000
--- a/Platform/Hisilicon/D03/Drivers/Net/SnpPlatform/SnpPlatform.inf
+++ /dev/null
@@ -1,24 +0,0 @@
-#/** @file
-#
-#Copyright (c) 2017, Hisilicon Limited. All rights reserved.
-#Copyright (c) 2017, Linaro Limited. All rights reserved.
-#
-#This program and the accompanying materials
-#are licensed and made available under the terms and conditions of the BSD 
License
-#which accompanies this distribution. The full text of the license may be 
found at
-#http://opensource.org/licenses/bsd-license.php
-#
-#THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR 
IMPLIED.
-#
-#**/
-
-[Defines]
-  INF_VERSION= 0x00010019
-  BASE_NAME  = SnpPlatform
-  FILE_GUID  = 102D8FC9-20A4-42EB-AC14-1C98BA5B17A8
-  MODULE_TYPE= DXE_DRIVER
-  VERSION_STRING = 1.0
-
-[Binaries.AARCH64]
-  PE32|SnpPlatform.efi|*
diff --git a/Platform/Hisilicon/D05/Drivers/Net/SnpPlatform/SnpPlatform.efi 
b/Platform/Hisilicon/D05/Drivers/Net/SnpPlatform/SnpPlatform.efi
deleted file mode 100644
index 42c26de..000
Binary files a/Platform/Hisilicon/D05/Drivers/Net/SnpPlatform/SnpPlatform.efi 
and /dev/null differ
diff --git a/Platform/Hisilicon/D05/Drivers/Net/SnpPlatform/SnpPlatform.inf 
b/Platform/Hisilicon/D05/Drivers/Net/SnpPlatform/SnpPlatform.inf
deleted file mode 100644
index 10b2003..000
--- a/Platform/Hisilicon/D05/Drivers/Net/SnpPlatform/SnpPlatform.inf
+++ /dev/null
@@ -1,24 +0,0 @@
-#/** @file
-#
-#Copyright (c) 2017, Hisilicon Limited. All rights reserved.
-#Copyright (c) 2017, Linaro Limited. All rights reserved.
-#
-#This program and the accompanying materials
-#are licensed and made available under the terms and conditions of the BSD 
License
-#which accompanies this distribution. The full text of the license may be 
found at
-#http://opensource.org/licenses/bsd-license.php
-#
-#THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR 
IMPLIED.
-#
-#**/
-
-[Defines]
-  INF_VERSION= 0x00010019
-  BASE_NAME  = SnpPlatform
-  FILE_GUID  = 102D8FC9-20A4-42EB-AC14-1C98BA5B17A8
-  MODULE_TYPE= DXE_DRIVER
-  VERSION_STRING = 1.0
-
-[Binaries.AARCH64]
-  PE32|SnpPlatform.efi|*
-- 
1.9.1

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[edk2] [PATCH edk2-non-osi v2 1/7] Hisilicon D03/D05: Delete SasPlatform

[Heyi Guo]

From: Jason Zhang 

An open-source version coming to edk2-platfroms replaces this version.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jason Zhang 
Signed-off-by: Ming Huang 
Signed-off-by: Heyi Guo 
Reviewed-by: Ard Biesheuvel 
---
 Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.efi | Bin 3040 -> 0 
bytes
 Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.inf |  24 

 Platform/Hisilicon/D05/Drivers/SasPlatform/SasPlatform.efi | Bin 3424 -> 0 
bytes
 Platform/Hisilicon/D05/Drivers/SasPlatform/SasPlatform.inf |  24 

 4 files changed, 48 deletions(-)

diff --git a/Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.efi 
b/Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.efi
deleted file mode 100644
index 4255641..000
Binary files a/Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.efi and 
/dev/null differ
diff --git a/Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.inf 
b/Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.inf
deleted file mode 100644
index 0d747a1..000
--- a/Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.inf
+++ /dev/null
@@ -1,24 +0,0 @@
-#/** @file
-#
-#Copyright (c) 2017, Hisilicon Limited. All rights reserved.
-#Copyright (c) 2017, Linaro Limited. All rights reserved.
-#
-#This program and the accompanying materials
-#are licensed and made available under the terms and conditions of the BSD 
License
-#which accompanies this distribution. The full text of the license may be 
found at
-#http://opensource.org/licenses/bsd-license.php
-#
-#THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR 
IMPLIED.
-#
-#**/
-
-[Defines]
-  INF_VERSION= 0x00010019
-  BASE_NAME  = SasPlatform
-  FILE_GUID  = 102D8FC9-20a4-42EB-aC14-1C98BA5b26A4
-  MODULE_TYPE= DXE_DRIVER
-  VERSION_STRING = 1.0
-
-[Binaries.AARCH64]
-  PE32|SasPlatform.efi|*
diff --git a/Platform/Hisilicon/D05/Drivers/SasPlatform/SasPlatform.efi 
b/Platform/Hisilicon/D05/Drivers/SasPlatform/SasPlatform.efi
deleted file mode 100644
index d2685ab..000
Binary files a/Platform/Hisilicon/D05/Drivers/SasPlatform/SasPlatform.efi and 
/dev/null differ
diff --git a/Platform/Hisilicon/D05/Drivers/SasPlatform/SasPlatform.inf 
b/Platform/Hisilicon/D05/Drivers/SasPlatform/SasPlatform.inf
deleted file mode 100644
index 0d747a1..000
--- a/Platform/Hisilicon/D05/Drivers/SasPlatform/SasPlatform.inf
+++ /dev/null
@@ -1,24 +0,0 @@
-#/** @file
-#
-#Copyright (c) 2017, Hisilicon Limited. All rights reserved.
-#Copyright (c) 2017, Linaro Limited. All rights reserved.
-#
-#This program and the accompanying materials
-#are licensed and made available under the terms and conditions of the BSD 
License
-#which accompanies this distribution. The full text of the license may be 
found at
-#http://opensource.org/licenses/bsd-license.php
-#
-#THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR 
IMPLIED.
-#
-#**/
-
-[Defines]
-  INF_VERSION= 0x00010019
-  BASE_NAME  = SasPlatform
-  FILE_GUID  = 102D8FC9-20a4-42EB-aC14-1C98BA5b26A4
-  MODULE_TYPE= DXE_DRIVER
-  VERSION_STRING = 1.0
-
-[Binaries.AARCH64]
-  PE32|SasPlatform.efi|*
-- 
1.9.1

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[edk2] [PATCH edk2-non-osi v2 4/7] Hisilicon D03/D05: Update SasDriverDxe binary

[Heyi Guo]

Update SasDriverDxe binary for changing DmaLib to CoherentDmaLib.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
Signed-off-by: Heyi Guo 
---
 Platform/Hisilicon/D03/Drivers/Sas/SasDriverDxe.efi | Bin 98112 -> 100224 bytes
 Platform/Hisilicon/D05/Drivers/Sas/SasDriverDxe.efi | Bin 112832 -> 115008 
bytes
 2 files changed, 0 insertions(+), 0 deletions(-)

diff --git a/Platform/Hisilicon/D03/Drivers/Sas/SasDriverDxe.efi 
b/Platform/Hisilicon/D03/Drivers/Sas/SasDriverDxe.efi
index c37b922..6b61504 100644
Binary files a/Platform/Hisilicon/D03/Drivers/Sas/SasDriverDxe.efi and 
b/Platform/Hisilicon/D03/Drivers/Sas/SasDriverDxe.efi differ
diff --git a/Platform/Hisilicon/D05/Drivers/Sas/SasDriverDxe.efi 
b/Platform/Hisilicon/D05/Drivers/Sas/SasDriverDxe.efi
index a57b8e1..b74c23b 100644
Binary files a/Platform/Hisilicon/D05/Drivers/Sas/SasDriverDxe.efi and 
b/Platform/Hisilicon/D05/Drivers/Sas/SasDriverDxe.efi differ
-- 
1.9.1

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[edk2] [PATCH edk2-non-osi v2 0/7] Improve D0x platforms and bug fix

[Heyi Guo]

The major features of this patchset:
1 Upgrade trusted firmware to 1.4
2 Workarounds for CVE-2017-5715 on Cortex A57/A72/A73 and A75 #1214
3 Delete some binary for open-source version
4 Update binary follow changing DmaLib to CoherentDmaLib

Code can also be found in github: 
https://github.com/hisilicon/OpenPlatformPkg.git
branch: rp-1802-osi-v2


Heyi Guo (6):
  Hisilicon D0x: Fix network interface order issue
  Hisilicon D0x: Delete SnpPlatform
  Hisilicon D03/D05: Update SasDriverDxe binary
  Hisilicon D03/D05: Update NativeOhci binary
  Hisilicon/D03: Update binary of trusted-firmware
  Hisilicon/D05: Update binary of trusted-firmware

Jason Zhang (1):
  Hisilicon D03/D05: Delete SasPlatform

 Platform/Hisilicon/D03/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.efi | Bin 26688 -> 
27392 bytes
 Platform/Hisilicon/D03/Drivers/Net/SnpPlatform/SnpPlatform.efi | Bin 3040 -> 0 
bytes
 Platform/Hisilicon/D03/Drivers/Net/SnpPlatform/SnpPlatform.inf |  24 

 Platform/Hisilicon/D03/Drivers/OhciDxe/NativeOhci.efi  | Bin 21664 -> 
22336 bytes
 Platform/Hisilicon/D03/Drivers/Sas/SasDriverDxe.efi| Bin 98112 -> 
100224 bytes
 Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.efi | Bin 3040 -> 0 
bytes
 Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.inf |  24 

 Platform/Hisilicon/D03/bl1.bin | Bin 14336 -> 
12416 bytes
 Platform/Hisilicon/D03/fip.bin | Bin 62513 -> 
66758 bytes
 Platform/Hisilicon/D05/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.efi | Bin 28544 -> 
27680 bytes
 Platform/Hisilicon/D05/Drivers/Net/SnpPlatform/SnpPlatform.efi | Bin 3392 -> 0 
bytes
 Platform/Hisilicon/D05/Drivers/Net/SnpPlatform/SnpPlatform.inf |  24 

 Platform/Hisilicon/D05/Drivers/OhciDxe/NativeOhci.efi  | Bin 23328 -> 
22624 bytes
 Platform/Hisilicon/D05/Drivers/Sas/SasDriverDxe.efi| Bin 112832 -> 
115008 bytes
 Platform/Hisilicon/D05/Drivers/SasPlatform/SasPlatform.efi | Bin 3424 -> 0 
bytes
 Platform/Hisilicon/D05/Drivers/SasPlatform/SasPlatform.inf |  24 

 Platform/Hisilicon/D05/bl1.bin | Bin 14344 -> 
12424 bytes
 Platform/Hisilicon/D05/fip.bin | Bin 41493 -> 
37546 bytes
 18 files changed, 96 deletions(-)
 delete mode 100644 
Platform/Hisilicon/D03/Drivers/Net/SnpPlatform/SnpPlatform.efi
 delete mode 100644 
Platform/Hisilicon/D03/Drivers/Net/SnpPlatform/SnpPlatform.inf
 delete mode 100644 Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.efi
 delete mode 100644 Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.inf
 delete mode 100644 
Platform/Hisilicon/D05/Drivers/Net/SnpPlatform/SnpPlatform.efi
 delete mode 100644 
Platform/Hisilicon/D05/Drivers/Net/SnpPlatform/SnpPlatform.inf
 delete mode 100644 Platform/Hisilicon/D05/Drivers/SasPlatform/SasPlatform.efi
 delete mode 100644 Platform/Hisilicon/D05/Drivers/SasPlatform/SasPlatform.inf

-- 
1.9.1

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[edk2] [PATCH edk2-platforms v2 15/15] Hisilicon D03/D05: Update firmware version to 18.02

[Ming Huang]

Replace the old string with short one. The old one is
too long that can not be show integrallty in Setup nemu.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
Signed-off-by: Heyi Guo 
---
 Platform/Hisilicon/D03/D03.dsc | 2 +-
 Platform/Hisilicon/D05/D05.dsc | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
index 37bec9e..c496306 100644
--- a/Platform/Hisilicon/D03/D03.dsc
+++ b/Platform/Hisilicon/D03/D03.dsc
@@ -168,7 +168,7 @@
   !ifdef $(FIRMWARE_VER)
 gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"$(FIRMWARE_VER)"
   !else
-gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Development 
build base on Hisilicon D03 UEFI 17.10 Release"
+gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Development 
build 18.02 for Hisilicon D03"
   !endif
 
   gHisiTokenSpaceGuid.PcdBiosVersionString|L"10.01.01T18"
diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
index b2ccd0e..0792b08 100644
--- a/Platform/Hisilicon/D05/D05.dsc
+++ b/Platform/Hisilicon/D05/D05.dsc
@@ -187,7 +187,7 @@
   !ifdef $(FIRMWARE_VER)
 gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"$(FIRMWARE_VER)"
   !else
-gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Development 
build base on Hisilicon D05 UEFI 17.10 Release"
+gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Development 
build 18.02 for Hisilicon D05"
   !endif
 
   gHisiTokenSpaceGuid.PcdBiosVersionString|L"10.01.01T18"
-- 
1.9.1

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[edk2] [PATCH edk2-platforms v2 14/15] Hisilicon/D05/ACPI: Add Pcie, HNS and SAS PXM

[Ming Huang]

Add PXM method for Pcie device, HNS device and SAS device.
Add STA method for HNS.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: hensonwang 
Signed-off-by: Ming Huang 
Signed-off-by: Heyi Guo 
---
 Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Hns.asl |  9 ++
 Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl | 34 
++--
 Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl | 19 +--
 3 files changed, 57 insertions(+), 5 deletions(-)

diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Hns.asl 
b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Hns.asl
index 11c28ba..7aa04af 100644
--- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Hns.asl
+++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Hns.asl
@@ -233,6 +233,15 @@ Scope(_SB)
   }
 })
 
+Method (_PXM, 0, NotSerialized)
+{
+  Return(0x00)
+}
+Method (_STA, 0, NotSerialized)
+{
+  Return(0x0F)
+}
+
 //reset XGE port
 //Arg0 : XGE port index in dsaf
 //Arg1 : 0 reset, 1 cancle reset
diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl 
b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl
index 55c7f50..122e4f0 100644
--- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl
+++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl
@@ -141,7 +141,10 @@ Scope(_SB)
 {
   Return (0xf)
 }
-
+Method (_PXM, 0, NotSerialized)
+{
+  Return(0x00)
+}
   } // Device(PCI2)
 
   Device (RES2)
@@ -240,7 +243,10 @@ Scope(_SB)
 {
   Return (RBYV())
 }
-
+Method (_PXM, 0, NotSerialized)
+{
+  Return(0x01)
+}
   } // Device(PCI4)
   Device (RES4)
   {
@@ -338,6 +344,10 @@ Scope(_SB)
 {
   Return (RBYV())
 }
+Method (_PXM, 0, NotSerialized)
+{
+  Return(0x01)
+}
   } // Device(PCI5)
   Device (RES5)
   {
@@ -435,6 +445,10 @@ Scope(_SB)
 {
   Return (RBYV())
 }
+Method (_PXM, 0, NotSerialized)
+{
+  Return(0x01)
+}
   } // Device(PCI6)
   Device (RES6)
   {
@@ -531,6 +545,10 @@ Scope(_SB)
 {
   Return (RBYV())
 }
+Method (_PXM, 0, NotSerialized)
+{
+  Return(0x01)
+}
   } // Device(PCI7)
   Device (RES7)
   {
@@ -690,6 +708,10 @@ Scope(_SB)
 {
   Return (0xf)
 }
+Method (_PXM, 0, NotSerialized)
+{
+  Return(0x02)
+}
   } // Device(PCIa)
   Device (RESa)
   {
@@ -810,6 +832,10 @@ Scope(_SB)
 {
   Return (RBYV())
 }
+Method (_PXM, 0, NotSerialized)
+{
+  Return(0x03)
+}
   } // Device(PCIc)
 
   Device (RESc)
@@ -907,6 +933,10 @@ Scope(_SB)
 {
   Return (RBYV())
 }
+Method (_PXM, 0, NotSerialized)
+{
+  Return(0x03)
+}
   } // Device(PCId)
   Device (RESd)
   {
diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl 
b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl
index 6455130..d5b7e2f 100644
--- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl
+++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl
@@ -88,7 +88,10 @@ Scope(_SB)
   Store(0x7, CLK)
   Sleep(1)
 }
-
+Method (_PXM, 0, NotSerialized)
+{
+  Return(0x00)
+}
Method (_STA, 0, NotSerialized)
{
  Return (0x0)
@@ -169,8 +172,15 @@ Scope(_SB)
   Store(0x7, CLK)
   Sleep(1)
 }
+Method (_PXM, 0, NotSerialized)
+{
+  Return(0x00)
+}
+Method (_STA, 0, NotSerialized)
+{
+  Return(0x0F)
+}
   }
-
   Device(SAS2) {
 Name(_HID, "HISI0162")
 Name(_CCA, 1)
@@ -244,7 +254,10 @@ Scope(_SB)
   Store(0x7, CLK)
   Sleep(1)
 }
-
+Method (_PXM, 0, NotSerialized)
+{
+  Return(0x00)
+}
Method (_STA, 0, NotSerialized)
{
  Return (0x0)
-- 
1.9.1

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[edk2] [PATCH edk2-platforms v2 12/15] Hisilicon/D03: Replace SP805Watchdog by WatchdogTimer driver.

[Ming Huang]

In SCT test,we find SP805 watchdog driver can't reset when timeout
so we use another driver in MdeModulePkg.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
Signed-off-by: Heyi Guo 
Signed-off-by: GongChengYa 
---
 Platform/Hisilicon/D03/D03.dsc | 2 +-
 Platform/Hisilicon/D03/D03.fdf | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
index 947a8a5..37bec9e 100644
--- a/Platform/Hisilicon/D03/D03.dsc
+++ b/Platform/Hisilicon/D03/D03.dsc
@@ -374,7 +374,7 @@
 
   ArmPkg/Drivers/TimerDxe/TimerDxe.inf
 
-  ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
+  MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
   
IntelFrameworkModulePkg/Universal/StatusCode/RuntimeDxe/StatusCodeRuntimeDxe.inf
   #
   #ACPI
diff --git a/Platform/Hisilicon/D03/D03.fdf b/Platform/Hisilicon/D03/D03.fdf
index 1c55761..e6a4820 100644
--- a/Platform/Hisilicon/D03/D03.fdf
+++ b/Platform/Hisilicon/D03/D03.fdf
@@ -189,7 +189,7 @@ READ_LOCK_STATUS   = TRUE
   INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
   INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
 
-  INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
+  INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
 
   #
   # FAT filesystem + GPT/MBR partitioning
-- 
1.9.1

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[edk2] [PATCH edk2-platforms v2 11/15] Hisilicon/D05: Replace SP805Watchdog by WatchdogTimer driver.

[Ming Huang]

In SCT test,we find SP805 watchdog driver can't reset when timeout
so we use another driver in MdeModulePkg.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
Signed-off-by: Heyi Guo 
Signed-off-by: GongChengYa 
---
 Platform/Hisilicon/D05/D05.dsc | 2 +-
 Platform/Hisilicon/D05/D05.fdf | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
index dfe19b0..b2ccd0e 100644
--- a/Platform/Hisilicon/D05/D05.dsc
+++ b/Platform/Hisilicon/D05/D05.dsc
@@ -511,7 +511,7 @@
 
   ArmPkg/Drivers/TimerDxe/TimerDxe.inf
 
-  ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
+  MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
   
IntelFrameworkModulePkg/Universal/StatusCode/RuntimeDxe/StatusCodeRuntimeDxe.inf
   #
   #ACPI
diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf
index e829494..22609bb 100644
--- a/Platform/Hisilicon/D05/D05.fdf
+++ b/Platform/Hisilicon/D05/D05.fdf
@@ -193,7 +193,7 @@ READ_LOCK_STATUS   = TRUE
   INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
   INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
 
-  INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
+  INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
 
   #
   # FAT filesystem + GPT/MBR partitioning
-- 
1.9.1

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[edk2] [PATCH edk2-platforms v2 13/15] Hisilicon/D05/ACPI: Add ITS PXM

[Ming Huang]

Add ITS affinity structure in SRAT.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
Signed-off-by: Heyi Guo 
---
 Silicon/Hisilicon/Hi1616/D05AcpiTables/D05Srat.aslc | 10 ++
 Silicon/Hisilicon/Include/Library/AcpiNextLib.h | 10 +-
 2 files changed, 19 insertions(+), 1 deletion(-)

diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/D05Srat.aslc 
b/Silicon/Hisilicon/Hi1616/D05AcpiTables/D05Srat.aslc
index b448a29..8ea0c4b 100644
--- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/D05Srat.aslc
+++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/D05Srat.aslc
@@ -121,6 +121,16 @@ EFI_ACPI_STATIC_RESOURCE_AFFINITY_TABLE Srat = {
 
EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x0003,0x003E,0x0001,0x),
   //GICC Affinity Processor 62
 
EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x0003,0x003F,0x0001,0x)
//GICC Affinity Processor 63
   },
+  {
+EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(0x, 0x),
+EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(0x0001, 0x0001),
+EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(0x, 0x0002),
+EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(0x0001, 0x0003),
+EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(0x0002, 0x0004),
+EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(0x0003, 0x0005),
+EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(0x0002, 0x0006),
+EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(0x0003, 0x0007)
+  },
 };
 
 //
diff --git a/Silicon/Hisilicon/Include/Library/AcpiNextLib.h 
b/Silicon/Hisilicon/Include/Library/AcpiNextLib.h
index 60f9925..fd05a3b 100644
--- a/Silicon/Hisilicon/Include/Library/AcpiNextLib.h
+++ b/Silicon/Hisilicon/Include/Library/AcpiNextLib.h
@@ -39,6 +39,13 @@
  ACPIProcessorUID,  Flags,  ClockDomain
 \
   }
 
+#define EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(  
 \
+ProximityDomain, ItsId)
 \
+  {
 \
+4, sizeof (EFI_ACPI_6_2_GIC_ITS_AFFINITY_STRUCTURE), ProximityDomain,  
 \
+{EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE}, ItsId
   \
+  }
+
 #define EFI_ACPI_6_1_MEMORY_AFFINITY_STRUCTURE_INIT(   
   \
 ProximityDomain, AddressBaseLow, AddressBaseHigh, LengthLow, LengthHigh, 
Flags)   \
   {
   \
@@ -70,12 +77,13 @@
 //
 #define EFI_ACPI_PROCESSOR_LOCAL_GICC_AFFINITY_STRUCTURE_COUNT  64
 #define EFI_ACPI_MEMORY_AFFINITY_STRUCTURE_COUNT10
-
+#define EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_COUNT   8
 
 typedef struct {
   EFI_ACPI_6_0_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER  Header;
   EFI_ACPI_6_0_MEMORY_AFFINITY_STRUCTURE  
Memory[EFI_ACPI_MEMORY_AFFINITY_STRUCTURE_COUNT];
   EFI_ACPI_6_0_GICC_AFFINITY_STRUCTURE
Gicc[EFI_ACPI_PROCESSOR_LOCAL_GICC_AFFINITY_STRUCTURE_COUNT];
+  EFI_ACPI_6_2_GIC_ITS_AFFINITY_STRUCTURE 
Its[EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_COUNT];
 } EFI_ACPI_STATIC_RESOURCE_AFFINITY_TABLE;
 
 #pragma pack()
-- 
1.9.1

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[edk2] [PATCH edk2-platforms v2 10/15] Hisilicon/PCIe: Disable PCIe ASPM

[Ming Huang]

From: Yan Zhang 

In order to replace command line parameter pcie_aspm=off, BIOS needs to
disable Pcie Aspm support during Pcie initilization.
D03 and D05 do not support PCIe ASPM, so we disable it in BIOS.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
Signed-off-by: Heyi Guo 
Signed-off-by: Yan Zhang 
---
 Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.c | 103 

 Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.h |   2 +
 Silicon/Hisilicon/Include/Regs/HisiPcieV1RegOffset.h|   2 +
 3 files changed, 107 insertions(+)

diff --git a/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.c 
b/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.c
index f420c91..c1c3fbb 100644
--- a/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.c
+++ b/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.c
@@ -1033,6 +1033,106 @@ DisableRcOptionRom (
   return;
 }
 
+STATIC
+VOID
+PcieDbiCs2Enable (
+  IN UINT32 HostBridgeNum,
+  IN UINT32 Port,
+  IN BOOLEAN Val
+  )
+{
+  UINT32 RegVal;
+
+  RegRead (
+PCIE_APB_SLAVE_BASE_1610[HostBridgeNum][Port] + 
PCIE_SUBCTRL_SC_PCIE_SYS_CTRL21,
+RegVal
+);
+  if (Val) {
+RegVal = RegVal | BIT2;
+/* BIT2: DBI Chip Select indicator. 0 indicates CS, 1 indicates CS2.*/
+  } else {
+RegVal = RegVal & (~BIT2);
+  }
+  RegWrite (
+PCIE_APB_SLAVE_BASE_1610[HostBridgeNum][Port] + 
PCIE_SUBCTRL_SC_PCIE_SYS_CTRL21,
+RegVal
+);
+}
+
+STATIC
+BOOLEAN
+PcieDBIReadOnlyWriteEnable (
+  IN UINT32 HostBridgeNum,
+  IN UINT32 Port
+  )
+{
+  UINT32  Val;
+
+  RegRead (
+PCIE_APB_SLAVE_BASE_1610[HostBridgeNum][Port] + 
PCIE_DBI_READ_ONLY_WRITE_ENABLE,
+Val
+);
+  if (Val == 0x1) {
+return TRUE;
+  } else {
+RegWrite (
+  PCIE_APB_SLAVE_BASE_1610[HostBridgeNum][Port] + 
PCIE_DBI_READ_ONLY_WRITE_ENABLE,
+  0x1
+  );
+/* Delay 10us to make sure the PCIE device have enouph time to response. */
+MicroSecondDelay(10);
+RegRead (
+  PCIE_APB_SLAVE_BASE_1610[HostBridgeNum][Port] + 
PCIE_DBI_READ_ONLY_WRITE_ENABLE,
+  Val
+  );
+if (Val == 0x1) {
+  return TRUE;
+}
+  }
+  DEBUG ((DEBUG_ERROR,"PcieDBIReadOnlyWriteEnable Fail!!!\n"));
+  return FALSE;
+}
+
+STATIC
+VOID
+SwitchPcieASPMSupport (
+  IN UINT32 HostBridgeNum,
+  IN UINT32 Port,
+  IN UINT8 Val
+  )
+{
+  PCIE_EP_PCIE_CAP3_U PcieCap3;
+
+  if (Port >= PCIE_MAX_ROOTBRIDGE) {
+DEBUG ((DEBUG_ERROR, "Port is not valid\n"));
+return;
+  }
+  if (!PcieDBIReadOnlyWriteEnable (HostBridgeNum, Port)) {
+DEBUG ((DEBUG_INFO, "PcieDBI ReadOnly Reg do not Enable!!!\n"));
+return;
+  }
+  PcieDbiCs2Enable (HostBridgeNum, Port, FALSE);
+
+  RegRead (
+PCIE_APB_SLAVE_BASE_1610[HostBridgeNum][Port] + PCIE_EP_PCIE_CAP3_REG,
+PcieCap3.UInt32
+);
+  PcieCap3.Bits.active_state_power_management = Val;
+  RegWrite (
+PCIE_APB_SLAVE_BASE_1610[HostBridgeNum][Port] + PCIE_EP_PCIE_CAP3_REG,
+PcieCap3.UInt32
+);
+  RegRead (
+PCIE_APB_SLAVE_BASE_1610[HostBridgeNum][Port] + PCIE_EP_PCIE_CAP3_REG,
+PcieCap3.UInt32
+);
+  DEBUG ((DEBUG_INFO,
+  "ASPI active state power management: %d\n",
+  PcieCap3.Bits.active_state_power_management));
+
+  PcieDbiCs2Enable (HostBridgeNum, Port, TRUE);
+}
+
 EFI_STATUS
 EFIAPI
 PciePortInit (
@@ -1090,6 +1190,9 @@ PciePortInit (
  /* disable link up interrupt */
  (VOID)PcieMaskLinkUpInit(soctype, HostBridgeNum, PortIndex);
 
+ /* disable ASPM */
+ SwitchPcieASPMSupport (HostBridgeNum, PortIndex, PCIE_ASPM_DISABLE);
+
  /* Pcie Equalization*/
  (VOID)PcieEqualization(soctype ,HostBridgeNum, PortIndex);
 
diff --git a/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.h 
b/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.h
index 9a0f636..e96c53c 100644
--- a/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.h
+++ b/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.h
@@ -77,6 +77,8 @@
 #define RegWrite(addr,data)MmioWrite32((addr), (data))
 #define RegRead(addr,data) ((data) = MmioRead32 (addr))
 
+#define PCIE_ASPM_DISABLE 0x0
+#define PCIE_ASPM_ENABLE 0x1
 
 typedef struct tagPcieDebugInfo
 {
diff --git a/Silicon/Hisilicon/Include/Regs/HisiPcieV1RegOffset.h 
b/Silicon/Hisilicon/Include/Regs/HisiPcieV1RegOffset.h
index bf57652..c8b9781 100644
--- a/Silicon/Hisilicon/Include/Regs/HisiPcieV1RegOffset.h
+++ b/Silicon/Hisilicon/Include/Regs/HisiPcieV1RegOffset.h
@@ -135,6 +135,7 @@
 #define PCIE_EEP_PORTLOGIC53_REG  (0x888)
 #define PCIE_EEP_GEN3_CONTRL_REG  (0x890)
 #define PCIE_EEP_PIPE_LOOPBACK_REG(0x8B8)
+#define PCIE_DBI_READ_ONLY_WRITE_ENABLE   (0x8BC)
 #define PCIE_EEP_PORTLOGIC54_REG  (0x900)
 #define PCIE_EEP_PORTLOGIC55_REG   

[edk2] [PATCH edk2-platforms v2 09/15] Hisilicon/Smbios: Indicate use of ProcessorFamily2 in type 4 table

[Ming Huang]

modify processorFamily of type 4 to ProcessorFamilyIndicatorFamily2,
indicator to obtain the processor family from the Processor Family 2 field.
ProcessorFamily2 is already specified as ProcessorFamilyARM in the existing
table.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
Signed-off-by: Heyi Guo 
---
 Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c | 4 
++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git 
a/Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c 
b/Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c
index 61473e8..c9903ba 100644
--- a/Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c
+++ b/Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c
@@ -125,7 +125,7 @@ SMBIOS_TABLE_TYPE4   mSmbiosProcessorTable[] = {
 },
 1,  //Socket
 CentralProcessor,   //ProcessorType
-ProcessorFamilyOther,   //ProcessorFamily
+ProcessorFamilyIndicatorFamily2,//ProcessorFamily
 2,  //ProcessorManufacture
 {   //ProcessorId
 {   //Signature
@@ -172,7 +172,7 @@ SMBIOS_TABLE_TYPE4   mSmbiosProcessorTable[] = {
 },
 1,  //Socket
 CentralProcessor,   //ProcessorType
-ProcessorFamilyOther,   //ProcessorFamily
+ProcessorFamilyIndicatorFamily2,//ProcessorFamily
 2,  //ProcessorManufacture
 {   //ProcessorId
 {   //Signature
-- 
1.9.1

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[edk2] [PATCH edk2-platforms v2 07/15] Hisilicon D03/D05: Open SnpPlatform source code

[Ming Huang]

From: Jason Zhang 

1. This driver install a protocol for SnpPV600Dxe driver.
   The protocol indicate which ethernet port to use and port sequence.
2. Fixed bug:Confusing Ethernet port sequence.
   Move the most right Ethernet port (when looking from the front
   of the chassis) to the first one in BootManage for PXE boot.
   https://bugs.linaro.org/show_bug.cgi?id=2657

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jason Zhang 
Signed-off-by: Ming Huang 
Signed-off-by: Heyi Guo 
---
 Platform/Hisilicon/D03/D03.dsc   |   2 +
 Platform/Hisilicon/D03/D03.fdf   |   2 +-
 Platform/Hisilicon/D05/D05.dsc   |   2 +
 Platform/Hisilicon/D05/D05.fdf   |   2 +-
 Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.c  | 115 

 Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf|  46 
 Silicon/Hisilicon/HisiPkg.dec|   1 +
 Silicon/Hisilicon/Include/Protocol/SnpPlatformProtocol.h |  32 ++
 8 files changed, 200 insertions(+), 2 deletions(-)

diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
index 07da597..947a8a5 100644
--- a/Platform/Hisilicon/D03/D03.dsc
+++ b/Platform/Hisilicon/D03/D03.dsc
@@ -399,6 +399,8 @@
 
   Platform/Hisilicon/D03/Drivers/Ipmi/ipmiInterfaceDxe/IpmiInterfaceDxe.inf
 
+  Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf
+
   MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
   MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
   MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
diff --git a/Platform/Hisilicon/D03/D03.fdf b/Platform/Hisilicon/D03/D03.fdf
index 919f9d7..1c55761 100644
--- a/Platform/Hisilicon/D03/D03.fdf
+++ b/Platform/Hisilicon/D03/D03.fdf
@@ -242,7 +242,7 @@ READ_LOCK_STATUS   = TRUE
   #Network
   #
 
-  INF Platform/Hisilicon/D03/Drivers/Net/SnpPlatform/SnpPlatform.inf
+  INF Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf
   INF Platform/Hisilicon/D03/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.inf
 
   INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
index b279c9e..6e44041 100644
--- a/Platform/Hisilicon/D05/D05.dsc
+++ b/Platform/Hisilicon/D05/D05.dsc
@@ -537,6 +537,8 @@
 
   Platform/Hisilicon/D05/Drivers/Ipmi/IpmiInterfaceDxe/IpmiInterfaceDxe.inf
 
+  Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf
+
   MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
   MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
   MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf
index b105ee2..e829494 100644
--- a/Platform/Hisilicon/D05/D05.fdf
+++ b/Platform/Hisilicon/D05/D05.fdf
@@ -248,7 +248,7 @@ READ_LOCK_STATUS   = TRUE
   #Network
   #
 
-  INF Platform/Hisilicon/D05/Drivers/Net/SnpPlatform/SnpPlatform.inf
+  INF Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf
   INF Platform/Hisilicon/D05/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.inf
 
   INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
diff --git a/Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.c 
b/Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.c
new file mode 100644
index 000..0d6e86e
--- /dev/null
+++ b/Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.c
@@ -0,0 +1,115 @@
+/** @file
+*
+*  Copyright (c) 2017, Hisilicon Limited. All rights reserved.
+*  Copyright (c) 2017, Linaro Limited. All rights reserved.
+*
+*  This program and the accompanying materials
+*  are licensed and made available under the terms and conditions of the BSD 
License
+*  which accompanies this distribution.  The full text of the license may be 
found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR 
IMPLIED.
+*
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+typedef struct {
+  UINTN  Signature;
+  EFI_HANDLE Handle;
+  HISI_PLATFORM_SNP_PROTOCOL SnpPlatformProtocol;
+} SNP_PLATFORM_INSTANCE;
+
+STATIC HISI_PLATFORM_SNP_PROTOCOL mSnpPlatformProtocol[] = {
+  {
+4,
+1
+  },
+  {
+5,
+1
+  },
+  {
+2,
+0
+  },
+  {
+3,
+0
+  },
+  {
+0,
+1
+  },
+ {
+1,
+1
+  },
+  {
+6,
+0
+  },
+  {
+7,
+0
+  }
+};
+
+
+EFI_STATUS
+EFIAPI
+SnpPlatformInitialize (
+  IN EFI_HANDLE ImageHandle,
+  IN EFI_SYSTEM_TABLE   *SystemTable
+  )
+{
+  UINTNLoop;
+  SNP_PLATFORM_INSTANCE*PrivateData;
+  EFI_STATUS   Status;
+
+  for (Loop = 0; Loop < ARRAY_SIZE (mSnpPlatformProtocol); Loop++) {
+

[edk2] [PATCH edk2-platforms v2 08/15] Hilisicon: Change DmaLib to CoherentDmaLib

[Ming Huang]

Unify all D0x(include D06 in further) to cache coherent DmaLib.
This can improve boot speed.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Wang Yue 
Signed-off-by: Ming Huang 
Signed-off-by: Heyi Guo 
---
 Platform/Hisilicon/D05/D05.dsc| 2 +-
 Silicon/Hisilicon/Drivers/VirtualEhciPciIo/VirtualEhciPciIo.c | 2 +-
 Silicon/Hisilicon/Hi1610/Drivers/IoInitDxe/IoInitDxe.c| 3 +--
 3 files changed, 3 insertions(+), 4 deletions(-)

diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
index 6e44041..dfe19b0 100644
--- a/Platform/Hisilicon/D05/D05.dsc
+++ b/Platform/Hisilicon/D05/D05.dsc
@@ -614,7 +614,7 @@
   Platform/Hisilicon/D03/Drivers/PciPlatform/PciPlatform.inf
   Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridgeDxe.inf {
 
-  DmaLib|EmbeddedPkg/Library/NonCoherentDmaLib/NonCoherentDmaLib.inf
+  DmaLib|EmbeddedPkg/Library/CoherentDmaLib/CoherentDmaLib.inf
   NULL|Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.inf
   }
 
diff --git a/Silicon/Hisilicon/Drivers/VirtualEhciPciIo/VirtualEhciPciIo.c 
b/Silicon/Hisilicon/Drivers/VirtualEhciPciIo/VirtualEhciPciIo.c
index 706eb12..63de50b 100644
--- a/Silicon/Hisilicon/Drivers/VirtualEhciPciIo/VirtualEhciPciIo.c
+++ b/Silicon/Hisilicon/Drivers/VirtualEhciPciIo/VirtualEhciPciIo.c
@@ -26,7 +26,7 @@ EhciVirtualPciIoInitialize (
 {
   return RegisterNonDiscoverableMmioDevice (
NonDiscoverableDeviceTypeEhci,
-   NonDiscoverableDeviceDmaTypeNonCoherent,
+   NonDiscoverableDeviceDmaTypeCoherent,
NULL,
NULL,
1,
diff --git a/Silicon/Hisilicon/Hi1610/Drivers/IoInitDxe/IoInitDxe.c 
b/Silicon/Hisilicon/Hi1610/Drivers/IoInitDxe/IoInitDxe.c
index 2310ee4..3e272f8 100644
--- a/Silicon/Hisilicon/Hi1610/Drivers/IoInitDxe/IoInitDxe.c
+++ b/Silicon/Hisilicon/Hi1610/Drivers/IoInitDxe/IoInitDxe.c
@@ -27,7 +27,6 @@ ExitBootServicesEventSmmu (
   IN VOID   *Context
   )
 {
-  SmmuConfigForOS ();
   DEBUG((EFI_D_INFO,"SMMU ExitBootServicesEvent\n"));
 }
 
@@ -43,7 +42,7 @@ IoInitDxeEntry (
 
   (VOID) EfiSerdesInitWrap ();
 
-  SmmuConfigForBios ();
+  SmmuConfigForOS ();
 
   Status = gBS->CreateEvent (
   EVT_SIGNAL_EXIT_BOOT_SERVICES,
-- 
1.9.1

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[edk2] [PATCH edk2-platforms v2 01/15] Hisilicon/D05: Move Madt definition to head file

[Ming Huang]

Move definition of Madt struct to head file, so PPTT driver
can include it.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
Signed-off-by: Heyi Guo 
---
 Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h | 30 
+++-
 Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc  | 23 +--
 2 files changed, 30 insertions(+), 23 deletions(-)

diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h 
b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h
index 808219a..ad73aa2 100644
--- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h
+++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h
@@ -1,7 +1,7 @@
 /** @file
 *
 *  Copyright (c) 2011-2015, ARM Limited. All rights reserved.
-*  Copyright (c) 2015-2016, Hisilicon Limited. All rights reserved.
+*  Copyright (c) 2015-2018, Hisilicon Limited. All rights reserved.
 *  Copyright (c) 2015-2016, Linaro Limited. All rights reserved.
 *
 *  This program and the accompanying materials
@@ -20,6 +20,8 @@
 #ifndef _HI1610_PLATFORM_H_
 #define _HI1610_PLATFORM_H_
 
+#include 
+
 //
 // ACPI table information used to initialize tables.
 //
@@ -44,5 +46,31 @@
   }
 
 #define HI1616_WATCHDOG_COUNT  2
+#define HI1616_GIC_STRUCTURE_COUNT  64
+
+#define HI1616_MPID_TA_BASE  0x1
+#define HI1616_MPID_TB_BASE  0x3
+#define HI1616_MPID_TA_2_BASE  0x5
+#define HI1616_MPID_TB_2_BASE  0x7
+
+// Differs from Juno, we have another affinity level beyond cluster and core
+#define PLATFORM_GET_MPID_TA(ClusterId, CoreId)   (HI1616_MPID_TA_BASE | 
((ClusterId) << 8) | (CoreId))
+#define PLATFORM_GET_MPID_TB(ClusterId, CoreId)   (HI1616_MPID_TB_BASE | 
((ClusterId) << 8) | (CoreId))
+#define PLATFORM_GET_MPID_TA_2(ClusterId, CoreId)   (HI1616_MPID_TA_2_BASE | 
((ClusterId) << 8) | (CoreId))
+#define PLATFORM_GET_MPID_TB_2(ClusterId, CoreId)   (HI1616_MPID_TB_2_BASE | 
((ClusterId) << 8) | (CoreId))
+
+//
+// Multiple APIC Description Table
+//
+#pragma pack (1)
+
+typedef struct {
+  EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER   Header;
+  EFI_ACPI_6_1_GIC_STRUCTURE
GicInterfaces[HI1616_GIC_STRUCTURE_COUNT];
+  EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTUREGicDistributor;
+  EFI_ACPI_6_1_GIC_ITS_STRUCTUREGicITS[8];
+} EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE;
+
+#pragma pack ()
 
 #endif
diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc 
b/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc
index 169ee72..54605a6 100644
--- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc
+++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc
@@ -2,7 +2,7 @@
 *  Multiple APIC Description Table (MADT)
 *
 *  Copyright (c) 2012 - 2014, ARM Limited. All rights reserved.
-*  Copyright (c) 2015 - 2016, Hisilicon Limited. All rights reserved.
+*  Copyright (c) 2015 - 2018, Hisilicon Limited. All rights reserved.
 *  Copyright (c) 2015 - 2016, Linaro Limited. All rights reserved.
 *
 *  This program and the accompanying materials
@@ -27,27 +27,6 @@
 #include 
 #include "Hi1616Platform.h"
 
-// Differs from Juno, we have another affinity level beyond cluster and core
-// 0x2 is only for socket 0
-#define PLATFORM_GET_MPID_TA(ClusterId, CoreId)   (0x1 | ((ClusterId) << 
8) | (CoreId))
-#define PLATFORM_GET_MPID_TB(ClusterId, CoreId)   (0x3 | ((ClusterId) << 
8) | (CoreId))
-#define PLATFORM_GET_MPID_TA_2(ClusterId, CoreId)   (0x5 | ((ClusterId) << 
8) | (CoreId))
-#define PLATFORM_GET_MPID_TB_2(ClusterId, CoreId)   (0x7 | ((ClusterId) << 
8) | (CoreId))
-
-//
-// Multiple APIC Description Table
-//
-#pragma pack (1)
-
-typedef struct {
-  EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER   Header;
-  EFI_ACPI_6_1_GIC_STRUCTUREGicInterfaces[64];
-  EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTUREGicDistributor;
-  EFI_ACPI_6_1_GIC_ITS_STRUCTURE  GicITS[8];
-} EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE;
-
-#pragma pack ()
-
 EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
   {
 ARM_ACPI_HEADER (
-- 
1.9.1

___
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[edk2] [PATCH edk2-platforms v2 05/15] Hisilicon D03/D05: Add capsule upgrade support

[Ming Huang]

From: Jason Zhang 

This module support updating the boot CPU firmware only.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jason Zhang 
Signed-off-by: Ming Huang 
Signed-off-by: Heyi Guo 
---
 
Platform/Hisilicon/D03/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini
 |  45 +++
 Platform/Hisilicon/D03/D03.dsc 
  |  17 ++-
 Platform/Hisilicon/D03/D03.fdf 
  |  70 +++
 
Platform/Hisilicon/D03/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc
|  81 +
 
Platform/Hisilicon/D03/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
 |  50 
 
Platform/Hisilicon/D03/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptorPei.c
|  70 +++
 
Platform/Hisilicon/D05/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini
 |  45 +++
 Platform/Hisilicon/D05/D05.dsc 
  |  19 ++-
 Platform/Hisilicon/D05/D05.fdf 
  |  70 +++
 
Platform/Hisilicon/D05/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc
|  81 +
 
Platform/Hisilicon/D05/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
 |  50 
 
Platform/Hisilicon/D05/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptorPei.c
|  70 +++
 Silicon/Hisilicon/Hisilicon.dsc.inc
  |  11 +-
 Silicon/Hisilicon/Hisilicon.fdf.inc
  |   9 ++
 Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.c   
  | 123 
 Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.inf 
  |  51 
 16 files changed, 859 insertions(+), 3 deletions(-)

diff --git 
a/Platform/Hisilicon/D03/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini
 
b/Platform/Hisilicon/D03/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini
new file mode 100644
index 000..fc834d9
--- /dev/null
+++ 
b/Platform/Hisilicon/D03/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini
@@ -0,0 +1,45 @@
+#
+#  Copyright (c) 2018, Hisilicon Limited. All rights reserved.
+#  Copyright (c) 2018, Linaro Limited. All rights reserved.
+#  Copyright (c) 2016, Intel Corporation. All rights reserved.
+#
+#  This program and the accompanying materials
+#  are licensed and made available under the terms and conditions of the BSD 
License
+#  which accompanies this distribution.  The full text of the license may be 
found at
+#  http://opensource.org/licenses/bsd-license.php
+#
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR 
IMPLIED.
+#
+##
+
+[Head]
+NumOfUpdate = 3
+NumOfRecovery = 0
+Update0 = SysFvMain
+Update1 = SysCustom
+Update2 = SysNvRam
+
+[SysFvMain]
+FirmwareType  = 0 # 0 - SystemFirmware, 1 - NvRam
+AddressType   = 0 # 0 - relative address, 1 - absolute address.
+BaseAddress   = 0x# Base address offset on flash
+Length= 0x002D# Length
+ImageOffset   = 0x# Image offset of this SystemFirmware image
+FileGuid  = 642e4fcf-2df7-4415-8b70-a03909c57b55  # 
PcdEdkiiSystemFirmwareFileGuid
+
+[SysCustom]
+FirmwareType  = 0 # 0 - SystemFirmware, 1 - NvRam
+AddressType   = 0 # 0 - relative address, 1 - absolute address.
+BaseAddress   = 0x002F# Base address offset on flash
+Length= 0x0001# Length
+ImageOffset   = 0x002F# Image offset of this SystemFirmware image
+FileGuid  = 642e4fcf-2df7-4415-8b70-a03909c57b55  # 
PcdEdkiiSystemFirmwareFileGuid
+
+[SysNvRam]
+FirmwareType  = 1 # 0 - SystemFirmware, 1 - NvRam
+AddressType   = 0 # 0 - relative address, 1 - absolute address.
+BaseAddress   = 0x002D# Base address offset on flash
+Length= 0x0002# Length
+ImageOffset   = 0x002D# Image offset of this SystemFirmware image
+FileGuid  = 642e4fcf-2df7-4415-8b70-a03909c57b55  # 
PcdEdkiiSystemFirmwareFileGuid
diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
index e1e3b14..82c8bb4 100644
--- a/Platform/Hisilicon/D03/D03.dsc
+++ b/Platform/Hisilicon/D03/D03.dsc
@@ -65,7 +65,6 @@
   
OemAddressMapLib|Platform/Hisilicon/D03/Library/OemAddressMap2P/OemAddressMap2PHi1610.inf
   
PlatformSysCtrlLib|Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.inf
 
-  CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
   

[edk2] [PATCH edk2-platforms v2 04/15] Hisilicon/D0x: Break BMC SetBoot option out into separate library

[Ming Huang]

Modify the feature of BMC set boot option as switching generic
BDS. Break BMC SetBoot option out into BmcConfigBootLib.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
Signed-off-by: Heyi Guo 
---
 Platform/Hisilicon/D03/D03.dsc  |  
 1 +
 Platform/Hisilicon/D05/D05.dsc  |  
 1 +
 Silicon/Hisilicon/HisiPkg.dec   |  
 1 +
 Silicon/Hisilicon/Include/Library/BmcConfigBootLib.h|  
31 ++
 Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.c   | 
466 
 Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf |  
51 +++
 Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c   |  
 7 +
 Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf |  
 1 +
 8 files changed, 559 insertions(+)

diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
index 5fbe1f9..e1e3b14 100644
--- a/Platform/Hisilicon/D03/D03.dsc
+++ b/Platform/Hisilicon/D03/D03.dsc
@@ -68,6 +68,7 @@
   CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
   GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf
   
PlatformBdsLib|Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf
+  
BmcConfigBootLib|Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf
   
UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf
   BootLogoLib|MdeModulePkg/Library/BootLogoLib/BootLogoLib.inf
   SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf
diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
index 4d630da..ac7da04 100644
--- a/Platform/Hisilicon/D05/D05.dsc
+++ b/Platform/Hisilicon/D05/D05.dsc
@@ -84,6 +84,7 @@
   CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
   GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf
   
PlatformBdsLib|Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf
+  
BmcConfigBootLib|Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf
   
UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf
   SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf
   
ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
diff --git a/Silicon/Hisilicon/HisiPkg.dec b/Silicon/Hisilicon/HisiPkg.dec
index 398d0a7..889a181 100644
--- a/Silicon/Hisilicon/HisiPkg.dec
+++ b/Silicon/Hisilicon/HisiPkg.dec
@@ -43,6 +43,7 @@
 
   gHisiEfiMemoryMapGuid  = {0xf8870015, 0x6994, 0x4b98, {0x95, 0xa2, 0xbd, 
0x56, 0xda, 0x91, 0xc0, 0x7f}}
   gVersionInfoHobGuid = {0xe13a14c, 0x859c, 0x4f22, {0x82, 0xbd, 0x18, 0xe, 
0xe1, 0x42, 0x12, 0xbf}}
+  gOemBootVariableGuid = {0xb7784577, 0x5aaf, 0x4557, {0xa1, 0x99, 0xd4, 0xa4, 
0x2f, 0x45, 0x06, 0xf8}}
 
 [LibraryClasses]
   PlatformSysCtrlLib|Include/Library/PlatformSysCtrlLib.h
diff --git a/Silicon/Hisilicon/Include/Library/BmcConfigBootLib.h 
b/Silicon/Hisilicon/Include/Library/BmcConfigBootLib.h
new file mode 100644
index 000..d937234
--- /dev/null
+++ b/Silicon/Hisilicon/Include/Library/BmcConfigBootLib.h
@@ -0,0 +1,31 @@
+/** @file
+*
+*  Copyright (c) 2017, Hisilicon Limited. All rights reserved.
+*  Copyright (c) 2017, Linaro Limited. All rights reserved.
+*
+*  This program and the accompanying materials
+*  are licensed and made available under the terms and conditions of the BSD 
License
+*  which accompanies this distribution.  The full text of the license may be 
found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR 
IMPLIED.
+*
+**/
+
+#ifndef _BMC_CONFIG_BOOT_LIB_H_
+#define _BMC_CONFIG_BOOT_LIB_H_
+
+VOID
+EFIAPI
+RestoreBootOrder (
+  VOID
+  );
+
+VOID
+EFIAPI
+HandleBmcBootType (
+  VOID
+  );
+
+#endif
diff --git a/Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.c 
b/Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.c
new file mode 100644
index 000..08a9c9c
--- /dev/null
+++ b/Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.c
@@ -0,0 +1,466 @@
+/** @file
+*
+*  Copyright (c) 2017, Hisilicon Limited. All rights reserved.
+*  Copyright (c) 2017, Linaro Limited. All rights reserved.
+*
+*  This program and the accompanying materials
+*  are licensed and made available under the terms and conditions of the BSD 
License
+*  which accompanies this distribution.  The full text of the license may be 
found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR 

[edk2] [PATCH edk2-platforms v2 03/15] Hisilicon/D0x/BDS: Switch to Generic BDS driver

[Ming Huang]

Hisilicon-specific PlatformBootManagerLib added. It is convenient
to add specific feature, like BMC control boot option.
Remove Intel BDS from dsc file because it is out of use.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
Signed-off-by: Heyi Guo 
Signed-off-by: Jason Zhang 
---
 Platform/Hisilicon/D03/D03.dsc  |  
17 +-
 Platform/Hisilicon/D03/D03.fdf  |  
 3 +-
 Platform/Hisilicon/D05/D05.dsc  |  
17 +-
 Platform/Hisilicon/D05/D05.fdf  |  
 3 +-
 Silicon/Hisilicon/HisiPkg.dec   |  
 2 +
 Silicon/Hisilicon/Hisilicon.dsc.inc |  
 1 +
 Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c   | 
636 
 Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.h   |  
31 +
 Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf |  
73 +++
 9 files changed, 777 insertions(+), 6 deletions(-)

diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
index b434f68..5fbe1f9 100644
--- a/Platform/Hisilicon/D03/D03.dsc
+++ b/Platform/Hisilicon/D03/D03.dsc
@@ -68,6 +68,13 @@
   CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
   GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf
   
PlatformBdsLib|Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf
+  
UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf
+  BootLogoLib|MdeModulePkg/Library/BootLogoLib/BootLogoLib.inf
+  SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf
+  
ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
+  DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
+  
PlatformBootManagerLib|Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
+  FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf
   
CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf
 
   # USB Requirements
@@ -187,7 +194,7 @@
 
 
   gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE
-  gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile|{ 0x83, 0xA5, 0x04, 
0x7C, 0x3E, 0x9E, 0x1C, 0x4F, 0xAD, 0x65, 0xE0, 0x52, 0x68, 0xD0, 0xB4, 0xD1 }
+  gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 
0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 
}|VOID*|0x0001006b
 
   gHisiTokenSpaceGuid.PcdSysControlBaseAddress|0x4001
   gHisiTokenSpaceGuid.PcdMailBoxAddress|0xFFF8
@@ -405,6 +412,12 @@
   MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
   MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
 
+  MdeModulePkg/Application/UiApp/UiApp.inf {
+
+  NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.inf
+  NULL|MdeModulePkg/Library/DeviceManagerUiLib/DeviceManagerUiLib.inf
+  
NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanceManagerUiLib.inf
+  }
   MdeModulePkg/Application/HelloWorld/HelloWorld.inf
   #
   # Bds
@@ -457,7 +470,7 @@
 
   MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
   MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
-  IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
+  MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
 
   #
   # UEFI application (Shell Embedded Boot Loader)
diff --git a/Platform/Hisilicon/D03/D03.fdf b/Platform/Hisilicon/D03/D03.fdf
index 0b38eb4..474f37f 100644
--- a/Platform/Hisilicon/D03/D03.fdf
+++ b/Platform/Hisilicon/D03/D03.fdf
@@ -283,6 +283,7 @@ READ_LOCK_STATUS   = TRUE
   INF ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf
 !endif #$(INCLUDE_TFTP_COMMAND)
 
+  INF MdeModulePkg/Application/UiApp/UiApp.inf
   #
   # Bds
   #
@@ -291,7 +292,7 @@ READ_LOCK_STATUS   = TRUE
   INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
   INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
   INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
-  INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
+  INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
 
 [FV.FVMAIN_COMPACT]
 FvAlignment= 16
diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
index 710339c..4d630da 100644
--- a/Platform/Hisilicon/D05/D05.dsc
+++ b/Platform/Hisilicon/D05/D05.dsc
@@ -84,6 +84,12 @@
   CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
   GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf
   
PlatformBdsLib|Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf
+  

[edk2] [PATCH edk2-platforms v2 00/15] Improve D0x platforms and bug fix

[Ming Huang]

The major features of this patchset include
adding PPTT support, 
switching to Generic BDS driver,
adding capsule upgrade support,
open-source version for SnpPlatform and SasPlatform
changing DmaLib to CoherentDmaLib(this one is omissive in v1).

Code can also be found in github: 
https://github.com/hisilicon/OpenPlatformPkg.git
branch: rp-1802-platforms-v2


Jason Zhang (3):
  Hisilicon D03/D05: Add capsule upgrade support
  Hisilicon D03/D05: Open SasPlatform source code
  Hisilicon D03/D05: Open SnpPlatform source code

Ming Huang (11):
  Hisilicon/D05: Move Madt definition to head file
  Hisilicon/D05: Add PPTT support
  Hisilicon/D0x/BDS: Switch to Generic BDS driver
  Hisilicon/D0x: Break BMC SetBoot option out into separate library
  Hilisicon: Change DmaLib to CoherentDmaLib
  Hisilicon/Smbios: Indicate use of ProcessorFamily2 in type 4 table
  Hisilicon/D05: Replace SP805Watchdog by WatchdogTimer driver.
  Hisilicon/D03: Replace SP805Watchdog by WatchdogTimer driver.
  Hisilicon/D05/ACPI: Add ITS PXM
  Hisilicon/D05/ACPI: Add Pcie, HNS and SAS PXM
  Hisilicon D03/D05: Update firmware version to 18.02

Yan Zhang (1):
  Hisilicon/PCIe: Disable PCIe ASPM

 
Platform/Hisilicon/D03/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini
 |  45 ++
 Platform/Hisilicon/D03/D03.dsc 
  |  42 +-
 Platform/Hisilicon/D03/D03.fdf 
  |  79 ++-
 
Platform/Hisilicon/D03/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc
|  81 +++
 
Platform/Hisilicon/D03/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
 |  50 ++
 
Platform/Hisilicon/D03/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptorPei.c
|  70 +++
 
Platform/Hisilicon/D05/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini
 |  45 ++
 Platform/Hisilicon/D05/D05.dsc 
  |  47 +-
 Platform/Hisilicon/D05/D05.fdf 
  |  80 ++-
 
Platform/Hisilicon/D05/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc
|  81 +++
 
Platform/Hisilicon/D05/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
 |  50 ++
 
Platform/Hisilicon/D05/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptorPei.c
|  70 +++
 Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.c
  | 106 
 Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.inf  
  |  45 ++
 Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c  
  |   4 +-
 Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.c
  | 115 
 Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf  
  |  46 ++
 Silicon/Hisilicon/Drivers/VirtualEhciPciIo/VirtualEhciPciIo.c  
  |   2 +-
 Silicon/Hisilicon/Hi1610/Drivers/IoInitDxe/IoInitDxe.c 
  |   3 +-
 Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.c
  | 103 
 Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.h
  |   2 +
 Silicon/Hisilicon/Hi1616/D05AcpiTables/D05Srat.aslc
  |  10 +
 Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Hns.asl 
  |   9 +
 Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl 
  |  34 +-
 Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl 
  |  19 +-
 Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h
  |  30 +-
 Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc 
  |  23 +-
 Silicon/Hisilicon/Hi1616/Pptt/Pptt.c   
  | 540 
 Silicon/Hisilicon/Hi1616/Pptt/Pptt.h   
  |  88 +++
 Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf 
  |  48 ++
 Silicon/Hisilicon/HisiPkg.dec  
  |   6 +
 Silicon/Hisilicon/Hisilicon.dsc.inc
  |  12 +-
 Silicon/Hisilicon/Hisilicon.fdf.inc
  |   9 +
 Silicon/Hisilicon/Include/Library/AcpiNextLib.h
  |  10 +-
 Silicon/Hisilicon/Include/Library/BmcConfigBootLib.h   
  |  31 +
 Silicon/Hisilicon/Include/Library/OemDevicePath.h  
  |  52 ++
 Silicon/Hisilicon/Include/Protocol/HisiPlatformSasProtocol.h   
  |  30 +
 Silicon/Hisilicon/Include/Protocol/SnpPlatformProtocol.h