Re: [edk2] [PATCH] SourceLevelDebugPkg DebugCommUsb3: Return error when debug cap is reset

2018-03-19 Thread Wu, Hao A
Reviewed-by: Hao Wu 

Best Regards,
Hao Wu


> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Star
> Zeng
> Sent: Monday, March 19, 2018 8:46 PM
> To: edk2-devel@lists.01.org
> Cc: Ni, Ruiyu; Wu, Hao A; Zeng, Star
> Subject: [edk2] [PATCH] SourceLevelDebugPkg DebugCommUsb3: Return error
> when debug cap is reset
> 
> When source level debug is enabled, but debug cable is not connected,
> XhcResetHC() in XhciReg.c will reset the host controller, the debug
> capability registers will be also reset. After the code in
> InitializeUsbDebugHardware() sets DCE bit and LSE bit to "1" in DCCTRL,
> there will be DMA on 0 (the value of some debug capability registers
> for data transfer is 0) address buffer, fault info like below will
> appear when IOMMU based on VTd is enabled.
> 
>   VER_REG - 0x0010
>   CAP_REG - 0x00D2008C40660462
>   ECAP_REG- 0x00F050DA
>   GSTS_REG- 0xC000
>   RTADDR_REG  - 0x86512000
>   CCMD_REG- 0x2800
>   FSTS_REG- 0x0002
>   FECTL_REG   - 0xC000
>   FEDATA_REG  - 0x
>   FEADDR_REG  - 0x
>   FEUADDR_REG - 0x
>   FRCD_REG[0] - 0xC00600A0 
> Fault Info - 0x
> Source - B00 D14 F00
> Type - 1 (read)
> Reason - 6
>   IVA_REG - 0x
>   IOTLB_REG   - 0x1200
> 
> This patch is to return error for the case.
> 
> Cc: Ruiyu Ni 
> Cc: Hao Wu 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Star Zeng 
> ---
>  .../DebugCommunicationLibUsb3/DebugCommunicationLibUsb3Common.c   |
> 8 
>  1 file changed, 8 insertions(+)
> 
> diff --git
> a/SourceLevelDebugPkg/Library/DebugCommunicationLibUsb3/DebugCommun
> icationLibUsb3Common.c
> b/SourceLevelDebugPkg/Library/DebugCommunicationLibUsb3/DebugCommun
> icationLibUsb3Common.c
> index fb9ca84fc7bc..86ecc2f9dbc7 100644
> ---
> a/SourceLevelDebugPkg/Library/DebugCommunicationLibUsb3/DebugCommun
> icationLibUsb3Common.c
> +++
> b/SourceLevelDebugPkg/Library/DebugCommunicationLibUsb3/DebugCommun
> icationLibUsb3Common.c
> @@ -673,11 +673,19 @@ InitializeUsbDebugHardware (
>UINTN   Index;
>UINT8   TotalUsb3Port;
>EFI_PHYSICAL_ADDRESSXhciOpRegister;
> +  UINT32  Dcddi1;
> 
>XhciOpRegister = Handle->XhciOpRegister;
>TotalUsb3Port = MmioRead32 (((UINTN) Handle->XhciMmioBase +
> XHC_HCSPARAMS1_OFFSET)) >> 24;
> 
>if (Handle->Initialized == USB3DBG_NOT_ENABLED) {
> +Dcddi1 = XhcReadDebugReg (Handle,XHC_DC_DCDDI1);
> +if (Dcddi1 != (UINT32)((XHCI_DEBUG_DEVICE_VENDOR_ID << 16) |
> XHCI_DEBUG_DEVICE_PROTOCOL)) {
> +  //
> +  // The debug capability has been reset by other code, return device 
> error.
> +  //
> +  return EFI_DEVICE_ERROR;
> +}
>  //
>  // If XHCI supports debug capability, hardware resource has been 
> allocated,
>  // but it has not been enabled, try to enable again.
> --
> 2.7.0.windows.1
> 
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[edk2] [Patch] NetworkPkg/UefiPxeBcDxe: Configure the ARP Instance/RouteTable with new address

2018-03-19 Thread Jiaxin Wu
After completed a DHCP D.O.R.A process and got the new address, the ARP Instance
and RouteTable should be configured so as to avoid the later Pxe.Arp failure.

Cc: Fu Siyuan 
Cc: Ye Ting 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiaxin Wu 
---
 NetworkPkg/UefiPxeBcDxe/PxeBcImpl.c| 26 +++---
 NetworkPkg/UefiPxeBcDxe/PxeBcSupport.c | 66 --
 2 files changed, 52 insertions(+), 40 deletions(-)

diff --git a/NetworkPkg/UefiPxeBcDxe/PxeBcImpl.c 
b/NetworkPkg/UefiPxeBcDxe/PxeBcImpl.c
index d3146c3a7e..b828d24288 100644
--- a/NetworkPkg/UefiPxeBcDxe/PxeBcImpl.c
+++ b/NetworkPkg/UefiPxeBcDxe/PxeBcImpl.c
@@ -2001,11 +2001,10 @@ EfiPxeBcSetStationIP (
   )
 {
   EFI_STATUS  Status;
   PXEBC_PRIVATE_DATA  *Private;
   EFI_PXE_BASE_CODE_MODE  *Mode;
-  EFI_ARP_CONFIG_DATA ArpConfigData;
 
   if (This == NULL) {
 return EFI_INVALID_PARAMETER;
   }
 
@@ -2041,31 +2040,10 @@ EfiPxeBcSetStationIP (
 //
 Status = PxeBcRegisterIp6Address (Private, >v6);
 if (EFI_ERROR (Status)) {
   goto ON_EXIT;
 }
-  } else if (!Mode->UsingIpv6 && NewStationIp != NULL) {
-//
-// Configure the corresponding ARP with the IPv4 address.
-//
-ZeroMem (, sizeof (EFI_ARP_CONFIG_DATA));
-
-ArpConfigData.SwAddressType   = 0x0800;
-ArpConfigData.SwAddressLength = (UINT8) sizeof (EFI_IPv4_ADDRESS);
-ArpConfigData.StationAddress  = >v4;
-
-Private->Arp->Configure (Private->Arp, NULL);
-Private->Arp->Configure (Private->Arp, );
-
-if (NewSubnetMask != NULL) {
-  Mode->RouteTableEntries= 1;
-  Mode->RouteTable[0].IpAddr.Addr[0] = NewStationIp->Addr[0] & 
NewSubnetMask->Addr[0];
-  Mode->RouteTable[0].SubnetMask.Addr[0] = NewSubnetMask->Addr[0];
-  Mode->RouteTable[0].GwAddr.Addr[0] = 0;
-}
-
-Private->IsAddressOk = TRUE;
   }
 
   if (NewStationIp != NULL) {
 CopyMem (>StationIp, NewStationIp, sizeof (EFI_IP_ADDRESS));
 CopyMem (>StationIp, NewStationIp, sizeof (EFI_IP_ADDRESS));
@@ -2075,10 +2053,14 @@ EfiPxeBcSetStationIP (
 CopyMem (>SubnetMask, NewSubnetMask, sizeof (EFI_IP_ADDRESS));
 CopyMem (>SubnetMask ,NewSubnetMask, sizeof (EFI_IP_ADDRESS));
   }
 
   Status = PxeBcFlushStationIp (Private, NewStationIp, NewSubnetMask);
+  if (!EFI_ERROR (Status)) {
+Private->IsAddressOk = TRUE;
+  }
+  
 ON_EXIT:
   return Status;
 }
 
 
diff --git a/NetworkPkg/UefiPxeBcDxe/PxeBcSupport.c 
b/NetworkPkg/UefiPxeBcDxe/PxeBcSupport.c
index 47bb7c5dbb..4b6f8c9c7f 100644
--- a/NetworkPkg/UefiPxeBcDxe/PxeBcSupport.c
+++ b/NetworkPkg/UefiPxeBcDxe/PxeBcSupport.c
@@ -1,9 +1,9 @@
 /** @file
   Support functions implementation for UefiPxeBc Driver.
 
-  Copyright (c) 2007 - 2017, Intel Corporation. All rights reserved.
+  Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.
 
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD 
License
   which accompanies this distribution.  The full text of the license may be 
found at
   http://opensource.org/licenses/bsd-license.php.
@@ -34,21 +34,23 @@ PxeBcFlushStationIp (
   EFI_IP_ADDRESS   *SubnetMask OPTIONAL
   )
 {
   EFI_PXE_BASE_CODE_MODE   *Mode;
   EFI_STATUS   Status;
+  EFI_ARP_CONFIG_DATA  ArpConfigData;
 
   Mode   = Private->PxeBc.Mode;
   Status = EFI_SUCCESS;
+  ZeroMem (, sizeof (EFI_ARP_CONFIG_DATA));
 
-  if (Mode->UsingIpv6) {
-
-if (StationIp != NULL) {
-  CopyMem (>Udp6CfgData.StationAddress, StationIp, sizeof 
(EFI_IPv6_ADDRESS));
-  CopyMem (>Ip6CfgData.StationAddress, StationIp, sizeof 
(EFI_IPv6_ADDRESS));
-}
-
+  if (Mode->UsingIpv6 && StationIp != NULL) {
+//
+// Overwrite Udp6CfgData/Ip6CfgData StationAddress.
+//
+CopyMem (>Udp6CfgData.StationAddress, StationIp, sizeof 
(EFI_IPv6_ADDRESS));
+CopyMem (>Ip6CfgData.StationAddress, StationIp, sizeof 
(EFI_IPv6_ADDRESS));
+
 //
 // Reconfigure the Ip6 instance to capture background ICMP6 packets with 
new station Ip address.
 //
 Private->Ip6->Cancel (Private->Ip6, >Icmp6Token);
 Private->Ip6->Configure (Private->Ip6, NULL);
@@ -59,31 +61,59 @@ PxeBcFlushStationIp (
 }
 
 Status = Private->Ip6->Receive (Private->Ip6, >Icmp6Token);
   } else {
 if (StationIp != NULL) {
+  //
+  // Reconfigure the ARP instance with station Ip address.
+  //
+  ArpConfigData.SwAddressType   = 0x0800;
+  ArpConfigData.SwAddressLength = (UINT8) sizeof (EFI_IPv4_ADDRESS);
+  ArpConfigData.StationAddress = StationIp;
+
+  Private->Arp->Configure (Private->Arp, NULL);
+  Private->Arp->Configure (Private->Arp, );
+
+  //
+  // Overwrite Udp4CfgData/Ip4CfgData StationAddress.
+  //
   CopyMem (>Udp4CfgData.StationAddress, StationIp, sizeof 
(EFI_IPv4_ADDRESS));
   

[edk2] [Patch 3/3] NetworkPkg/HttpDxe: Handle the large data request via HTTPS channel.

2018-03-19 Thread Jiaxin Wu
Cc: Karunakar P 
Cc: Fu Siyuan 
Cc: Ye Ting 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiaxin Wu 
---
 NetworkPkg/HttpDxe/HttpProto.c| 121 +++---
 NetworkPkg/HttpDxe/HttpsSupport.c |  17 +-
 NetworkPkg/HttpDxe/HttpsSupport.h |  12 +++-
 3 files changed, 111 insertions(+), 39 deletions(-)

diff --git a/NetworkPkg/HttpDxe/HttpProto.c b/NetworkPkg/HttpDxe/HttpProto.c
index d7fe271168..35c4a166c4 100644
--- a/NetworkPkg/HttpDxe/HttpProto.c
+++ b/NetworkPkg/HttpDxe/HttpProto.c
@@ -1,9 +1,9 @@
 /** @file
   Miscellaneous routines for HttpDxe driver.
 
-Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.
+Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.
 (C) Copyright 2016 Hewlett Packard Enterprise Development LP
 This program and the accompanying materials
 are licensed and made available under the terms and conditions of the BSD 
License
 which accompanies this distribution.  The full text of the license may be 
found at
 http://opensource.org/licenses/bsd-license.php
@@ -1474,64 +1474,101 @@ HttpTransmitTcp (
   EFI_STATUSStatus;
   EFI_TCP4_IO_TOKEN *Tx4Token;
   EFI_TCP4_PROTOCOL *Tcp4;
   EFI_TCP6_IO_TOKEN *Tx6Token;
   EFI_TCP6_PROTOCOL *Tcp6;
-  UINT8 *Buffer;  
-  UINTN BufferSize;
+  UINT8 *TlsRecord;  
+  UINT16PayloadSize;
   NET_FRAGMENT  TempFragment;
+  NET_FRAGMENT  Fragment;
+  UINTN RecordCount;
+  UINTN RemainingLen;
 
   Status= EFI_SUCCESS;
-  Buffer= NULL;
+  TlsRecord = NULL;
+  PayloadSize   = 0;
   TempFragment.Len  = 0;
   TempFragment.Bulk = NULL;
+  Fragment.Len  = 0;
+  Fragment.Bulk = NULL;
+  RecordCount   = 0;
+  RemainingLen  = 0;
 
   //
   // Need to encrypt data.
   //
   if (HttpInstance->UseHttps) {
 //
-// Build BufferOut data
+// Allocate enough buffer for each TLS plaintext records.
 //
-BufferSize = sizeof (TLS_RECORD_HEADER) + TxStringLen;
-Buffer = AllocateZeroPool (BufferSize);
-if (Buffer == NULL) {
+TlsRecord = AllocateZeroPool (TLS_RECORD_HEADER_LENGTH + 
TLS_PLAINTEXT_RECORD_MAX_PAYLOAD_LENGTH);
+if (TlsRecord == NULL) {
   Status = EFI_OUT_OF_RESOURCES;
   return Status;
 }
-((TLS_RECORD_HEADER *) Buffer)->ContentType = 
TlsContentTypeApplicationData;
-((TLS_RECORD_HEADER *) Buffer)->Version.Major = 
HttpInstance->TlsConfigData.Version.Major;
-((TLS_RECORD_HEADER *) Buffer)->Version.Minor = 
HttpInstance->TlsConfigData.Version.Minor;
-((TLS_RECORD_HEADER *) Buffer)->Length = (UINT16) (TxStringLen);
-CopyMem (Buffer + sizeof (TLS_RECORD_HEADER), TxString, TxStringLen);
-
+
 //
-// Encrypt Packet.
+// Allocate enough buffer for all TLS ciphertext records.
 //
-Status = TlsProcessMessage (
-   HttpInstance, 
-   Buffer, 
-   BufferSize, 
-   EfiTlsEncrypt, 
-   
-   );
-
-FreePool (Buffer);
+RecordCount = TxStringLen / TLS_PLAINTEXT_RECORD_MAX_PAYLOAD_LENGTH + 1;
+Fragment.Bulk = AllocateZeroPool (RecordCount * (TLS_RECORD_HEADER_LENGTH 
+ TLS_CIPHERTEXT_RECORD_MAX_PAYLOAD_LENGTH));
+if (Fragment.Bulk == NULL) {
+  Status = EFI_OUT_OF_RESOURCES;
+  goto ON_ERROR;
+}
 
-if (EFI_ERROR (Status)) {
-  return Status;
+//
+// Encrypt each TLS plaintext records.
+//
+RemainingLen = TxStringLen;
+while (RemainingLen != 0) {
+  PayloadSize = (UINT16) MIN (TLS_PLAINTEXT_RECORD_MAX_PAYLOAD_LENGTH, 
RemainingLen);
+  
+  ((TLS_RECORD_HEADER *) TlsRecord)->ContentType = 
TlsContentTypeApplicationData;
+  ((TLS_RECORD_HEADER *) TlsRecord)->Version.Major = 
HttpInstance->TlsConfigData.Version.Major;
+  ((TLS_RECORD_HEADER *) TlsRecord)->Version.Minor = 
HttpInstance->TlsConfigData.Version.Minor;
+  ((TLS_RECORD_HEADER *) TlsRecord)->Length = PayloadSize;
+
+  CopyMem (TlsRecord + TLS_RECORD_HEADER_LENGTH, TxString + (TxStringLen - 
RemainingLen), PayloadSize);
+  
+  Status = TlsProcessMessage (
+ HttpInstance, 
+ TlsRecord, 
+ TLS_RECORD_HEADER_LENGTH + PayloadSize, 
+ EfiTlsEncrypt, 
+ 
+ );
+  if (EFI_ERROR (Status)) {
+goto ON_ERROR;
+  }
+
+  //
+  // Record the processed/encrypted Packet. 
+  //
+  CopyMem (Fragment.Bulk + Fragment.Len, TempFragment.Bulk, 
TempFragment.Len);
+  Fragment.Len += TempFragment.Len;
+
+  FreePool (TempFragment.Bulk);
+  

[edk2] [Patch 1/3] MdePkg/Tls1.h: Add TLS record header length and max payload length.

2018-03-19 Thread Jiaxin Wu
Cc: Karunakar P 
Cc: Fu Siyuan 
Cc: Ye Ting 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiaxin Wu 
---
 MdePkg/Include/IndustryStandard/Tls1.h | 16 +++-
 1 file changed, 15 insertions(+), 1 deletion(-)

diff --git a/MdePkg/Include/IndustryStandard/Tls1.h 
b/MdePkg/Include/IndustryStandard/Tls1.h
index 9009291ee3..cccb6db7fb 100644
--- a/MdePkg/Include/IndustryStandard/Tls1.h
+++ b/MdePkg/Include/IndustryStandard/Tls1.h
@@ -1,11 +1,11 @@
 /** @file
   Transport Layer Security  -- TLS 1.0/1.1/1.2 Standard definitions, from RFC 
2246/4346/5246
 
   This file contains common TLS 1.0/1.1/1.2 definitions from RFC 2246/4346/5246
 
-  Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.
+  Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD 
License
   which accompanies this distribution.  The full text of the license may be 
found at
   http://opensource.org/licenses/bsd-license.php
 
@@ -85,9 +85,23 @@ typedef struct {
   UINT8   ContentType;
   EFI_TLS_VERSION Version;
   UINT16  Length;
 } TLS_RECORD_HEADER;
 
+#define TLS_RECORD_HEADER_LENGTH   5
+
+//
+// The length (in bytes) of the TLSPlaintext records payload MUST NOT exceed 
2^14.
+// Refers to section 6.2 of RFC5246. 
+//
+#define TLS_PLAINTEXT_RECORD_MAX_PAYLOAD_LENGTH   16384
+
+//
+// The length (in bytes) of the TLSCiphertext records payload MUST NOT exceed 
2^14 + 2048.
+// Refers to section 6.2 of RFC5246. 
+//
+#define TLS_CIPHERTEXT_RECORD_MAX_PAYLOAD_LENGTH   18432
+
 #pragma pack()
 
 #endif
 
-- 
2.16.2.windows.1

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[edk2] [Patch 2/3] NetworkPkg/TlsDxe: Handle the multiple TLS record messages encryption/decryption.

2018-03-19 Thread Jiaxin Wu
Cc: Karunakar P 
Cc: Fu Siyuan 
Cc: Ye Ting 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiaxin Wu 
---
 NetworkPkg/TlsDxe/TlsImpl.c | 74 +++--
 NetworkPkg/TlsDxe/TlsImpl.h |  6 +---
 2 files changed, 52 insertions(+), 28 deletions(-)

diff --git a/NetworkPkg/TlsDxe/TlsImpl.c b/NetworkPkg/TlsDxe/TlsImpl.c
index 8e1238216b..a026075f36 100644
--- a/NetworkPkg/TlsDxe/TlsImpl.c
+++ b/NetworkPkg/TlsDxe/TlsImpl.c
@@ -1,9 +1,9 @@
 /** @file
   The Miscellaneous Routines for TlsDxe driver.
 
-Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.
+Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.
 
 This program and the accompanying materials
 are licensed and made available under the terms and conditions of the BSD 
License
 which accompanies this distribution.  The full text of the license may be 
found at
 http://opensource.org/licenses/bsd-license.php
@@ -48,10 +48,11 @@ TlsEncryptPacket (
   UINT16  ThisPlainMessageSize;
   TLS_RECORD_HEADER   *TempRecordHeader;
   UINT16  ThisMessageSize;
   UINT32  BufferOutSize;
   UINT8   *BufferOut;
+  UINT32  RecordCount;
   INTNRet;
 
   Status   = EFI_SUCCESS;
   BytesCopied  = 0;
   BufferInSize = 0;
@@ -59,10 +60,11 @@ TlsEncryptPacket (
   BufferInPtr  = NULL;
   RecordHeaderIn   = NULL;
   TempRecordHeader = NULL;
   BufferOutSize= 0;
   BufferOut= NULL;
+  RecordCount  = 0;
   Ret  = 0;
 
   //
   // Calculate the size according to the fragment table.
   //
@@ -89,34 +91,46 @@ TlsEncryptPacket (
   (*FragmentTable)[Index].FragmentLength
   );
 BytesCopied += (*FragmentTable)[Index].FragmentLength;
   }
 
-  BufferOut = AllocateZeroPool (MAX_BUFFER_SIZE);
+  //
+  // Count TLS record number.
+  //
+  BufferInPtr = BufferIn;
+  while ((UINTN) BufferInPtr < (UINTN) BufferIn + BufferInSize) {
+RecordHeaderIn = (TLS_RECORD_HEADER *) BufferInPtr;
+if (RecordHeaderIn->ContentType != TlsContentTypeApplicationData || 
RecordHeaderIn->Length > TLS_PLAINTEXT_RECORD_MAX_PAYLOAD_LENGTH) {
+  Status = EFI_INVALID_PARAMETER;
+  goto ERROR;
+}
+BufferInPtr += TLS_RECORD_HEADER_LENGTH + RecordHeaderIn->Length;
+RecordCount ++;
+  }
+  
+  //
+  // Allocate enough buffer to hold TLS Ciphertext.
+  //
+  BufferOut = AllocateZeroPool (RecordCount * (TLS_RECORD_HEADER_LENGTH + 
TLS_CIPHERTEXT_RECORD_MAX_PAYLOAD_LENGTH));
   if (BufferOut == NULL) {
 Status = EFI_OUT_OF_RESOURCES;
 goto ERROR;
   }
 
   //
-  // Parsing buffer.
+  // Parsing buffer. Received packet may have multiple TLS record messages.
   //
   BufferInPtr = BufferIn;
   TempRecordHeader = (TLS_RECORD_HEADER *) BufferOut;
   while ((UINTN) BufferInPtr < (UINTN) BufferIn + BufferInSize) {
 RecordHeaderIn = (TLS_RECORD_HEADER *) BufferInPtr;
 
-if (RecordHeaderIn->ContentType != TlsContentTypeApplicationData) {
-  Status = EFI_INVALID_PARAMETER;
-  goto ERROR;
-}
-
 ThisPlainMessageSize = RecordHeaderIn->Length;
 
 TlsWrite (TlsInstance->TlsConn, (UINT8 *) (RecordHeaderIn + 1), 
ThisPlainMessageSize);
 
-Ret = TlsCtrlTrafficOut (TlsInstance->TlsConn, (UINT8 
*)(TempRecordHeader), MAX_BUFFER_SIZE - BufferOutSize);
+Ret = TlsCtrlTrafficOut (TlsInstance->TlsConn, (UINT8 
*)(TempRecordHeader), TLS_RECORD_HEADER_LENGTH + 
TLS_CIPHERTEXT_RECORD_MAX_PAYLOAD_LENGTH);
 
 if (Ret > 0) {
   ThisMessageSize = (UINT16) Ret;
 } else {
   //
@@ -127,11 +141,11 @@ TlsEncryptPacket (
   ThisMessageSize = 0;
 }
 
 BufferOutSize += ThisMessageSize;
 
-BufferInPtr += RECORD_HEADER_LEN + ThisPlainMessageSize;
+BufferInPtr += TLS_RECORD_HEADER_LENGTH + ThisPlainMessageSize;
 TempRecordHeader += ThisMessageSize;
   }
 
   FreePool (BufferIn);
   BufferIn = NULL;
@@ -199,10 +213,11 @@ TlsDecryptPacket (
   UINT16  ThisCipherMessageSize;
   TLS_RECORD_HEADER   *TempRecordHeader;
   UINT16  ThisPlainMessageSize;
   UINT8   *BufferOut;
   UINT32  BufferOutSize;
+  UINT32  RecordCount;
   INTNRet;
 
   Status   = EFI_SUCCESS;
   BytesCopied  = 0;
   BufferIn = NULL;
@@ -210,10 +225,11 @@ TlsDecryptPacket (
   BufferInPtr  = NULL;
   RecordHeaderIn   = NULL;
   TempRecordHeader = NULL;
   BufferOut= NULL;
   BufferOutSize= 0;
+  RecordCount  = 0;
   Ret  = 0;
 
   //
   // Calculate the size according to the fragment table.
   //
@@ -240,11 +256,28 @@ TlsDecryptPacket (
   (*FragmentTable)[Index].FragmentLength
   );
 BytesCopied += (*FragmentTable)[Index].FragmentLength;
   }
 
-  BufferOut = AllocateZeroPool (MAX_BUFFER_SIZE);
+  //
+  // Count TLS record number.
+  //
+  BufferInPtr 

[edk2] [Patch 0/3] Support HTTP large data request via TLS channel.

2018-03-19 Thread Jiaxin Wu
Cc: Karunakar P 
Cc: Fu Siyuan 
Cc: Ye Ting 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiaxin Wu 

Jiaxin Wu (3):
  MdePkg/Tls1.h: Add TLS record header length and max payload length.
  NetworkPkg/TlsDxe: Handle the multiple TLS record messages
encryption/decryption.
  NetworkPkg/HttpDxe: Handle the large data request via HTTPS channel.

 MdePkg/Include/IndustryStandard/Tls1.h |  16 -
 NetworkPkg/HttpDxe/HttpProto.c | 121 -
 NetworkPkg/HttpDxe/HttpsSupport.c  |  17 -
 NetworkPkg/HttpDxe/HttpsSupport.h  |  12 +++-
 NetworkPkg/TlsDxe/TlsImpl.c|  74 +---
 NetworkPkg/TlsDxe/TlsImpl.h|   6 +-
 6 files changed, 178 insertions(+), 68 deletions(-)

-- 
2.16.2.windows.1

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Re: [edk2] [staging/dynamictables PATCH 1/2] MdePkg: SMMUv3 updates for IORT table definitions

2018-03-19 Thread Evan Lloyd


> -Original Message-
> From: Sami Mujawar [mailto:sami.muja...@arm.com]
> Sent: 19 March 2018 15:19
> To: edk2-devel@lists.01.org
> Cc: Evan Lloyd ; leif.lindh...@linaro.org; Matteo
> Carlini ; Stephanie Hughes-Fitt
> ; nd 
> Subject: [staging/dynamictables PATCH 1/2] MdePkg: SMMUv3 updates for
> IORT table definitions
> 
> Updated the IORT SMMUv3 Node structure and flags to match the IO
> Remapping Table, Platform Design Document, Revision C dated
> 15 MAY 2017.
> 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Sami Mujawar 
> Reviewed-by: Ard Biesheuvel 
Reviewed-by: Evan Lloyd 
> ---
>  MdePkg/Include/IndustryStandard/IoRemappingTable.h | 11 ++-
>  1 file changed, 10 insertions(+), 1 deletion(-)
> 
> diff --git a/MdePkg/Include/IndustryStandard/IoRemappingTable.h
> b/MdePkg/Include/IndustryStandard/IoRemappingTable.h
> index
> c113afdd27843111bc7ad6e1de1108260fad2bbc..2e5cb45d7e2ffd4a0559ef
> 706b71874843e3fdbd 100644
> --- a/MdePkg/Include/IndustryStandard/IoRemappingTable.h
> +++ b/MdePkg/Include/IndustryStandard/IoRemappingTable.h
> @@ -4,6 +4,7 @@
> 
> http://infocenter.arm.com/help/topic/com.arm.doc.den0049c/DEN0049C_
> IO_Remapping_Table.pdf
> 
>Copyright (c) 2017, Linaro Limited. All rights reserved.
> +  Copyright (c) 2018, ARM Limited. All rights reserved.
> 
>This program and the accompanying materials
>are licensed and made available under the terms and conditions of the
> BSD License @@ -53,6 +54,11 @@
> 
>  #define EFI_ACPI_IORT_SMMUv3_FLAG_COHAC_OVERRIDEBIT0
>  #define EFI_ACPI_IORT_SMMUv3_FLAG_HTTU_OVERRIDE BIT1
> +#define EFI_ACPI_IORT_SMMUv3_FLAG_PROXIMITY_DOMAIN  BIT3
> +
> +#define EFI_ACPI_IORT_SMMUv3_MODEL_GENERIC  0x0
> +#define EFI_ACPI_IORT_SMMUv3_MODEL_HISILICON_HI161X 0x1
> +#define EFI_ACPI_IORT_SMMUv3_MODEL_CAVIUM_CN99XX0x2
> 
>  #define EFI_ACPI_IORT_ROOT_COMPLEX_ATS_UNSUPPORTED  0x0
>  #define EFI_ACPI_IORT_ROOT_COMPLEX_ATS_SUPPORTED0x1
> @@ -165,7 +171,7 @@ typedef struct {
>  } EFI_ACPI_6_0_IO_REMAPPING_SMMU_NODE;
> 
>  ///
> -/// Node type 4: SMMUv4 node
> +/// Node type 4: SMMUv3 node
>  ///
>  typedef struct {
>EFI_ACPI_6_0_IO_REMAPPING_NODE  Node;
> @@ -179,6 +185,9 @@ typedef struct {
>UINT32  Pri;
>UINT32  Gerr;
>UINT32  Sync;
> +  UINT8   ProximityDomain;
> +  UINT8   Reserved1[3];
> +  UINT32  DeviceIdMappingIndex;
>  } EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE;
> 
>  ///
> --
> 'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'
> 

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Re: [edk2] [PATCH 2/2][platforms/dynamictables] Platform/ARM: Dynamic Tables support for FVP

2018-03-19 Thread Evan Lloyd


> -Original Message-
> From: Sami Mujawar [mailto:sami.muja...@arm.com]
> Sent: 19 March 2018 15:22
> To: edk2-devel@lists.01.org
> Cc: Arvind Chauhan ; Daniil Egranov
> ; Thomas Abraham
> ; Evan Lloyd ;
> leif.lindh...@linaro.org; Matteo Carlini ;
> Stephanie Hughes-Fitt ; nd
> 
> Subject: [PATCH 2/2][platforms/dynamictables] Platform/ARM: Dynamic
> Tables support for FVP
> 
> The dynamic tables framework utilizes the configuration manager protocol
> to get the platform specific information required for building the firmware
> tables.
> 
> The configuration manager is a platform specific component that collates
> the platform hardware information and builds an abstract platform
> configuration repository. The configuration manager also implements the
> configuration manager protocol which returns the hardware information
> requested by the table generators.
> 
> This patch implements the configuration manager support for the FVP
> platform.
> 
> The dynamic tables framework support is configurable and can be enabled
> using the DYNAMIC_TABLES_FRAMEWORK build option.
> 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Sami Mujawar 
Reviewed-by: Evan Lloyd 
> ---
>  Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc
> |  15 +
>  Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf
> |  16 +-
> 
> Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManager.
> dsc.inc|  31 +
> 
> Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManager
> Dxe/ConfigurationManager.c  | 607 
> 
> Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManager
> Dxe/ConfigurationManager.h  | 172 ++
> 
> Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManager
> Dxe/ConfigurationManagerDxe.inf |  78 +++
> 
> Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManager
> Dxe/Platform.h  |  91 +++
> 
> Platform/ARM/VExpressPkg/ConfigurationManager/PlatformASLTablesLib/
> Dsdt.asl   |  77 +++
> 
> Platform/ARM/VExpressPkg/ConfigurationManager/PlatformASLTablesLib/
> PlatformASLTablesLib.inf   |  34 ++
>  9 files changed, 1119 insertions(+), 2 deletions(-)
> 
> diff --git a/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc
> b/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc
> index
> cdf9e2d49784d542701dc84eb511f592e77ec106..ed1a16b7b35d9854847e
> 3898f8061abb5261e134 100644
> --- a/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc
> +++ b/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc
> @@ -38,6 +38,10 @@ [Defines]
>DT_SUPPORT = FALSE
> 
>  !include Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc
> +!ifdef DYNAMIC_TABLES_FRAMEWORK
> +  !include DynamicTablesPkg/DynamicTables.dsc.inc
> +  !include
> +Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManage
> r.dsc.
> +inc
> +!endif
> 
>  [LibraryClasses.common]
>ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf
> @@ -128,6 +132,15 @@ [PcdsFixedAtBuild.common]
>gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x1c09
>gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200
>gEfiMdePkgTokenSpaceGuid.PcdUartDefaultReceiveFifoDepth|0
> +  gArmPlatformTokenSpaceGuid.PL011UartInterrupt|0x25
> +
> +  ## PL011 Serial Debug UART
> +  gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase|0x1c0a
> +  gArmPlatformTokenSpaceGuid.PcdSerialDbgUartBaudRate|115200
> +  gArmPlatformTokenSpaceGuid.PcdSerialDbgUartClkInHz|2400
> +
> +  # SBSA Generic Watchdog
> +  gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum|59
> 
>## PL031 RealTimeClock
>gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x1C17
> @@ -255,8 +268,10 @@ [Components.common]  !endif
>}
> 
> +!ifndef DYNAMIC_TABLES_FRAMEWORK
>MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf
>Platform/ARM/VExpressPkg/AcpiTables/AcpiTables.inf
> +!endif
> 
>ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
>ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
> diff --git a/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf
> b/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf
> index
> 305e661a2bdc3ade2c16232c77769df5fc6f0c32..db164be9641cf6e315302
> 3752f60f95909ce803c 100644
> --- a/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf
> +++ b/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf
> @@ -1,5 +1,5 @@
>  #
> -#  Copyright (c) 2011 - 2015, ARM Limited. All rights reserved.
> +#  Copyright (c) 2011 - 2018, ARM Limited. All rights reserved.
>  #
>  #  This program and the accompanying materials  #  are licensed and made
> available under the terms and conditions of the BSD License @@ -97,9
> +97,19 @@ [FV.FvMain]
> 
># ACPI Support
>#
> -  INF 

Re: [edk2] [PATCH 1/2][platforms/dynamictables] Platform/ARM: Dynamic Tables support for Juno

2018-03-19 Thread Evan Lloyd


> -Original Message-
> From: Sami Mujawar [mailto:sami.muja...@arm.com]
> Sent: 19 March 2018 15:22
> To: edk2-devel@lists.01.org
> Cc: Arvind Chauhan ; Daniil Egranov
> ; Thomas Abraham
> ; Evan Lloyd ;
> leif.lindh...@linaro.org; Matteo Carlini ;
> Stephanie Hughes-Fitt ; nd
> 
> Subject: [PATCH 1/2][platforms/dynamictables] Platform/ARM: Dynamic
> Tables support for Juno
> 
> The dynamic tables framework utilizes the configuration manager
> protocol to get the platform specific information required for
> building the firmware tables.
> 
> The configuration manager is a platform specific component that
> collates the platform hardware information and builds an abstract
> platform configuration repository. The configuration manager also
> implements the configuration manager protocol which returns the
> hardware information requested by the table generators.
> 
> This patch implements the configuration manager support for the
> Juno platform.
> 
> The dynamic tables framework support is configurable and can be
> enabled using the DYNAMIC_TABLES_FRAMEWORK build option.
> 
> When DYNAMIC_TABLES_FRAMEWORK is defined, ACPI tables are
> generated
> and installed by the dynamic table framework. Therefore installation
> of ACPI tables from the Firmware Volume (FV) is disabled by this
> option.
> 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Sami Mujawar 
Reviewed-by: Evan Lloyd 
> ---
>  Platform/ARM/JunoPkg/ArmJuno.dsc 
>  |
> 16 +-
>  Platform/ARM/JunoPkg/ArmJuno.fdf 
>  |
> 14 +-
> 
> Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManager.dsc.i
> nc|  29 +
> 
> Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/
> ConfigurationManager.c  | 589 
> 
> Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/
> ConfigurationManager.h  | 156 ++
> 
> Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/
> ConfigurationManagerDxe.inf |  85 +++
> 
> Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/
> Platform.h  |  65 +++
> 
> Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/Dsdt
> .asl   | 306 ++
> 
> Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/Platf
> ormASLTablesLib.inf   |  44 ++
> 
> Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/SsdtJ
> unoUsb.asl| 122 
> 
> Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/Ssdt
> Pci.asl| 218 
> 
> Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/Ssdt
> Uart.asl   |  48 ++
>  Platform/ARM/JunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.c
> |   9 +-
>  13 files changed, 1697 insertions(+), 4 deletions(-)
> 
> diff --git a/Platform/ARM/JunoPkg/ArmJuno.dsc
> b/Platform/ARM/JunoPkg/ArmJuno.dsc
> index
> 9d7317683ef39ab47429234b98d94c04953b41cb..e75b4848345b83e73aa
> aabea9f5f1dacea5895f6 100644
> --- a/Platform/ARM/JunoPkg/ArmJuno.dsc
> +++ b/Platform/ARM/JunoPkg/ArmJuno.dsc
> @@ -33,6 +33,11 @@ [Defines]
>  # On RTSM, most peripherals are VExpress Motherboard peripherals
>  !include Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc
> 
> +!ifdef DYNAMIC_TABLES_FRAMEWORK
> +!include DynamicTablesPkg/DynamicTables.dsc.inc
> +!include
> Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManager.dsc.i
> nc
> +!endif
> +
>  [LibraryClasses.common]
>ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf
>ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf
> @@ -71,6 +76,14 @@ [LibraryClasses.common.UEFI_DRIVER,
> LibraryClasses.common.UEFI_APPLICATION, Libr
>  [BuildOptions]
>GCC:*_*_ARM_PLATFORM_FLAGS = -march=armv8-a
> 
> +!ifdef DYNAMIC_TABLES_FRAMEWORK
> +  *_*_*_PLATFORM_FLAGS = -DDYNAMIC_TABLES_FRAMEWORK
> +!endif
> +
> +!ifdef DISABLE_LPI
> +  *_*_*_ASLPP_FLAGS = -DDISABLE_LPI
> +!endif
> +
> 
> ##
> ##
>  #
>  # Pcd Section - list of all EDK II PCD Entries defined by this Platform
> @@ -242,8 +255,9 @@ [Components.common]
># ACPI Support
>#
>MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
> +!ifndef DYNAMIC_TABLES_FRAMEWORK
>Platform/ARM/JunoPkg/AcpiTables/AcpiTables.inf
> -
> +!endif
>MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
> 
>ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
> diff --git a/Platform/ARM/JunoPkg/ArmJuno.fdf
> b/Platform/ARM/JunoPkg/ArmJuno.fdf
> index
> ee9d0e7f4f6e6ac99ded6a14e88eb2c7854dd473..e35a43e9b64d8141c5aae
> bd1e78446178ec42545 100644
> --- a/Platform/ARM/JunoPkg/ArmJuno.fdf
> +++ 

Re: [edk2] [PATCH 0/1] MdePkg/Library/BaseLib/AArch64: Comment style harmonization

2018-03-19 Thread Gao, Liming
Reviewed-by: Liming Gao 

> -Original Message-
> From: Pete Batard [mailto:p...@akeo.ie]
> Sent: Monday, March 19, 2018 8:48 PM
> To: edk2-devel@lists.01.org
> Cc: Gao, Liming 
> Subject: [PATCH 0/1] MdePkg/Library/BaseLib/AArch64: Comment style 
> harmonization
> 
> This is a follow up on VS2017/ARM64 support, where we found that the assembly 
> for
> SwitchStack did not use the same kind of comments as the other assembly files.
> 
> Regards,
> 
> /Pete
> 
> Pete Batard (1):
>   MdePkg/Library/BaseLib/AArch64: Comment style harmonization
> 
>  MdePkg/Library/BaseLib/AArch64/SwitchStack.S   | 96 ++--
>  MdePkg/Library/BaseLib/AArch64/SwitchStack.asm | 96 ++--
>  2 files changed, 98 insertions(+), 94 deletions(-)
> 
> --
> 2.9.3.windows.2

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Re: [edk2] [staging/dynamictables PATCH 1/2] MdePkg: SMMUv3 updates for IORT table definitions

2018-03-19 Thread Sami Mujawar
Hi Ard, Mike, Liming,

This patch is a precursor to the Dynamic Tables Framework and has hence been 
included in the patchset for the staging branch.

The original patch that needs integration in the edk2 master branch is 
https://lists.01.org/pipermail/edk2-devel/2018-March/022263.html

Regards,

Sami Mujawar

-Original Message-
From: Ard Biesheuvel  
Sent: 19 March 2018 03:22 PM
To: Sami Mujawar ; Kinney, Michael D 
; Gao, Liming 
Cc: edk2-devel@lists.01.org; nd ; Leif Lindholm 
; Stephanie Hughes-Fitt 

Subject: Re: [edk2] [staging/dynamictables PATCH 1/2] MdePkg: SMMUv3 updates 
for IORT table definitions

On 19 March 2018 at 23:18, Sami Mujawar  wrote:
> Updated the IORT SMMUv3 Node structure and flags to match the IO 
> Remapping Table, Platform Design Document, Revision C dated
> 15 MAY 2017.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Sami Mujawar 
> Reviewed-by: Ard Biesheuvel 

Mike, Liming: may we please have your acks on this patch please? This does not 
belong in a staging branch, it reflects an ACPI spec update.


> ---
>  MdePkg/Include/IndustryStandard/IoRemappingTable.h | 11 ++-
>  1 file changed, 10 insertions(+), 1 deletion(-)
>
> diff --git a/MdePkg/Include/IndustryStandard/IoRemappingTable.h 
> b/MdePkg/Include/IndustryStandard/IoRemappingTable.h
> index 
> c113afdd27843111bc7ad6e1de1108260fad2bbc..2e5cb45d7e2ffd4a0559ef706b71
> 874843e3fdbd 100644
> --- a/MdePkg/Include/IndustryStandard/IoRemappingTable.h
> +++ b/MdePkg/Include/IndustryStandard/IoRemappingTable.h
> @@ -4,6 +4,7 @@
>
> http://infocenter.arm.com/help/topic/com.arm.doc.den0049c/DEN0049C_IO_
> Remapping_Table.pdf
>
>Copyright (c) 2017, Linaro Limited. All rights reserved.
> +  Copyright (c) 2018, ARM Limited. All rights reserved.
>
>This program and the accompanying materials
>are licensed and made available under the terms and conditions of 
> the BSD License @@ -53,6 +54,11 @@
>
>  #define EFI_ACPI_IORT_SMMUv3_FLAG_COHAC_OVERRIDEBIT0
>  #define EFI_ACPI_IORT_SMMUv3_FLAG_HTTU_OVERRIDE BIT1
> +#define EFI_ACPI_IORT_SMMUv3_FLAG_PROXIMITY_DOMAIN  BIT3
> +
> +#define EFI_ACPI_IORT_SMMUv3_MODEL_GENERIC  0x0
> +#define EFI_ACPI_IORT_SMMUv3_MODEL_HISILICON_HI161X 0x1
> +#define EFI_ACPI_IORT_SMMUv3_MODEL_CAVIUM_CN99XX0x2
>
>  #define EFI_ACPI_IORT_ROOT_COMPLEX_ATS_UNSUPPORTED  0x0
>  #define EFI_ACPI_IORT_ROOT_COMPLEX_ATS_SUPPORTED0x1
> @@ -165,7 +171,7 @@ typedef struct {
>  } EFI_ACPI_6_0_IO_REMAPPING_SMMU_NODE;
>
>  ///
> -/// Node type 4: SMMUv4 node
> +/// Node type 4: SMMUv3 node
>  ///
>  typedef struct {
>EFI_ACPI_6_0_IO_REMAPPING_NODE  Node;
> @@ -179,6 +185,9 @@ typedef struct {
>UINT32  Pri;
>UINT32  Gerr;
>UINT32  Sync;
> +  UINT8   ProximityDomain;
> +  UINT8   Reserved1[3];
> +  UINT32  DeviceIdMappingIndex;
>  } EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE;
>
>  ///
> --
> 'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'
>
>
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[edk2] [PATCH 2/2][platforms/dynamictables] Platform/ARM: Dynamic Tables support for FVP

2018-03-19 Thread Sami Mujawar
The dynamic tables framework utilizes the configuration manager
protocol to get the platform specific information required for
building the firmware tables.

The configuration manager is a platform specific component that
collates the platform hardware information and builds an abstract
platform configuration repository. The configuration manager also
implements the configuration manager protocol which returns the
hardware information requested by the table generators.

This patch implements the configuration manager support for the
FVP platform.

The dynamic tables framework support is configurable and can be
enabled using the DYNAMIC_TABLES_FRAMEWORK build option.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Sami Mujawar 
---
 Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc   
   |  15 +
 Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf   
   |  16 +-
 Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManager.dsc.inc 
   |  31 +
 
Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c
  | 607 
 
Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h
  | 172 ++
 
Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf
 |  78 +++
 
Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/Platform.h
  |  91 +++
 Platform/ARM/VExpressPkg/ConfigurationManager/PlatformASLTablesLib/Dsdt.asl
   |  77 +++
 
Platform/ARM/VExpressPkg/ConfigurationManager/PlatformASLTablesLib/PlatformASLTablesLib.inf
   |  34 ++
 9 files changed, 1119 insertions(+), 2 deletions(-)

diff --git a/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc 
b/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc
index 
cdf9e2d49784d542701dc84eb511f592e77ec106..ed1a16b7b35d9854847e3898f8061abb5261e134
 100644
--- a/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc
+++ b/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc
@@ -38,6 +38,10 @@ [Defines]
   DT_SUPPORT = FALSE
 
 !include Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc
+!ifdef DYNAMIC_TABLES_FRAMEWORK
+  !include DynamicTablesPkg/DynamicTables.dsc.inc
+  !include 
Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManager.dsc.inc
+!endif
 
 [LibraryClasses.common]
   ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf
@@ -128,6 +132,15 @@ [PcdsFixedAtBuild.common]
   gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x1c09
   gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200
   gEfiMdePkgTokenSpaceGuid.PcdUartDefaultReceiveFifoDepth|0
+  gArmPlatformTokenSpaceGuid.PL011UartInterrupt|0x25
+
+  ## PL011 Serial Debug UART
+  gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase|0x1c0a
+  gArmPlatformTokenSpaceGuid.PcdSerialDbgUartBaudRate|115200
+  gArmPlatformTokenSpaceGuid.PcdSerialDbgUartClkInHz|2400
+
+  # SBSA Generic Watchdog
+  gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum|59
 
   ## PL031 RealTimeClock
   gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x1C17
@@ -255,8 +268,10 @@ [Components.common]
 !endif
   }
 
+!ifndef DYNAMIC_TABLES_FRAMEWORK
   MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf
   Platform/ARM/VExpressPkg/AcpiTables/AcpiTables.inf
+!endif
 
   ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
   ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
diff --git a/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf 
b/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf
index 
305e661a2bdc3ade2c16232c77769df5fc6f0c32..db164be9641cf6e3153023752f60f95909ce803c
 100644
--- a/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf
+++ b/Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf
@@ -1,5 +1,5 @@
 #
-#  Copyright (c) 2011 - 2015, ARM Limited. All rights reserved.
+#  Copyright (c) 2011 - 2018, ARM Limited. All rights reserved.
 #
 #  This program and the accompanying materials
 #  are licensed and made available under the terms and conditions of the BSD 
License
@@ -97,9 +97,19 @@ [FV.FvMain]
 
   # ACPI Support
   #
-  INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf
   INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
+!ifndef DYNAMIC_TABLES_FRAMEWORK
+  INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf
   INF RuleOverride=ACPITABLE Platform/ARM/VExpressPkg/AcpiTables/AcpiTables.inf
+!else
+  # Configuration Manager
+  INF 
Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf
+
+  #
+  # Dynamic Table fdf
+  #
+  !include DynamicTablesPkg/DynamicTables.fdf.inc
+!endif
 
   #
   # Multiple Console IO support
@@ -319,8 +329,10 @@ [Rule.Common.UEFI_APPLICATION.BINARY]
 VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
   }
 
+!ifndef 

[edk2] [PATCH 1/2][platforms/dynamictables] Platform/ARM: Dynamic Tables support for Juno

2018-03-19 Thread Sami Mujawar
The dynamic tables framework utilizes the configuration manager
protocol to get the platform specific information required for
building the firmware tables.

The configuration manager is a platform specific component that
collates the platform hardware information and builds an abstract
platform configuration repository. The configuration manager also
implements the configuration manager protocol which returns the
hardware information requested by the table generators.

This patch implements the configuration manager support for the
Juno platform.

The dynamic tables framework support is configurable and can be
enabled using the DYNAMIC_TABLES_FRAMEWORK build option.

When DYNAMIC_TABLES_FRAMEWORK is defined, ACPI tables are generated
and installed by the dynamic table framework. Therefore installation
of ACPI tables from the Firmware Volume (FV) is disabled by this
option.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Sami Mujawar 
---
 Platform/ARM/JunoPkg/ArmJuno.dsc   
   |  16 +-
 Platform/ARM/JunoPkg/ArmJuno.fdf   
   |  14 +-
 Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManager.dsc.inc 
   |  29 +
 
Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c
  | 589 
 
Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h
  | 156 ++
 
Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf
 |  85 +++
 Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/Platform.h   
   |  65 +++
 Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/Dsdt.asl
   | 306 ++
 
Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/PlatformASLTablesLib.inf
   |  44 ++
 Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/SsdtJunoUsb.asl 
   | 122 
 Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/SsdtPci.asl 
   | 218 
 Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/SsdtUart.asl
   |  48 ++
 Platform/ARM/JunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.c   
   |   9 +-
 13 files changed, 1697 insertions(+), 4 deletions(-)

diff --git a/Platform/ARM/JunoPkg/ArmJuno.dsc b/Platform/ARM/JunoPkg/ArmJuno.dsc
index 
9d7317683ef39ab47429234b98d94c04953b41cb..e75b4848345b83e73bea9f5f1dacea5895f6
 100644
--- a/Platform/ARM/JunoPkg/ArmJuno.dsc
+++ b/Platform/ARM/JunoPkg/ArmJuno.dsc
@@ -33,6 +33,11 @@ [Defines]
 # On RTSM, most peripherals are VExpress Motherboard peripherals
 !include Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc
 
+!ifdef DYNAMIC_TABLES_FRAMEWORK
+!include DynamicTablesPkg/DynamicTables.dsc.inc
+!include Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManager.dsc.inc
+!endif
+
 [LibraryClasses.common]
   ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf
   ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf
@@ -71,6 +76,14 @@ [LibraryClasses.common.UEFI_DRIVER, 
LibraryClasses.common.UEFI_APPLICATION, Libr
 [BuildOptions]
   GCC:*_*_ARM_PLATFORM_FLAGS = -march=armv8-a
 
+!ifdef DYNAMIC_TABLES_FRAMEWORK
+  *_*_*_PLATFORM_FLAGS = -DDYNAMIC_TABLES_FRAMEWORK
+!endif
+
+!ifdef DISABLE_LPI
+  *_*_*_ASLPP_FLAGS = -DDISABLE_LPI
+!endif
+
 

 #
 # Pcd Section - list of all EDK II PCD Entries defined by this Platform
@@ -242,8 +255,9 @@ [Components.common]
   # ACPI Support
   #
   MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
+!ifndef DYNAMIC_TABLES_FRAMEWORK
   Platform/ARM/JunoPkg/AcpiTables/AcpiTables.inf
-
+!endif
   MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
 
   ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
diff --git a/Platform/ARM/JunoPkg/ArmJuno.fdf b/Platform/ARM/JunoPkg/ArmJuno.fdf
index 
ee9d0e7f4f6e6ac99ded6a14e88eb2c7854dd473..e35a43e9b64d8141c5aaebd1e78446178ec42545
 100644
--- a/Platform/ARM/JunoPkg/ArmJuno.fdf
+++ b/Platform/ARM/JunoPkg/ArmJuno.fdf
@@ -1,5 +1,5 @@
 #
-#  Copyright (c) 2013-2015, ARM Limited. All rights reserved.
+#  Copyright (c) 2013-2018, ARM Limited. All rights reserved.
 #
 #  This program and the accompanying materials
 #  are licensed and made available under the terms and conditions of the BSD 
License
@@ -114,7 +114,17 @@ [FV.FvMain]
   # ACPI Support
   #
   INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
+!ifndef DYNAMIC_TABLES_FRAMEWORK
   INF RuleOverride=ACPITABLE Platform/ARM/JunoPkg/AcpiTables/AcpiTables.inf
+!else
+  # Configuration Manager
+  INF 
Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf
+
+  #
+  # Dynamic Table fdf
+  #
+  !include DynamicTablesPkg/DynamicTables.fdf.inc
+!endif
 
   INF 

[edk2] [PATCH 0/2] [platforms/dynamictables] Platform support for Dynamic Tables Framework

2018-03-19 Thread Sami Mujawar
The Dynamic Tables Framework is a prototyped as a solution for
automatically generating the firmware tables based on hardware
description. The Dynamic Tables Framework core code is present
in the dynamictables branch in the edk2-staging repository at
https://github.com/tianocore/edk2-staging/tree/dynamictables

This patchset implements the platform specific modules for the
Juno and FVP platform, and the sources can be seen at:
https://github.com/samimujawar/edk2-platforms/tree/187_dynamictables_v1

Sami Mujawar (2):
  Platform/ARM: Dynamic Tables support for Juno
  Platform/ARM: Dynamic Tables support for FVP

 Platform/ARM/JunoPkg/ArmJuno.dsc   
   |  16 +-
 Platform/ARM/JunoPkg/ArmJuno.fdf   
   |  14 +-
 Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManager.dsc.inc 
   |  29 +
 
Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c
  | 589 +++
 
Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h
  | 156 +
 
Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf
 |  85 +++
 Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/Platform.h   
   |  65 +++
 Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/Dsdt.asl
   | 306 ++
 
Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/PlatformASLTablesLib.inf
   |  44 ++
 Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/SsdtJunoUsb.asl 
   | 122 
 Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/SsdtPci.asl 
   | 218 +++
 Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/SsdtUart.asl
   |  48 ++
 Platform/ARM/JunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.c   
   |   9 +-
 Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc   
   |  15 +
 Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf   
   |  16 +-
 Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManager.dsc.inc 
   |  31 +
 
Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c
  | 607 
 
Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h
  | 172 ++
 
Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf
 |  78 +++
 
Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/Platform.h
  |  91 +++
 Platform/ARM/VExpressPkg/ConfigurationManager/PlatformASLTablesLib/Dsdt.asl
   |  77 +++
 
Platform/ARM/VExpressPkg/ConfigurationManager/PlatformASLTablesLib/PlatformASLTablesLib.inf
   |  34 ++
 22 files changed, 2816 insertions(+), 6 deletions(-)
 create mode 100644 
Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManager.dsc.inc
 create mode 100644 
Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c
 create mode 100644 
Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h
 create mode 100644 
Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf
 create mode 100644 
Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/Platform.h
 create mode 100644 
Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/Dsdt.asl
 create mode 100644 
Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/PlatformASLTablesLib.inf
 create mode 100644 
Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/SsdtJunoUsb.asl
 create mode 100644 
Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/SsdtPci.asl
 create mode 100644 
Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/SsdtUart.asl
 create mode 100644 
Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManager.dsc.inc
 create mode 100644 
Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c
 create mode 100644 
Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h
 create mode 100644 
Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf
 create mode 100644 
Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/Platform.h
 create mode 100644 
Platform/ARM/VExpressPkg/ConfigurationManager/PlatformASLTablesLib/Dsdt.asl
 create mode 100644 
Platform/ARM/VExpressPkg/ConfigurationManager/PlatformASLTablesLib/PlatformASLTablesLib.inf

-- 
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'



Re: [edk2] [staging/dynamictables PATCH 1/2] MdePkg: SMMUv3 updates for IORT table definitions

2018-03-19 Thread Ard Biesheuvel
On 19 March 2018 at 23:18, Sami Mujawar  wrote:
> Updated the IORT SMMUv3 Node structure and flags to match the
> IO Remapping Table, Platform Design Document, Revision C dated
> 15 MAY 2017.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Sami Mujawar 
> Reviewed-by: Ard Biesheuvel 

Mike, Liming: may we please have your acks on this patch please? This
does not belong in a staging branch, it reflects an ACPI spec update.


> ---
>  MdePkg/Include/IndustryStandard/IoRemappingTable.h | 11 ++-
>  1 file changed, 10 insertions(+), 1 deletion(-)
>
> diff --git a/MdePkg/Include/IndustryStandard/IoRemappingTable.h 
> b/MdePkg/Include/IndustryStandard/IoRemappingTable.h
> index 
> c113afdd27843111bc7ad6e1de1108260fad2bbc..2e5cb45d7e2ffd4a0559ef706b71874843e3fdbd
>  100644
> --- a/MdePkg/Include/IndustryStandard/IoRemappingTable.h
> +++ b/MdePkg/Include/IndustryStandard/IoRemappingTable.h
> @@ -4,6 +4,7 @@
>
> http://infocenter.arm.com/help/topic/com.arm.doc.den0049c/DEN0049C_IO_Remapping_Table.pdf
>
>Copyright (c) 2017, Linaro Limited. All rights reserved.
> +  Copyright (c) 2018, ARM Limited. All rights reserved.
>
>This program and the accompanying materials
>are licensed and made available under the terms and conditions of the BSD 
> License
> @@ -53,6 +54,11 @@
>
>  #define EFI_ACPI_IORT_SMMUv3_FLAG_COHAC_OVERRIDEBIT0
>  #define EFI_ACPI_IORT_SMMUv3_FLAG_HTTU_OVERRIDE BIT1
> +#define EFI_ACPI_IORT_SMMUv3_FLAG_PROXIMITY_DOMAIN  BIT3
> +
> +#define EFI_ACPI_IORT_SMMUv3_MODEL_GENERIC  0x0
> +#define EFI_ACPI_IORT_SMMUv3_MODEL_HISILICON_HI161X 0x1
> +#define EFI_ACPI_IORT_SMMUv3_MODEL_CAVIUM_CN99XX0x2
>
>  #define EFI_ACPI_IORT_ROOT_COMPLEX_ATS_UNSUPPORTED  0x0
>  #define EFI_ACPI_IORT_ROOT_COMPLEX_ATS_SUPPORTED0x1
> @@ -165,7 +171,7 @@ typedef struct {
>  } EFI_ACPI_6_0_IO_REMAPPING_SMMU_NODE;
>
>  ///
> -/// Node type 4: SMMUv4 node
> +/// Node type 4: SMMUv3 node
>  ///
>  typedef struct {
>EFI_ACPI_6_0_IO_REMAPPING_NODE  Node;
> @@ -179,6 +185,9 @@ typedef struct {
>UINT32  Pri;
>UINT32  Gerr;
>UINT32  Sync;
> +  UINT8   ProximityDomain;
> +  UINT8   Reserved1[3];
> +  UINT32  DeviceIdMappingIndex;
>  } EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE;
>
>  ///
> --
> 'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'
>
>
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[edk2] [staging/dynamictables PATCH 1/2] MdePkg: SMMUv3 updates for IORT table definitions

2018-03-19 Thread Sami Mujawar
Updated the IORT SMMUv3 Node structure and flags to match the
IO Remapping Table, Platform Design Document, Revision C dated
15 MAY 2017.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Sami Mujawar 
Reviewed-by: Ard Biesheuvel 
---
 MdePkg/Include/IndustryStandard/IoRemappingTable.h | 11 ++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/MdePkg/Include/IndustryStandard/IoRemappingTable.h 
b/MdePkg/Include/IndustryStandard/IoRemappingTable.h
index 
c113afdd27843111bc7ad6e1de1108260fad2bbc..2e5cb45d7e2ffd4a0559ef706b71874843e3fdbd
 100644
--- a/MdePkg/Include/IndustryStandard/IoRemappingTable.h
+++ b/MdePkg/Include/IndustryStandard/IoRemappingTable.h
@@ -4,6 +4,7 @@
   
http://infocenter.arm.com/help/topic/com.arm.doc.den0049c/DEN0049C_IO_Remapping_Table.pdf
 
   Copyright (c) 2017, Linaro Limited. All rights reserved.
+  Copyright (c) 2018, ARM Limited. All rights reserved.
 
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD 
License
@@ -53,6 +54,11 @@
 
 #define EFI_ACPI_IORT_SMMUv3_FLAG_COHAC_OVERRIDEBIT0
 #define EFI_ACPI_IORT_SMMUv3_FLAG_HTTU_OVERRIDE BIT1
+#define EFI_ACPI_IORT_SMMUv3_FLAG_PROXIMITY_DOMAIN  BIT3
+
+#define EFI_ACPI_IORT_SMMUv3_MODEL_GENERIC  0x0
+#define EFI_ACPI_IORT_SMMUv3_MODEL_HISILICON_HI161X 0x1
+#define EFI_ACPI_IORT_SMMUv3_MODEL_CAVIUM_CN99XX0x2
 
 #define EFI_ACPI_IORT_ROOT_COMPLEX_ATS_UNSUPPORTED  0x0
 #define EFI_ACPI_IORT_ROOT_COMPLEX_ATS_SUPPORTED0x1
@@ -165,7 +171,7 @@ typedef struct {
 } EFI_ACPI_6_0_IO_REMAPPING_SMMU_NODE;
 
 ///
-/// Node type 4: SMMUv4 node
+/// Node type 4: SMMUv3 node
 ///
 typedef struct {
   EFI_ACPI_6_0_IO_REMAPPING_NODE  Node;
@@ -179,6 +185,9 @@ typedef struct {
   UINT32  Pri;
   UINT32  Gerr;
   UINT32  Sync;
+  UINT8   ProximityDomain;
+  UINT8   Reserved1[3];
+  UINT32  DeviceIdMappingIndex;
 } EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE;
 
 ///
-- 
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'


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[edk2] [staging/dynamictables PATCH 0/2] Dynamic Tables Framework core

2018-03-19 Thread Sami Mujawar
The Dynamic Tables Framework is a prototyped as a solution for
automatically generating the firmware tables based on hardware
description. 

This patchset is the Dynamic Tables Framework core and implement
the generic/standard modules for dynamically generating ACPI 6.2
tables for ARM platform. The platform specific modules are in the
devel-dynamictables branch in the edk2-platforms repository at: 
https://github.com/tianocore/edk2-platforms/tree/devel-dynamictables

The first patch in this patchset 'MdePkg: SMMUv3 updates for IORT'
is a precursor for the Dynamic Tables Framework and has been submitted
independently to the edk2-devel mailing list where it is currently
awaiting acceptance.

The sources for this patchset can be seen at:
https://github.com/samimujawar/edk2-staging/tree/187_dynamictables_v1

Sami Mujawar (2):
  MdePkg: SMMUv3 updates for IORT table definitions
  DynamicTablesPkg: Dynamic Tables Framework

 
DynamicTablesPkg/Drivers/DynamicTableFactoryDxe/AcpiTableFactory/AcpiTableFactory.c
 |  226 +++
 
DynamicTablesPkg/Drivers/DynamicTableFactoryDxe/DeviceTreeTableFactory/DeviceTreeTableFactory.c
 |  225 +++
 DynamicTablesPkg/Drivers/DynamicTableFactoryDxe/DynamicTableFactory.h  
 |  125 ++
 DynamicTablesPkg/Drivers/DynamicTableFactoryDxe/DynamicTableFactoryDxe.c   
 |   84 +
 DynamicTablesPkg/Drivers/DynamicTableFactoryDxe/DynamicTableFactoryDxe.inf 
 |   59 +
 
DynamicTablesPkg/Drivers/DynamicTableFactoryDxe/SmbiosTableFactory/SmbiosTableFactory.c
 |  226 +++
 DynamicTablesPkg/Drivers/DynamicTableManagerDxe/DynamicTableManagerDxe.c   
 |  533 +
 DynamicTablesPkg/Drivers/DynamicTableManagerDxe/DynamicTableManagerDxe.inf 
 |   48 +
 DynamicTablesPkg/DynamicTables.dsc.inc 
 |   46 +
 DynamicTablesPkg/DynamicTables.fdf.inc 
 |   35 +
 DynamicTablesPkg/DynamicTablesPkg.dec  
 |   42 +
 DynamicTablesPkg/Include/AcpiTableGenerator.h  
 |  282 +++
 DynamicTablesPkg/Include/ArmNameSpaceObjects.h 
 |  587 ++
 DynamicTablesPkg/Include/ConfigurationManagerHelper.h  
 |  119 ++
 DynamicTablesPkg/Include/ConfigurationManagerObject.h  
 |  176 ++
 DynamicTablesPkg/Include/DeviceTreeTableGenerator.h
 |  182 ++
 DynamicTablesPkg/Include/Library/TableHelperLib.h  
 |   70 +
 DynamicTablesPkg/Include/Protocol/ConfigurationManagerProtocol.h   
 |  128 ++
 DynamicTablesPkg/Include/Protocol/DynamicTableFactoryProtocol.h
 |  140 ++
 DynamicTablesPkg/Include/SmbiosTableGenerator.h
 |  240 +++
 DynamicTablesPkg/Include/StandardNameSpaceObjects.h
 |  116 ++
 DynamicTablesPkg/Include/TableGenerator.h  
 |  252 +++
 DynamicTablesPkg/Library/Acpi/Arm/AcpiDbg2LibArm/AcpiDbg2LibArm.inf
 |   47 +
 DynamicTablesPkg/Library/Acpi/Arm/AcpiDbg2LibArm/Dbg2Generator.c   
 |  440 +
 DynamicTablesPkg/Library/Acpi/Arm/AcpiFadtLibArm/AcpiFadtLibArm.inf
 |   41 +
 DynamicTablesPkg/Library/Acpi/Arm/AcpiFadtLibArm/FadtGenerator.c   
 |  666 +++
 DynamicTablesPkg/Library/Acpi/Arm/AcpiGtdtLibArm/AcpiGtdtLibArm.inf
 |   41 +
 DynamicTablesPkg/Library/Acpi/Arm/AcpiGtdtLibArm/GtdtGenerator.c   
 |  670 +++
 DynamicTablesPkg/Library/Acpi/Arm/AcpiIortLibArm/AcpiIortLibArm.inf
 |   41 +
 DynamicTablesPkg/Library/Acpi/Arm/AcpiIortLibArm/IortGenerator.c   
 | 2046 
 DynamicTablesPkg/Library/Acpi/Arm/AcpiIortLibArm/IortGenerator.h   
 |   50 +
 DynamicTablesPkg/Library/Acpi/Arm/AcpiMadtLibArm/AcpiMadtLibArm.inf
 |   41 +
 DynamicTablesPkg/Library/Acpi/Arm/AcpiMadtLibArm/MadtGenerator.c   
 |  717 +++
 DynamicTablesPkg/Library/Acpi/Arm/AcpiMcfgLibArm/AcpiMcfgLibArm.inf
 |   41 +
 DynamicTablesPkg/Library/Acpi/Arm/AcpiMcfgLibArm/McfgGenerator.c   
 |  342 
 DynamicTablesPkg/Library/Acpi/Arm/AcpiRawLibArm/AcpiRawLibArm.inf  
 |   41 +
 DynamicTablesPkg/Library/Acpi/Arm/AcpiRawLibArm/RawGenerator.c 
 |  142 ++
 

[edk2] 答复: [PATCH] UefiCpuPkg/MpInitLib: Disable interrupt at ExitBootServices AP Mwait

2018-03-19 Thread Fan Jeff
Thanks!

Reviewed-by:  Jeff Fan 

发件人: Hao Wu
发送时间: 2018年3月19日 13:31
收件人: edk2-devel@lists.01.org
抄送: Hao Wu; Laszlo Ersek; 
Jeff Fan; Ruiyu Ni; 
Jiewen Yao; Jian J 
Wang; Star Zeng; Eric 
Dong
主题: [PATCH] UefiCpuPkg/MpInitLib: Disable interrupt at ExitBootServices AP Mwait

Within function ApWakeupFunction():

When source level debugger is enabled, AP interrupts will be enabled by
EnableDebugAgent(). Then the AP function will be execeuted by:

Procedure (Parameter);

After the AP function returns, AP interrupts will be disabled when the
APs are placed in loop mode (both HltLoop and MwaiLoop).

However, at ExitBootServices, ApWakeupFunction() is called with
'Procedure' equals to RelocateApLoop().

(ExitBootServices callback registered within InitMpGlobalData())

RelocateApLoop() never retuns, so it has to disable the AP interrupts by
itself. However, we find that interrupts are only disabled for the
HltLoop case, but not for the MwaitLoop case (within file MpFuncs.nasm).

This commit adds the missing disabling of AP interrupts for MwaitLoop.

Also, for X64, this commit will disable the interrupts before switching to
32-bit mode.

Cc: Laszlo Ersek 
Cc: Jeff Fan 
Cc: Ruiyu Ni 
Cc: Jiewen Yao 
Cc: Jian J Wang 
Cc: Star Zeng 
Cc: Eric Dong 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Hao Wu 
---
 UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm | 3 ++-
 UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm  | 4 +++-
 2 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm 
b/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
index bd79be0f5e..59e88d3f8f 100644
--- a/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
+++ b/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
@@ -1,5 +1,5 @@
 
;-- 
;
-; Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.
+; Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.
 ; This program and the accompanying materials
 ; are licensed and made available under the terms and conditions of the BSD 
License
 ; which accompanies this distribution.  The full text of the license may be 
found at
@@ -239,6 +239,7 @@ AsmRelocateApLoopStart:
 cmpcl,  1  ; Check mwait-monitor support
 jnzHltLoop
 MwaitLoop:
+cli
 moveax, esp
 xorecx, ecx
 xoredx, edx
diff --git a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm 
b/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm
index 759594..76f8c078ab 100644
--- a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm
+++ b/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm
@@ -1,5 +1,5 @@
 
;-- 
;
-; Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.
+; Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.
 ; This program and the accompanying materials
 ; are licensed and made available under the terms and conditions of the BSD 
License
 ; which accompanies this distribution.  The full text of the license may be 
found at
@@ -253,6 +253,7 @@ RendezvousFunnelProcEnd:
 global ASM_PFX(AsmRelocateApLoop)
 ASM_PFX(AsmRelocateApLoop):
 AsmRelocateApLoopStart:
+cli  ; Disable interrupt before switching to 
32-bit mode
 movrax, [rsp + 40]   ; CountTofinish
 lock dec   dword [rax]   ; (*CountTofinish)--
 movrsp, r9
@@ -288,6 +289,7 @@ PmEntry:
 jnzHltLoop
 movebx, edx   ; Save C-State to ebx
 MwaitLoop:
+cli
 moveax, esp   ; Set Monitor Address
 xorecx, ecx   ; ecx = 0
 xoredx, edx   ; edx = 0
--
2.12.0.windows.1

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[edk2] [PATCH 1/1] MdePkg/Library/BaseLib/AArch64: Comment style harmonization

2018-03-19 Thread Pete Batard
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Pete Batard 
---
 MdePkg/Library/BaseLib/AArch64/SwitchStack.S   | 96 ++--
 MdePkg/Library/BaseLib/AArch64/SwitchStack.asm | 96 ++--
 2 files changed, 98 insertions(+), 94 deletions(-)

diff --git a/MdePkg/Library/BaseLib/AArch64/SwitchStack.S 
b/MdePkg/Library/BaseLib/AArch64/SwitchStack.S
index c3ac8d7e4dfe..c39fa75b2892 100644
--- a/MdePkg/Library/BaseLib/AArch64/SwitchStack.S
+++ b/MdePkg/Library/BaseLib/AArch64/SwitchStack.S
@@ -1,17 +1,17 @@
-//--
-//
-// Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.
-// Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
-// Portions copyright (c) 2011 - 2013, ARM Limited. All rights reserved.
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD 
License
-// which accompanies this distribution.  The full text of the license may be 
found at
-// http://opensource.org/licenses/bsd-license.php.
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR 
IMPLIED.
-//
-//--
+#--
+#
+# Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.
+# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
+# Portions copyright (c) 2011 - 2013, ARM Limited. All rights reserved.
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD 
License
+# which accompanies this distribution.  The full text of the license may be 
found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#--
 
 .text
 .align 5
@@ -19,26 +19,27 @@
 GCC_ASM_EXPORT(InternalSwitchStackAsm)
 GCC_ASM_EXPORT(CpuPause)
 
-/**
-//
-//  This allows the caller to switch the stack and goes to the new entry point
-//
-// @param  EntryPoint   The pointer to the location to enter
-// @param  Context  Parameter to pass in
-// @param  Context2 Parameter2 to pass in
-// @param  NewStack New Location of the stack
-//
-// @return Nothing. Goes to the Entry Point passing in the new parameters
-//
-VOID
-EFIAPI
-InternalSwitchStackAsm (
-  SWITCH_STACK_ENTRY_POINT EntryPoint,
-  VOID  *Context,
-  VOID  *Context2,
-  VOID  *NewStack
-  );
-**/
+#/**
+#
+#  This allows the caller to switch the stack and goes to the new entry point
+#
+# @param  EntryPoint   The pointer to the location to enter
+# @param  Context  Parameter to pass in
+# @param  Context2 Parameter2 to pass in
+# @param  NewStack New Location of the stack
+#
+# @return Nothing. Goes to the Entry Point passing in the new parameters
+#
+#**/
+#VOID
+#EFIAPI
+#InternalSwitchStackAsm (
+#  SWITCH_STACK_ENTRY_POINT EntryPoint,
+#  VOID  *Context,
+#  VOID  *Context2,
+#  VOID  *NewStack
+#  );
+#
 ASM_PFX(InternalSwitchStackAsm):
 mov   x29, #0
 mov   x30, x0
@@ -47,19 +48,20 @@ ASM_PFX(InternalSwitchStackAsm):
 mov   x1, x2
 ret
 
-/**
-//
-//  Requests CPU to pause for a short period of time.
-//
-//  Requests CPU to pause for a short period of time. Typically used in MP
-//  systems to prevent memory starvation while waiting for a spin lock.
-//
-VOID
-EFIAPI
-CpuPause (
-  VOID
-  )
-**/
+#/**
+#
+#  Requests CPU to pause for a short period of time.
+#
+#  Requests CPU to pause for a short period of time. Typically used in MP
+#  systems to prevent memory starvation while waiting for a spin lock.
+#
+#**/
+#VOID
+#EFIAPI
+#CpuPause (
+#  VOID
+#  )
+#
 ASM_PFX(CpuPause):
 nop
 nop
diff --git a/MdePkg/Library/BaseLib/AArch64/SwitchStack.asm 
b/MdePkg/Library/BaseLib/AArch64/SwitchStack.asm
index c1b2de07e205..2639547c6145 100644
--- a/MdePkg/Library/BaseLib/AArch64/SwitchStack.asm
+++ b/MdePkg/Library/BaseLib/AArch64/SwitchStack.asm
@@ -1,42 +1,43 @@
-//--
-//
-// Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.
-// Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
-// Portions copyright (c) 2011 - 2013, ARM Limited. All rights reserved.
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD 
License
-// which accompanies this distribution.  The full text of the license may be 
found at
-// http://opensource.org/licenses/bsd-license.php.
-//

[edk2] [PATCH 0/1] MdePkg/Library/BaseLib/AArch64: Comment style harmonization

2018-03-19 Thread Pete Batard
This is a follow up on VS2017/ARM64 support, where we found that the assembly 
for
SwitchStack did not use the same kind of comments as the other assembly files.

Regards,

/Pete

Pete Batard (1):
  MdePkg/Library/BaseLib/AArch64: Comment style harmonization

 MdePkg/Library/BaseLib/AArch64/SwitchStack.S   | 96 ++--
 MdePkg/Library/BaseLib/AArch64/SwitchStack.asm | 96 ++--
 2 files changed, 98 insertions(+), 94 deletions(-)

-- 
2.9.3.windows.2

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[edk2] [PATCH] SourceLevelDebugPkg DebugCommUsb3: Return error when debug cap is reset

2018-03-19 Thread Star Zeng
When source level debug is enabled, but debug cable is not connected,
XhcResetHC() in XhciReg.c will reset the host controller, the debug
capability registers will be also reset. After the code in
InitializeUsbDebugHardware() sets DCE bit and LSE bit to "1" in DCCTRL,
there will be DMA on 0 (the value of some debug capability registers
for data transfer is 0) address buffer, fault info like below will
appear when IOMMU based on VTd is enabled.

  VER_REG - 0x0010
  CAP_REG - 0x00D2008C40660462
  ECAP_REG- 0x00F050DA
  GSTS_REG- 0xC000
  RTADDR_REG  - 0x86512000
  CCMD_REG- 0x2800
  FSTS_REG- 0x0002
  FECTL_REG   - 0xC000
  FEDATA_REG  - 0x
  FEADDR_REG  - 0x
  FEUADDR_REG - 0x
  FRCD_REG[0] - 0xC00600A0 
Fault Info - 0x
Source - B00 D14 F00
Type - 1 (read)
Reason - 6
  IVA_REG - 0x
  IOTLB_REG   - 0x1200

This patch is to return error for the case.

Cc: Ruiyu Ni 
Cc: Hao Wu 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng 
---
 .../DebugCommunicationLibUsb3/DebugCommunicationLibUsb3Common.c   | 8 
 1 file changed, 8 insertions(+)

diff --git 
a/SourceLevelDebugPkg/Library/DebugCommunicationLibUsb3/DebugCommunicationLibUsb3Common.c
 
b/SourceLevelDebugPkg/Library/DebugCommunicationLibUsb3/DebugCommunicationLibUsb3Common.c
index fb9ca84fc7bc..86ecc2f9dbc7 100644
--- 
a/SourceLevelDebugPkg/Library/DebugCommunicationLibUsb3/DebugCommunicationLibUsb3Common.c
+++ 
b/SourceLevelDebugPkg/Library/DebugCommunicationLibUsb3/DebugCommunicationLibUsb3Common.c
@@ -673,11 +673,19 @@ InitializeUsbDebugHardware (
   UINTN   Index;
   UINT8   TotalUsb3Port;
   EFI_PHYSICAL_ADDRESSXhciOpRegister;
+  UINT32  Dcddi1;
 
   XhciOpRegister = Handle->XhciOpRegister;
   TotalUsb3Port = MmioRead32 (((UINTN) Handle->XhciMmioBase + 
XHC_HCSPARAMS1_OFFSET)) >> 24;
 
   if (Handle->Initialized == USB3DBG_NOT_ENABLED) {
+Dcddi1 = XhcReadDebugReg (Handle,XHC_DC_DCDDI1);
+if (Dcddi1 != (UINT32)((XHCI_DEBUG_DEVICE_VENDOR_ID << 16) | 
XHCI_DEBUG_DEVICE_PROTOCOL)) {
+  //
+  // The debug capability has been reset by other code, return device 
error.
+  //
+  return EFI_DEVICE_ERROR;
+}
 //
 // If XHCI supports debug capability, hardware resource has been 
allocated, 
 // but it has not been enabled, try to enable again.
-- 
2.7.0.windows.1

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Re: [edk2] [PATCH] MdeModulePkg/DxeMain: Fix BSP interrupts reenabled in ExitBootServices

2018-03-19 Thread Ni, Ruiyu

On 3/19/2018 3:15 PM, Hao Wu wrote:

Within function CoreExitBootServices(), this commit will move the call
of:

MemoryProtectionExitBootServicesCallback();

before:

SaveAndSetDebugTimerInterrupt (FALSE);
and
gCpu->DisableInterrupt (gCpu);

The reason is that, within MemoryProtectionExitBootServicesCallback(),
APIs like RaiseTpl and RestoreTpl maybe called. An example will be:

DebugLib (using PeiDxeDebugLibReportStatusCode instance)
  |
  v
ReportStatusCodeLib (using DxeReportStatusCodeLib instance)
  |
  v
Raise/RestoreTpl

The call of Raise/RestoreTpl APIs will re-enable BSP interrupts. Hence,
this commit refine the calling sequence to ensure BSP interrupts before
leaving CoreExitBootServices().

Cc: Ruiyu Ni 
Cc: Jiewen Yao 
Cc: Jian J Wang 
Cc: Star Zeng 
Cc: Eric Dong 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Hao Wu 
---
  MdeModulePkg/Core/Dxe/DxeMain/DxeMain.c | 6 +++---
  1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/MdeModulePkg/Core/Dxe/DxeMain/DxeMain.c 
b/MdeModulePkg/Core/Dxe/DxeMain/DxeMain.c
index 62a597edaf..07c7403462 100644
--- a/MdeModulePkg/Core/Dxe/DxeMain/DxeMain.c
+++ b/MdeModulePkg/Core/Dxe/DxeMain/DxeMain.c
@@ -1,7 +1,7 @@
  /** @file
DXE Core Main Entry Point
  
-Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.

+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
  This program and the accompanying materials
  are licensed and made available under the terms and conditions of the BSD 
License
  which accompanies this distribution.  The full text of the license may be 
found at
@@ -805,6 +805,8 @@ CoreExitBootServices (
  (EFI_SOFTWARE_EFI_BOOT_SERVICE | EFI_SW_BS_PC_EXIT_BOOT_SERVICES)
  );
  
+  MemoryProtectionExitBootServicesCallback();

+
//
// Disable interrupt of Debug timer.
//
@@ -815,8 +817,6 @@ CoreExitBootServices (
//
gCpu->DisableInterrupt (gCpu);
  
-  MemoryProtectionExitBootServicesCallback();

-
//
// Clear the non-runtime values of the EFI System Table
//


Reviewed-by: Ruiyu Ni 

--
Thanks,
Ray
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Re: [edk2] [RFC PATCH edk2-platforms 4/6] Silicon/SynQuacer: make lowest supported f/w version PCD configurable

2018-03-19 Thread Zeng, Star
It is to be used to fill the structure with 
EDKII_SYSTEM_FIRMWARE_IMAGE_DESCRIPTOR type, right?
EDKII_SYSTEM_FIRMWARE_IMAGE_DESCRIPTOR is defined in SignedCapsulePkg.
Is it better to define this PCD in SignedCapsulePkg if needed?


Thanks,
Star
-Original Message-
From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Ard 
Biesheuvel
Sent: Monday, March 19, 2018 4:19 PM
To: Leif Lindholm ; Zeng, Star ; 
Ni, Ruiyu ; Dong, Eric 
Cc: edk2-devel@lists.01.org
Subject: Re: [edk2] [RFC PATCH edk2-platforms 4/6] Silicon/SynQuacer: make 
lowest supported f/w version PCD configurable

On 19 March 2018 at 16:12, Leif Lindholm  wrote:
> On Fri, Mar 16, 2018 at 04:13:20PM +, Ard Biesheuvel wrote:
>> Allow the lowest supported firmware version to be configured by PCD 
>> so that each platform can set it individually.
>
> Is there a case for adding this PCD to MdeModulePkg?
>

Given that generic Capsule support is implemented there, I agree this should 
probably be added to MdeModulePkg instead.



>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Ard Biesheuvel 
>> ---
>>  
>> Platform/Socionext/DeveloperBox/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
>>| 2 ++
>>  
>> Platform/Socionext/DeveloperBox/SystemFirmwareDescriptor/SystemFirmwareDescriptorTable.aslc
>>  | 2 +-
>>  Silicon/Socionext/SynQuacer/SynQuacer.dec   
>> | 3 +++
>>  3 files changed, 6 insertions(+), 1 deletion(-)
>>
>> diff --git 
>> a/Platform/Socionext/DeveloperBox/SystemFirmwareDescriptor/SystemFirm
>> wareDescriptor.inf 
>> b/Platform/Socionext/DeveloperBox/SystemFirmwareDescriptor/SystemFirm
>> wareDescriptor.inf index 95a5e482a713..db0c9c43b2e5 100644
>> --- 
>> a/Platform/Socionext/DeveloperBox/SystemFirmwareDescriptor/SystemFirm
>> wareDescriptor.inf
>> +++ b/Platform/Socionext/DeveloperBox/SystemFirmwareDescriptor/System
>> +++ FirmwareDescriptor.inf
>> @@ -29,6 +29,7 @@ [Packages]
>>MdeModulePkg/MdeModulePkg.dec
>>MdePkg/MdePkg.dec
>>SignedCapsulePkg/SignedCapsulePkg.dec
>> +  Silicon/Socionext/SynQuacer/SynQuacer.dec
>>
>>  [LibraryClasses]
>>DebugLib
>> @@ -39,6 +40,7 @@ [LibraryClasses]
>>  [FixedPcd]
>>gArmTokenSpaceGuid.PcdFdSize
>>gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareRevision
>> +  gSynQuacerTokenSpaceGuid.PcdLowestSupportedFirmwareVersion
>>
>>  [Pcd]
>>
>> gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiSystemFirmwareImageDescrip
>> tor diff --git 
>> a/Platform/Socionext/DeveloperBox/SystemFirmwareDescriptor/SystemFirm
>> wareDescriptorTable.aslc 
>> b/Platform/Socionext/DeveloperBox/SystemFirmwareDescriptor/SystemFirm
>> wareDescriptorTable.aslc index fb69de078313..12a56315a5ab 100644
>> --- 
>> a/Platform/Socionext/DeveloperBox/SystemFirmwareDescriptor/SystemFirm
>> wareDescriptorTable.aslc
>> +++ b/Platform/Socionext/DeveloperBox/SystemFirmwareDescriptor/System
>> +++ FirmwareDescriptorTable.aslc
>> @@ -25,7 +25,7 @@
>>  #define BUILD_STRING(x) L"build #" __BUILD_STRING(x)
>>  #define CURRENT_FIRMWARE_VERSIONFixedPcdGet32 
>> (PcdFirmwareRevision)
>>  #define CURRENT_FIRMWARE_VERSION_STRING BUILD_STRING (FixedPcdGet32 
>> (PcdFirmwareRevision))
>> -#define LOWEST_SUPPORTED_FIRMWARE_VERSION   0x0001
>> +#define LOWEST_SUPPORTED_FIRMWARE_VERSION   FixedPcdGet32 
>> (PcdLowestSupportedFirmwareVersion)
>>
>>  #define IMAGE_IDSIGNATURE_64('S', 'N', 'D', 
>> 'E', 'V', 'B', 'O', 'X')
>>  #define IMAGE_ID_STRING L"Socionext Developer Box"
>> diff --git a/Silicon/Socionext/SynQuacer/SynQuacer.dec 
>> b/Silicon/Socionext/SynQuacer/SynQuacer.dec
>> index eb4fc4ace2f7..ccaf80def06b 100644
>> --- a/Silicon/Socionext/SynQuacer/SynQuacer.dec
>> +++ b/Silicon/Socionext/SynQuacer/SynQuacer.dec
>> @@ -44,6 +44,9 @@ [PcdsFixedAtBuild]
>>
>>
>> gSynQuacerTokenSpaceGuid.PcdI2cReferenceClock|6250|UINT32|0x0
>> 005
>>
>> +  # for capsule update
>> +  
>> + gSynQuacerTokenSpaceGuid.PcdLowestSupportedFirmwareVersion|1|UINT32
>> + |0x0009
>> +
>>  [PcdsPatchableInModule, PcdsDynamic]
>># Enable both RC #0 and RC #1 by default
>>gSynQuacerTokenSpaceGuid.PcdPcieEnableMask|0x3|UINT8|0x0007
>> --
>> 2.15.1
>>
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Re: [edk2] [PATCH 0/4] Add ARM64 support for VS2017

2018-03-19 Thread Gao, Liming
Pete:
  I push your patches into edk2 trunk. Please check them. 

>-Original Message-
>From: Pete Batard [mailto:p...@akeo.ie]
>Sent: Saturday, March 17, 2018 12:36 AM
>To: Gao, Liming ; edk2-devel@lists.01.org
>Cc: Ard Biesheuvel 
>Subject: Re: [edk2] [PATCH 0/4] Add ARM64 support for VS2017
>
>Thanks Liming, much appreciated!
>
>I'll send the comment harmonization patch as soon as I see the
>VS2017/ARM64 changes in edk2 mainline.
>
>Regards,
>
>/Pete
>
>On 2018.03.16 16:31, Gao, Liming wrote:
>> Yes. This is a minor issue. So, I think the effort is small. If it is a big 
>> task to you,
>you can separate it into another patch.
>>
>> And, I don't expect this minor issue break your patches. I give my Reviewed-
>by: Liming Gao 
>>
>> Thanks
>> Liming
>>> -Original Message-
>>> From: Pete Batard [mailto:p...@akeo.ie]
>>> Sent: Saturday, March 17, 2018 12:12 AM
>>> To: edk2-devel@lists.01.org; Gao, Liming 
>>> Cc: Ard Biesheuvel 
>>> Subject: Re: [edk2] [PATCH 0/4] Add ARM64 support for VS2017
>>>
>>> I understand where you're coming from, but that means I have to recreate
>>> this patch set, and then create a new patch for the .S (because it makes
>>> zero sense to require the same comment style on the .asm and not
>request
>>> a follow through for the .S).
>>>
>>> My time being limited, I'd rather only have to produce one new patch,
>>> that will harmonize the comments for both .S and .asm at the same time.
>>>
>>> The end result will be exactly the same, so I'm going to have to insist
>>> that we split the comment harmonization (which is a very minor issue and
>>> should hardly be seen as a showstopper for the patch series in the first
>>> place) into a subsequent patch.
>>>
>>> Thank you,
>>>
>>> /Pete
>>>
>>> On 2018.03.16 15:56, Gao, Liming wrote:
 Pete:
 I understand the existing .S file has the inconsistent comment style. I
>also know new added ASM files are converted from .S files.
>>> But, my comment is for this patch that adds new ASM files. I expect new
>added ASM files have the same style. If you check ARM arch
>>> ASM files, you will find they all have the same style.

 Thanks
 Liming
> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf
>Of Pete Batard
> Sent: Friday, March 16, 2018 7:04 PM
> To: edk2-devel@lists.01.org
> Cc: Gao, Liming ; Ard Biesheuvel
>
> Subject: Re: [edk2] [PATCH 0/4] Add ARM64 support for VS2017
>
> On 2018.03.16 08:24, Gao, Liming wrote:
>> Pete:
>>   .S for GCC assembly, .asm for MSFT assembly. They can have the
>different comment style.
>
> Yes, but as I explained, the actual original issue is that our current
> .S files do *not* have the same comment styles in the first place.
>
> If you look at MdePkg/Library/BaseLib/AArch64/SwitchStack.S, you'll
>see
> that is uses '//' for comments, whereas other .S files, such as
> MdePkg/Library/BaseLib/AArch64/SetJumpLongJump.S, use '#'.
>
> So that is our actual issue here: Regardless of VS2017, the GCC assembly
> files for AARCH64 we currently have do not use the same comment style.
>
> Thus, the only reason why the .asm don't have the same comment style
>in
> our proposal is because the .S, which we derived the .asm from, don't.
> This means that either we should fix the .S too, or we shouldn't fix
> anything at all.
>
>>  Here, my comment is to make sure .asm files have the same
>comment style. I don't request to change .S file.
>
> And what I am saying is that it makes little sense to harmonize the
> comment style for the .asm files, if we're not going to do the same for
> the .S files as well. It just doesn't seem fair in my book to have the
> VS2017 assembly files held to a higher standard than the GCC ones. So
> either we need to fix both, or we fix none at all.
>
> But as I indicated in my last e-mail, I am planning to send an
> additional patch that does comment harmonization, for both .S and .asm,
> *after* this VS2017 series has been applied to mainline. So the change
> you request will happen. Just not as part of this patch series.
>
> And the reason I have insist on splitting these changes is because, if
> we have to alter the .S files to be consistent, then this comment
> harmonization request should logically be handled separately from the
> VS2017 effort.
>
> Please let me know if you still think having a future separate patch,
> that will do .S and .asm comment harmonization, does not make sense.
>
> Regards,
>
> /Pete
>
>>
>>> -Original Message-
>>> From: Pete Batard [mailto:p...@akeo.ie]
>>> Sent: Thursday, March 15, 2018 5:28 

Re: [edk2] [RFC PATCH edk2-platforms 4/6] Silicon/SynQuacer: make lowest supported f/w version PCD configurable

2018-03-19 Thread Ard Biesheuvel
On 19 March 2018 at 16:12, Leif Lindholm  wrote:
> On Fri, Mar 16, 2018 at 04:13:20PM +, Ard Biesheuvel wrote:
>> Allow the lowest supported firmware version to be configured by PCD
>> so that each platform can set it individually.
>
> Is there a case for adding this PCD to MdeModulePkg?
>

Given that generic Capsule support is implemented there, I agree this
should probably be added to MdeModulePkg instead.



>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Ard Biesheuvel 
>> ---
>>  
>> Platform/Socionext/DeveloperBox/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
>>| 2 ++
>>  
>> Platform/Socionext/DeveloperBox/SystemFirmwareDescriptor/SystemFirmwareDescriptorTable.aslc
>>  | 2 +-
>>  Silicon/Socionext/SynQuacer/SynQuacer.dec   
>> | 3 +++
>>  3 files changed, 6 insertions(+), 1 deletion(-)
>>
>> diff --git 
>> a/Platform/Socionext/DeveloperBox/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
>>  
>> b/Platform/Socionext/DeveloperBox/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
>> index 95a5e482a713..db0c9c43b2e5 100644
>> --- 
>> a/Platform/Socionext/DeveloperBox/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
>> +++ 
>> b/Platform/Socionext/DeveloperBox/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
>> @@ -29,6 +29,7 @@ [Packages]
>>MdeModulePkg/MdeModulePkg.dec
>>MdePkg/MdePkg.dec
>>SignedCapsulePkg/SignedCapsulePkg.dec
>> +  Silicon/Socionext/SynQuacer/SynQuacer.dec
>>
>>  [LibraryClasses]
>>DebugLib
>> @@ -39,6 +40,7 @@ [LibraryClasses]
>>  [FixedPcd]
>>gArmTokenSpaceGuid.PcdFdSize
>>gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareRevision
>> +  gSynQuacerTokenSpaceGuid.PcdLowestSupportedFirmwareVersion
>>
>>  [Pcd]
>>gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiSystemFirmwareImageDescriptor
>> diff --git 
>> a/Platform/Socionext/DeveloperBox/SystemFirmwareDescriptor/SystemFirmwareDescriptorTable.aslc
>>  
>> b/Platform/Socionext/DeveloperBox/SystemFirmwareDescriptor/SystemFirmwareDescriptorTable.aslc
>> index fb69de078313..12a56315a5ab 100644
>> --- 
>> a/Platform/Socionext/DeveloperBox/SystemFirmwareDescriptor/SystemFirmwareDescriptorTable.aslc
>> +++ 
>> b/Platform/Socionext/DeveloperBox/SystemFirmwareDescriptor/SystemFirmwareDescriptorTable.aslc
>> @@ -25,7 +25,7 @@
>>  #define BUILD_STRING(x) L"build #" __BUILD_STRING(x)
>>  #define CURRENT_FIRMWARE_VERSIONFixedPcdGet32 
>> (PcdFirmwareRevision)
>>  #define CURRENT_FIRMWARE_VERSION_STRING BUILD_STRING (FixedPcdGet32 
>> (PcdFirmwareRevision))
>> -#define LOWEST_SUPPORTED_FIRMWARE_VERSION   0x0001
>> +#define LOWEST_SUPPORTED_FIRMWARE_VERSION   FixedPcdGet32 
>> (PcdLowestSupportedFirmwareVersion)
>>
>>  #define IMAGE_IDSIGNATURE_64('S', 'N', 'D', 
>> 'E', 'V', 'B', 'O', 'X')
>>  #define IMAGE_ID_STRING L"Socionext Developer Box"
>> diff --git a/Silicon/Socionext/SynQuacer/SynQuacer.dec 
>> b/Silicon/Socionext/SynQuacer/SynQuacer.dec
>> index eb4fc4ace2f7..ccaf80def06b 100644
>> --- a/Silicon/Socionext/SynQuacer/SynQuacer.dec
>> +++ b/Silicon/Socionext/SynQuacer/SynQuacer.dec
>> @@ -44,6 +44,9 @@ [PcdsFixedAtBuild]
>>
>>gSynQuacerTokenSpaceGuid.PcdI2cReferenceClock|6250|UINT32|0x0005
>>
>> +  # for capsule update
>> +  
>> gSynQuacerTokenSpaceGuid.PcdLowestSupportedFirmwareVersion|1|UINT32|0x0009
>> +
>>  [PcdsPatchableInModule, PcdsDynamic]
>># Enable both RC #0 and RC #1 by default
>>gSynQuacerTokenSpaceGuid.PcdPcieEnableMask|0x3|UINT8|0x0007
>> --
>> 2.15.1
>>
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Re: [edk2] [RFC PATCH edk2-platforms 4/6] Silicon/SynQuacer: make lowest supported f/w version PCD configurable

2018-03-19 Thread Leif Lindholm
On Fri, Mar 16, 2018 at 04:13:20PM +, Ard Biesheuvel wrote:
> Allow the lowest supported firmware version to be configured by PCD
> so that each platform can set it individually.

Is there a case for adding this PCD to MdeModulePkg?

/
Leif

> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ard Biesheuvel 
> ---
>  
> Platform/Socionext/DeveloperBox/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
>| 2 ++
>  
> Platform/Socionext/DeveloperBox/SystemFirmwareDescriptor/SystemFirmwareDescriptorTable.aslc
>  | 2 +-
>  Silicon/Socionext/SynQuacer/SynQuacer.dec
>| 3 +++
>  3 files changed, 6 insertions(+), 1 deletion(-)
> 
> diff --git 
> a/Platform/Socionext/DeveloperBox/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
>  
> b/Platform/Socionext/DeveloperBox/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
> index 95a5e482a713..db0c9c43b2e5 100644
> --- 
> a/Platform/Socionext/DeveloperBox/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
> +++ 
> b/Platform/Socionext/DeveloperBox/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
> @@ -29,6 +29,7 @@ [Packages]
>MdeModulePkg/MdeModulePkg.dec
>MdePkg/MdePkg.dec
>SignedCapsulePkg/SignedCapsulePkg.dec
> +  Silicon/Socionext/SynQuacer/SynQuacer.dec
>  
>  [LibraryClasses]
>DebugLib
> @@ -39,6 +40,7 @@ [LibraryClasses]
>  [FixedPcd]
>gArmTokenSpaceGuid.PcdFdSize
>gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareRevision
> +  gSynQuacerTokenSpaceGuid.PcdLowestSupportedFirmwareVersion
>  
>  [Pcd]
>gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiSystemFirmwareImageDescriptor
> diff --git 
> a/Platform/Socionext/DeveloperBox/SystemFirmwareDescriptor/SystemFirmwareDescriptorTable.aslc
>  
> b/Platform/Socionext/DeveloperBox/SystemFirmwareDescriptor/SystemFirmwareDescriptorTable.aslc
> index fb69de078313..12a56315a5ab 100644
> --- 
> a/Platform/Socionext/DeveloperBox/SystemFirmwareDescriptor/SystemFirmwareDescriptorTable.aslc
> +++ 
> b/Platform/Socionext/DeveloperBox/SystemFirmwareDescriptor/SystemFirmwareDescriptorTable.aslc
> @@ -25,7 +25,7 @@
>  #define BUILD_STRING(x) L"build #" __BUILD_STRING(x)
>  #define CURRENT_FIRMWARE_VERSIONFixedPcdGet32 
> (PcdFirmwareRevision)
>  #define CURRENT_FIRMWARE_VERSION_STRING BUILD_STRING (FixedPcdGet32 
> (PcdFirmwareRevision))
> -#define LOWEST_SUPPORTED_FIRMWARE_VERSION   0x0001
> +#define LOWEST_SUPPORTED_FIRMWARE_VERSION   FixedPcdGet32 
> (PcdLowestSupportedFirmwareVersion)
>  
>  #define IMAGE_IDSIGNATURE_64('S', 'N', 'D', 'E', 
> 'V', 'B', 'O', 'X')
>  #define IMAGE_ID_STRING L"Socionext Developer Box"
> diff --git a/Silicon/Socionext/SynQuacer/SynQuacer.dec 
> b/Silicon/Socionext/SynQuacer/SynQuacer.dec
> index eb4fc4ace2f7..ccaf80def06b 100644
> --- a/Silicon/Socionext/SynQuacer/SynQuacer.dec
> +++ b/Silicon/Socionext/SynQuacer/SynQuacer.dec
> @@ -44,6 +44,9 @@ [PcdsFixedAtBuild]
>  
>gSynQuacerTokenSpaceGuid.PcdI2cReferenceClock|6250|UINT32|0x0005
>  
> +  # for capsule update
> +  
> gSynQuacerTokenSpaceGuid.PcdLowestSupportedFirmwareVersion|1|UINT32|0x0009
> +
>  [PcdsPatchableInModule, PcdsDynamic]
># Enable both RC #0 and RC #1 by default
>gSynQuacerTokenSpaceGuid.PcdPcieEnableMask|0x3|UINT8|0x0007
> -- 
> 2.15.1
> 
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Re: [edk2] [PATCH] MdeModulePkg/DxeMain: Fix BSP interrupts reenabled in ExitBootServices

2018-03-19 Thread Yao, Jiewen
reviewed-by: jiewen@intel.com

thank you!
Yao, Jiewen


> 在 2018年3月19日,下午3:15,Hao Wu  写道:
> 
> Within function CoreExitBootServices(), this commit will move the call
> of:
> 
> MemoryProtectionExitBootServicesCallback();
> 
> before:
> 
> SaveAndSetDebugTimerInterrupt (FALSE);
> and
> gCpu->DisableInterrupt (gCpu);
> 
> The reason is that, within MemoryProtectionExitBootServicesCallback(),
> APIs like RaiseTpl and RestoreTpl maybe called. An example will be:
> 
> DebugLib (using PeiDxeDebugLibReportStatusCode instance)
> |
> v
> ReportStatusCodeLib (using DxeReportStatusCodeLib instance)
> |
> v
> Raise/RestoreTpl
> 
> The call of Raise/RestoreTpl APIs will re-enable BSP interrupts. Hence,
> this commit refine the calling sequence to ensure BSP interrupts before
> leaving CoreExitBootServices().
> 
> Cc: Ruiyu Ni 
> Cc: Jiewen Yao 
> Cc: Jian J Wang 
> Cc: Star Zeng 
> Cc: Eric Dong 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Hao Wu 
> ---
> MdeModulePkg/Core/Dxe/DxeMain/DxeMain.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/MdeModulePkg/Core/Dxe/DxeMain/DxeMain.c 
> b/MdeModulePkg/Core/Dxe/DxeMain/DxeMain.c
> index 62a597edaf..07c7403462 100644
> --- a/MdeModulePkg/Core/Dxe/DxeMain/DxeMain.c
> +++ b/MdeModulePkg/Core/Dxe/DxeMain/DxeMain.c
> @@ -1,7 +1,7 @@
> /** @file
>   DXE Core Main Entry Point
> 
> -Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.
> +Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
> This program and the accompanying materials
> are licensed and made available under the terms and conditions of the BSD 
> License
> which accompanies this distribution.  The full text of the license may be 
> found at
> @@ -805,6 +805,8 @@ CoreExitBootServices (
> (EFI_SOFTWARE_EFI_BOOT_SERVICE | EFI_SW_BS_PC_EXIT_BOOT_SERVICES)
> );
> 
> +  MemoryProtectionExitBootServicesCallback();
> +
>   //
>   // Disable interrupt of Debug timer.
>   //
> @@ -815,8 +817,6 @@ CoreExitBootServices (
>   //
>   gCpu->DisableInterrupt (gCpu);
> 
> -  MemoryProtectionExitBootServicesCallback();
> -
>   //
>   // Clear the non-runtime values of the EFI System Table
>   //
> -- 
> 2.12.0.windows.1
> 
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[edk2] [PATCH] MdeModulePkg/DxeMain: Fix BSP interrupts reenabled in ExitBootServices

2018-03-19 Thread Hao Wu
Within function CoreExitBootServices(), this commit will move the call
of:

MemoryProtectionExitBootServicesCallback();

before:

SaveAndSetDebugTimerInterrupt (FALSE);
and
gCpu->DisableInterrupt (gCpu);

The reason is that, within MemoryProtectionExitBootServicesCallback(),
APIs like RaiseTpl and RestoreTpl maybe called. An example will be:

DebugLib (using PeiDxeDebugLibReportStatusCode instance)
 |
 v
ReportStatusCodeLib (using DxeReportStatusCodeLib instance)
 |
 v
Raise/RestoreTpl

The call of Raise/RestoreTpl APIs will re-enable BSP interrupts. Hence,
this commit refine the calling sequence to ensure BSP interrupts before
leaving CoreExitBootServices().

Cc: Ruiyu Ni 
Cc: Jiewen Yao 
Cc: Jian J Wang 
Cc: Star Zeng 
Cc: Eric Dong 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Hao Wu 
---
 MdeModulePkg/Core/Dxe/DxeMain/DxeMain.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/MdeModulePkg/Core/Dxe/DxeMain/DxeMain.c 
b/MdeModulePkg/Core/Dxe/DxeMain/DxeMain.c
index 62a597edaf..07c7403462 100644
--- a/MdeModulePkg/Core/Dxe/DxeMain/DxeMain.c
+++ b/MdeModulePkg/Core/Dxe/DxeMain/DxeMain.c
@@ -1,7 +1,7 @@
 /** @file
   DXE Core Main Entry Point
 
-Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
 This program and the accompanying materials
 are licensed and made available under the terms and conditions of the BSD 
License
 which accompanies this distribution.  The full text of the license may be 
found at
@@ -805,6 +805,8 @@ CoreExitBootServices (
 (EFI_SOFTWARE_EFI_BOOT_SERVICE | EFI_SW_BS_PC_EXIT_BOOT_SERVICES)
 );
 
+  MemoryProtectionExitBootServicesCallback();
+
   //
   // Disable interrupt of Debug timer.
   //
@@ -815,8 +817,6 @@ CoreExitBootServices (
   //
   gCpu->DisableInterrupt (gCpu);
 
-  MemoryProtectionExitBootServicesCallback();
-
   //
   // Clear the non-runtime values of the EFI System Table
   //
-- 
2.12.0.windows.1

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Re: [edk2] [PATCH] UefiCpuPkg/MpInitLib: Disable interrupt at ExitBootServices AP Mwait

2018-03-19 Thread Yao, Jiewen
Reviewed-by: jiewen@intel.com

> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Ni,
> Ruiyu
> Sent: Monday, March 19, 2018 1:54 PM
> To: Wu, Hao A ; edk2-devel@lists.01.org
> Cc: Dong, Eric ; Yao, Jiewen ;
> Laszlo Ersek ; Zeng, Star 
> Subject: Re: [edk2] [PATCH] UefiCpuPkg/MpInitLib: Disable interrupt at
> ExitBootServices AP Mwait
> 
> On 3/19/2018 1:31 PM, Hao Wu wrote:
> > Within function ApWakeupFunction():
> >
> > When source level debugger is enabled, AP interrupts will be enabled by
> > EnableDebugAgent(). Then the AP function will be execeuted by:
> >
> > Procedure (Parameter);
> >
> > After the AP function returns, AP interrupts will be disabled when the
> > APs are placed in loop mode (both HltLoop and MwaiLoop).
> >
> > However, at ExitBootServices, ApWakeupFunction() is called with
> > 'Procedure' equals to RelocateApLoop().
> >
> > (ExitBootServices callback registered within InitMpGlobalData())
> >
> > RelocateApLoop() never retuns, so it has to disable the AP interrupts by
> > itself. However, we find that interrupts are only disabled for the
> > HltLoop case, but not for the MwaitLoop case (within file MpFuncs.nasm).
> >
> > This commit adds the missing disabling of AP interrupts for MwaitLoop.
> >
> > Also, for X64, this commit will disable the interrupts before switching to
> > 32-bit mode.
> >
> > Cc: Laszlo Ersek 
> > Cc: Jeff Fan 
> > Cc: Ruiyu Ni 
> > Cc: Jiewen Yao 
> > Cc: Jian J Wang 
> > Cc: Star Zeng 
> > Cc: Eric Dong 
> > Contributed-under: TianoCore Contribution Agreement 1.1
> > Signed-off-by: Hao Wu 
> > ---
> >   UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm | 3 ++-
> >   UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm  | 4 +++-
> >   2 files changed, 5 insertions(+), 2 deletions(-)
> >
> > diff --git a/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
> b/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
> > index bd79be0f5e..59e88d3f8f 100644
> > --- a/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
> > +++ b/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
> > @@ -1,5 +1,5 @@
> >   
> > ;--
> >  ;
> > -; Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.
> > +; Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.
> >   ; This program and the accompanying materials
> >   ; are licensed and made available under the terms and conditions of the 
> > BSD
> License
> >   ; which accompanies this distribution.  The full text of the license may 
> > be
> found at
> > @@ -239,6 +239,7 @@ AsmRelocateApLoopStart:
> >   cmpcl,  1  ; Check mwait-monitor support
> >   jnzHltLoop
> >   MwaitLoop:
> > +cli
> >   moveax, esp
> >   xorecx, ecx
> >   xoredx, edx
> > diff --git a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm
> b/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm
> > index 759594..76f8c078ab 100644
> > --- a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm
> > +++ b/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm
> > @@ -1,5 +1,5 @@
> >   
> > ;--
> >  ;
> > -; Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.
> > +; Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.
> >   ; This program and the accompanying materials
> >   ; are licensed and made available under the terms and conditions of the 
> > BSD
> License
> >   ; which accompanies this distribution.  The full text of the license may 
> > be
> found at
> > @@ -253,6 +253,7 @@ RendezvousFunnelProcEnd:
> >   global ASM_PFX(AsmRelocateApLoop)
> >   ASM_PFX(AsmRelocateApLoop):
> >   AsmRelocateApLoopStart:
> > +cli  ; Disable interrupt before switching to
> 32-bit mode
> >   movrax, [rsp + 40]   ; CountTofinish
> >   lock dec   dword [rax]   ; (*CountTofinish)--
> >   movrsp, r9
> > @@ -288,6 +289,7 @@ PmEntry:
> >   jnzHltLoop
> >   movebx, edx   ; Save C-State to ebx
> >   MwaitLoop:
> > +cli
> >   moveax, esp   ; Set Monitor Address
> >   xorecx, ecx   ; ecx = 0
> >   xoredx, edx   ; edx = 0
> >
> Reviewed-by: Ruiyu Ni 
> 
> --
> Thanks,
> Ray
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