Re: [edk2] [PATCH 0/2] [platforms/dynamictables] Platform support for Dynamic Tables Framework

2018-03-20 Thread Leif Lindholm 
Note: the branch name (for the subject line) is
  platforms/devel-dynamictables, not platforms/dynamictables.

With Evan's reviewed-by, series pushed as
345b8b2992..e28edfba42.

On Mon, Mar 19, 2018 at 03:21:51PM +, Sami Mujawar wrote:
> The Dynamic Tables Framework is a prototyped as a solution for
> automatically generating the firmware tables based on hardware
> description. The Dynamic Tables Framework core code is present
> in the dynamictables branch in the edk2-staging repository at
> https://github.com/tianocore/edk2-staging/tree/dynamictables
> 
> This patchset implements the platform specific modules for the
> Juno and FVP platform, and the sources can be seen at:
> https://github.com/samimujawar/edk2-platforms/tree/187_dynamictables_v1
> 
> Sami Mujawar (2):
>   Platform/ARM: Dynamic Tables support for Juno
>   Platform/ARM: Dynamic Tables support for FVP
> 
>  Platform/ARM/JunoPkg/ArmJuno.dsc 
>  |  16 +-
>  Platform/ARM/JunoPkg/ArmJuno.fdf 
>  |  14 +-
>  Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManager.dsc.inc   
>  |  29 +
>  
> Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c
>   | 589 +++
>  
> Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h
>   | 156 +
>  
> Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf
>  |  85 +++
>  Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/Platform.h 
>  |  65 +++
>  Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/Dsdt.asl  
>  | 306 ++
>  
> Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/PlatformASLTablesLib.inf
>|  44 ++
>  
> Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/SsdtJunoUsb.asl
> | 122 
>  Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/SsdtPci.asl   
>  | 218 +++
>  Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/SsdtUart.asl  
>  |  48 ++
>  Platform/ARM/JunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.c 
>  |   9 +-
>  Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.dsc 
>  |  15 +
>  Platform/ARM/VExpressPkg/ArmVExpress-FVP-AArch64.fdf 
>  |  16 +-
>  Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManager.dsc.inc   
>  |  31 +
>  
> Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c
>   | 607 
>  
> Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h
>   | 172 ++
>  
> Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf
>  |  78 +++
>  
> Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/Platform.h
>   |  91 +++
>  Platform/ARM/VExpressPkg/ConfigurationManager/PlatformASLTablesLib/Dsdt.asl  
>  |  77 +++
>  
> Platform/ARM/VExpressPkg/ConfigurationManager/PlatformASLTablesLib/PlatformASLTablesLib.inf
>|  34 ++
>  22 files changed, 2816 insertions(+), 6 deletions(-)
>  create mode 100644 
> Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManager.dsc.inc
>  create mode 100644 
> Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c
>  create mode 100644 
> Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h
>  create mode 100644 
> Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf
>  create mode 100644 
> Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/Platform.h
>  create mode 100644 
> Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/Dsdt.asl
>  create mode 100644 
> Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/PlatformASLTablesLib.inf
>  create mode 100644 
> Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/SsdtJunoUsb.asl
>  create mode 100644 
> Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/SsdtPci.asl
>  create mode 100644 
> Platform/ARM/JunoPkg/ConfigurationManager/PlatformASLTablesLib/SsdtUart.asl
>  create mode 100644 
> Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManager.dsc.inc
>  create mode 100644 
> Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c
>  create mode 100644 
> Platform/ARM/VExpressPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h
>  create mode 100644 
>

Re: [edk2] [Patch] DecSpecification: Add structure PCD definition syntax

2018-03-20 Thread Zhu, Yonghong 
Reviewed-by: Yonghong Zhu  

Best Regards,
Zhu Yonghong

-Original Message-
From: Gao, Liming 
Sent: Friday, March 16, 2018 12:43 PM
To: edk2-devel@lists.01.org
Cc: Zhu, Yonghong ; Kinney, Michael D 

Subject: [Patch] DecSpecification: Add structure PCD definition syntax

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao 
Cc: Yonghong Zhu 
Cc: Michael Kinney 
---
 2_dec_file_overview/210_pcd_usage.md   |  7 ++-
 3_edk_ii_dec_file_format/310_pcd_sections.md   | 10 --
 .../32_package_declaration_dec_definitions.md  |  5 -
 3 files changed, 18 insertions(+), 4 deletions(-)

diff --git a/2_dec_file_overview/210_pcd_usage.md 
b/2_dec_file_overview/210_pcd_usage.md
index e6231b2..9b554be 100644
--- a/2_dec_file_overview/210_pcd_usage.md
+++ b/2_dec_file_overview/210_pcd_usage.md
@@ -1,7 +1,7 @@

Re: [edk2] [Patch] BaseTools: Override Max size by build Option Pcd for HII type

2018-03-20 Thread Gao, Liming 
Reviewed-by: Liming Gao 

> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of 
> Yonghong Zhu
> Sent: Wednesday, March 21, 2018 11:07 AM
> To: edk2-devel@lists.01.org
> Subject: [edk2] [Patch] BaseTools: Override Max size by build Option Pcd for 
> HII type
> 
> Current code will generate maxsize for HII type PCD when parser DSC
> file, while this HII type PCD value maybe override in build command
> per --pcd option, so the max size need re-calculate.
> 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Yonghong Zhu 
> ---
>  BaseTools/Source/Python/Workspace/DscBuildData.py | 8 
>  1 file changed, 8 insertions(+)
> 
> diff --git a/BaseTools/Source/Python/Workspace/DscBuildData.py 
> b/BaseTools/Source/Python/Workspace/DscBuildData.py
> index d60d491..8fe4d4f 100644
> --- a/BaseTools/Source/Python/Workspace/DscBuildData.py
> +++ b/BaseTools/Source/Python/Workspace/DscBuildData.py
> @@ -1252,10 +1252,18 @@ class DscBuildData(PlatformBuildClassObject):
>  SkuInfo.DefaultValue = 
> NoFiledValues[(Pcd.TokenSpaceGuidCName,Pcd.TokenCName)][0]
>  else:
>  SkuInfo.HiiDefaultValue = 
> NoFiledValues[(Pcd.TokenSpaceGuidCName,Pcd.TokenCName)][0]
>  for defaultstore in SkuInfo.DefaultStoreDict:
>  SkuInfo.DefaultStoreDict[defaultstore] =
> NoFiledValues[(Pcd.TokenSpaceGuidCName,Pcd.TokenCName)][0]
> +if Pcd.Type in 
> [self._PCD_TYPE_STRING_[MODEL_PCD_DYNAMIC_EX_HII],
> self._PCD_TYPE_STRING_[MODEL_PCD_DYNAMIC_HII]]:
> +if Pcd.DatumType == "VOID*":
> +if not Pcd.MaxDatumSize:
> +Pcd.MaxDatumSize = '0'
> +CurrentSize = int(Pcd.MaxDatumSize,16) if 
> Pcd.MaxDatumSize.upper().startswith("0X") else
> int(Pcd.MaxDatumSize)
> +OptionSize = 
> len((StringToArray(Pcd.PcdValueFromComm)).split(","))
> +MaxSize = max(CurrentSize, OptionSize)
> +Pcd.MaxDatumSize = str(MaxSize)
>  else:
>  PcdInDec = self.DecPcds.get((Name,Guid))
>  if PcdInDec:
>  PcdInDec.PcdValueFromComm = NoFiledValues[(Guid,Name)][0]
>  if PcdInDec.Type in 
> [self._PCD_TYPE_STRING_[MODEL_PCD_FIXED_AT_BUILD],
> --
> 2.6.1.windows.1
> 
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Re: [edk2] [PATCH edk2-platforms v3 12/17] ARM/VExpressPkg: Allocate framebuffer using EfiRuntimeServicesData

2018-03-20 Thread Ard Biesheuvel 
On 21 March 2018 at 00:18, Girish Pathak  wrote:
> As per the UEFI specification(2.7) section 12.9, the GOP framebuffer
> memory can be accessed in the pre-boot and the post boot phase (by OS)
> Therefore the memory type EfiBootServicesData is incorrect for
> the framebuffer memory allocation. Change EfiBootServicesData with
> EfiRuntimeServicesData flag so that allocated memory can be access
> by the OS in the post boot phase.
>

EfiRuntimeServicesData is intended for allocations that the EFI
runtime services need to access themselves at runtime, and will hence
be virtually remapped by SetVirtualAddressMap().

This does not apply to the framebuffer. Even if it may be used at OS
runtime, the firmware itself will never access it, so
EfiRuntimeServicesData is not appropriate

Please use EfiReservedMemory instead.


> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Girish Pathak 
> Signed-off-by: Evan Lloyd 
> ---
>  Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c  
>  | 2 +-
>  
> Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c 
> | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git 
> a/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c 
> b/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c
> index 
> f7cae39c9cc9954ba4cad1bd597ebfc8baf10f11..c0a25a18d3fcfe91a76ee985ee58145b97900fa0
>  100644
> --- a/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c
> +++ b/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c
> @@ -176,7 +176,7 @@ LcdPlatformGetVram (
>}
>Status = gBS->AllocatePages (
>AllocationType,
> -  EfiBootServicesData,
> +  EfiRuntimeServicesData,
>EFI_SIZE_TO_PAGES (((UINTN)LCD_VRAM_SIZE)),
>VramBaseAddress
>);
> diff --git 
> a/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c
>  
> b/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c
> index 
> 2f4814a2adbf01517ba14d75ce579ff35c362379..61ddf77e903e6c33a26b2aa8b76121e807195a9a
>  100644
> --- 
> a/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c
> +++ 
> b/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c
> @@ -232,7 +232,7 @@ LcdPlatformGetVram (
>  // Allocate the VRAM from the DRAM so that nobody else uses it.
>  Status = gBS->AllocatePages (
>  AllocateAddress,
> -EfiBootServicesData,
> +EfiRuntimeServicesData,
>  EFI_SIZE_TO_PAGES (((UINTN)LCD_VRAM_SIZE)),
>  VramBaseAddress
>  );
> --
> 'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'
>
>
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[edk2] [Patch] BaseTools: Override Max size by build Option Pcd for HII type

2018-03-20 Thread Yonghong Zhu 
Current code will generate maxsize for HII type PCD when parser DSC
file, while this HII type PCD value maybe override in build command
per --pcd option, so the max size need re-calculate.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yonghong Zhu 
---
 BaseTools/Source/Python/Workspace/DscBuildData.py | 8 
 1 file changed, 8 insertions(+)

diff --git a/BaseTools/Source/Python/Workspace/DscBuildData.py 
b/BaseTools/Source/Python/Workspace/DscBuildData.py
index d60d491..8fe4d4f 100644
--- a/BaseTools/Source/Python/Workspace/DscBuildData.py
+++ b/BaseTools/Source/Python/Workspace/DscBuildData.py
@@ -1252,10 +1252,18 @@ class DscBuildData(PlatformBuildClassObject):
 SkuInfo.DefaultValue = 
NoFiledValues[(Pcd.TokenSpaceGuidCName,Pcd.TokenCName)][0]
 else:
 SkuInfo.HiiDefaultValue = 
NoFiledValues[(Pcd.TokenSpaceGuidCName,Pcd.TokenCName)][0]
 for defaultstore in SkuInfo.DefaultStoreDict:
 SkuInfo.DefaultStoreDict[defaultstore] = 
NoFiledValues[(Pcd.TokenSpaceGuidCName,Pcd.TokenCName)][0]
+if Pcd.Type in 
[self._PCD_TYPE_STRING_[MODEL_PCD_DYNAMIC_EX_HII], 
self._PCD_TYPE_STRING_[MODEL_PCD_DYNAMIC_HII]]:
+if Pcd.DatumType == "VOID*":
+if not Pcd.MaxDatumSize:
+Pcd.MaxDatumSize = '0'
+CurrentSize = int(Pcd.MaxDatumSize,16) if 
Pcd.MaxDatumSize.upper().startswith("0X") else int(Pcd.MaxDatumSize)
+OptionSize = 
len((StringToArray(Pcd.PcdValueFromComm)).split(","))
+MaxSize = max(CurrentSize, OptionSize)
+Pcd.MaxDatumSize = str(MaxSize)
 else:
 PcdInDec = self.DecPcds.get((Name,Guid))
 if PcdInDec:
 PcdInDec.PcdValueFromComm = NoFiledValues[(Guid,Name)][0]
 if PcdInDec.Type in 
[self._PCD_TYPE_STRING_[MODEL_PCD_FIXED_AT_BUILD],
-- 
2.6.1.windows.1

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Re: [edk2] [Patch] SecurityPkg Tpm2CommandLib: Fix TPM2.0 response memory overflow

2018-03-20 Thread Zhang, Chao B 
Thanks Qin, I will add more comments to explain the magic code

-Original Message-
From: Long, Qin 
Sent: Wednesday, March 21, 2018 10:58 AM
To: Zhang, Chao B ; edk2-devel@lists.01.org
Cc: Yao, Jiewen 
Subject: RE: [Patch] SecurityPkg Tpm2CommandLib: Fix TPM2.0 response memory 
overflow

Hi, Chao,

One minor suggestion to add the comment to explain the following value "8": the 
number of digests in list is not greater than 8 per TPML_DIGEST definition. 
+  if (PcrValues->count > 8) {
+return EFI_DEVICE_ERROR;
+  }

Other looks good to me. 

Reviewed-by: Long Qin 


Best Regards & Thanks,
LONG, Qin

-Original Message-
From: Zhang, Chao B
Sent: Tuesday, March 20, 2018 4:36 PM
To: edk2-devel@lists.01.org
Cc: Long, Qin ; Yao, Jiewen ; Zhang, 
Chao B 
Subject: [Patch] SecurityPkg Tpm2CommandLib: Fix TPM2.0 response memory overflow

TPM2.0 command lib always assumes TPM device and transmission channel can 
respond correctly. But it is not true when communication channel is exploited 
and wrong data is spoofed. Add more logic to prohibit memory overflow attack.

Cc: Long Qin 
Cc: Yao Jiewen 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chao Zhang 
Signed-off-by: Zhang, Chao B 
---
 .../Library/Tpm2CommandLib/Tpm2Capability.c| 21 ++-
 .../Tpm2CommandLib/Tpm2EnhancedAuthorization.c | 16 ++-
 SecurityPkg/Library/Tpm2CommandLib/Tpm2Integrity.c | 19 ++---  
SecurityPkg/Library/Tpm2CommandLib/Tpm2NVStorage.c | 14 --
 SecurityPkg/Library/Tpm2CommandLib/Tpm2Object.c| 31 +-
 SecurityPkg/Library/Tpm2CommandLib/Tpm2Sequences.c | 10 ++-
 SecurityPkg/Library/Tpm2CommandLib/Tpm2Session.c   |  6 -
 7 files changed, 107 insertions(+), 10 deletions(-)

diff --git a/SecurityPkg/Library/Tpm2CommandLib/Tpm2Capability.c 
b/SecurityPkg/Library/Tpm2CommandLib/Tpm2Capability.c
index 79e80fb7a9..42afe107a6 100644
--- a/SecurityPkg/Library/Tpm2CommandLib/Tpm2Capability.c
+++ b/SecurityPkg/Library/Tpm2CommandLib/Tpm2Capability.c
@@ -1,9 +1,9 @@
 /** @file
   Implement TPM2 Capability related command.
 
-Copyright (c) 2013 - 2016, Intel Corporation. All rights reserved. 
+Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved. 
 This program and the accompanying materials  are licensed and made available 
under the terms and conditions of the BSD License  which accompanies this 
distribution.  The full text of the license may be found at  
http://opensource.org/licenses/bsd-license.php
 
@@ -110,10 +110,18 @@ Tpm2GetCapability (
 
   if (RecvBufferSize <= sizeof (TPM2_RESPONSE_HEADER) + sizeof (UINT8)) {
 return EFI_DEVICE_ERROR;
   }
 
+  //
+  // Fail if command failed
+  //
+  if (SwapBytes32(RecvBuffer.Header.responseCode) != TPM_RC_SUCCESS) {
+DEBUG ((EFI_D_ERROR, "Tpm2GetCapability: Response Code error! 0x%08x\r\n", 
SwapBytes32(RecvBuffer.Header.responseCode)));
+return EFI_DEVICE_ERROR;
+  }
+
   //
   // Return the response
   //
   *MoreData = RecvBuffer.MoreData;
   //
@@ -327,10 +335,14 @@ Tpm2GetCapabilitySupportedAlg (
   }
   
   CopyMem (AlgList, , sizeof (TPML_ALG_PROPERTY));
 
   AlgList->count = SwapBytes32 (AlgList->count);
+  if (AlgList->count > MAX_CAP_ALGS) {
+return EFI_DEVICE_ERROR;
+  }
+
   for (Index = 0; Index < AlgList->count; Index++) {
 AlgList->algProperties[Index].alg = SwapBytes16 
(AlgList->algProperties[Index].alg);
 WriteUnaligned32 ((UINT32 *)>algProperties[Index].algProperties, 
SwapBytes32 (ReadUnaligned32 ((UINT32 
*)>algProperties[Index].algProperties)));
   }
 
@@ -474,13 +486,20 @@ Tpm2GetCapabilityPcrs (
   if (EFI_ERROR (Status)) {
 return Status;
   }
 
   Pcrs->count = SwapBytes32 (TpmCap.data.assignedPCR.count);
+  if (Pcrs->count > HASH_COUNT) {
+return EFI_DEVICE_ERROR;
+  }
+
   for (Index = 0; Index < Pcrs->count; Index++) {
 Pcrs->pcrSelections[Index].hash = SwapBytes16 
(TpmCap.data.assignedPCR.pcrSelections[Index].hash);
 Pcrs->pcrSelections[Index].sizeofSelect = 
TpmCap.data.assignedPCR.pcrSelections[Index].sizeofSelect;
+if (Pcrs->pcrSelections[Index].sizeofSelect > PCR_SELECT_MAX) {
+  return EFI_DEVICE_ERROR;
+}
 CopyMem (Pcrs->pcrSelections[Index].pcrSelect, 
TpmCap.data.assignedPCR.pcrSelections[Index].pcrSelect, 
Pcrs->pcrSelections[Index].sizeofSelect);
   }
 
   return EFI_SUCCESS;
 }
diff --git a/SecurityPkg/Library/Tpm2CommandLib/Tpm2EnhancedAuthorization.c 
b/SecurityPkg/Library/Tpm2CommandLib/Tpm2EnhancedAuthorization.c
index 6f6b3693f8..3e42875b83 100644
--- a/SecurityPkg/Library/Tpm2CommandLib/Tpm2EnhancedAuthorization.c
+++ b/SecurityPkg/Library/Tpm2CommandLib/Tpm2EnhancedAuthorization.c
@@ -1,9 +1,9 @@
 /** @file
   Implement TPM2 EnhancedAuthorization

Re: [edk2] [Patch] SecurityPkg Tpm12CommandLib: Fix TPM12 GetCapability response error

2018-03-20 Thread Long, Qin 
Reviewed-by: Long Qin 

Best Regards & Thanks,
LONG, Qin

-Original Message-
From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Zhang, 
Chao B
Sent: Tuesday, March 20, 2018 11:12 PM
To: edk2-devel@lists.01.org
Cc: Yao, Jiewen ; Zhang, Chao B ; 
Long, Qin 
Subject: [edk2] [Patch] SecurityPkg Tpm12CommandLib: Fix TPM12 GetCapability 
response error

TPM12 command lib doesn't convert Response Size before using. Add logic to fix 
the issue.

Cc: Long Qin 
Cc: Yao Jiewen 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chao Zhang 
Signed-off-by: Zhang, Chao B 
---
 SecurityPkg/Library/Tpm12CommandLib/Tpm12GetCapability.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/SecurityPkg/Library/Tpm12CommandLib/Tpm12GetCapability.c 
b/SecurityPkg/Library/Tpm12CommandLib/Tpm12GetCapability.c
index c6eb9e1050..29d7a13edb 100644
--- a/SecurityPkg/Library/Tpm12CommandLib/Tpm12GetCapability.c
+++ b/SecurityPkg/Library/Tpm12CommandLib/Tpm12GetCapability.c
@@ -1,9 +1,9 @@
 /** @file
   Implement TPM1.2 Get Capabilities related commands.
 
-Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved. 
+Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved. 
 This program and the accompanying materials  are licensed and made available 
under the terms and conditions of the BSD License  which accompanies this 
distribution.  The full text of the license may be found at  
http://opensource.org/licenses/bsd-license.php
 
@@ -83,11 +83,11 @@ Tpm12GetCapabilityFlagPermanent (
 DEBUG ((DEBUG_ERROR, "Tpm12GetCapabilityFlagPermanent: Response Code 
error! 0x%08x\r\n", SwapBytes32 (Response.Hdr.returnCode)));
 return EFI_DEVICE_ERROR;
   }
 
   ZeroMem (TpmPermanentFlags, sizeof (*TpmPermanentFlags));
-  CopyMem (TpmPermanentFlags, , MIN (sizeof 
(*TpmPermanentFlags), Response.ResponseSize));
+  CopyMem (TpmPermanentFlags, , MIN (sizeof 
+ (*TpmPermanentFlags), SwapBytes32(Response.ResponseSize)));
 
   return Status;
 }
 
 /**
@@ -129,9 +129,9 @@ Tpm12GetCapabilityFlagVolatile (
 DEBUG ((DEBUG_ERROR, "Tpm12GetCapabilityFlagVolatile: Response Code error! 
0x%08x\r\n", SwapBytes32 (Response.Hdr.returnCode)));
 return EFI_DEVICE_ERROR;
   }
 
   ZeroMem (VolatileFlags, sizeof (*VolatileFlags));
-  CopyMem (VolatileFlags, , MIN (sizeof (*VolatileFlags), 
Response.ResponseSize));
+  CopyMem (VolatileFlags, , MIN (sizeof 
+ (*VolatileFlags), SwapBytes32(Response.ResponseSize)));
 
   return Status;
 }
--
2.16.2.windows.1

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Re: [edk2] [Patch] SecurityPkg Tpm2CommandLib: Fix TPM2.0 response memory overflow

2018-03-20 Thread Long, Qin 
Hi, Chao,

One minor suggestion to add the comment to explain the following value "8": the 
number of digests in list is not greater than 8 per TPML_DIGEST definition. 
+  if (PcrValues->count > 8) {
+return EFI_DEVICE_ERROR;
+  }

Other looks good to me. 

Reviewed-by: Long Qin 


Best Regards & Thanks,
LONG, Qin

-Original Message-
From: Zhang, Chao B 
Sent: Tuesday, March 20, 2018 4:36 PM
To: edk2-devel@lists.01.org
Cc: Long, Qin ; Yao, Jiewen ; Zhang, 
Chao B 
Subject: [Patch] SecurityPkg Tpm2CommandLib: Fix TPM2.0 response memory overflow

TPM2.0 command lib always assumes TPM device and transmission channel can 
respond correctly. But it is not true when communication channel is exploited 
and wrong data is spoofed. Add more logic to prohibit memory overflow attack.

Cc: Long Qin 
Cc: Yao Jiewen 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chao Zhang 
Signed-off-by: Zhang, Chao B 
---
 .../Library/Tpm2CommandLib/Tpm2Capability.c| 21 ++-
 .../Tpm2CommandLib/Tpm2EnhancedAuthorization.c | 16 ++-
 SecurityPkg/Library/Tpm2CommandLib/Tpm2Integrity.c | 19 ++---  
SecurityPkg/Library/Tpm2CommandLib/Tpm2NVStorage.c | 14 --
 SecurityPkg/Library/Tpm2CommandLib/Tpm2Object.c| 31 +-
 SecurityPkg/Library/Tpm2CommandLib/Tpm2Sequences.c | 10 ++-
 SecurityPkg/Library/Tpm2CommandLib/Tpm2Session.c   |  6 -
 7 files changed, 107 insertions(+), 10 deletions(-)

diff --git a/SecurityPkg/Library/Tpm2CommandLib/Tpm2Capability.c 
b/SecurityPkg/Library/Tpm2CommandLib/Tpm2Capability.c
index 79e80fb7a9..42afe107a6 100644
--- a/SecurityPkg/Library/Tpm2CommandLib/Tpm2Capability.c
+++ b/SecurityPkg/Library/Tpm2CommandLib/Tpm2Capability.c
@@ -1,9 +1,9 @@
 /** @file
   Implement TPM2 Capability related command.
 
-Copyright (c) 2013 - 2016, Intel Corporation. All rights reserved. 
+Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved. 
 This program and the accompanying materials  are licensed and made available 
under the terms and conditions of the BSD License  which accompanies this 
distribution.  The full text of the license may be found at  
http://opensource.org/licenses/bsd-license.php
 
@@ -110,10 +110,18 @@ Tpm2GetCapability (
 
   if (RecvBufferSize <= sizeof (TPM2_RESPONSE_HEADER) + sizeof (UINT8)) {
 return EFI_DEVICE_ERROR;
   }
 
+  //
+  // Fail if command failed
+  //
+  if (SwapBytes32(RecvBuffer.Header.responseCode) != TPM_RC_SUCCESS) {
+DEBUG ((EFI_D_ERROR, "Tpm2GetCapability: Response Code error! 0x%08x\r\n", 
SwapBytes32(RecvBuffer.Header.responseCode)));
+return EFI_DEVICE_ERROR;
+  }
+
   //
   // Return the response
   //
   *MoreData = RecvBuffer.MoreData;
   //
@@ -327,10 +335,14 @@ Tpm2GetCapabilitySupportedAlg (
   }
   
   CopyMem (AlgList, , sizeof (TPML_ALG_PROPERTY));
 
   AlgList->count = SwapBytes32 (AlgList->count);
+  if (AlgList->count > MAX_CAP_ALGS) {
+return EFI_DEVICE_ERROR;
+  }
+
   for (Index = 0; Index < AlgList->count; Index++) {
 AlgList->algProperties[Index].alg = SwapBytes16 
(AlgList->algProperties[Index].alg);
 WriteUnaligned32 ((UINT32 *)>algProperties[Index].algProperties, 
SwapBytes32 (ReadUnaligned32 ((UINT32 
*)>algProperties[Index].algProperties)));
   }
 
@@ -474,13 +486,20 @@ Tpm2GetCapabilityPcrs (
   if (EFI_ERROR (Status)) {
 return Status;
   }
 
   Pcrs->count = SwapBytes32 (TpmCap.data.assignedPCR.count);
+  if (Pcrs->count > HASH_COUNT) {
+return EFI_DEVICE_ERROR;
+  }
+
   for (Index = 0; Index < Pcrs->count; Index++) {
 Pcrs->pcrSelections[Index].hash = SwapBytes16 
(TpmCap.data.assignedPCR.pcrSelections[Index].hash);
 Pcrs->pcrSelections[Index].sizeofSelect = 
TpmCap.data.assignedPCR.pcrSelections[Index].sizeofSelect;
+if (Pcrs->pcrSelections[Index].sizeofSelect > PCR_SELECT_MAX) {
+  return EFI_DEVICE_ERROR;
+}
 CopyMem (Pcrs->pcrSelections[Index].pcrSelect, 
TpmCap.data.assignedPCR.pcrSelections[Index].pcrSelect, 
Pcrs->pcrSelections[Index].sizeofSelect);
   }
 
   return EFI_SUCCESS;
 }
diff --git a/SecurityPkg/Library/Tpm2CommandLib/Tpm2EnhancedAuthorization.c 
b/SecurityPkg/Library/Tpm2CommandLib/Tpm2EnhancedAuthorization.c
index 6f6b3693f8..3e42875b83 100644
--- a/SecurityPkg/Library/Tpm2CommandLib/Tpm2EnhancedAuthorization.c
+++ b/SecurityPkg/Library/Tpm2CommandLib/Tpm2EnhancedAuthorization.c
@@ -1,9 +1,9 @@
 /** @file
   Implement TPM2 EnhancedAuthorization related command.
 
-Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved. 
+Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved. 
 This program and the accompanying materials  are licensed and made available 
under the terms and conditions of the BSD License  which accompanies this 
distribution.  The full text of the

Re: [edk2] [staging/dynamictables PATCH 0/2] Dynamic Tables Framework core

2018-03-20 Thread Leif Lindholm 
Pushed with Evan's R-b as 1ff9bc214c..c47bc46170.

On Mon, Mar 19, 2018 at 03:18:39PM +, Sami Mujawar wrote:
> The Dynamic Tables Framework is a prototyped as a solution for
> automatically generating the firmware tables based on hardware
> description. 
> 
> This patchset is the Dynamic Tables Framework core and implement
> the generic/standard modules for dynamically generating ACPI 6.2
> tables for ARM platform. The platform specific modules are in the
> devel-dynamictables branch in the edk2-platforms repository at: 
> https://github.com/tianocore/edk2-platforms/tree/devel-dynamictables
> 
> The first patch in this patchset 'MdePkg: SMMUv3 updates for IORT'
> is a precursor for the Dynamic Tables Framework and has been submitted
> independently to the edk2-devel mailing list where it is currently
> awaiting acceptance.
> 
> The sources for this patchset can be seen at:
> https://github.com/samimujawar/edk2-staging/tree/187_dynamictables_v1
> 
> Sami Mujawar (2):
>   MdePkg: SMMUv3 updates for IORT table definitions
>   DynamicTablesPkg: Dynamic Tables Framework
> 
>  
> DynamicTablesPkg/Drivers/DynamicTableFactoryDxe/AcpiTableFactory/AcpiTableFactory.c
>  |  226 +++
>  
> DynamicTablesPkg/Drivers/DynamicTableFactoryDxe/DeviceTreeTableFactory/DeviceTreeTableFactory.c
>  |  225 +++
>  DynamicTablesPkg/Drivers/DynamicTableFactoryDxe/DynamicTableFactory.h
>|  125 ++
>  DynamicTablesPkg/Drivers/DynamicTableFactoryDxe/DynamicTableFactoryDxe.c 
>|   84 +
>  DynamicTablesPkg/Drivers/DynamicTableFactoryDxe/DynamicTableFactoryDxe.inf   
>|   59 +
>  
> DynamicTablesPkg/Drivers/DynamicTableFactoryDxe/SmbiosTableFactory/SmbiosTableFactory.c
>  |  226 +++
>  DynamicTablesPkg/Drivers/DynamicTableManagerDxe/DynamicTableManagerDxe.c 
>|  533 +
>  DynamicTablesPkg/Drivers/DynamicTableManagerDxe/DynamicTableManagerDxe.inf   
>|   48 +
>  DynamicTablesPkg/DynamicTables.dsc.inc   
>|   46 +
>  DynamicTablesPkg/DynamicTables.fdf.inc   
>|   35 +
>  DynamicTablesPkg/DynamicTablesPkg.dec
>|   42 +
>  DynamicTablesPkg/Include/AcpiTableGenerator.h
>|  282 +++
>  DynamicTablesPkg/Include/ArmNameSpaceObjects.h   
>|  587 ++
>  DynamicTablesPkg/Include/ConfigurationManagerHelper.h
>|  119 ++
>  DynamicTablesPkg/Include/ConfigurationManagerObject.h
>|  176 ++
>  DynamicTablesPkg/Include/DeviceTreeTableGenerator.h  
>|  182 ++
>  DynamicTablesPkg/Include/Library/TableHelperLib.h
>|   70 +
>  DynamicTablesPkg/Include/Protocol/ConfigurationManagerProtocol.h 
>|  128 ++
>  DynamicTablesPkg/Include/Protocol/DynamicTableFactoryProtocol.h  
>|  140 ++
>  DynamicTablesPkg/Include/SmbiosTableGenerator.h  
>|  240 +++
>  DynamicTablesPkg/Include/StandardNameSpaceObjects.h  
>|  116 ++
>  DynamicTablesPkg/Include/TableGenerator.h
>|  252 +++
>  DynamicTablesPkg/Library/Acpi/Arm/AcpiDbg2LibArm/AcpiDbg2LibArm.inf  
>|   47 +
>  DynamicTablesPkg/Library/Acpi/Arm/AcpiDbg2LibArm/Dbg2Generator.c 
>|  440 +
>  DynamicTablesPkg/Library/Acpi/Arm/AcpiFadtLibArm/AcpiFadtLibArm.inf  
>|   41 +
>  DynamicTablesPkg/Library/Acpi/Arm/AcpiFadtLibArm/FadtGenerator.c 
>|  666 +++
>  DynamicTablesPkg/Library/Acpi/Arm/AcpiGtdtLibArm/AcpiGtdtLibArm.inf  
>|   41 +
>  DynamicTablesPkg/Library/Acpi/Arm/AcpiGtdtLibArm/GtdtGenerator.c 
>|  670 +++
>  DynamicTablesPkg/Library/Acpi/Arm/AcpiIortLibArm/AcpiIortLibArm.inf  
>|   41 +
>  DynamicTablesPkg/Library/Acpi/Arm/AcpiIortLibArm/IortGenerator.c 
>| 2046 
>  DynamicTablesPkg/Library/Acpi/Arm/AcpiIortLibArm/IortGenerator.h 
>|   50 +
>  DynamicTablesPkg/Library/Acpi/Arm/AcpiMadtLibArm/AcpiMadtLibArm.inf  
>|   41 +
>  DynamicTablesPkg/Library/Acpi/Arm/AcpiMadtLibArm/MadtGenerator.c 
>|  717 +++
>  DynamicTablesPkg/Library/Acpi/Arm/AcpiMcfgLibArm/AcpiMcfgLibArm.inf  
>|   41 +
>

Re: [edk2] [PATCH] BaseTools/PosixLike: honor pre-set PYTHONPATH

2018-03-20 Thread Gao, Liming 
The change is good. 

Reviewed-by: Liming Gao 

> -Original Message-
> From: Laszlo Ersek [mailto:ler...@redhat.com]
> Sent: Wednesday, March 14, 2018 6:54 PM
> To: edk2-devel-01 
> Cc: Gao, Liming ; Zhu, Yonghong 
> Subject: [PATCH] BaseTools/PosixLike: honor pre-set PYTHONPATH
> 
> Utilities written in Python may depend on external (preinstalled) Python
> packages; for example, Ecc depends on "antlr_python_runtime-3.0.1". Such
> packages need not be installed system-wide, as long as they are reachable
> through PYTHONPATH. Therefore we shouldn't overwrite the user's PYTHONPATH
> with "BaseTools/Source/Python"; instead, we should prepend the latter to
> the former.
> 
> Cc: Liming Gao 
> Cc: Yonghong Zhu 
> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=896
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Laszlo Ersek 
> ---
> 
> Notes:
> Repo:   https://github.com/lersek/edk2.git
> Branch: pythonpath
> 
>  BaseTools/BinWrappers/PosixLike/BPDG  | 2 +-
>  BaseTools/BinWrappers/PosixLike/Ecc   | 2 +-
>  BaseTools/BinWrappers/PosixLike/GenDepex  | 2 +-
>  BaseTools/BinWrappers/PosixLike/GenFds| 2 +-
>  BaseTools/BinWrappers/PosixLike/GenPatchPcdTable  | 2 +-
>  BaseTools/BinWrappers/PosixLike/PatchPcdValue | 2 +-
>  BaseTools/BinWrappers/PosixLike/Pkcs7Sign | 2 +-
>  BaseTools/BinWrappers/PosixLike/Rsa2048Sha256GenerateKeys | 2 +-
>  BaseTools/BinWrappers/PosixLike/Rsa2048Sha256Sign | 2 +-
>  BaseTools/BinWrappers/PosixLike/TargetTool| 2 +-
>  BaseTools/BinWrappers/PosixLike/Trim  | 2 +-
>  BaseTools/BinWrappers/PosixLike/UPT   | 2 +-
>  BaseTools/BinWrappers/PosixLike/build | 2 +-
>  13 files changed, 13 insertions(+), 13 deletions(-)
> 
> diff --git a/BaseTools/BinWrappers/PosixLike/BPDG 
> b/BaseTools/BinWrappers/PosixLike/BPDG
> index 214d88fff1b1..01ae23ddeb4f 100755
> --- a/BaseTools/BinWrappers/PosixLike/BPDG
> +++ b/BaseTools/BinWrappers/PosixLike/BPDG
> @@ -10,5 +10,5 @@ full_cmd=${BASH_SOURCE:-$0} # see 
> http://mywiki.wooledge.org/BashFAQ/028 for a d
>  dir=$(dirname "$full_cmd")
>  cmd=${full_cmd##*/}
> 
> -export PYTHONPATH="$dir/../../Source/Python"
> +export PYTHONPATH="$dir/../../Source/Python${PYTHONPATH:+:"$PYTHONPATH"}"
>  exec "${python_exe:-python}" "$dir/../../Source/Python/$cmd/$cmd.py" "$@"
> diff --git a/BaseTools/BinWrappers/PosixLike/Ecc 
> b/BaseTools/BinWrappers/PosixLike/Ecc
> index 214d88fff1b1..01ae23ddeb4f 100755
> --- a/BaseTools/BinWrappers/PosixLike/Ecc
> +++ b/BaseTools/BinWrappers/PosixLike/Ecc
> @@ -10,5 +10,5 @@ full_cmd=${BASH_SOURCE:-$0} # see 
> http://mywiki.wooledge.org/BashFAQ/028 for a d
>  dir=$(dirname "$full_cmd")
>  cmd=${full_cmd##*/}
> 
> -export PYTHONPATH="$dir/../../Source/Python"
> +export PYTHONPATH="$dir/../../Source/Python${PYTHONPATH:+:"$PYTHONPATH"}"
>  exec "${python_exe:-python}" "$dir/../../Source/Python/$cmd/$cmd.py" "$@"
> diff --git a/BaseTools/BinWrappers/PosixLike/GenDepex 
> b/BaseTools/BinWrappers/PosixLike/GenDepex
> index bdb6722a1f84..dad174788bc3 100755
> --- a/BaseTools/BinWrappers/PosixLike/GenDepex
> +++ b/BaseTools/BinWrappers/PosixLike/GenDepex
> @@ -10,5 +10,5 @@ full_cmd=${BASH_SOURCE:-$0} # see 
> http://mywiki.wooledge.org/BashFAQ/028 for a d
>  dir=$(dirname "$full_cmd")
>  cmd=${full_cmd##*/}
> 
> -export PYTHONPATH="$dir/../../Source/Python"
> +export PYTHONPATH="$dir/../../Source/Python${PYTHONPATH:+:"$PYTHONPATH"}"
>  exec "${python_exe:-python}" "$dir/../../Source/Python/AutoGen/$cmd.py" "$@"
> diff --git a/BaseTools/BinWrappers/PosixLike/GenFds 
> b/BaseTools/BinWrappers/PosixLike/GenFds
> index 214d88fff1b1..01ae23ddeb4f 100755
> --- a/BaseTools/BinWrappers/PosixLike/GenFds
> +++ b/BaseTools/BinWrappers/PosixLike/GenFds
> @@ -10,5 +10,5 @@ full_cmd=${BASH_SOURCE:-$0} # see 
> http://mywiki.wooledge.org/BashFAQ/028 for a d
>  dir=$(dirname "$full_cmd")
>  cmd=${full_cmd##*/}
> 
> -export PYTHONPATH="$dir/../../Source/Python"
> +export PYTHONPATH="$dir/../../Source/Python${PYTHONPATH:+:"$PYTHONPATH"}"
>  exec "${python_exe:-python}" "$dir/../../Source/Python/$cmd/$cmd.py" "$@"
> diff --git a/BaseTools/BinWrappers/PosixLike/GenPatchPcdTable 
> b/BaseTools/BinWrappers/PosixLike/GenPatchPcdTable
> index 214d88fff1b1..01ae23ddeb4f 100755
> --- a/BaseTools/BinWrappers/PosixLike/GenPatchPcdTable
> +++ b/BaseTools/BinWrappers/PosixLike/GenPatchPcdTable
> @@ -10,5 +10,5 @@ full_cmd=${BASH_SOURCE:-$0} # see 
> http://mywiki.wooledge.org/BashFAQ/028 for a d
>  dir=$(dirname "$full_cmd")
>  cmd=${full_cmd##*/}
> 
> -export PYTHONPATH="$dir/../../Source/Python"
> +export

Re: [edk2] [PATCH v5] ShellPkg: Add acpiview tool to dump ACPI tables

2018-03-20 Thread Ard Biesheuvel 
On 9 March 2018 at 00:26, Sami Mujawar  wrote:
> This program is provided to allow examination of ACPI table contents
> from the UEFI Shell.  This can help with investigations, especially at
> that stage where the tables are not enabling an OS to boot.
> The program is not exhaustive, and only encapsulates detailed knowledge
> of a limited number of table types.
>
> Default behaviour is to display the content of all tables installed.
> 'Known' table types will be parsed and displayed with descriptions and
> field values.  Where appropriate a degree of consistency checking is
> done and errors may be reported in the output.
> Other table types will be displayed as an array of Hexadecimal bytes.
>
> To facilitate debugging, the -s and -d options can be used to generate a
> binary file image of a table that can be copied elsewhere for
> investigation using tools such as those provided by acpica.org.  This is
> especially relevant for AML type tables like DSDT and SSDT.
>
> The inspiration for this is the existing smbiosview Debug1 Shell
> command.
>
> Many tables are not explicitly handled, in part because no examples are
> available for our testing.
>
> The program is designed to be extended to new tables with minimal
> effort, and contributions are invited.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Sami Mujawar 
> Signed-off-by: Evan Lloyd 
> Reviewed-by: Jaben Carsey 

Tested-by: Ard Biesheuvel 

Thanks for contributing this, it is really very useful.

One nit: the MADT table is listed as 'APIC' which i think is
incorrect, i.e,. we should refer to the tables by their official names
rather than by the character sequences used as their signatures.
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Re: [edk2] internal structure of EFI_TLS_CA_CERTIFICATE_VARIABLE

2018-03-20 Thread Fu, Siyuan 
Hi, Laszlo

The data structure of EFI_TLS_CA_CERTIFICATE_VARIABLE is EFI_SIGNATURE_LIST and 
we have documented this in HTTPs Boot wiki page: 
https://github.com/tianocore/tianocore.github.io/wiki/HTTPS-Boot

You can refer section 31.4.1 "Signature Database" in UEFI 2.7 A for a detail 
description of EFI_SIGNATURE_LIST structure.


BestRegards
Fu Siyuan


> -Original Message-
> From: Laszlo Ersek [mailto:ler...@redhat.com]
> Sent: Tuesday, March 20, 2018 10:56 PM
> To: Wu, Jiaxin ; Fu, Siyuan 
> Cc: edk2-devel-01 ; Daniel P. Berrange
> 
> Subject: internal structure of EFI_TLS_CA_CERTIFICATE_VARIABLE
> 
> Hi Jiaxin, Siyuan,
> 
> setting *multiple* CA certificates for HTTPS server verification looks
> possible, from the following call tree:
> 
> TlsConfigCertificate()  [NetworkPkg/HttpDxe/HttpsSupport.c]
>   TlsConfigurationSetData() [NetworkPkg/TlsDxe/TlsConfigProtocol.c]
> TlsSetCaCertificate()   [CryptoPkg/Library/TlsLib/TlsConfig.c]
>   X509_STORE_add_cert()
> 
> because the outermost TlsConfigCertificate() function implements a loop
> over the EFI_TLS_CA_CERTIFICATE_VARIABLE contents.
> 
> Is there natural-language documentation available about the internal
> structure of EFI_TLS_CA_CERTIFICATE_VARIABLE?
> 
> Because, OVMF should avoid taking one format of CA Cert list from QEMU
> (i.e. from the virtualization host) and converting it to the format
> expected by TlsConfigCertificate(). Instead, the "update-ca-trust"
> command should be taught (on the host system) to generate a binary
> certificate list file (somewhere under "/etc/pki/ca-trust/extracted", I
> believe) such that the file can be used directly for setting
> EFI_TLS_CA_CERTIFICATE_VARIABLE in the guest.
> 
> In order to write such an extractor for "update-ca-trust", the format of
> EFI_TLS_CA_CERTIFICATE_VARIABLE should be publicly documented. Also, a
> promise of stability wouldn't hurt. :)
> 
> (To refer back to the cipher suite list discussion
> ,
> this stability / public documentation goal was guaranteed there, due to
> EFI_TLS_CIPHER being specified publicly.)
> 
> Thanks!
> Laszlo
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Re: [edk2] [Patch 0/3] Support HTTP large data request via TLS channel.

2018-03-20 Thread Fu, Siyuan 


Serials Reviewed-by: Fu Siyuan 



> -Original Message-
> From: Wu, Jiaxin
> Sent: Tuesday, March 20, 2018 8:37 AM
> To: edk2-devel@lists.01.org
> Cc: Karunakar P ; Fu, Siyuan
> ; Ye, Ting 
> Subject: [Patch 0/3] Support HTTP large data request via TLS channel.
> 
> Cc: Karunakar P 
> Cc: Fu Siyuan 
> Cc: Ye Ting 
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Jiaxin Wu 
> 
> Jiaxin Wu (3):
>   MdePkg/Tls1.h: Add TLS record header length and max payload length.
>   NetworkPkg/TlsDxe: Handle the multiple TLS record messages
> encryption/decryption.
>   NetworkPkg/HttpDxe: Handle the large data request via HTTPS channel.
> 
>  MdePkg/Include/IndustryStandard/Tls1.h |  16 -
>  NetworkPkg/HttpDxe/HttpProto.c | 121 
> -
>  NetworkPkg/HttpDxe/HttpsSupport.c  |  17 -
>  NetworkPkg/HttpDxe/HttpsSupport.h  |  12 +++-
>  NetworkPkg/TlsDxe/TlsImpl.c|  74 +---
>  NetworkPkg/TlsDxe/TlsImpl.h|   6 +-
>  6 files changed, 178 insertions(+), 68 deletions(-)
> 
> --
> 2.16.2.windows.1

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Re: [edk2] [edk2 PATCH v2 1/1] Maintainers.txt: Add StandaloneMmPkg and maintainers

2018-03-20 Thread Leif Lindholm 
Reviewed-by: Leif Lindholm 
Pushed as 2b85beae0b.

Please start bringing the code in via regular mailing list review by
belowmentioned maintainerers/reviewer.

On Thu, Feb 15, 2018 at 01:31:50PM +, achin.gu...@arm.com wrote:
> From: Achin Gupta 
> 
> This patch adds maintainers, reviewer and directory for the
> StandaloneMmPkg. This package will host an implementation of Standalone
> Management Mode as specified in the Platform Initialization (PI)
> Specification, Volume 4: Management Mode Core Interface.
> 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Achin Gupta 
> ---
>  Maintainers.txt | 5 +
>  StandaloneMmPkg | 0
>  2 files changed, 5 insertions(+)
> 
> diff --git a/Maintainers.txt b/Maintainers.txt
> index 74f2538..be5d527 100644
> --- a/Maintainers.txt
> +++ b/Maintainers.txt
> @@ -259,3 +259,8 @@ M: Mang Guo 
>  Vlv2TbltDevicePkg
>  M: David Wei 
>  M: Mang Guo 
> +
> +StandaloneMmPkg
> +M: Achin Gupta 
> +M: Jiewen Yao 
> +R: Supreeth Venkatesh 
> diff --git a/StandaloneMmPkg b/StandaloneMmPkg
> new file mode 100644
> index 000..e69de29
> -- 
> 1.9.1
> 
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Re: [edk2] [Patch] NetworkPkg/UefiPxeBcDxe: Configure the ARP Instance/RouteTable with new address

2018-03-20 Thread Fu, Siyuan 
Reviewed-by: Fu Siyuan 


> -Original Message-
> From: Wu, Jiaxin
> Sent: Tuesday, March 20, 2018 9:10 AM
> To: edk2-devel@lists.01.org
> Cc: Fu, Siyuan ; Ye, Ting 
> Subject: [Patch] NetworkPkg/UefiPxeBcDxe: Configure the ARP
> Instance/RouteTable with new address
> 
> After completed a DHCP D.O.R.A process and got the new address, the ARP
> Instance
> and RouteTable should be configured so as to avoid the later Pxe.Arp
> failure.
> 
> Cc: Fu Siyuan 
> Cc: Ye Ting 
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Jiaxin Wu 
> ---
>  NetworkPkg/UefiPxeBcDxe/PxeBcImpl.c| 26 +++---
>  NetworkPkg/UefiPxeBcDxe/PxeBcSupport.c | 66 -
> -
>  2 files changed, 52 insertions(+), 40 deletions(-)
> 
> diff --git a/NetworkPkg/UefiPxeBcDxe/PxeBcImpl.c
> b/NetworkPkg/UefiPxeBcDxe/PxeBcImpl.c
> index d3146c3a7e..b828d24288 100644
> --- a/NetworkPkg/UefiPxeBcDxe/PxeBcImpl.c
> +++ b/NetworkPkg/UefiPxeBcDxe/PxeBcImpl.c
> @@ -2001,11 +2001,10 @@ EfiPxeBcSetStationIP (
>)
>  {
>EFI_STATUS  Status;
>PXEBC_PRIVATE_DATA  *Private;
>EFI_PXE_BASE_CODE_MODE  *Mode;
> -  EFI_ARP_CONFIG_DATA ArpConfigData;
> 
>if (This == NULL) {
>  return EFI_INVALID_PARAMETER;
>}
> 
> @@ -2041,31 +2040,10 @@ EfiPxeBcSetStationIP (
>  //
>  Status = PxeBcRegisterIp6Address (Private, >v6);
>  if (EFI_ERROR (Status)) {
>goto ON_EXIT;
>  }
> -  } else if (!Mode->UsingIpv6 && NewStationIp != NULL) {
> -//
> -// Configure the corresponding ARP with the IPv4 address.
> -//
> -ZeroMem (, sizeof (EFI_ARP_CONFIG_DATA));
> -
> -ArpConfigData.SwAddressType   = 0x0800;
> -ArpConfigData.SwAddressLength = (UINT8) sizeof (EFI_IPv4_ADDRESS);
> -ArpConfigData.StationAddress  = >v4;
> -
> -Private->Arp->Configure (Private->Arp, NULL);
> -Private->Arp->Configure (Private->Arp, );
> -
> -if (NewSubnetMask != NULL) {
> -  Mode->RouteTableEntries= 1;
> -  Mode->RouteTable[0].IpAddr.Addr[0] = NewStationIp->Addr[0] &
> NewSubnetMask->Addr[0];
> -  Mode->RouteTable[0].SubnetMask.Addr[0] = NewSubnetMask->Addr[0];
> -  Mode->RouteTable[0].GwAddr.Addr[0] = 0;
> -}
> -
> -Private->IsAddressOk = TRUE;
>}
> 
>if (NewStationIp != NULL) {
>  CopyMem (>StationIp, NewStationIp, sizeof (EFI_IP_ADDRESS));
>  CopyMem (>StationIp, NewStationIp, sizeof (EFI_IP_ADDRESS));
> @@ -2075,10 +2053,14 @@ EfiPxeBcSetStationIP (
>  CopyMem (>SubnetMask, NewSubnetMask, sizeof (EFI_IP_ADDRESS));
>  CopyMem (>SubnetMask ,NewSubnetMask, sizeof
> (EFI_IP_ADDRESS));
>}
> 
>Status = PxeBcFlushStationIp (Private, NewStationIp, NewSubnetMask);
> +  if (!EFI_ERROR (Status)) {
> +Private->IsAddressOk = TRUE;
> +  }
> +
>  ON_EXIT:
>return Status;
>  }
> 
> 
> diff --git a/NetworkPkg/UefiPxeBcDxe/PxeBcSupport.c
> b/NetworkPkg/UefiPxeBcDxe/PxeBcSupport.c
> index 47bb7c5dbb..4b6f8c9c7f 100644
> --- a/NetworkPkg/UefiPxeBcDxe/PxeBcSupport.c
> +++ b/NetworkPkg/UefiPxeBcDxe/PxeBcSupport.c
> @@ -1,9 +1,9 @@
>  /** @file
>Support functions implementation for UefiPxeBc Driver.
> 
> -  Copyright (c) 2007 - 2017, Intel Corporation. All rights reserved.
> +  Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.
> 
>This program and the accompanying materials
>are licensed and made available under the terms and conditions of the
> BSD License
>which accompanies this distribution.  The full text of the license may
> be found at
>http://opensource.org/licenses/bsd-license.php.
> @@ -34,21 +34,23 @@ PxeBcFlushStationIp (
>EFI_IP_ADDRESS   *SubnetMask OPTIONAL
>)
>  {
>EFI_PXE_BASE_CODE_MODE   *Mode;
>EFI_STATUS   Status;
> +  EFI_ARP_CONFIG_DATA  ArpConfigData;
> 
>Mode   = Private->PxeBc.Mode;
>Status = EFI_SUCCESS;
> +  ZeroMem (, sizeof (EFI_ARP_CONFIG_DATA));
> 
> -  if (Mode->UsingIpv6) {
> -
> -if (StationIp != NULL) {
> -  CopyMem (>Udp6CfgData.StationAddress, StationIp, sizeof
> (EFI_IPv6_ADDRESS));
> -  CopyMem (>Ip6CfgData.StationAddress, StationIp, sizeof
> (EFI_IPv6_ADDRESS));
> -}
> -
> +  if (Mode->UsingIpv6 && StationIp != NULL) {
> +//
> +// Overwrite Udp6CfgData/Ip6CfgData StationAddress.
> +//
> +CopyMem (>Udp6CfgData.StationAddress, StationIp, sizeof
> (EFI_IPv6_ADDRESS));
> +CopyMem (>Ip6CfgData.StationAddress, StationIp, sizeof
> (EFI_IPv6_ADDRESS));
> +
>  //
>  // Reconfigure the Ip6 instance to capture background ICMP6 packets
> with new station Ip address.
>  //
>  Private->Ip6->Cancel (Private->Ip6, >Icmp6Token);
>  Private->Ip6->Configure (Private->Ip6, NULL);
> @@ -59,31 +61,59 @@ PxeBcFlushStationIp (
>  }
> 
>  Status = Private->Ip6->Receive (Private->Ip6,

[edk2] [PATCH edk2-platforms 10/12] Hisilicon/D0x: Switch to generic PciHostBridge driver

2018-03-20 Thread Heyi Guo 
Address translation support is added to generic PciHostBridge driver
in edk2 by commit 74d0a33, so we can switch to it for Hisilicon D03
and D05 which are using address translation between device address and
host address for resource BAR.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Heyi Guo 
Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Michael D Kinney 
Cc: Haojian Zhuang 
---
 Silicon/Hisilicon/Hisilicon.dsc.inc | 6 +-
 Platform/Hisilicon/D03/D03.dsc  | 6 --
 Platform/Hisilicon/D05/D05.dsc  | 6 --
 Platform/Hisilicon/D03/D03.fdf  | 3 ++-
 Platform/Hisilicon/D05/D05.fdf  | 3 ++-
 5 files changed, 17 insertions(+), 7 deletions(-)

diff --git a/Silicon/Hisilicon/Hisilicon.dsc.inc 
b/Silicon/Hisilicon/Hisilicon.dsc.inc
index 77585933179e..8ee74a830e74 100644
--- a/Silicon/Hisilicon/Hisilicon.dsc.inc
+++ b/Silicon/Hisilicon/Hisilicon.dsc.inc
@@ -253,7 +253,11 @@ [PcdsFeatureFlag.common]
 
 [PcdsFixedAtBuild.common]
   gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|44
-  gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|0
+  #
+  # IO is mapped to memory space, so we use the same size of
+  # PcdPrePiCpuMemorySize
+  #
+  gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|44
   gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength|100
   gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength|100
   gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength|100
diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
index 0b2bd29cdf83..26081a33a00a 100644
--- a/Platform/Hisilicon/D03/D03.dsc
+++ b/Platform/Hisilicon/D03/D03.dsc
@@ -82,6 +82,8 @@ [LibraryClasses.common]
 
   LpcLib|Silicon/Hisilicon/Hi1610/Library/LpcLib/LpcLib.inf
   
SerialPortLib|Silicon/Hisilicon/Hi1610/Library/Uart/LpcSerialPortLib/LpcSerialPortLib.inf
+  
PciHostBridgeLib|Platform/Hisilicon/Library/PciHostBridgeLib/PciHostBridgeLib.inf
+  
PciSegmentLib|Silicon/Hisilicon/Hi1610/Library/Hi161xPciSegmentLib/Hi161xPciSegmentLib.inf
 
 ## GIC on D02/D03 is not fully ARM GIC compatible: IRQ cannot be cancelled when
 ## input signal is de-asserted, except for virtual timer interrupt IRQ #27.
@@ -336,6 +338,7 @@ [Components.common]
   ArmPkg/Drivers/CpuDxe/CpuDxe.inf
   MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
 
+  Silicon/Hisilicon/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf
   Platform/Hisilicon/D03/Drivers/OemNicConfig2PHi1610/OemNicConfig2P.inf
 
   Platform/Hisilicon/D03/Drivers/SFC/SfcDxeDriver.inf
@@ -457,9 +460,8 @@ [Components.common]
 
   NULL|Platform/Hisilicon/D03/Library/PlatformPciLib/PlatformPciLib.inf
   }
-  Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridgeDxe.inf {
+  MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf {
 
-  DmaLib|EmbeddedPkg/Library/NonCoherentDmaLib/NonCoherentDmaLib.inf
   NULL|Platform/Hisilicon/D03/Library/PlatformPciLib/PlatformPciLib.inf
   }
 
diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
index 2150a6f4c0e9..d6febf471630 100644
--- a/Platform/Hisilicon/D05/D05.dsc
+++ b/Platform/Hisilicon/D05/D05.dsc
@@ -97,6 +97,8 @@ [LibraryClasses.common]
 
   LpcLib|Silicon/Hisilicon/Hi1610/Library/LpcLib/LpcLib.inf
   
SerialPortLib|ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf
+  
PciHostBridgeLib|Platform/Hisilicon/Library/PciHostBridgeLib/PciHostBridgeLib.inf
+  
PciSegmentLib|Silicon/Hisilicon/Hi1610/Library/Hi161xPciSegmentLib/Hi161xPciSegmentLib.inf
 
 [LibraryClasses.common.SEC]
   
ArmPlatformLib|Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLibSec.inf
@@ -472,6 +474,7 @@ [Components.common]
   ArmPkg/Drivers/CpuDxe/CpuDxe.inf
   MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
 
+  Silicon/Hisilicon/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf
   Platform/Hisilicon/D03/Drivers/OemNicConfig2PHi1610/OemNicConfig2P.inf
 
   Platform/Hisilicon/D05/Drivers/SFC/SfcDxeDriver.inf
@@ -611,9 +614,8 @@ [Components.common]
 
   NULL|Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.inf
   }
-  Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridgeDxe.inf {
+  MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf {
 
-  DmaLib|EmbeddedPkg/Library/CoherentDmaLib/CoherentDmaLib.inf
   NULL|Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.inf
   }
 
diff --git a/Platform/Hisilicon/D03/D03.fdf b/Platform/Hisilicon/D03/D03.fdf
index e430d5c08982..0c843a3ce671 100644
--- a/Platform/Hisilicon/D03/D03.fdf
+++ b/Platform/Hisilicon/D03/D03.fdf
@@ -157,6 +157,7 @@ [FV.FvMain]
   INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
 
   INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
+  INF Silicon/Hisilicon/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf
   INF Platform/Hisilicon/D03/Drivers/SFC/SfcDxeDriver.inf
 
   INF Platform/Hisilicon/D03/Drivers/OemNicConfig2PHi1610/OemNicConfig2P.inf
@@

[edk2] [PATCH edk2-platforms 05/12] Hisilicon/Pci: Move EnlargeAtuConfig0() to PcieInitDxe

2018-03-20 Thread Heyi Guo 
This is to prepare for switching to generic PciHostBridge driver, so
we move all platform specific code to platform specific drivers, not
in PciHostBridge driver.

This patch is to move EnlargeAtuConfig0() into PcieInitDxe, in
PlatformNotify() of EFI_PCI_PLATFORM_PROTOCOL.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Heyi Guo 
Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Michael D Kinney 
---
 Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitDxe.inf |   3 +-
 Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.h|   8 -
 Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.h   |   5 +
 Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.c|   1 -
 Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c  |  78 -
 Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitAtu.c   | 176 
+++-
 6 files changed, 179 insertions(+), 92 deletions(-)

diff --git a/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitDxe.inf 
b/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitDxe.inf
index 94d0fc8c028b..d1efdf39131a 100644
--- a/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitDxe.inf
+++ b/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitDxe.inf
@@ -48,10 +48,11 @@ [LibraryClasses]
   OemMiscLib
 
 [Protocols]
-  #gEfiPcieRootBridgeProtocolGuid
   gEfiFirmwareVolume2ProtocolGuid
+  gEfiPciHostBridgeResourceAllocationProtocolGuid
   gEfiPciIoProtocolGuid
   gEfiPciPlatformProtocolGuid
+  gEfiPciRootBridgeIoProtocolGuid
 
 [Pcd]
   gHisiTokenSpaceGuid.PcdPcieRootBridgeMask
diff --git a/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.h 
b/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.h
index c04361fceee6..435385491a17 100644
--- a/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.h
+++ b/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.h
@@ -401,10 +401,6 @@ PreprocessController (
 #define EFI_RESOURCE_NONEXISTENT   0xULL
 #define EFI_RESOURCE_LESS  0xFFFEULL
 
-#defineINVALID_CAPABILITY_00   0x00
-#defineINVALID_CAPABILITY_FF   0xFF
-#definePCI_CAPABILITY_POINTER_MASK 0xFC
-
 //
 // Driver Instance Data Prototypes
 //
@@ -521,8 +517,4 @@ RootBridgeConstructor (
   IN UINT32 Seg
   );
 
-VOID
-EnlargeAtuConfig0 (
-  IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This
-  );
 #endif
diff --git a/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.h 
b/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.h
index ab0c7ab8bfa7..ead926b4c4f3 100644
--- a/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.h
+++ b/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.h
@@ -248,6 +248,11 @@ EFI_STATUS PcieSetDBICS2Enable(UINT32 HostBridgeNum, 
UINT32 Port, UINT32 Enable)
 
 VOID InitAtu (PCI_ROOT_BRIDGE_RESOURCE_APPETURE *Private);
 
+VOID
+EnlargeAtuConfig0 (
+  IN EFI_HANDLE HostBridge
+  );
+
 EFI_STATUS
 PciPlatformDriverEntry (
   IN EFI_HANDLE ImageHandle,
diff --git a/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.c 
b/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.c
index 9fa3f8409813..e3d3988a64c1 100644
--- a/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.c
+++ b/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.c
@@ -839,7 +839,6 @@ NotifyPhase(
 
   case EfiPciHostBridgeEndEnumeration:
 PCIE_DEBUG("Case EfiPciHostBridgeEndEnumeration\n");
-EnlargeAtuConfig0 (This);
 break;
 
   case EfiPciHostBridgeBeginBusAllocation:
diff --git a/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c 
b/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c
index 273a322ee48f..3c265ea43378 100644
--- a/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c
+++ b/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c
@@ -2218,81 +2218,3 @@ RootBridgeIoConfiguration (
   return EFI_SUCCESS;
 }
 
-BOOLEAN
-PcieCheckAriFwdEn (
-  UINTN  PciBaseAddr
-  )
-{
-  UINT8   PciPrimaryStatus;
-  UINT8   CapabilityOffset;
-  UINT8   CapId;
-  UINT8   TempData;
-
-  PciPrimaryStatus = MmioRead16 (PciBaseAddr + PCI_PRIMARY_STATUS_OFFSET);
-
-  if (PciPrimaryStatus & EFI_PCI_STATUS_CAPABILITY) {
-CapabilityOffset = MmioRead8 (PciBaseAddr + PCI_CAPBILITY_POINTER_OFFSET);
-CapabilityOffset &= PCI_CAPABILITY_POINTER_MASK;
-
-while ((CapabilityOffset != INVALID_CAPABILITY_00) && (CapabilityOffset != 
INVALID_CAPABILITY_FF)) {
-  CapId = MmioRead8 (PciBaseAddr + CapabilityOffset);
-  if (CapId == EFI_PCI_CAPABILITY_ID_PCIEXP) {
-break;
-  }
-  CapabilityOffset = MmioRead8 (PciBaseAddr + CapabilityOffset + 1);
-  CapabilityOffset &= PCI_CAPABILITY_POINTER_MASK;
-}
-  } else {
-PCIE_DEBUG ("[%a:%d] - No PCIE Capability.\n", __FUNCTION__, __LINE__);
-return

[edk2] [PATCH edk2-platforms 06/12] Hisilicon/PlatformPciLib: add segment for each root bridge

2018-03-20 Thread Heyi Guo 
This is to prepare for switching to generic PciHostBridge driver. We
are going to create a PciHostBridgeLib instance for D0x and fetch
PCI root bridge informance from PlatformPciLib, so we add Segment to
PCI_ROOT_BRIDGE_RESOURCE_APPETURE along with other PCI resource
information. Segment numbers are kept the same as ACPI MCFG.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Heyi Guo 
---
 Silicon/Hisilicon/Include/Library/PlatformPciLib.h |  1 +
 Platform/Hisilicon/D03/Library/PlatformPciLib/PlatformPciLib.c |  8 
 Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.c | 16 

 3 files changed, 25 insertions(+)

diff --git a/Silicon/Hisilicon/Include/Library/PlatformPciLib.h 
b/Silicon/Hisilicon/Include/Library/PlatformPciLib.h
index 9d28fec37546..6725a547d54f 100644
--- a/Silicon/Hisilicon/Include/Library/PlatformPciLib.h
+++ b/Silicon/Hisilicon/Include/Library/PlatformPciLib.h
@@ -190,6 +190,7 @@ extern UINT64 
PCIE_ITS_1610[PCIE_MAX_HOSTBRIDGE][PCIE_MAX_ROOTBRIDGE];
 
 
 typedef struct {
+  UINT32  Segment;
   UINT64  Ecam;
   UINT64  BusBase;
   UINT64  BusLimit;
diff --git a/Platform/Hisilicon/D03/Library/PlatformPciLib/PlatformPciLib.c 
b/Platform/Hisilicon/D03/Library/PlatformPciLib/PlatformPciLib.c
index c58118fe5e7a..3a770d17bb3d 100644
--- a/Platform/Hisilicon/D03/Library/PlatformPciLib/PlatformPciLib.c
+++ b/Platform/Hisilicon/D03/Library/PlatformPciLib/PlatformPciLib.c
@@ -28,6 +28,7 @@ PCI_ROOT_BRIDGE_RESOURCE_APPETURE  
mResAppeture[PCIE_MAX_HOSTBRIDGE][PCIE_MAX_RO
  {// HostBridge 0
   /* Port 0 */
   {
+  0,//Segment
   PCI_HB0RB0_ECAM_BASE, //ecam
   0,  //BusBase
   31, //BusLimit
@@ -44,6 +45,7 @@ PCI_ROOT_BRIDGE_RESOURCE_APPETURE  
mResAppeture[PCIE_MAX_HOSTBRIDGE][PCIE_MAX_RO
   },
   /* Port 1 */
   {
+  1,//Segment
   PCI_HB0RB1_ECAM_BASE,//ecam
   224,  //BusBase
   254, //BusLimit
@@ -59,6 +61,7 @@ PCI_ROOT_BRIDGE_RESOURCE_APPETURE  
mResAppeture[PCIE_MAX_HOSTBRIDGE][PCIE_MAX_RO
   },
   /* Port 2 */
   {
+  2,//Segment
   PCI_HB0RB2_ECAM_BASE,
   128,  //BusBase
   159, //BusLimit
@@ -75,6 +78,7 @@ PCI_ROOT_BRIDGE_RESOURCE_APPETURE  
mResAppeture[PCIE_MAX_HOSTBRIDGE][PCIE_MAX_RO
 
   /* Port 3 */
   {
+  3,//Segment
   PCI_HB0RB3_ECAM_BASE,
   96,  //BusBase
   127, //BusLimit
@@ -92,6 +96,7 @@ PCI_ROOT_BRIDGE_RESOURCE_APPETURE  
mResAppeture[PCIE_MAX_HOSTBRIDGE][PCIE_MAX_RO
 {// HostBridge 1
   /* Port 0 */
   {
+  4,//Segment
   PCI_HB1RB0_ECAM_BASE,
   128,  //BusBase
   159, //BusLimit
@@ -107,6 +112,7 @@ PCI_ROOT_BRIDGE_RESOURCE_APPETURE  
mResAppeture[PCIE_MAX_HOSTBRIDGE][PCIE_MAX_RO
   },
   /* Port 1 */
   {
+  5,//Segment
   PCI_HB1RB1_ECAM_BASE,
   160,  //BusBase
   191, //BusLimit
@@ -122,6 +128,7 @@ PCI_ROOT_BRIDGE_RESOURCE_APPETURE  
mResAppeture[PCIE_MAX_HOSTBRIDGE][PCIE_MAX_RO
   },
   /* Port 2 */
   {
+  6,//Segment
   PCI_HB1RB2_ECAM_BASE,
   192,  //BusBase
   223, //BusLimit
@@ -138,6 +145,7 @@ PCI_ROOT_BRIDGE_RESOURCE_APPETURE  
mResAppeture[PCIE_MAX_HOSTBRIDGE][PCIE_MAX_RO
 
   /* Port 3 */
   {
+  7,//Segment
   PCI_HB1RB3_ECAM_BASE,
   224,  //BusBase
   255, //BusLimit
diff --git a/Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.c 
b/Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.c
index c8e20356f818..c511a0ecbb52 100644
--- a/Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.c
+++ b/Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.c
@@ -29,6 +29,7 @@ PCI_ROOT_BRIDGE_RESOURCE_APPETURE  
mResAppeture[PCIE_MAX_HOSTBRIDGE][PCIE_MAX_RO
  {// HostBridge 0
   /* Port 0 */
   {
+  0,//Segment
   PCI_HB0RB0_ECAM_BASE, //ecam
   0x80,  //BusBase
   0x87, //BusLimit
@@ -44,6 +45,7 @@ PCI_ROOT_BRIDGE_RESOURCE_APPETURE  
mResAppeture[PCIE_MAX_HOSTBRIDGE][PCIE_MAX_RO
   },
   /* Port 1 */
   {
+  1,   //Segment
   PCI_HB0RB1_ECAM_BASE,//ecam
   0x90,  //BusBase
   0x97, //BusLimit
@@ -59,6 +61,7 @@ PCI_ROOT_BRIDGE_RESOURCE_APPETURE  
mResAppeture[PCIE_MAX_HOSTBRIDGE][PCIE_MAX_RO
   },
   /* Port 2 */
   {
+  2,   //Segment
   PCI_HB0RB2_ECAM_BASE,
   0x80,  //BusBase
   0x87, //BusLimit
@@ -75,6 +78,7 @@ PCI_ROOT_BRIDGE_RESOURCE_APPETURE  
mResAppeture[PCIE_MAX_HOSTBRIDGE][PCIE_MAX_RO
 
   /* Port 3 */
   {
+  3,   //Segment
   PCI_HB0RB3_ECAM_BASE,
   0xb0,  //BusBase
   0xb7, //BusLimit
@@ -90,6 +94,7 @@ PCI_ROOT_BRIDGE_RESOURCE_APPETURE  
mResAppeture[PCIE_MAX_HOSTBRIDGE][PCIE_MAX_RO
   },
   /* Port 4 */
   {
+  4,   //Segment
   PCI_HB0RB4_ECAM_BASE, //ecam

[edk2] [PATCH edk2-platforms 12/12] Hisilicon/PlatformPciLib: clear redundant felds in RESOURCE_APPETURE

2018-03-20 Thread Heyi Guo 
In structure PCI_ROOT_BRIDGE_RESOURCE_APPETURE, MemBase is redundant
with CpuMemRegionBase, and MemLimit can be calculated by
CpuMemRegionBase + PciRegionLimit - PciRegionBase so it is also
redundant.

Remove these two fields to make things simple and clear.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Heyi Guo 
Signed-off-by: Yi Li 
Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Michael D Kinney 
---
 Silicon/Hisilicon/Include/Library/PlatformPciLib.h |  2 --
 Platform/Hisilicon/D03/Library/PlatformPciLib/PlatformPciLib.c | 16 --
 Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.c | 32 

 3 files changed, 50 deletions(-)

diff --git a/Silicon/Hisilicon/Include/Library/PlatformPciLib.h 
b/Silicon/Hisilicon/Include/Library/PlatformPciLib.h
index 6725a547d54f..5fdc3d3e0afe 100644
--- a/Silicon/Hisilicon/Include/Library/PlatformPciLib.h
+++ b/Silicon/Hisilicon/Include/Library/PlatformPciLib.h
@@ -194,8 +194,6 @@ typedef struct {
   UINT64  Ecam;
   UINT64  BusBase;
   UINT64  BusLimit;
-  UINT64  MemBase;
-  UINT64  MemLimit;
   UINT64  IoBase;
   UINT64  IoLimit;
   UINT64  CpuMemRegionBase;
diff --git a/Platform/Hisilicon/D03/Library/PlatformPciLib/PlatformPciLib.c 
b/Platform/Hisilicon/D03/Library/PlatformPciLib/PlatformPciLib.c
index 3a770d17bb3d..59c468ac4b73 100644
--- a/Platform/Hisilicon/D03/Library/PlatformPciLib/PlatformPciLib.c
+++ b/Platform/Hisilicon/D03/Library/PlatformPciLib/PlatformPciLib.c
@@ -32,8 +32,6 @@ PCI_ROOT_BRIDGE_RESOURCE_APPETURE  
mResAppeture[PCIE_MAX_HOSTBRIDGE][PCIE_MAX_RO
   PCI_HB0RB0_ECAM_BASE, //ecam
   0,  //BusBase
   31, //BusLimit
-  PCI_HB0RB0_PCIREGION_BASE, //Membase
-  PCI_HB0RB0_PCIREGION_BASE + PCI_HB0RB0_PCIREGION_SIZE - 1, //Memlimit
   PCI_HB0RB0_IO_BASE,  //IoBase
   (PCI_HB0RB0_CPUIOREGIONBASE + PCI_HB0RB0_IO_SIZE - 1), //IoLimit
   PCI_HB0RB0_CPUMEMREGIONBASE, //CpuMemRegionBase
@@ -49,8 +47,6 @@ PCI_ROOT_BRIDGE_RESOURCE_APPETURE  
mResAppeture[PCIE_MAX_HOSTBRIDGE][PCIE_MAX_RO
   PCI_HB0RB1_ECAM_BASE,//ecam
   224,  //BusBase
   254, //BusLimit
-  PCI_HB0RB1_PCIREGION_BASE, //Membase
-  PCI_HB0RB1_PCIREGION_BASE + PCI_HB0RB1_PCIREGION_SIZE - 1, //MemLimit
   (PCI_HB0RB1_IO_BASE),  //IoBase
   (PCI_HB0RB1_CPUIOREGIONBASE + PCI_HB0RB1_IO_SIZE - 1), //IoLimit
   PCI_HB0RB1_CPUMEMREGIONBASE, //CpuMemRegionBase
@@ -65,8 +61,6 @@ PCI_ROOT_BRIDGE_RESOURCE_APPETURE  
mResAppeture[PCIE_MAX_HOSTBRIDGE][PCIE_MAX_RO
   PCI_HB0RB2_ECAM_BASE,
   128,  //BusBase
   159, //BusLimit
-  PCI_HB0RB2_PCIREGION_BASE ,//MemBase
-  PCI_HB0RB2_PCIREGION_BASE + PCI_HB0RB2_PCIREGION_SIZE - 1, //MemLimit
   (PCI_HB0RB2_IO_BASE),  //IOBase
   (PCI_HB0RB2_CPUIOREGIONBASE + PCI_HB0RB2_IO_SIZE - 1), //IoLimit
   PCI_HB0RB2_CPUMEMREGIONBASE, //CpuMemRegionBase
@@ -82,8 +76,6 @@ PCI_ROOT_BRIDGE_RESOURCE_APPETURE  
mResAppeture[PCIE_MAX_HOSTBRIDGE][PCIE_MAX_RO
   PCI_HB0RB3_ECAM_BASE,
   96,  //BusBase
   127, //BusLimit
-  (PCI_HB0RB3_ECAM_BASE),  //MemBase
-  (PCI_HB0RB3_ECAM_BASE + PCI_HB0RB3_ECAM_SIZE - 1), //MemLimit
   (0), //IoBase
   (0),  //IoLimit
   0,
@@ -100,8 +92,6 @@ PCI_ROOT_BRIDGE_RESOURCE_APPETURE  
mResAppeture[PCIE_MAX_HOSTBRIDGE][PCIE_MAX_RO
   PCI_HB1RB0_ECAM_BASE,
   128,  //BusBase
   159, //BusLimit
-  (PCI_HB1RB0_ECAM_BASE),  //MemBase
-  (PCI_HB1RB0_ECAM_BASE + PCI_HB1RB0_ECAM_SIZE - 1), //MemLimit
   (0), //IoBase
   (0),  //IoLimit
   0,
@@ -116,8 +106,6 @@ PCI_ROOT_BRIDGE_RESOURCE_APPETURE  
mResAppeture[PCIE_MAX_HOSTBRIDGE][PCIE_MAX_RO
   PCI_HB1RB1_ECAM_BASE,
   160,  //BusBase
   191, //BusLimit
-  (PCI_HB1RB1_ECAM_BASE),  //MemBase
-  (PCI_HB1RB1_ECAM_BASE + PCI_HB1RB1_ECAM_SIZE - 1), //MemLimit
   (0), //IoBase
   (0),  //IoLimit
   0,
@@ -132,8 +120,6 @@ PCI_ROOT_BRIDGE_RESOURCE_APPETURE  
mResAppeture[PCIE_MAX_HOSTBRIDGE][PCIE_MAX_RO
   PCI_HB1RB2_ECAM_BASE,
   192,  //BusBase
   223, //BusLimit
-  (PCI_HB1RB2_ECAM_BASE),  //MemBase
-  (PCI_HB1RB2_ECAM_BASE + PCI_HB1RB2_ECAM_SIZE - 1), //MemLimit
   (0), //IoBase
   (0),  //IoLimit
   0,
@@ -149,8 +135,6 @@ PCI_ROOT_BRIDGE_RESOURCE_APPETURE  
mResAppeture[PCIE_MAX_HOSTBRIDGE][PCIE_MAX_RO
   PCI_HB1RB3_ECAM_BASE,
   224,  //BusBase
   255, //BusLimit
-  (PCI_HB1RB3_ECAM_BASE),  //MemBase
-  (PCI_HB1RB3_ECAM_BASE + PCI_HB1RB3_ECAM_SIZE - 1), //MemLimit
   (0), //IoBase
   (0),  //IoLimit
   0,
diff --git a/Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.c 
b/Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.c
index c511a0ecbb52..ef82892dd7bf 100644
---

[edk2] [PATCH edk2-platforms 08/12] Hisilicon: add PciCpuIo2Dxe

2018-03-20 Thread Heyi Guo 
This is to prepare for switching to generic PciHostBridge, and
CpuIo2Dxe is needed by generic PciHostBridge driver.

The driver is copied from ArmPkg/Drivers/ArmPciCpuIo2Dxe and changed
for D0x.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Heyi Guo 
Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Michael D Kinney 
---
 Silicon/Hisilicon/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf |  48 ++
 Silicon/Hisilicon/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.c   | 557 

 2 files changed, 605 insertions(+)

diff --git a/Silicon/Hisilicon/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf 
b/Silicon/Hisilicon/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf
new file mode 100644
index ..fbb28319ca87
--- /dev/null
+++ b/Silicon/Hisilicon/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf
@@ -0,0 +1,48 @@
+## @file
+#  Produces the CPU I/O 2 Protocol by using the services of the I/O Library.
+#
+# Copyright (c) 2009 - 2014, Intel Corporation. All rights reserved.
+# Copyright (c) 2016 - 2018, Linaro Ltd. All rights reserved.
+# Copyright (c) 2018, Hisilicon Ltd. All rights reserved.
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD 
License
+# which accompanies this distribution.  The full text of the license may be 
found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+[Defines]
+  INF_VERSION= 0x0001001A
+  BASE_NAME  = ArmPciCpuIo2Dxe
+  FILE_GUID  = 94577c7e-0bce-11e8-b4e8-286ed489ee9b
+  MODULE_TYPE= DXE_DRIVER
+  VERSION_STRING = 1.0
+  ENTRY_POINT= ArmPciCpuIo2Initialize
+
+#
+# The following information is for reference only and not required by the 
build tools.
+#
+#  VALID_ARCHITECTURES   = ARM AARCH64
+#
+
+[Sources]
+  ArmPciCpuIo2Dxe.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+
+[LibraryClasses]
+  UefiDriverEntryPoint
+  BaseLib
+  DebugLib
+  IoLib
+
+[Protocols]
+  gEfiCpuIo2ProtocolGuid ## PRODUCES
+
+[Depex]
+  TRUE
diff --git a/Silicon/Hisilicon/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.c 
b/Silicon/Hisilicon/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.c
new file mode 100644
index ..8426c5935c8a
--- /dev/null
+++ b/Silicon/Hisilicon/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.c
@@ -0,0 +1,557 @@
+/** @file
+  Produces the CPU I/O 2 Protocol.
+
+Copyright (c) 2009 - 2012, Intel Corporation. All rights reserved.
+Copyright (c) 2016 - 2018, Linaro Ltd. All rights reserved.
+Copyright (c) 2018, Hisilicon Ltd. All rights reserved.
+
+This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD 
License
+which accompanies this distribution.  The full text of the license may be 
found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include 
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+// The translated IO PORT address is already a MMIO address, so we make it the
+// same as memory address for range check.
+#define MAX_IO_PORT_ADDRESS   MAX_ADDRESS
+
+//
+// Lookup table for increment values based on transfer widths
+//
+STATIC CONST UINT8 mInStride[] = {
+  1, // EfiCpuIoWidthUint8
+  2, // EfiCpuIoWidthUint16
+  4, // EfiCpuIoWidthUint32
+  8, // EfiCpuIoWidthUint64
+  0, // EfiCpuIoWidthFifoUint8
+  0, // EfiCpuIoWidthFifoUint16
+  0, // EfiCpuIoWidthFifoUint32
+  0, // EfiCpuIoWidthFifoUint64
+  1, // EfiCpuIoWidthFillUint8
+  2, // EfiCpuIoWidthFillUint16
+  4, // EfiCpuIoWidthFillUint32
+  8  // EfiCpuIoWidthFillUint64
+};
+
+//
+// Lookup table for increment values based on transfer widths
+//
+STATIC CONST UINT8 mOutStride[] = {
+  1, // EfiCpuIoWidthUint8
+  2, // EfiCpuIoWidthUint16
+  4, // EfiCpuIoWidthUint32
+  8, // EfiCpuIoWidthUint64
+  1, // EfiCpuIoWidthFifoUint8
+  2, // EfiCpuIoWidthFifoUint16
+  4, // EfiCpuIoWidthFifoUint32
+  8, // EfiCpuIoWidthFifoUint64
+  0, // EfiCpuIoWidthFillUint8
+  0, // EfiCpuIoWidthFillUint16
+  0, // EfiCpuIoWidthFillUint32
+  0  // EfiCpuIoWidthFillUint64
+};
+
+/**
+  Check parameters to a CPU I/O 2 Protocol service request.
+
+  The I/O operations are carried out exactly as requested. The caller is 
responsible
+  for satisfying any alignment and I/O width restrictions that a PI System on a
+  platform might require. For example on some platforms, width requests of
+  EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
+  be handled by the driver.
+
+  @param[in]

[edk2] [PATCH edk2-platforms 09/12] Hisilicon: add PciSegmentLib for Hi161x

2018-03-20 Thread Heyi Guo 
This is to prepare for switching to generic PciHostBridge, and
PciSegmentLib is needed by generic PciHostBridge driver.

This module copied from
edk2-platforms/Silicon/Socionext/SynQuacer/Library/SynQuacerPciSegmentLib.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Heyi Guo 
Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Michael D Kinney 
---
 Silicon/Hisilicon/Hi1610/Library/Hi161xPciSegmentLib/Hi161xPciSegmentLib.inf | 
  36 +
 Silicon/Hisilicon/Hi1610/Library/Hi161xPciSegmentLib/PciSegmentLib.c | 
1503 
 2 files changed, 1539 insertions(+)

diff --git 
a/Silicon/Hisilicon/Hi1610/Library/Hi161xPciSegmentLib/Hi161xPciSegmentLib.inf 
b/Silicon/Hisilicon/Hi1610/Library/Hi161xPciSegmentLib/Hi161xPciSegmentLib.inf
new file mode 100644
index ..cd2ae8810224
--- /dev/null
+++ 
b/Silicon/Hisilicon/Hi1610/Library/Hi161xPciSegmentLib/Hi161xPciSegmentLib.inf
@@ -0,0 +1,36 @@
+## @file
+# PCI Segment Library for Hisilicon Hi1610/Hi1616 SoC with multiple RCs
+#
+# Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.
+# Copyright (c) 2017 - 2018, Linaro Ltd. All rights reserved.
+# Copyright (c) 2018, Hisilicon Ltd. All rights reserved.
+#
+#  This program and the accompanying materials
+#  are licensed and made available under the terms and conditions of the BSD 
License
+#  which accompanies this distribution. The full text of the license may be 
found at
+#  http://opensource.org/licenses/bsd-license.php.
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR 
IMPLIED.
+#
+#
+##
+
+[Defines]
+  INF_VERSION= 0x0001001A
+  BASE_NAME  = Hi161xPciSegmentLib
+  FILE_GUID  = 22447df4-0baa-11e8-b6de-286ed489ee9b
+  MODULE_TYPE= BASE
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = PciSegmentLib
+
+[Sources]
+  PciSegmentLib.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  Silicon/Hisilicon/HisiPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  DebugLib
+  IoLib
diff --git 
a/Silicon/Hisilicon/Hi1610/Library/Hi161xPciSegmentLib/PciSegmentLib.c 
b/Silicon/Hisilicon/Hi1610/Library/Hi161xPciSegmentLib/PciSegmentLib.c
new file mode 100644
index ..2e66244a4728
--- /dev/null
+++ b/Silicon/Hisilicon/Hi1610/Library/Hi161xPciSegmentLib/PciSegmentLib.c
@@ -0,0 +1,1503 @@
+/** @file
+  PCI Segment Library for SynQuacer SoC with multiple RCs
+
+  Copyright (c) 2007 - 2012, Intel Corporation. All rights reserved.
+  Copyright (c) 2017, Linaro, Ltd. All rights reserved.
+
+  This program and the accompanying materials are
+  licensed and made available under the terms and conditions of
+  the BSD License which accompanies this distribution.  The full
+  text of the license may be found at
+  http://opensource.org/licenses/bsd-license.php.
+
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+typedef enum {
+  PciCfgWidthUint8  = 0,
+  PciCfgWidthUint16,
+  PciCfgWidthUint32,
+  PciCfgWidthMax
+} PCI_CFG_WIDTH;
+
+/**
+  Assert the validity of a PCI Segment address.
+  A valid PCI Segment address should not contain 1's in bits 28..31 and 48..63
+
+  @param  A The address to validate.
+  @param  M Additional bits to assert to be zero.
+
+**/
+#define ASSERT_INVALID_PCI_SEGMENT_ADDRESS(A,M) \
+  ASSERT (((A) & (0xf000ULL | (M))) == 0)
+
+#define EXTRACT_PCIE_ADDRESS(Address, Segment, Bus, Device, Function, 
Register) \
+{ \
+  (Segment)  = (RShiftU64 (Address, 32) & 0x);   \
+  (Bus)  = (((Address) >> 20) & 0xff);   \
+  (Device)   = (((Address) >> 15) & 0x1f);   \
+  (Function) = (((Address) >> 12) & 0x07);   \
+  (Register) = ((Address)   & 0xfff);  \
+}
+
+STATIC
+PCI_ROOT_BRIDGE_RESOURCE_APPETURE *
+PciSegmentLibGetAppeture (
+  IN  UINT32 Segment
+  )
+{
+  UINTN Hb;
+  UINTN Rb;
+
+  for (Hb = 0; Hb < PCIE_MAX_HOSTBRIDGE; Hb++) {
+for (Rb = 0; Rb < PCIE_MAX_ROOTBRIDGE; Rb++) {
+  if (Segment == mResAppeture[Hb][Rb].Segment) {
+return [Hb][Rb];
+  }
+}
+  }
+
+  // Shouldn't reach here
+  ASSERT (FALSE);
+  return NULL;
+}
+
+BOOLEAN PcieIsLinkUp (UINTN RbPciBar)
+{
+  UINT32 Value;
+
+  Value = MmioRead32(RbPciBar + 0x131C);
+  if ((Value & 0x3F) == 0x11) {
+return TRUE;
+  }
+  return FALSE;
+}
+
+
+STATIC
+UINT32
+CpuMemoryServiceRead (
+  IN  UINT64 Address,
+  IN  PCI_CFG_WIDTH  Width
+  )
+{
+
+  UINT32 Uint32Buffer;
+
+  //
+  // Select loop based on the width of the transfer
+  //
+  if (Width == PciCfgWidthUint8) {
+Uint32Buffer = MmioRead32((UINTN)(Address & (~0x3)));

[edk2] [PATCH edk2-platforms 04/12] Hisilicon/Pci: Merge PciPlatform into PcieInit Driver

2018-03-20 Thread Heyi Guo 
This is to prepare for switching to generic PciHostBridge driver, so
we move all platform specific code to platform specific drivers, not
in PciHostBridge driver.

This patch is to prepare moving EnlargeAtuConfig0() out of
PciHostBridge. Since the function was originally called in
NotifyPhase() of phase EfiPciHostBridgeEndEnumeration, so we propose
to move it to EFI_PCI_PLATFORM_PROTOCOL->PlatformNotify(). To reduce
redundant ATU definitions, we merge PciPlatform into PcieInitDxe
driver since ATU initialization is done in PcieInitDxe.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Heyi Guo 
Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Michael D Kinney 
---
 Platform/Hisilicon/D03/D03.dsc 
 |  1 -
 Platform/Hisilicon/D05/D05.dsc 
 |  1 -
 Platform/Hisilicon/D03/D03.fdf 
 |  1 -
 Platform/Hisilicon/D05/D05.fdf 
 |  1 -
 Platform/Hisilicon/D03/Drivers/PciPlatform/PciPlatform.inf 
 | 53 
 Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitDxe.inf  
 |  5 ++
 {Platform/Hisilicon/D03/Drivers/PciPlatform => 
Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610}/PciPlatform.h |  0
 Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.h
 |  6 +++
 {Platform/Hisilicon/D03/Drivers/PciPlatform => 
Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610}/PciPlatform.c | 12 +
 Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInit.c   
 |  4 +-
 10 files changed, 24 insertions(+), 60 deletions(-)

diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
index c4963063794b..0b2bd29cdf83 100644
--- a/Platform/Hisilicon/D03/D03.dsc
+++ b/Platform/Hisilicon/D03/D03.dsc
@@ -457,7 +457,6 @@ [Components.common]
 
   NULL|Platform/Hisilicon/D03/Library/PlatformPciLib/PlatformPciLib.inf
   }
-  Platform/Hisilicon/D03/Drivers/PciPlatform/PciPlatform.inf
   Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridgeDxe.inf {
 
   DmaLib|EmbeddedPkg/Library/NonCoherentDmaLib/NonCoherentDmaLib.inf
diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
index 0792b0814ea1..2150a6f4c0e9 100644
--- a/Platform/Hisilicon/D05/D05.dsc
+++ b/Platform/Hisilicon/D05/D05.dsc
@@ -611,7 +611,6 @@ [Components.common]
 
   NULL|Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.inf
   }
-  Platform/Hisilicon/D03/Drivers/PciPlatform/PciPlatform.inf
   Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridgeDxe.inf {
 
   DmaLib|EmbeddedPkg/Library/CoherentDmaLib/CoherentDmaLib.inf
diff --git a/Platform/Hisilicon/D03/D03.fdf b/Platform/Hisilicon/D03/D03.fdf
index 09613fb8f6ea..e430d5c08982 100644
--- a/Platform/Hisilicon/D03/D03.fdf
+++ b/Platform/Hisilicon/D03/D03.fdf
@@ -263,7 +263,6 @@ [FV.FvMain]
   # PCI Support
   #
   INF Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitDxe.inf
-  INF Platform/Hisilicon/D03/Drivers/PciPlatform/PciPlatform.inf
   INF Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridgeDxe.inf
   INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
 
diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf
index 17a43d8edbd0..13a60837a607 100644
--- a/Platform/Hisilicon/D05/D05.fdf
+++ b/Platform/Hisilicon/D05/D05.fdf
@@ -285,7 +285,6 @@ [FV.FvMain]
   # PCI Support
   #
   INF Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitDxe.inf
-  INF Platform/Hisilicon/D03/Drivers/PciPlatform/PciPlatform.inf
   INF Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridgeDxe.inf
   INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
 
diff --git a/Platform/Hisilicon/D03/Drivers/PciPlatform/PciPlatform.inf 
b/Platform/Hisilicon/D03/Drivers/PciPlatform/PciPlatform.inf
deleted file mode 100644
index 8b170d265485..
--- a/Platform/Hisilicon/D03/Drivers/PciPlatform/PciPlatform.inf
+++ /dev/null
@@ -1,53 +0,0 @@
-#/** @file
-#
-#Copyright (c) 2016, Hisilicon Limited. All rights reserved.
-#Copyright (c) 2016, Linaro Limited. All rights reserved.
-#
-#This program and the accompanying materials
-#are licensed and made available under the terms and conditions of the BSD 
License
-#which accompanies this distribution. The full text of the license may be 
found at
-#http://opensource.org/licenses/bsd-license.php
-#
-#THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR 
IMPLIED.
-#
-#**/
-

[edk2] [PATCH edk2-platforms 00/12] Hisilicon/D0x: Switch to generic PciHostBridge

2018-03-20 Thread Heyi Guo 
For BAR address translation support was added to edk2 generic PciHostBridge by
commit 74d0a33, now we can also use it for D03/D05 platforms.
This series of patches include 3 parts of change:
- Preparation for the switch, moving platform specific code out of PciHostBridge
  driver.
- Add depending libraries and protocol implementations, like PciHostBridgeLib,
  PciSegmentLib and CpuIo2 Protocol.
- Other enhancement and refinement.

Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Michael D Kinney 
Cc: Haojian Zhuang 

Heyi Guo (12):
  Hisilicon: Enable WARN and INFO debug message
  Hisilicon/D05/PlatformPciLib: fix misuse of macro
  Hisilicon/Pci: move ATU configuration to PcieInitDxe
  Hisilicon/Pci: Merge PciPlatform into PcieInit Driver
  Hisilicon/Pci: Move EnlargeAtuConfig0() to PcieInitDxe
  Hisilicon/PlatformPciLib: add segment for each root bridge
  Hisilicon: add PciHostBridgeLib
  Hisilicon: add PciCpuIo2Dxe
  Hisilicon: add PciSegmentLib for Hi161x
  Hisilicon/D0x: Switch to generic PciHostBridge driver
  Hisilicon: remove platform specific PciHostBridge
  Hisilicon/PlatformPciLib: clear redundant felds in RESOURCE_APPETURE

 Silicon/Hisilicon/Hisilicon.dsc.inc
 |8 +-
 Platform/Hisilicon/D03/D03.dsc 
 |7 +-
 Platform/Hisilicon/D05/D05.dsc 
 |7 +-
 Platform/Hisilicon/D03/D03.fdf 
 |4 +-
 Platform/Hisilicon/D05/D05.fdf 
 |4 +-
 Platform/Hisilicon/D03/Drivers/PciPlatform/PciPlatform.inf 
 |   53 -
 Platform/Hisilicon/Library/PciHostBridgeLib/PciHostBridgeLib.inf   
 |   51 +
 Silicon/Hisilicon/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf  
 |   48 +
 Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridgeDxe.inf
 |   74 -
 Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitDxe.inf  
 |9 +-
 Silicon/Hisilicon/Hi1610/Library/Hi161xPciSegmentLib/Hi161xPciSegmentLib.inf   
 |   36 +
 Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.h 
 |  528 -
 {Platform/Hisilicon/D03/Drivers/PciPlatform => 
Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610}/PciPlatform.h |0
 Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.h
 |   13 +
 Silicon/Hisilicon/Include/Library/PlatformPciLib.h 
 |3 +-
 Platform/Hisilicon/D03/Library/PlatformPciLib/PlatformPciLib.c 
 |   24 +-
 Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.c 
 |   66 +-
 Platform/Hisilicon/Library/PciHostBridgeLib/PciHostBridgeLib.c 
 |  304 +++
 Silicon/Hisilicon/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.c
 |  557 +
 Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.c 
 | 1659 --
 Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c   
 | 2404 
 {Platform/Hisilicon/D03/Drivers/PciPlatform => 
Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610}/PciPlatform.c |   12 +
 Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInit.c   
 |7 +-
 Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitAtu.c
 |  309 +++
 Silicon/Hisilicon/Hi1610/Library/Hi161xPciSegmentLib/PciSegmentLib.c   
 | 1503 
 25 files changed, 2897 insertions(+), 4793 deletions(-)
 delete mode 100644 Platform/Hisilicon/D03/Drivers/PciPlatform/PciPlatform.inf
 create mode 100644 
Platform/Hisilicon/Library/PciHostBridgeLib/PciHostBridgeLib.inf
 create mode 100644 
Silicon/Hisilicon/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf
 delete mode 100644 
Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridgeDxe.inf
 create mode 100644 
Silicon/Hisilicon/Hi1610/Library/Hi161xPciSegmentLib/Hi161xPciSegmentLib.inf
 delete mode 100644 Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.h
 rename {Platform/Hisilicon/D03/Drivers/PciPlatform => 
Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610}/PciPlatform.h (100%)
 create mode

[edk2] [PATCH edk2-platforms 03/12] Hisilicon/Pci: move ATU configuration to PcieInitDxe

2018-03-20 Thread Heyi Guo 
This is to prepare for switching to generic PciHostBridge driver, so
we move all platform specific code to platform specific drivers, not
in PciHostBridge driver.

This patch moves ATU initialization to PcieInitDxe driver.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Heyi Guo 
Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Michael D Kinney 
---
 Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitDxe.inf |   1 +
 Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.h   |   2 +
 Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c  | 106 
---
 Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInit.c  |   3 +
 Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitAtu.c   | 141 

 5 files changed, 147 insertions(+), 106 deletions(-)

diff --git a/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitDxe.inf 
b/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitDxe.inf
index 61b091f659b3..cb0a63f9a84e 100644
--- a/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitDxe.inf
+++ b/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitDxe.inf
@@ -25,6 +25,7 @@ [Defines]
 [Sources]
   PcieInit.c
   PcieInitLib.c
+  PcieInitAtu.c
 
 [Packages]
   MdePkg/MdePkg.dec
diff --git a/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.h 
b/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.h
index e96c53c4fe4e..87700ae8b9aa 100644
--- a/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.h
+++ b/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.h
@@ -246,4 +246,6 @@ EFI_STATUS PcieWaitLinkUp(UINT32 Port);
 
 EFI_STATUS PcieSetDBICS2Enable(UINT32 HostBridgeNum, UINT32 Port, UINT32 
Enable);
 
+VOID InitAtu (PCI_ROOT_BRIDGE_RESOURCE_APPETURE *Private);
+
 #endif
diff --git a/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c 
b/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c
index 55b80aa4e49a..273a322ee48f 100644
--- a/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c
+++ b/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c
@@ -633,111 +633,6 @@ UINT64 GetPcieCfgAddress (
 }
 
 
-void SetAtuConfig0RW (
-PCI_ROOT_BRIDGE_INSTANCE *Private,
-UINT32 Index
-)
-{
-UINTN RbPciBase = Private->RbPciBar;
-UINT64 MemLimit = GetPcieCfgAddress (Private->Ecam, Private->BusBase + 1, 
1, 0, 0) - 1;
-
-
-MmioWrite32 (RbPciBase + IATU_OFFSET + IATU_VIEW_POINT, Index);
-MmioWrite32 (RbPciBase + IATU_OFFSET + IATU_REGION_BASE_LOW, 
(UINT32)(Private->Ecam));
-MmioWrite32 (RbPciBase + IATU_OFFSET + IATU_REGION_BASE_HIGH, 
(UINT32)((UINT64)(Private->Ecam) >> 32));
-MmioWrite32 (RbPciBase + IATU_OFFSET + IATU_REGION_BASE_LIMIT, (UINT32) 
MemLimit);
-MmioWrite32 (RbPciBase + IATU_OFFSET + IATU_REGION_TARGET_LOW, 0);
-MmioWrite32 (RbPciBase + IATU_OFFSET + IATU_REGION_TARGET_HIGH, 0);
-MmioWrite32 (RbPciBase + IATU_OFFSET + IATU_REGION_CTRL1, 
IATU_CTRL1_TYPE_CONFIG0);
-MmioWrite32 (RbPciBase + IATU_OFFSET + IATU_REGION_CTRL2, IATU_SHIIF_MODE);
-
-{
-  UINTN i;
-  for (i=0; i<0x20; i+=4) {
-DEBUG ((EFI_D_ERROR, "[%a:%d] - Base=%p value=%x\n", __FUNCTION__, 
__LINE__, RbPciBase + 0x900 + i, MmioRead32(RbPciBase + 0x900 + i)));
-  }
-}
-}
-
-void SetAtuConfig1RW (
-PCI_ROOT_BRIDGE_INSTANCE *Private,
-UINT32 Index
-)
-{
-UINTN RbPciBase = Private->RbPciBar;
-UINT64 MemLimit = GetPcieCfgAddress (Private->Ecam, Private->BusLimit + 1, 
0, 0, 0) - 1;
-
-
-MmioWrite32 (RbPciBase + IATU_OFFSET + IATU_VIEW_POINT, Index);
-MmioWrite32 (RbPciBase + IATU_OFFSET + IATU_REGION_CTRL1, 
IATU_CTRL1_TYPE_CONFIG1);
-MmioWrite32 (RbPciBase + IATU_OFFSET + IATU_REGION_BASE_LOW, 
(UINT32)(Private->Ecam));
-MmioWrite32 (RbPciBase + IATU_OFFSET + IATU_REGION_BASE_HIGH, 
(UINT32)((UINT64)(Private->Ecam) >> 32));
-MmioWrite32 (RbPciBase + IATU_OFFSET + IATU_REGION_BASE_LIMIT, (UINT32) 
MemLimit);
-MmioWrite32 (RbPciBase + IATU_OFFSET + IATU_REGION_TARGET_LOW, 0);
-MmioWrite32 (RbPciBase + IATU_OFFSET + IATU_REGION_TARGET_HIGH, 0);
-MmioWrite32 (RbPciBase + IATU_OFFSET + IATU_REGION_CTRL2, IATU_SHIIF_MODE);
-
-{
-  UINTN i;
-  for (i=0; i<0x20; i+=4) {
-DEBUG ((EFI_D_ERROR, "[%a:%d] - Base=%p value=%x\n", __FUNCTION__, 
__LINE__, RbPciBase + 0x900 + i, MmioRead32(RbPciBase + 0x900 + i)));
-  }
-}
-}
-
-void SetAtuIoRW(UINT64 RbPciBase,UINT64 IoBase,UINT64 CpuIoRegionLimit, UINT64 
CpuIoRegionBase, UINT32 Index)
-{
-
-MmioWrite32 (RbPciBase + IATU_OFFSET + IATU_VIEW_POINT, Index);
-MmioWrite32 (RbPciBase + IATU_OFFSET + IATU_REGION_CTRL1, 
IATU_CTRL1_TYPE_IO);
-
-MmioWrite32 (RbPciBase + IATU_OFFSET + IATU_REGION_BASE_LOW, 
(UINT32)(CpuIoRegionBase));
-MmioWrite32 (RbPciBase + IATU_OFFSET + IATU_REGION_BASE_HIGH, 
(UINT32)((UINT64)CpuIoRegionBase >> 32));

Re: [edk2] [edk2 PATCH v2 1/1] Maintainers.txt: Add StandaloneMmPkg and maintainers

2018-03-20 Thread Yao, Jiewen 
Reviewed-by: jiewen@intel.com

> -Original Message-
> From: achin.gu...@arm.com [mailto:achin.gu...@arm.com]
> Sent: Thursday, February 15, 2018 9:32 PM
> To: edk2-devel@lists.01.org
> Cc: af...@apple.com; Kinney, Michael D ;
> leif.lindh...@linaro.org; Yao, Jiewen ;
> supreeth.venkat...@arm.com; n...@arm.com; Achin Gupta
> 
> Subject: [edk2 PATCH v2 1/1] Maintainers.txt: Add StandaloneMmPkg and
> maintainers
> 
> From: Achin Gupta 
> 
> This patch adds maintainers, reviewer and directory for the
> StandaloneMmPkg. This package will host an implementation of Standalone
> Management Mode as specified in the Platform Initialization (PI)
> Specification, Volume 4: Management Mode Core Interface.
> 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Achin Gupta 
> ---
>  Maintainers.txt | 5 +
>  StandaloneMmPkg | 0
>  2 files changed, 5 insertions(+)
> 
> diff --git a/Maintainers.txt b/Maintainers.txt
> index 74f2538..be5d527 100644
> --- a/Maintainers.txt
> +++ b/Maintainers.txt
> @@ -259,3 +259,8 @@ M: Mang Guo 
>  Vlv2TbltDevicePkg
>  M: David Wei 
>  M: Mang Guo 
> +
> +StandaloneMmPkg
> +M: Achin Gupta 
> +M: Jiewen Yao 
> +R: Supreeth Venkatesh 
> diff --git a/StandaloneMmPkg b/StandaloneMmPkg
> new file mode 100644
> index 000..e69de29
> --
> 1.9.1

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[edk2] [PATCH edk2-platforms 07/12] Hisilicon: add PciHostBridgeLib

2018-03-20 Thread Heyi Guo 
This is to prepare for switching to generic PciHostBridge, and
PciHostBridgeLib is needed by PciHostBridge driver.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Heyi Guo 
Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Michael D Kinney 
---
 Platform/Hisilicon/Library/PciHostBridgeLib/PciHostBridgeLib.inf |  51 
 Platform/Hisilicon/Library/PciHostBridgeLib/PciHostBridgeLib.c   | 304 

 2 files changed, 355 insertions(+)

diff --git a/Platform/Hisilicon/Library/PciHostBridgeLib/PciHostBridgeLib.inf 
b/Platform/Hisilicon/Library/PciHostBridgeLib/PciHostBridgeLib.inf
new file mode 100644
index ..dd451cff332c
--- /dev/null
+++ b/Platform/Hisilicon/Library/PciHostBridgeLib/PciHostBridgeLib.inf
@@ -0,0 +1,51 @@
+## @file
+#  PCI Host Bridge Library instance for Hisilicon D0x
+#
+#  Copyright (c) 2018, Hisilicon Limited. All rights reserved.
+#  Copyright (c) 2017 - 2018, Linaro Ltd. All rights reserved.
+#
+#  This program and the accompanying materials are licensed and made available
+#  under the terms and conditions of the BSD License which accompanies this
+#  distribution. The full text of the license may be found at
+#  http://opensource.org/licenses/bsd-license.php
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
+#  IMPLIED.
+#
+#
+##
+
+[Defines]
+  INF_VERSION= 0x0001000A
+  BASE_NAME  = PciHostBridgeLib
+  FILE_GUID  = e5c91e8a-0b2b-11e8-9533-286ed489ee9b
+  MODULE_TYPE= DXE_DRIVER
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = PciHostBridgeLib|DXE_DRIVER
+
+#
+# The following information is for reference only and not required by the build
+# tools.
+#
+#  VALID_ARCHITECTURES   = AARCH64 ARM
+#
+
+[Sources]
+  PciHostBridgeLib.c
+
+[Packages]
+  MdeModulePkg/MdeModulePkg.dec
+  MdePkg/MdePkg.dec
+  Silicon/Hisilicon/HisiPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  BaseMemoryLib
+  DebugLib
+  DevicePathLib
+  MemoryAllocationLib
+  OemMiscLib
+
+[Pcd]
+  gHisiTokenSpaceGuid.PcdPcieRootBridgeMask
+  gHisiTokenSpaceGuid.PcdPcieRootBridgeMask2P
diff --git a/Platform/Hisilicon/Library/PciHostBridgeLib/PciHostBridgeLib.c 
b/Platform/Hisilicon/Library/PciHostBridgeLib/PciHostBridgeLib.c
new file mode 100644
index ..6aff5cdd3d76
--- /dev/null
+++ b/Platform/Hisilicon/Library/PciHostBridgeLib/PciHostBridgeLib.c
@@ -0,0 +1,304 @@
+/** @file
+  PCI Host Bridge Library instance for Hisilicon D0x
+
+  Copyright (c) 2018, Hisilicon Limited. All rights reserved.
+  Copyright (c) 2017 - 2018, Linaro Ltd. All rights reserved.
+
+  This program and the accompanying materials are licensed and made available
+  under the terms and conditions of the BSD License which accompanies this
+  distribution.  The full text of the license may be found at
+  http://opensource.org/licenses/bsd-license.php.
+
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT
+  WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+
+#pragma pack(1)
+typedef struct {
+  ACPI_HID_DEVICE_PATH AcpiDevicePath;
+  EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} EFI_PCI_ROOT_BRIDGE_DEVICE_PATH;
+#pragma pack ()
+
+STATIC EFI_PCI_ROOT_BRIDGE_DEVICE_PATH mEfiPciRootBridgeDevicePath = {
+  {
+{
+  ACPI_DEVICE_PATH,
+  ACPI_DP,
+  {
+(UINT8) (sizeof(ACPI_HID_DEVICE_PATH)),
+(UINT8) ((sizeof(ACPI_HID_DEVICE_PATH)) >> 8)
+  }
+},
+EISA_PNP_ID(0x0A03), // PCI
+0
+  }, {
+END_DEVICE_PATH_TYPE,
+END_ENTIRE_DEVICE_PATH_SUBTYPE,
+{
+  END_DEVICE_PATH_LENGTH,
+  0
+}
+  }
+};
+
+STATIC PCI_ROOT_BRIDGE mRootBridgeTemplate = {
+  0,  // Segment
+  0,  // Supports
+  0,  // Attributes
+  TRUE,   // DmaAbove4G
+  FALSE,  // NoExtendedConfigSpace
+  FALSE,  // ResourceAssigned
+  EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM |  // AllocationAttributes
+  EFI_PCI_HOST_BRIDGE_MEM64_DECODE,
+  {
+// Bus
+0,
+0
+  }, {
+// Io
+0,
+0,
+0
+  }, {
+// Mem
+MAX_UINT64,
+0,
+0
+  }, {
+// MemAbove4G
+MAX_UINT64,
+0,
+0
+  }, {
+// PMem
+MAX_UINT64,
+0,
+0
+  }, {
+// PMemAbove4G
+MAX_UINT64,
+0,
+0
+  },
+  (EFI_DEVICE_PATH_PROTOCOL *)
+};
+
+STATIC
+EFI_STATUS
+ConstructRootBridge (
+PCI_ROOT_BRIDGE

[edk2] [PATCH edk2-platforms 01/12] Hisilicon: Enable WARN and INFO debug message

2018-03-20 Thread Heyi Guo 
INFO and WARN messages are useful when we are debugging, something
like PCI enumeration process, and more debug messages should not
impact much for they will only be displayed in DEBUG version, not
RELEASE one.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Heyi Guo 
Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Michael D Kinney 
Cc: Haojian Zhuang 
---
 Silicon/Hisilicon/Hisilicon.dsc.inc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Silicon/Hisilicon/Hisilicon.dsc.inc 
b/Silicon/Hisilicon/Hisilicon.dsc.inc
index f8d5f0b270b3..77585933179e 100644
--- a/Silicon/Hisilicon/Hisilicon.dsc.inc
+++ b/Silicon/Hisilicon/Hisilicon.dsc.inc
@@ -293,7 +293,7 @@ [PcdsFixedAtBuild.common]
   #  DEBUG_EVENT 0x0008  // Event messages
   #  DEBUG_ERROR 0x8000  // Error
 
-  gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x8004
+  gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x8046
   gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x06
 
   #
-- 
2.7.4

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[edk2] [PATCH edk2-platforms 02/12] Hisilicon/D05/PlatformPciLib: fix misuse of macro

2018-03-20 Thread Heyi Guo 
Each PCI root bridge has its own macro definitions for its resource
aperture, so that one root bridge should not use macro definitions of
other root bridges.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Heyi Guo 
Cc: Ard Biesheuvel 
Cc: Leif Lindholm 
Cc: Michael D Kinney 
---
 Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.c | 18 
+-
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.c 
b/Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.c
index 57283a1053df..c8e20356f818 100644
--- a/Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.c
+++ b/Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.c
@@ -159,7 +159,7 @@ PCI_ROOT_BRIDGE_RESOURCE_APPETURE  
mResAppeture[PCIE_MAX_HOSTBRIDGE][PCIE_MAX_RO
   (PCI_HB1RB0_ECAM_BASE),  //MemBase
   (PCI_HB1RB0_CPUMEMREGIONBASE + PCI_HB1RB0_PCIREGION_SIZE - 1), //MemLimit
   PCI_HB1RB0_IO_BASE, //IoBase
-  (PCI_HB0RB0_CPUIOREGIONBASE + PCI_HB0RB0_IO_SIZE - 1), //IoLimit
+  (PCI_HB1RB0_CPUIOREGIONBASE + PCI_HB1RB0_IO_SIZE - 1), //IoLimit
   PCI_HB1RB0_CPUMEMREGIONBASE, //CpuMemRegionBase
   PCI_HB1RB0_CPUIOREGIONBASE,  //CpuIoRegionBase
   (PCI_HB1RB0_PCI_BASE),  //RbPciBar
@@ -174,7 +174,7 @@ PCI_ROOT_BRIDGE_RESOURCE_APPETURE  
mResAppeture[PCIE_MAX_HOSTBRIDGE][PCIE_MAX_RO
   (PCI_HB1RB1_ECAM_BASE),  //MemBase
   (PCI_HB1RB1_CPUMEMREGIONBASE + PCI_HB1RB1_PCIREGION_SIZE - 1), //MemLimit
   PCI_HB1RB1_IO_BASE, //IoBase
-  (PCI_HB0RB1_CPUIOREGIONBASE + PCI_HB0RB0_IO_SIZE - 1), //IoLimit
+  (PCI_HB1RB1_CPUIOREGIONBASE + PCI_HB1RB1_IO_SIZE - 1), //IoLimit
   PCI_HB1RB1_CPUMEMREGIONBASE, //CpuMemRegionBase
   PCI_HB1RB1_CPUIOREGIONBASE,  //CpuIoRegionBase
   (PCI_HB1RB1_PCI_BASE),  //RbPciBar
@@ -189,7 +189,7 @@ PCI_ROOT_BRIDGE_RESOURCE_APPETURE  
mResAppeture[PCIE_MAX_HOSTBRIDGE][PCIE_MAX_RO
   PCI_HB1RB2_CPUMEMREGIONBASE,  //MemBase
   PCI_HB1RB2_CPUMEMREGIONBASE + PCI_HB1RB2_PCIREGION_SIZE - 1, //MemLimit
   PCI_HB1RB2_IO_BASE, //IoBase
-  (PCI_HB0RB2_CPUIOREGIONBASE + PCI_HB0RB0_IO_SIZE - 1), //IoLimit
+  (PCI_HB1RB2_CPUIOREGIONBASE + PCI_HB1RB2_IO_SIZE - 1), //IoLimit
   PCI_HB1RB2_CPUMEMREGIONBASE, //CpuMemRegionBase
   PCI_HB1RB2_CPUIOREGIONBASE,  //CpuIoRegionBase
   (PCI_HB1RB2_PCI_BASE),  //RbPciBar
@@ -205,7 +205,7 @@ PCI_ROOT_BRIDGE_RESOURCE_APPETURE  
mResAppeture[PCIE_MAX_HOSTBRIDGE][PCIE_MAX_RO
   (PCI_HB1RB3_ECAM_BASE),  //MemBase
   (PCI_HB1RB3_CPUMEMREGIONBASE + PCI_HB1RB3_PCIREGION_SIZE - 1), //MemLimit
   PCI_HB1RB3_IO_BASE, //IoBase
-  (PCI_HB0RB3_CPUIOREGIONBASE + PCI_HB0RB0_IO_SIZE - 1), //IoLimit
+  (PCI_HB1RB3_CPUIOREGIONBASE + PCI_HB1RB3_IO_SIZE - 1), //IoLimit
   PCI_HB1RB3_CPUMEMREGIONBASE, //CpuMemRegionBase
   PCI_HB1RB3_CPUIOREGIONBASE,  //CpuIoRegionBase
   (PCI_HB1RB3_PCI_BASE),  //RbPciBar
@@ -220,7 +220,7 @@ PCI_ROOT_BRIDGE_RESOURCE_APPETURE  
mResAppeture[PCIE_MAX_HOSTBRIDGE][PCIE_MAX_RO
   PCI_HB1RB4_CPUMEMREGIONBASE,  //MemBase
   PCI_HB1RB4_CPUMEMREGIONBASE + PCI_HB1RB4_PCIREGION_SIZE - 1, //MemLimit
   PCI_HB1RB4_IO_BASE, //IoBase
-  (PCI_HB0RB4_CPUIOREGIONBASE + PCI_HB0RB0_IO_SIZE - 1), //IoLimit
+  (PCI_HB1RB4_CPUIOREGIONBASE + PCI_HB1RB4_IO_SIZE - 1), //IoLimit
   PCI_HB1RB4_CPUMEMREGIONBASE, //CpuMemRegionBase
   PCI_HB1RB4_CPUIOREGIONBASE,  //CpuIoRegionBase
   (PCI_HB1RB4_PCI_BASE),  //RbPciBar
@@ -235,7 +235,7 @@ PCI_ROOT_BRIDGE_RESOURCE_APPETURE  
mResAppeture[PCIE_MAX_HOSTBRIDGE][PCIE_MAX_RO
   PCI_HB1RB5_CPUMEMREGIONBASE,  //MemBase
   PCI_HB1RB5_CPUMEMREGIONBASE + PCI_HB1RB5_PCIREGION_SIZE - 1, //MemLimit
   PCI_HB1RB5_IO_BASE, //IoBase
-  (PCI_HB0RB5_CPUIOREGIONBASE + PCI_HB0RB0_IO_SIZE - 1), //IoLimit
+  (PCI_HB1RB5_CPUIOREGIONBASE + PCI_HB1RB5_IO_SIZE - 1), //IoLimit
   PCI_HB1RB5_CPUMEMREGIONBASE, //CpuMemRegionBase
   PCI_HB1RB5_CPUIOREGIONBASE,  //CpuIoRegionBase
   (PCI_HB1RB5_PCI_BASE),  //RbPciBar
@@ -250,12 +250,12 @@ PCI_ROOT_BRIDGE_RESOURCE_APPETURE  
mResAppeture[PCIE_MAX_HOSTBRIDGE][PCIE_MAX_RO
   (PCI_HB1RB6_ECAM_BASE),  //MemBase
   PCI_HB1RB6_CPUMEMREGIONBASE + PCI_HB1RB6_PCIREGION_SIZE - 1, //MemLimit
   PCI_HB1RB6_IO_BASE, //IoBase
-  (PCI_HB0RB6_CPUIOREGIONBASE + PCI_HB0RB0_IO_SIZE - 1), //IoLimit
+  (PCI_HB1RB6_CPUIOREGIONBASE + PCI_HB1RB6_IO_SIZE - 1), //IoLimit
   PCI_HB1RB6_CPUMEMREGIONBASE, //CpuMemRegionBase
   PCI_HB1RB6_CPUIOREGIONBASE,  //CpuIoRegionBase
   (PCI_HB1RB6_PCI_BASE),  //RbPciBar
   PCI_HB1RB6_PCIREGION_BASE, //PciRegionbase
-  PCI_HB1RB0_PCIREGION_BASE + PCI_HB1RB0_PCIREGION_SIZE - 1 
//PciRegionlimit
+  PCI_HB1RB6_PCIREGION_BASE + PCI_HB1RB6_PCIREGION_SIZE - 1 
//PciRegionlimit
   },
 
   /*

Re: [edk2] [staging/dynamictables PATCH 0/2] Dynamic Tables Framework core

2018-03-20 Thread Desimone, Nathaniel L 
Please don't use the name DynamicTableManagerDxe. What does it manage? 
DynamicTables? How does adding the word "Manager" provide any useful 
information for the reader? I recommend the name "DynamicAcpiTableDxe". It 
makes it clear this this code is specifically for generating ACPI tables at 
runtime (as opposed to some sort of unnamed table), and it removes the 
unnecessary prose.

-Original Message-
From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Sami 
Mujawar
Sent: Monday, March 19, 2018 8:19 AM
To: edk2-devel@lists.01.org
Cc: n...@arm.com; leif.lindh...@linaro.org; stephanie.hughes-f...@arm.com
Subject: [edk2] [staging/dynamictables PATCH 0/2] Dynamic Tables Framework core

The Dynamic Tables Framework is a prototyped as a solution for automatically 
generating the firmware tables based on hardware description. 

This patchset is the Dynamic Tables Framework core and implement the 
generic/standard modules for dynamically generating ACPI 6.2 tables for ARM 
platform. The platform specific modules are in the devel-dynamictables branch 
in the edk2-platforms repository at: 
https://github.com/tianocore/edk2-platforms/tree/devel-dynamictables

The first patch in this patchset 'MdePkg: SMMUv3 updates for IORT'
is a precursor for the Dynamic Tables Framework and has been submitted 
independently to the edk2-devel mailing list where it is currently awaiting 
acceptance.

The sources for this patchset can be seen at:
https://github.com/samimujawar/edk2-staging/tree/187_dynamictables_v1

Sami Mujawar (2):
  MdePkg: SMMUv3 updates for IORT table definitions
  DynamicTablesPkg: Dynamic Tables Framework

 
DynamicTablesPkg/Drivers/DynamicTableFactoryDxe/AcpiTableFactory/AcpiTableFactory.c
 |  226 +++
 
DynamicTablesPkg/Drivers/DynamicTableFactoryDxe/DeviceTreeTableFactory/DeviceTreeTableFactory.c
 |  225 +++
 DynamicTablesPkg/Drivers/DynamicTableFactoryDxe/DynamicTableFactory.h  
 |  125 ++
 DynamicTablesPkg/Drivers/DynamicTableFactoryDxe/DynamicTableFactoryDxe.c   
 |   84 +
 DynamicTablesPkg/Drivers/DynamicTableFactoryDxe/DynamicTableFactoryDxe.inf 
 |   59 +
 
DynamicTablesPkg/Drivers/DynamicTableFactoryDxe/SmbiosTableFactory/SmbiosTableFactory.c
 |  226 +++
 DynamicTablesPkg/Drivers/DynamicTableManagerDxe/DynamicTableManagerDxe.c   
 |  533 +
 DynamicTablesPkg/Drivers/DynamicTableManagerDxe/DynamicTableManagerDxe.inf 
 |   48 +
 DynamicTablesPkg/DynamicTables.dsc.inc 
 |   46 +
 DynamicTablesPkg/DynamicTables.fdf.inc 
 |   35 +
 DynamicTablesPkg/DynamicTablesPkg.dec  
 |   42 +
 DynamicTablesPkg/Include/AcpiTableGenerator.h  
 |  282 +++
 DynamicTablesPkg/Include/ArmNameSpaceObjects.h 
 |  587 ++
 DynamicTablesPkg/Include/ConfigurationManagerHelper.h  
 |  119 ++
 DynamicTablesPkg/Include/ConfigurationManagerObject.h  
 |  176 ++
 DynamicTablesPkg/Include/DeviceTreeTableGenerator.h
 |  182 ++
 DynamicTablesPkg/Include/Library/TableHelperLib.h  
 |   70 +
 DynamicTablesPkg/Include/Protocol/ConfigurationManagerProtocol.h   
 |  128 ++
 DynamicTablesPkg/Include/Protocol/DynamicTableFactoryProtocol.h
 |  140 ++
 DynamicTablesPkg/Include/SmbiosTableGenerator.h
 |  240 +++
 DynamicTablesPkg/Include/StandardNameSpaceObjects.h
 |  116 ++
 DynamicTablesPkg/Include/TableGenerator.h  
 |  252 +++
 DynamicTablesPkg/Library/Acpi/Arm/AcpiDbg2LibArm/AcpiDbg2LibArm.inf
 |   47 +
 DynamicTablesPkg/Library/Acpi/Arm/AcpiDbg2LibArm/Dbg2Generator.c   
 |  440 +
 DynamicTablesPkg/Library/Acpi/Arm/AcpiFadtLibArm/AcpiFadtLibArm.inf
 |   41 +
 DynamicTablesPkg/Library/Acpi/Arm/AcpiFadtLibArm/FadtGenerator.c   
 |  666 +++
 DynamicTablesPkg/Library/Acpi/Arm/AcpiGtdtLibArm/AcpiGtdtLibArm.inf
 |   41 +
 DynamicTablesPkg/Library/Acpi/Arm/AcpiGtdtLibArm/GtdtGenerator.c   
 |  670 +++
 DynamicTablesPkg/Library/Acpi/Arm/AcpiIortLibArm/AcpiIortLibArm.inf
 |   41 +
 DynamicTablesPkg/Library/Acpi/Arm/AcpiIortLibArm/IortGenerator.c   
 | 2046 
 DynamicTablesPkg/Library/Acpi/Arm/AcpiIortLibArm/IortGenerator.h

[edk2] [PATCH edk2-platforms v3 15/17] ARM/VExpressPkg: New DP500/DP550/DP650 platform library

2018-03-20 Thread Girish Pathak 
From: Girish Pathak 

This change adds LcdPlatformLib implementation for Arm Mali
DP500/DP500/DP650 display processors for models (with DP550 support).

NOTE: Versions for actual hardware are liable to require extra handling
for clock input changes, etc.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Girish Pathak 
Signed-off-by: Evan Lloyd 
---

Notes:
v3:
- Please fix the funky indentation   [Ard]

  Done   [Girish]

- Add  EFI_MEMORY_XP [Ard]

  Done   [Girish]

 Platform/ARM/VExpressPkg/ArmVExpressPkg.dec|   3 +-
 Platform/ARM/VExpressPkg/Library/ArmMaliDpLib/ArmMaliDpLib.c   | 387 

 Platform/ARM/VExpressPkg/Library/ArmMaliDpLib/ArmMaliDpLib.inf |  43 
+++
 Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf |   3 +
 Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c  |  12 +-
 5 files changed, 446 insertions(+), 2 deletions(-)

diff --git a/Platform/ARM/VExpressPkg/ArmVExpressPkg.dec 
b/Platform/ARM/VExpressPkg/ArmVExpressPkg.dec
index 
695553a94f7f7e963b5db995c5e54f1ae1559daf..ac77540362d0775bed45f517306b98ea16bfb170
 100644
--- a/Platform/ARM/VExpressPkg/ArmVExpressPkg.dec
+++ b/Platform/ARM/VExpressPkg/ArmVExpressPkg.dec
@@ -1,7 +1,7 @@
 #/** @file
 # Arm Versatile Express package.
 #
-#  Copyright (c) 2012-2015, ARM Limited. All rights reserved.
+#  Copyright (c) 2012-2018, ARM Limited. All rights reserved.
 #
 #  This program and the accompanying materials are licensed and made available
 #  under the terms and conditions of the BSD License which accompanies this
@@ -51,6 +51,7 @@ [PcdsFixedAtBuild.common]
   gArmVExpressTokenSpaceGuid.PcdPL111LcdVideoModeOscId|1|UINT32|0x0003
 
   gArmVExpressTokenSpaceGuid.PcdHdLcdVideoModeOscId|0|UINT32|0x0005
+  gArmVExpressTokenSpaceGuid.PcdArmMaliDpMaxMode|0|UINT32|0x0008
 
   #
   # Device path of block device on which Fastboot will flash partitions
diff --git a/Platform/ARM/VExpressPkg/Library/ArmMaliDpLib/ArmMaliDpLib.c 
b/Platform/ARM/VExpressPkg/Library/ArmMaliDpLib/ArmMaliDpLib.c
new file mode 100644
index 
..cc38e865d2246e12929ae65d1155a4e2ec6ac06f
--- /dev/null
+++ b/Platform/ARM/VExpressPkg/Library/ArmMaliDpLib/ArmMaliDpLib.c
@@ -0,0 +1,387 @@
+/** @file
+
+  The file contains Arm Mali DP platform specific implementation.
+
+  Copyright (c) 2017-2018, Arm Limited. All rights reserved.
+
+  This program and the accompanying materials
+  are licensed and made available under the terms and conditions of the BSD 
License
+  which accompanies this distribution.  The full text of the license may be 
found at
+  http://opensource.org/licenses/bsd-license.php
+
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/** Check an address is within 40 bits.
+
+  The ARM Mali DP framebuffer address size can not be wider than 40 bits
+**/
+#define  DP_VALID_BASE_ADDR(Address)  ((Address >> 40) == 0)
+
+typedef struct {
+  UINT32  OscFreq;
+  SCAN_TIMINGSHorizontal;
+  SCAN_TIMINGSVertical;
+} DISPLAY_MODE;
+
+/** The display modes implemented by this driver.
+
+  On Models, the OSC frequencies (listed for each mode below) are not used.
+  However these frequencies are useful on hardware plaforms where related
+  clock (or PLL) settings are based on these pixel clocks.
+
+  Since the clock settings are defined externally, the driver must
+  communicate pixel clock frequencies to relevant modules
+  responsible for setting clocks. e.g. SCP.
+**/
+STATIC DISPLAY_MODE mDisplayModes[] = {
+  {
+// Mode 0 : VGA : 640 x 480 x 24 bpp.
+VGA_OSC_FREQUENCY,
+{VGA_H_RES_PIXELS, VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH},
+{VGA_V_RES_PIXELS, VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH}
+  },
+  {
+// Mode 1 : WVGA : 800 x 480 x 24 bpp.
+WVGA_OSC_FREQUENCY,
+{WVGA_H_RES_PIXELS, WVGA_H_SYNC, WVGA_H_BACK_PORCH, WVGA_H_FRONT_PORCH},
+{WVGA_V_RES_PIXELS, WVGA_V_SYNC, WVGA_V_BACK_PORCH, WVGA_V_FRONT_PORCH}
+  },
+  {
+// Mode 2 : SVGA : 800 x 600 x 24 bpp.
+SVGA_OSC_FREQUENCY,
+{SVGA_H_RES_PIXELS, SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH},
+{SVGA_V_RES_PIXELS, SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH}
+  },
+  {
+// Mode 3 : QHD : 960 x 540 x 24 bpp.
+QHD_OSC_FREQUENCY,
+{QHD_H_RES_PIXELS, QHD_H_SYNC, QHD_H_BACK_PORCH, QHD_H_FRONT_PORCH},
+{QHD_V_RES_PIXELS, QHD_V_SYNC, QHD_V_BACK_PORCH, QHD_V_FRONT_PORCH}
+  },
+  {
+// Mode 4 : WSVGA : 1024 x 600 x 24 bpp.
+WSVGA_OSC_FREQUENCY,
+

[edk2] [PATCH edk2-platforms v3 14/17] ARM/VExpressPkg: Set EFI_MEMORY_XP flag on GOP framebuffer

2018-03-20 Thread Girish Pathak 
The framebuffer memory is set with flag
EFI_MEMORY_WC (uncached, unbuffered) which causes framebuffer memory
with eXecute bit set. Framebuffer memory having executable bit
set is a security hazard. This fix adds EFI_MEMORY_XP flag to avoid this.
Unfortunately function gDS->SetMemorySpaceAttributes() causes assertion due
to unsupported EFI_MEMORY_XP type. Therefore this fix replaces
gDS->SetMemorySpaceAttributes() with Cpu->SetMemoryAttributes().

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Girish Pathak 
Signed-off-by: Evan Lloyd 
---
 Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c
| 24 ++--
 Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpressLib.inf   
|  1 -
 Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c  
| 24 ++--
 
Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpressLib.inf
 |  1 -
 4 files changed, 34 insertions(+), 16 deletions(-)

diff --git 
a/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c 
b/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c
index 
c0a25a18d3fcfe91a76ee985ee58145b97900fa0..4c114de4062ece7cee1221148afb42e66d04f07e
 100644
--- a/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c
+++ b/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c
@@ -17,11 +17,11 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
 
+#include 
 #include 
 #include 
 
@@ -159,6 +159,7 @@ LcdPlatformGetVram (
 {
   EFI_STATUS  Status;
   EFI_ALLOCATE_TYPE   AllocationType;
+  EFI_CPU_ARCH_PROTOCOL   *Cpu;
 
   ASSERT (VramBaseAddress != NULL);
   ASSERT (VramSize != NULL);
@@ -185,13 +186,22 @@ LcdPlatformGetVram (
 return Status;
   }
 
-  // Mark the VRAM as write-combining.
-  // The VRAM is inside the DRAM, which is cacheable.
-  Status = gDS->SetMemorySpaceAttributes (
-  *VramBaseAddress,
-  *VramSize,
-  EFI_MEMORY_WC
+  // Ensure the Cpu architectural protocol is already installed
+  Status = gBS->LocateProtocol (
+  ,
+  NULL,
+  (VOID **)
   );
+  if (!EFI_ERROR (Status)) {
+// The VRAM is inside the DRAM, which is cacheable.
+// Mark the VRAM as write-combining (uncached) and non-executable.
+Status = Cpu->SetMemoryAttributes (
+Cpu,
+*VramBaseAddress,
+*VramSize,
+EFI_MEMORY_WC | EFI_MEMORY_XP
+);
+  }
   if (EFI_ERROR (Status)) {
 ASSERT_EFI_ERROR (Status);
 gBS->FreePages (*VramBaseAddress, EFI_SIZE_TO_PAGES (*VramSize));
diff --git 
a/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpressLib.inf 
b/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpressLib.inf
index 
9b0d358846bf367d7f9ff6f5d3fdffc204864528..c7b1b7fae77cbbf82b3a0768e7654a96719f5e7a
 100644
--- 
a/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpressLib.inf
+++ 
b/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpressLib.inf
@@ -33,7 +33,6 @@ [Packages]
 [LibraryClasses]
   ArmPlatformSysConfigLib
   BaseLib
-  DxeServicesTableLib
 
 [Protocols]
   gEfiEdidDiscoveredProtocolGuid# Produced
diff --git 
a/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c 
b/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c
index 
61ddf77e903e6c33a26b2aa8b76121e807195a9a..cae5f3a658efa4cc2be135259b63c860c26c6874
 100644
--- 
a/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c
+++ 
b/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c
@@ -17,10 +17,10 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 
+#include 
 #include 
 #include 
 
@@ -212,6 +212,7 @@ LcdPlatformGetVram (
   )
 {
   EFI_STATUS  Status;
+  EFI_CPU_ARCH_PROTOCOL   *Cpu;
 
   ASSERT (VramBaseAddress != NULL);
   ASSERT (VramSize != NULL);
@@ -241,13 +242,22 @@ LcdPlatformGetVram (
   return Status;
 }
 
-// Mark the VRAM as write-combining.
-// The VRAM is inside the DRAM, which is cacheable.
-Status = gDS->SetMemorySpaceAttributes (
-*VramBaseAddress,
-*VramSize,
-EFI_MEMORY_WC
+// Ensure the Cpu architectural protocol is already installed
+Status = gBS->LocateProtocol (
+,
+NULL,
+(VOID **)
 );
+if (!EFI_ERROR (Status)) {
+  // The VRAM is inside the DRAM, which is cacheable.
+  // Mark the VRAM as write-combining (uncached) and non-executable.
+  Status = Cpu->SetMemoryAttributes (
+  Cpu,
+

[edk2] [PATCH edk2-platforms v3 16/17] ARM/JunoPkg: Adding SCMI MTL library

2018-03-20 Thread Girish Pathak 
This change adds a new Mailbox Transport Layer library for the Juno
platform. This library is required for ArmScmiDxe driver communication
with the SCP.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Girish Pathak 
---

Notes:
v3:
- Please rename this library *instance* to something
  Juno-specific, e.g., ArmJunoMtlLib[Ard]

  Renamed to ArmJunoMtlLib  [Girish]

 Platform/ARM/JunoPkg/ArmJuno.dec  |   9 +-
 Platform/ARM/JunoPkg/ArmJuno.dsc  |   5 +-
 Platform/ARM/JunoPkg/Library/ArmJunoLib/ArmJunoMem.c  |   8 +-
 Platform/ARM/JunoPkg/Library/ArmJunoMtlLib/ArmJunoMtlLib.c| 198 

 Platform/ARM/JunoPkg/Library/ArmJunoMtlLib/ArmJunoMtlLib.inf  |  39 
 Platform/ARM/JunoPkg/Library/ArmJunoMtlLib/ArmJunoMtlPrivateLib.h |  94 
++
 6 files changed, 349 insertions(+), 4 deletions(-)

diff --git a/Platform/ARM/JunoPkg/ArmJuno.dec b/Platform/ARM/JunoPkg/ArmJuno.dec
index 
60cef6d23a2d904103b9806d871fd2b89fff51c3..fdb56fccb2b259301fd787016a9c4de7ab3c356d
 100644
--- a/Platform/ARM/JunoPkg/ArmJuno.dec
+++ b/Platform/ARM/JunoPkg/ArmJuno.dec
@@ -1,5 +1,5 @@
 #
-#  Copyright (c) 2013-2015, ARM Limited. All rights reserved.
+#  Copyright (c) 2013-2018, ARM Limited. All rights reserved.
 #
 #  This program and the accompanying materials
 #  are licensed and made available under the terms and conditions of the BSD 
License
@@ -46,3 +46,10 @@ [PcdsFixedAtBuild.common]
   # Juno Device Trees are loaded from NOR Flash
   
gArmJunoTokenSpaceGuid.PcdJunoFdtDevicePath|L"VenHw(E7223039-5836-41E1-B542-D7EC736C5E59)/board.dtb"|VOID*|0x0008
 
+  # MHU Register base used by SCMI Mailbox transport
+  gArmJunoTokenSpaceGuid.PcdArmMtlDoorBell|0x2B1F|UINT64|0x0024
+
+  # ARM_JUNO_NON_SECURE_SRAM_BASE used by SCMI Mailbox transport
+  gArmJunoTokenSpaceGuid.PcdArmMtlMailBoxBase|0x2E00|UINT64|0x0025
+  gArmJunoTokenSpaceGuid.PcdArmMtlMailBoxSize|0x80|UINT32|0x0026
+
diff --git a/Platform/ARM/JunoPkg/ArmJuno.dsc b/Platform/ARM/JunoPkg/ArmJuno.dsc
index 
9d7317683ef39ab47429234b98d94c04953b41cb..851dc0f04ad693e4a88cee070b205f0234687d81
 100644
--- a/Platform/ARM/JunoPkg/ArmJuno.dsc
+++ b/Platform/ARM/JunoPkg/ArmJuno.dsc
@@ -1,5 +1,5 @@
 #
-#  Copyright (c) 2013-2017, ARM Limited. All rights reserved.
+#  Copyright (c) 2013-2018, ARM Limited. All rights reserved.
 #
 #  This program and the accompanying materials
 #  are licensed and made available under the terms and conditions of the BSD 
License
@@ -47,6 +47,9 @@ [LibraryClasses.common]
   # USB Requirements
   UefiUsbLib|MdePkg/Library/UefiUsbLib/UefiUsbLib.inf
 
+  # SCMI Mailbox Transport Layer
+  ArmMtlLib|Platform/ARM/JunoPkg/Library/ArmJunoMtlLib/ArmJunoMtlLib.inf
+
 [LibraryClasses.common.SEC]
   PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf
   
ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractGuidedSectionLib/PrePiExtractGuidedSectionLib.inf
diff --git a/Platform/ARM/JunoPkg/Library/ArmJunoLib/ArmJunoMem.c 
b/Platform/ARM/JunoPkg/Library/ArmJunoLib/ArmJunoMem.c
index 
2d9c2c95a80d9c34ba4a1a526950537a97ec5d10..2cac815e96104e74c9ceae2c4140bcab535432a8
 100644
--- a/Platform/ARM/JunoPkg/Library/ArmJunoLib/ArmJunoMem.c
+++ b/Platform/ARM/JunoPkg/Library/ArmJunoLib/ArmJunoMem.c
@@ -1,6 +1,6 @@
 /** @file
 *
-*  Copyright (c) 2013-2015, ARM Limited. All rights reserved.
+*  Copyright (c) 2013-2018, ARM Limited. All rights reserved.
 *
 *  This program and the accompanying materials
 *  are licensed and made available under the terms and conditions of the BSD 
License
@@ -107,7 +107,11 @@ ArmPlatformGetVirtualMemoryMap (
   VirtualMemoryTable[++Index].PhysicalBase  = ARM_JUNO_NON_SECURE_SRAM_BASE;
   VirtualMemoryTable[Index].VirtualBase = ARM_JUNO_NON_SECURE_SRAM_BASE;
   VirtualMemoryTable[Index].Length  = ARM_JUNO_NON_SECURE_SRAM_SZ;
-  VirtualMemoryTable[Index].Attributes  = CacheAttributes;
+  // This memory is shared between the application processor
+  // and the SCP. To avoid coherency problems, map it as uncached memory.
+  // NOTE: The attribute value is misleading, it indicates memory map type as
+  // an un-cached, un-buffered but allows buffering and reordering.
+  VirtualMemoryTable[Index].Attributes  = 
ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED;
 
   // PCI Root Complex
   VirtualMemoryTable[++Index].PhysicalBase  = PcdGet64 
(PcdPcieControlBaseAddress);
diff --git a/Platform/ARM/JunoPkg/Library/ArmJunoMtlLib/ArmJunoMtlLib.c 
b/Platform/ARM/JunoPkg/Library/ArmJunoMtlLib/ArmJunoMtlLib.c
new file mode 100644
index 
..ee1efe1574c124c7f7cf1fb345b46806bc3a4466
--- /dev/null
+++ b/Platform/ARM/JunoPkg/Library/ArmJunoMtlLib/ArmJunoMtlLib.c
@@ -0,0 +1,198 @@
+/** @file
+
+  Copyright (c) 2017-2018, Arm Limited. All rights reserved.
+
+  This program and

[edk2] [PATCH edk2-platforms v3 09/17] ARM/VExpressPkg: HdLcdArmVExpressLib: Remove redundant Bpp

2018-03-20 Thread Girish Pathak 
From: EvanLloyd 

Because of copy/paste effects, HdLcdArmVExpress.c contained a
table entry "LCD_BPP Bpp;" specifying the Bits per Pixel for each mode.
However, all modes are LCD_BITS_PER_PIXEL_24.

This change removes the table entry and related use of the field.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Girish Pathak 
Signed-off-by: Evan Lloyd 
Reviewed-by: Ard Biesheuvel 
---
 Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c | 42 
++--
 1 file changed, 13 insertions(+), 29 deletions(-)

diff --git 
a/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c 
b/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c
index 
cd62cd61883dcd78c72aa614466c6f714cc73fc4..97cbe77ee79f53d3430b0fdb057a3bf262834849
 100644
--- a/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c
+++ b/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c
@@ -32,7 +32,6 @@ typedef struct {
   UINT32 Mode;
   UINT32 HorizontalResolution;
   UINT32 VerticalResolution;
-  LCD_BPPBpp;
   UINT32 OscFreq;
 
   // These are used by HDLCD
@@ -48,37 +47,37 @@ typedef struct {
 **/
 LCD_RESOLUTION mResolutions[] = {
   { // Mode 0 : VGA : 640 x 480 x 24 bpp
-VGA, VGA_H_RES_PIXELS, VGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24,
+VGA, VGA_H_RES_PIXELS, VGA_V_RES_PIXELS,
 VGA_OSC_FREQUENCY,
 VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH,
 VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH
   },
   { // Mode 1 : SVGA : 800 x 600 x 24 bpp
-SVGA, SVGA_H_RES_PIXELS, SVGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24,
+SVGA, SVGA_H_RES_PIXELS, SVGA_V_RES_PIXELS,
 SVGA_OSC_FREQUENCY,
 SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH,
 SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH
   },
   { // Mode 2 : XGA : 1024 x 768 x 24 bpp
-XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24,
+XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS,
 XGA_OSC_FREQUENCY,
 XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH,
 XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH
   },
   { // Mode 3 : SXGA : 1280 x 1024 x 24 bpp
-SXGA, SXGA_H_RES_PIXELS, SXGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24,
+SXGA, SXGA_H_RES_PIXELS, SXGA_V_RES_PIXELS,
 (SXGA_OSC_FREQUENCY/2),
 SXGA_H_SYNC, SXGA_H_BACK_PORCH, SXGA_H_FRONT_PORCH,
 SXGA_V_SYNC, SXGA_V_BACK_PORCH, SXGA_V_FRONT_PORCH
   },
   { // Mode 4 : UXGA : 1600 x 1200 x 24 bpp
-UXGA, UXGA_H_RES_PIXELS, UXGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24,
+UXGA, UXGA_H_RES_PIXELS, UXGA_V_RES_PIXELS,
 (UXGA_OSC_FREQUENCY/2),
 UXGA_H_SYNC, UXGA_H_BACK_PORCH, UXGA_H_FRONT_PORCH,
 UXGA_V_SYNC, UXGA_V_BACK_PORCH, UXGA_V_FRONT_PORCH
   },
   { // Mode 5 : HD : 1920 x 1080 x 24 bpp
-HD, HD_H_RES_PIXELS, HD_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24,
+HD, HD_H_RES_PIXELS, HD_V_RES_PIXELS,
 (HD_OSC_FREQUENCY/2),
 HD_H_SYNC, HD_H_BACK_PORCH, HD_H_FRONT_PORCH,
 HD_V_SYNC, HD_V_BACK_PORCH, HD_V_FRONT_PORCH
@@ -289,27 +288,12 @@ LcdPlatformQueryMode (
   Info->VerticalResolution = mResolutions[ModeNumber].VerticalResolution;
   Info->PixelsPerScanLine = mResolutions[ModeNumber].HorizontalResolution;
 
-  switch (mResolutions[ModeNumber].Bpp) {
-  case LCD_BITS_PER_PIXEL_24:
-Info->PixelFormat   = 
PixelRedGreenBlueReserved8BitPerColor;
-Info->PixelInformation.RedMask  = LCD_24BPP_RED_MASK;
-Info->PixelInformation.GreenMask= LCD_24BPP_GREEN_MASK;
-Info->PixelInformation.BlueMask = LCD_24BPP_BLUE_MASK;
-Info->PixelInformation.ReservedMask = LCD_24BPP_RESERVED_MASK;
-break;
-
-  case LCD_BITS_PER_PIXEL_16_555:
-  case LCD_BITS_PER_PIXEL_16_565:
-  case LCD_BITS_PER_PIXEL_12_444:
-  case LCD_BITS_PER_PIXEL_8:
-  case LCD_BITS_PER_PIXEL_4:
-  case LCD_BITS_PER_PIXEL_2:
-  case LCD_BITS_PER_PIXEL_1:
-  default:
-// These are not supported
-ASSERT (FALSE);
-break;
-  }
+  /* Bits per Pixel is always LCD_BITS_PER_PIXEL_24 */
+  Info->PixelFormat   = PixelRedGreenBlueReserved8BitPerColor;
+  Info->PixelInformation.RedMask  = LCD_24BPP_RED_MASK;
+  Info->PixelInformation.GreenMask= LCD_24BPP_GREEN_MASK;
+  Info->PixelInformation.BlueMask = LCD_24BPP_BLUE_MASK;
+  Info->PixelInformation.ReservedMask = LCD_24BPP_RESERVED_MASK;
 
   return EFI_SUCCESS;
 }
@@ -392,7 +376,7 @@ LcdPlatformGetBpp (
 return EFI_INVALID_PARAMETER;
   }
 
-  *Bpp = mResolutions[ModeNumber].Bpp;
+  *Bpp = LCD_BITS_PER_PIXEL_24;
 
   return EFI_SUCCESS;
 }
-- 
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'


___
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[edk2] [PATCH edk2-platforms v3 13/17] ARM/VExpressPkg: Reserving framebuffer at build

2018-03-20 Thread Girish Pathak 
From: Girish Pathak 

This change uses two PCDs, PcdArmLcdFrameBufferBase and
PcdArmLcdFrameBufferSize introduced in correspondiong EDK2 patch to
reserve framebuffer in DRAM if these values are defined in platform
specific DSC file, avoiding the need to allocate dynamically.
This allows the framebuffer to appear as "I/O memory" outside of the
normal RAM map, which is similar to the "VRAM" case.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Girish Pathak 
Signed-off-by: Evan Lloyd 
---

Notes:
v3:
- Move PcdArmLcdDdrFrameBufferBase and
  PcdArmLcdDdrFrameBufferSize to VExpressPkg. [Ard]

  These PCDs are also used for the Juno platform hence these
  PCDs are defined for the ArmPlatformPkg so that both
  platform can use it.[Girish]

- Could you please add an ASSERT() so that System Memory
  and PcdArmLcdDdrFrameBufferBase do not overlap  [Ard]

  Done[Girish]

 Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf |  4 +-
 Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c  | 41 
++--
 2 files changed, 32 insertions(+), 13 deletions(-)

diff --git 
a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf 
b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf
index 
8c6291c42f8a599591d00d7afcb2ff3399417034..b025abd98b5e654323b7821ac353ad920e2e6421
 100644
--- a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf
+++ b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf
@@ -1,5 +1,5 @@
 #/* @file
-#  Copyright (c) 2011-2014, ARM Limited. All rights reserved.
+#  Copyright (c) 2011-2018, ARM Limited. All rights reserved.
 #
 #  This program and the accompanying materials
 #  are licensed and made available under the terms and conditions of the BSD 
License
@@ -54,6 +54,8 @@ [FixedPcd]
   gArmTokenSpaceGuid.PcdArmPrimaryCore
 
   gArmPlatformTokenSpaceGuid.PcdCoreCount
+  gArmPlatformTokenSpaceGuid.PcdArmLcdDdrFrameBufferBase
+  gArmPlatformTokenSpaceGuid.PcdArmLcdDdrFrameBufferSize
 
 [Ppis]
   gArmMpCoreInfoPpiGuid
diff --git a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c 
b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c
index 
9fb0803d31ad0dbab59875bae99fd8a381d484b7..1d5fefc21726ba1b05d90e0e47677575d7fa2034
 100644
--- a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c
+++ b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c
@@ -1,6 +1,6 @@
 /** @file
 *
-*  Copyright (c) 2011-2016, ARM Limited. All rights reserved.
+*  Copyright (c) 2011-2018, ARM Limited. All rights reserved.
 *
 *  This program and the accompanying materials
 *  are licensed and made available under the terms and conditions of the BSD 
License
@@ -128,17 +128,34 @@ ArmPlatformGetVirtualMemoryMap (
   VirtualMemoryTable[Index].Length = 2 * ARM_VE_SMB_PERIPH_SZ;
   VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
 
-  // VRAM
-  VirtualMemoryTable[++Index].PhysicalBase = PL111_CLCD_VRAM_MOTHERBOARD_BASE;
-  VirtualMemoryTable[Index].VirtualBase = PL111_CLCD_VRAM_MOTHERBOARD_BASE;
-  VirtualMemoryTable[Index].Length = PL111_CLCD_VRAM_MOTHERBOARD_SIZE;
-  //
-  // Map the VRAM region as Normal Non-Cacheable memory and not device memory,
-  // so that we can use the accelerated string routines that may use unaligned
-  // accesses or DC ZVA instructions. The enum identifier is slightly awkward
-  // here, but it maps to a memory type that allows buffering and reordering.
-  //
-  VirtualMemoryTable[Index].Attributes = 
ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED;
+  // Map region for the framebuffer in the system RAM if no VRAM present
+  if (FixedPcdGet32 (PcdArmLcdDdrFrameBufferBase) == 0) {
+// VRAM
+VirtualMemoryTable[++Index].PhysicalBase = 
PL111_CLCD_VRAM_MOTHERBOARD_BASE;
+VirtualMemoryTable[Index].VirtualBase = PL111_CLCD_VRAM_MOTHERBOARD_BASE;
+VirtualMemoryTable[Index].Length = PL111_CLCD_VRAM_MOTHERBOARD_SIZE;
+//
+// Map the VRAM region as Normal Non-Cacheable memory and not device 
memory,
+// so that we can use the accelerated string routines that may use 
unaligned
+// accesses or DC ZVA instructions. The enum identifier is slightly awkward
+// here, but it maps to a memory type that allows buffering and reordering.
+//
+VirtualMemoryTable[Index].Attributes = 
ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED;
+
+  } else {
+ASSERT ((ARM_VE_DRAM_BASE + ARM_VE_DRAM_SZ - 1) <
+FixedPcdGet64 (PcdArmLcdDdrFrameBufferBase));
+VirtualMemoryTable[++Index].PhysicalBase = FixedPcdGet64 
(PcdArmLcdDdrFrameBufferBase);
+VirtualMemoryTable[Index].VirtualBase = FixedPcdGet64 
(PcdArmLcdDdrFrameBufferBase);
+

[edk2] [PATCH edk2-platforms v3 17/17] ARM/JunoPkg: Add HDLCD platform library

2018-03-20 Thread Girish Pathak 
This change adds the HDLCD platform lib for the Juno plaform. This
library will be instantiated as a LcdPlatformLib to link with
LcdGraphicsOutputDxe for the Juno platform.

HDLCD platform library depends on the Arm SCMI DXE driver for
communication with the SCP for clock setting. Therefore this change also
enables building of Arm SCMI DXE driver for the Juno platform.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Girish Pathak 
Signed-off-by: Evan Lloyd 
---

Notes:
v3:
- Wouldn't it make more sense to add a macro
  ENABLE_HDLCD, rather than inverting
  the logic?[Ard]

  We used this to correspond with the ACPI
  (FADT) terminology, where HEADLESS implies
  more than just no display.
  Refer below email [Evan]
  https://lists.01.org/pipermail/edk2-devel/
  2018-January/019925.html

- SRAM mapping: Couldn't you map it as
  non-cacheable memory instead  [Ard]

  Done  [Girish]

- Please fix weird indentation  [Ard]

  Done  [Girish]

- Please don't use CPP conditionals for
  control flow  [Ard]

  Done  [Girish]

 Platform/ARM/JunoPkg/ArmJuno.dec |   8 +
 Platform/ARM/JunoPkg/ArmJuno.dsc |  26 +
 Platform/ARM/JunoPkg/ArmJuno.fdf |  12 +-
 Platform/ARM/JunoPkg/Library/ArmJunoLib/ArmJunoLib.inf   |   5 +-
 Platform/ARM/JunoPkg/Library/ArmJunoLib/ArmJunoMem.c |  21 +-
 Platform/ARM/JunoPkg/Library/HdLcdArmJunoLib/HdLcdArmJuno.c  | 555 

 Platform/ARM/JunoPkg/Library/HdLcdArmJunoLib/HdLcdArmJunoLib.inf |  41 ++
 7 files changed, 665 insertions(+), 3 deletions(-)

diff --git a/Platform/ARM/JunoPkg/ArmJuno.dec b/Platform/ARM/JunoPkg/ArmJuno.dec
index 
fdb56fccb2b259301fd787016a9c4de7ab3c356d..edbbb827ad45cf9e33adede006628432aa41c77b
 100644
--- a/Platform/ARM/JunoPkg/ArmJuno.dec
+++ b/Platform/ARM/JunoPkg/ArmJuno.dec
@@ -53,3 +53,11 @@ [PcdsFixedAtBuild.common]
   gArmJunoTokenSpaceGuid.PcdArmMtlMailBoxBase|0x2E00|UINT64|0x0025
   gArmJunoTokenSpaceGuid.PcdArmMtlMailBoxSize|0x80|UINT32|0x0026
 
+  # MaxMode must be one number higher than the actual max mode,
+  # i.e. for actual maximum mode 2, set the value to 3.
+  #
+  # Default value zero allows platform to enumerate maximum supported mode.
+  #
+  # For a list of mode numbers look in HdLcdArmJuno.c
+  gArmJunoTokenSpaceGuid.PcdArmHdLcdMaxMode|0|UINT32|0x0017
+
diff --git a/Platform/ARM/JunoPkg/ArmJuno.dsc b/Platform/ARM/JunoPkg/ArmJuno.dsc
index 
851dc0f04ad693e4a88cee070b205f0234687d81..d5e87f1edfd5d60a543e51cb42dfbcc4489d3f7d
 100644
--- a/Platform/ARM/JunoPkg/ArmJuno.dsc
+++ b/Platform/ARM/JunoPkg/ArmJuno.dsc
@@ -50,6 +50,11 @@ [LibraryClasses.common]
   # SCMI Mailbox Transport Layer
   ArmMtlLib|Platform/ARM/JunoPkg/Library/ArmJunoMtlLib/ArmJunoMtlLib.inf
 
+!ifndef HEADLESS_PLATFORM
+  
LcdPlatformLib|Platform/ARM/JunoPkg/Library/HdLcdArmJunoLib/HdLcdArmJunoLib.inf
+  LcdHwLib|ArmPlatformPkg/Library/HdLcd/HdLcd.inf
+!endif
+
 [LibraryClasses.common.SEC]
   PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf
   
ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractGuidedSectionLib/PrePiExtractGuidedSectionLib.inf
@@ -100,7 +105,15 @@ [PcdsFixedAtBuild.common]
 
   # System Memory (2GB - 16MB of Trusted DRAM at the top of the 32bit address 
space)
   gArmTokenSpaceGuid.PcdSystemMemoryBase|0x8000
+
+!ifdef HEADLESS_PLATFORM
   gArmTokenSpaceGuid.PcdSystemMemorySize|0x7F00
+!else
+  # Default framebuffer size is 0x7E9000, reduce system memory size for 
framebuffer.
+  gArmTokenSpaceGuid.PcdSystemMemorySize|0x7E817000
+  gArmPlatformTokenSpaceGuid.PcdArmLcdDdrFrameBufferBase|0xFE817000
+  gArmPlatformTokenSpaceGuid.PcdArmHdLcdSwapBlueRedSelect|TRUE
+!endif
 
   # Juno Dual-Cluster profile
   gArmPlatformTokenSpaceGuid.PcdCoreCount|6
@@ -142,6 +155,11 @@ [PcdsFixedAtBuild.common]
   gArmTokenSpaceGuid.PcdGicDistributorBase|0x2C01
   gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x2C02F000
 
+!ifndef HEADLESS_PLATFORM
+  # ARM Juno HDLCD Base
+  gArmPlatformTokenSpaceGuid.PcdArmHdLcdBase|0x7FF6
+!endif
+
   #
   # PLDA PCI Root Complex
   #
@@ -315,6 +333,11 @@ [Components.common]
   MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
   
MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceDxe.inf
 
+!ifndef HEADLESS_PLATFORM
+  # Graphic Output Protocol
+  ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.inf
+!endif
+
   #
   # Juno platform driver
   #
@@ -348,6 +371,9 @@ [Components.common]

[edk2] [PATCH edk2-platforms v3 10/17] ARM/VExpressPkg: Redefine LcdPlatformGetTimings function

2018-03-20 Thread Girish Pathak 
From: EvanLloyd 

The LcdPlatformGetTimings interface function takes similar sets of
multiple parameters for horizontal and vertical timings which can be
aggregated in a common data type. This change defines a structure
SCAN_TIMINGS for this which can be used to describe both horizontal and
vertical scan timings, and accordingly redefines the
LcdPlatformGetTiming interface, greatly reducing the amount of data
passed about.

Similarly the mode definition tables are also changed to use this data
type and thus enable pass through access.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Girish Pathak 
Signed-off-by: Evan Lloyd 
Reviewed-by: Ard Biesheuvel 
---
 Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c   
| 106 +---
 Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c 
| 168 
 2 files changed, 109 insertions(+), 165 deletions(-)

diff --git 
a/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c 
b/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c
index 
97cbe77ee79f53d3430b0fdb057a3bf262834849..0c3a4efd6d8d1617965394f461c3f3e7bf70994d
 100644
--- a/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c
+++ b/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c
@@ -30,57 +30,51 @@
 
 typedef struct {
   UINT32 Mode;
-  UINT32 HorizontalResolution;
-  UINT32 VerticalResolution;
   UINT32 OscFreq;
 
   // These are used by HDLCD
-  UINT32 HSync;
-  UINT32 HBackPorch;
-  UINT32 HFrontPorch;
-  UINT32 VSync;
-  UINT32 VBackPorch;
-  UINT32 VFrontPorch;
-} LCD_RESOLUTION;
+  SCAN_TIMINGS   Horizontal;
+  SCAN_TIMINGS   Vertical;
+} DISPLAY_MODE;
 
 /** The display modes supported by the platform.
 **/
-LCD_RESOLUTION mResolutions[] = {
+STATIC DISPLAY_MODE mDisplayModes[] = {
   { // Mode 0 : VGA : 640 x 480 x 24 bpp
-VGA, VGA_H_RES_PIXELS, VGA_V_RES_PIXELS,
+VGA,
 VGA_OSC_FREQUENCY,
-VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH,
-VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH
+{VGA_H_RES_PIXELS, VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH},
+{VGA_V_RES_PIXELS, VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH}
   },
   { // Mode 1 : SVGA : 800 x 600 x 24 bpp
-SVGA, SVGA_H_RES_PIXELS, SVGA_V_RES_PIXELS,
+SVGA,
 SVGA_OSC_FREQUENCY,
-SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH,
-SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH
+{SVGA_H_RES_PIXELS, SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH},
+{SVGA_V_RES_PIXELS, SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH}
   },
   { // Mode 2 : XGA : 1024 x 768 x 24 bpp
-XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS,
+XGA,
 XGA_OSC_FREQUENCY,
-XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH,
-XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH
+{XGA_H_RES_PIXELS, XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH},
+{XGA_V_RES_PIXELS, XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH}
   },
   { // Mode 3 : SXGA : 1280 x 1024 x 24 bpp
-SXGA, SXGA_H_RES_PIXELS, SXGA_V_RES_PIXELS,
+SXGA,
 (SXGA_OSC_FREQUENCY/2),
-SXGA_H_SYNC, SXGA_H_BACK_PORCH, SXGA_H_FRONT_PORCH,
-SXGA_V_SYNC, SXGA_V_BACK_PORCH, SXGA_V_FRONT_PORCH
+{SXGA_H_RES_PIXELS, SXGA_H_SYNC, SXGA_H_BACK_PORCH, SXGA_H_FRONT_PORCH},
+{SXGA_V_RES_PIXELS, SXGA_V_SYNC, SXGA_V_BACK_PORCH, SXGA_V_FRONT_PORCH}
   },
   { // Mode 4 : UXGA : 1600 x 1200 x 24 bpp
-UXGA, UXGA_H_RES_PIXELS, UXGA_V_RES_PIXELS,
+UXGA,
 (UXGA_OSC_FREQUENCY/2),
-UXGA_H_SYNC, UXGA_H_BACK_PORCH, UXGA_H_FRONT_PORCH,
-UXGA_V_SYNC, UXGA_V_BACK_PORCH, UXGA_V_FRONT_PORCH
+{UXGA_H_RES_PIXELS, UXGA_H_SYNC, UXGA_H_BACK_PORCH, UXGA_H_FRONT_PORCH},
+{UXGA_V_RES_PIXELS, UXGA_V_SYNC, UXGA_V_BACK_PORCH, UXGA_V_FRONT_PORCH}
   },
   { // Mode 5 : HD : 1920 x 1080 x 24 bpp
-HD, HD_H_RES_PIXELS, HD_V_RES_PIXELS,
+HD,
 (HD_OSC_FREQUENCY/2),
-HD_H_SYNC, HD_H_BACK_PORCH, HD_H_FRONT_PORCH,
-HD_V_SYNC, HD_V_BACK_PORCH, HD_V_FRONT_PORCH
+{HD_H_RES_PIXELS, HD_H_SYNC, HD_H_BACK_PORCH, HD_H_FRONT_PORCH},
+{HD_V_RES_PIXELS, HD_V_SYNC, HD_V_BACK_PORCH, HD_V_FRONT_PORCH}
   }
 };
 
@@ -205,7 +199,7 @@ LcdPlatformGetMaxMode (VOID)
 {
   // The following line will report correctly the total number of graphics 
modes
   // that could be supported by the graphics driver
-  return (sizeof (mResolutions) / sizeof (LCD_RESOLUTION));
+  return (sizeof (mDisplayModes) / sizeof (DISPLAY_MODE));
 }
 
 /** Set the requested display mode.
@@ -232,7 +226,7 @@ LcdPlatformSetMode (
   Status = ArmPlatformSysConfigSetDevice (

[edk2] [PATCH edk2-platforms v3 07/17] ARM/VExpressPkg: PL111 and HDLCD: Use FixedPcdGet32

2018-03-20 Thread Girish Pathak 
From: Girish Pathak 

This change replaces PcdGet32 with FixedPcdGet32 for the PCDs which
are defined as fixed PCDs.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Girish Pathak 
Signed-off-by: Evan Lloyd 
Reviewed-by: Ard Biesheuvel 
---
 Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c
| 2 +-
 Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpressLib.inf   
| 2 +-
 Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c  
| 4 ++--
 
Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpressLib.inf
 | 2 +-
 4 files changed, 5 insertions(+), 5 deletions(-)

diff --git 
a/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c 
b/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c
index 
6fe7360d55c85ab9137b245b2fa7abf661de270e..d6d63295688f9aa5a6b24cee142760609439941d
 100644
--- a/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c
+++ b/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c
@@ -233,7 +233,7 @@ LcdPlatformSetMode (
   do {
 Status = ArmPlatformSysConfigSetDevice (
SYS_CFG_OSC_SITE1,
-   PcdGet32 (PcdHdLcdVideoModeOscId),
+   FixedPcdGet32 (PcdHdLcdVideoModeOscId),
mResolutions[ModeNumber].OscFreq
);
   } while (Status == EFI_TIMEOUT);
diff --git 
a/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpressLib.inf 
b/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpressLib.inf
index 
34db24d4ee6162b0e963d500a8ed1097bd8a5ceb..eb2a3c94b80129a16bf9ae26b7c2a5403556dc71
 100644
--- 
a/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpressLib.inf
+++ 
b/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpressLib.inf
@@ -39,5 +39,5 @@ [Protocols]
   gEfiEdidDiscoveredProtocolGuid# Produced
   gEfiEdidActiveProtocolGuid# Produced
 
-[Pcd]
+[FixedPcd]
   gArmVExpressTokenSpaceGuid.PcdHdLcdVideoModeOscId
diff --git 
a/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c 
b/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c
index 
c229530ce8e7156d0b834abbe461a4d3213afc79..c51540e1c00a1f46ca845d95306e28e7ca6bfde5
 100644
--- 
a/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c
+++ 
b/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c
@@ -272,7 +272,7 @@ LcdPlatformGetMaxMode (VOID)
   // certain limitations.
 
   // Set the maximum mode allowed
-  return (PcdGet32 (PcdPL111LcdMaxMode));
+  return (FixedPcdGet32 (PcdPL111LcdMaxMode));
 }
 
 /** Set the requested display mode.
@@ -306,7 +306,7 @@ LcdPlatformSetMode (
 break;
   case ARM_VE_DAUGHTERBOARD_1_SITE:
 Function = SYS_CFG_OSC_SITE1;
-OscillatorId = (UINT32)PcdGet32 (PcdPL111LcdVideoModeOscId);
+OscillatorId = FixedPcdGet32 (PcdPL111LcdVideoModeOscId);
 break;
   default:
 return EFI_UNSUPPORTED;
diff --git 
a/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpressLib.inf
 
b/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpressLib.inf
index 
9ca2ace9594d21050c3e53705054c25c69e238f4..f48936f394accc98e8d031fcd2900a6f4611
 100644
--- 
a/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpressLib.inf
+++ 
b/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpressLib.inf
@@ -39,6 +39,6 @@ [Protocols]
   gEfiEdidDiscoveredProtocolGuid# Produced
   gEfiEdidActiveProtocolGuid# Produced
 
-[Pcd]
+[FixedPcd]
   gArmVExpressTokenSpaceGuid.PcdPL111LcdMaxMode
   gArmVExpressTokenSpaceGuid.PcdPL111LcdVideoModeOscId
-- 
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'


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[edk2] [PATCH edk2-platforms v3 06/17] ARM/VExpressPkg: PL111Lcd/HdLcd plaform libs: Minor code cleanup

2018-03-20 Thread Girish Pathak 
From: Girish Pathak 

This minor change removes some unecessary initializations and variables
in PL111LcdArmVExpress.c and redudant return status checks in
HdLcdArmVExpress.c

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Girish Pathak 
Signed-off-by: Evan Lloyd 
Reviewed-by: Ard Biesheuvel 
---
 Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c   
|  5 +
 Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c 
| 16 
 2 files changed, 5 insertions(+), 16 deletions(-)

diff --git 
a/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c 
b/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c
index 
5247b8e038ac45ba800d0f6c79f8718c99b951da..6fe7360d55c85ab9137b245b2fa7abf661de270e
 100644
--- a/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c
+++ b/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c
@@ -259,10 +259,7 @@ LcdPlatformSetMode (
  SYS_CFG_MUXFPGA,
  ARM_VE_DAUGHTERBOARD_1_SITE
  );
-  if (EFI_ERROR (Status)) {
-ASSERT_EFI_ERROR (Status);
-return Status;
-  }
+  ASSERT_EFI_ERROR (Status);
 
   return Status;
 }
diff --git 
a/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c 
b/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c
index 
3d2ec7b1bf658a5fd644cd82fd1341245ba0f5d3..c229530ce8e7156d0b834abbe461a4d3213afc79
 100644
--- 
a/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c
+++ 
b/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c
@@ -203,8 +203,6 @@ LcdPlatformGetVram (
 {
   EFI_STATUS  Status;
 
-  Status = EFI_SUCCESS;
-
   ASSERT (VramBaseAddress != NULL);
   ASSERT (VramSize != NULL);
 
@@ -214,6 +212,7 @@ LcdPlatformGetVram (
   case ARM_VE_MOTHERBOARD_SITE:
 *VramBaseAddress = (EFI_PHYSICAL_ADDRESS)PL111_CLCD_VRAM_MOTHERBOARD_BASE;
 *VramSize = LCD_VRAM_SIZE;
+Status = EFI_SUCCESS;
 break;
 
   case ARM_VE_DAUGHTERBOARD_1_SITE:
@@ -242,7 +241,6 @@ LcdPlatformGetVram (
 if (EFI_ERROR (Status)) {
   ASSERT_EFI_ERROR (Status);
   gBS->FreePages (*VramBaseAddress, EFI_SIZE_TO_PAGES (*VramSize));
-  return Status;
 }
 break;
 
@@ -292,7 +290,6 @@ LcdPlatformSetMode (
   )
 {
   EFI_STATUSStatus;
-  UINT32LcdSite;
   UINT32OscillatorId;
   SYS_CONFIG_FUNCTION   Function;
   UINT32SysId;
@@ -302,9 +299,7 @@ LcdPlatformSetMode (
 return EFI_INVALID_PARAMETER;
   }
 
-  LcdSite = PL111_CLCD_SITE;
-
-  switch (LcdSite) {
+  switch (PL111_CLCD_SITE) {
   case ARM_VE_MOTHERBOARD_SITE:
 Function = SYS_CFG_OSC;
 OscillatorId = PL111_CLCD_MOTHERBOARD_VIDEO_MODE_OSC_ID;
@@ -349,11 +344,8 @@ LcdPlatformSetMode (
   }
 
   // Set the multiplexer
-  Status = ArmPlatformSysConfigSet (SYS_CFG_MUXFPGA, LcdSite);
-  if (EFI_ERROR (Status)) {
-ASSERT_EFI_ERROR (Status);
-return Status;
-  }
+  Status = ArmPlatformSysConfigSet (SYS_CFG_MUXFPGA, PL111_CLCD_SITE);
+  ASSERT_EFI_ERROR (Status);
 
   return Status;
 }
-- 
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'


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[edk2] [PATCH edk2-platforms v3 11/17] ARM/VExpressPkg: PL111 and HDLCD: Add PCD to select pixel format

2018-03-20 Thread Girish Pathak 
From: Girish Pathak 

Current HDLCD and PL111 platform libraries do not support display modes
with PixelBlueGreenRedReserved8BitPerColor format,  i.e. because of
historical confusion, they do not support the UEFI default
PixelBlueGreenRedReserved8BitPerColor

LcdPlatformLib for PL111, LcdPlatformQueryMode function returns the
pixel format as PixelRedGreenBlueReserved8BitPerColor which is wrong,
because that does not match the display controller's pixel format which
is set to BGR in PL111Lcd GOP driver.

Also it is not possible to configure pixel format as RGB/BGR for the
display modes for a platform at build time.

This change adds PcdGopPixelFormat to configure pixel format as
PixelRedGreenBlueReserved8BitPerColoror
PixelBlueGreenRedReserved8BitPerColoror
PixelBitMask.
With this change, pixel format can be selected in the platform specific
.dsc file for all supported display modes.

Support for PixelBitMask is not implemented in PL111 or HDLCD
GOP driver, hence  HDLCD and PL111 platform libraries will return error
EFI_UNSUPPORTED if PcdGopPixelFormat is set to PixelBitMask.
Indeed, it is not clear what selecting PixelBitMask might mean, but
the option is allowed as it might suit a custom platform.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Girish Pathak 
Signed-off-by: Evan Lloyd 
Reviewed-by: Ard Biesheuvel 
---

Notes:
v3:
- Fix minor indentation [Ard]

  Done  [Girish

 Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c
| 23 
 Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpressLib.inf   
|  1 +
 Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c  
| 38 +---
 
Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpressLib.inf
 |  1 +
 4 files changed, 35 insertions(+), 28 deletions(-)

diff --git 
a/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c 
b/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c
index 
0c3a4efd6d8d1617965394f461c3f3e7bf70994d..f7cae39c9cc9954ba4cad1bd597ebfc8baf10f11
 100644
--- a/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c
+++ b/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c
@@ -15,7 +15,6 @@
 #include 
 
 #include 
-#include 
 #include 
 #include 
 #include 
@@ -93,6 +92,10 @@ EFI_EDID_ACTIVE_PROTOCOL  mEdidActive = {
   @param[in] Handle  Handle to the LCD device instance.
 
   @retval EFI_SUCCESSPlaform library initialized successfully.
+  @retval EFI_UNSUPPORTEDPcdGopPixelFormat must be
+ PixelRedGreenBlueReserved8BitPerColor OR
+ PixelBlueGreenRedReserved8BitPerColor
+ any other format is not supported.
   @retval !(EFI_SUCCESS) Other errors.
 **/
 EFI_STATUS
@@ -101,6 +104,17 @@ LcdPlatformInitializeDisplay (
   )
 {
   EFI_STATUS  Status;
+  EFI_GRAPHICS_PIXEL_FORMAT PixelFormat;
+
+  // PixelBitMask and PixelBltOnly pixel formats are not supported
+  PixelFormat = FixedPcdGet32 (PcdGopPixelFormat);
+  if (PixelFormat != PixelRedGreenBlueReserved8BitPerColor &&
+  PixelFormat != PixelBlueGreenRedReserved8BitPerColor) {
+
+ASSERT (PixelFormat == PixelRedGreenBlueReserved8BitPerColor ||
+  PixelFormat == PixelBlueGreenRedReserved8BitPerColor);
+return EFI_UNSUPPORTED;
+  }
 
   // Set the FPGA multiplexer to select the video output from the
   // motherboard or the daughterboard
@@ -282,12 +296,7 @@ LcdPlatformQueryMode (
   Info->VerticalResolution = mDisplayModes[ModeNumber].Vertical.Resolution;
   Info->PixelsPerScanLine = mDisplayModes[ModeNumber].Horizontal.Resolution;
 
-  /* Bits per Pixel is always LCD_BITS_PER_PIXEL_24 */
-  Info->PixelFormat   = PixelRedGreenBlueReserved8BitPerColor;
-  Info->PixelInformation.RedMask  = LCD_24BPP_RED_MASK;
-  Info->PixelInformation.GreenMask= LCD_24BPP_GREEN_MASK;
-  Info->PixelInformation.BlueMask = LCD_24BPP_BLUE_MASK;
-  Info->PixelInformation.ReservedMask = LCD_24BPP_RESERVED_MASK;
+  Info->PixelFormat = FixedPcdGet32 (PcdGopPixelFormat);
 
   return EFI_SUCCESS;
 }
diff --git 
a/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpressLib.inf 
b/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpressLib.inf
index 
eb2a3c94b80129a16bf9ae26b7c2a5403556dc71..9b0d358846bf367d7f9ff6f5d3fdffc204864528
 100644
--- 
a/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpressLib.inf
+++ 
b/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpressLib.inf
@@ -41,3 +41,4 @@ [Protocols]
 
 [FixedPcd]
   gArmVExpressTokenSpaceGuid.PcdHdLcdVideoModeOscId
+  gArmPlatformTokenSpaceGuid.PcdGopPixelFormat

[edk2] [PATCH edk2-platforms v3 12/17] ARM/VExpressPkg: Allocate framebuffer using EfiRuntimeServicesData

2018-03-20 Thread Girish Pathak 
As per the UEFI specification(2.7) section 12.9, the GOP framebuffer
memory can be accessed in the pre-boot and the post boot phase (by OS)
Therefore the memory type EfiBootServicesData is incorrect for
the framebuffer memory allocation. Change EfiBootServicesData with
EfiRuntimeServicesData flag so that allocated memory can be access
by the OS in the post boot phase.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Girish Pathak 
Signed-off-by: Evan Lloyd 
---
 Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c   
| 2 +-
 Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c 
| 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git 
a/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c 
b/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c
index 
f7cae39c9cc9954ba4cad1bd597ebfc8baf10f11..c0a25a18d3fcfe91a76ee985ee58145b97900fa0
 100644
--- a/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c
+++ b/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c
@@ -176,7 +176,7 @@ LcdPlatformGetVram (
   }
   Status = gBS->AllocatePages (
   AllocationType,
-  EfiBootServicesData,
+  EfiRuntimeServicesData,
   EFI_SIZE_TO_PAGES (((UINTN)LCD_VRAM_SIZE)),
   VramBaseAddress
   );
diff --git 
a/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c 
b/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c
index 
2f4814a2adbf01517ba14d75ce579ff35c362379..61ddf77e903e6c33a26b2aa8b76121e807195a9a
 100644
--- 
a/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c
+++ 
b/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c
@@ -232,7 +232,7 @@ LcdPlatformGetVram (
 // Allocate the VRAM from the DRAM so that nobody else uses it.
 Status = gBS->AllocatePages (
 AllocateAddress,
-EfiBootServicesData,
+EfiRuntimeServicesData,
 EFI_SIZE_TO_PAGES (((UINTN)LCD_VRAM_SIZE)),
 VramBaseAddress
 );
-- 
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'


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[edk2] [PATCH edk2-platforms v3 08/17] ARM/VExpressPkg: HdLcdArmVExpressLib: Remove status check EFI_TIMEOUT

2018-03-20 Thread Girish Pathak 
From: Girish Pathak 

None of the ArmPlatformSys*  functions returns EFI_TIMEOUT. Hence checking
this in the do {} while loop in LcdPlatformSetMode is wrong. Therefore
remove this comparision and as a result remove the do {} while loop.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Girish Pathak 
Signed-off-by: Evan Lloyd 
Reviewed-by: Ard Biesheuvel 
---
 Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c | 22 

 1 file changed, 9 insertions(+), 13 deletions(-)

diff --git 
a/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c 
b/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c
index 
d6d63295688f9aa5a6b24cee142760609439941d..cd62cd61883dcd78c72aa614466c6f714cc73fc4
 100644
--- a/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c
+++ b/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c
@@ -230,25 +230,21 @@ LcdPlatformSetMode (
   }
 
   // Set the video mode oscillator
-  do {
-Status = ArmPlatformSysConfigSetDevice (
-   SYS_CFG_OSC_SITE1,
-   FixedPcdGet32 (PcdHdLcdVideoModeOscId),
-   mResolutions[ModeNumber].OscFreq
-   );
-  } while (Status == EFI_TIMEOUT);
+  Status = ArmPlatformSysConfigSetDevice (
+ SYS_CFG_OSC_SITE1,
+ FixedPcdGet32 (PcdHdLcdVideoModeOscId),
+ mResolutions[ModeNumber].OscFreq
+ );
   if (EFI_ERROR (Status)) {
 ASSERT_EFI_ERROR (Status);
 return Status;
   }
 
   // Set the DVI into the new mode
-  do {
-Status = ArmPlatformSysConfigSet (
-   SYS_CFG_DVIMODE,
-   mResolutions[ModeNumber].Mode
-   );
-  } while (Status == EFI_TIMEOUT);
+  Status = ArmPlatformSysConfigSet (
+ SYS_CFG_DVIMODE,
+ mResolutions[ModeNumber].Mode
+ );
   if (EFI_ERROR (Status)) {
 ASSERT_EFI_ERROR (Status);
 return Status;
-- 
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'


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[edk2] [PATCH edk2-platforms v3 05/17] ARM/VExpressPkg: Add and update debug ASSERTS

2018-03-20 Thread Girish Pathak 
From: Girish Pathak 

This change adds some debug assertions e.g to catch NULL pointer errors
missing in PL11Lcd and HdLcd platform libraries.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Girish Pathak 
Signed-off-by: Evan Lloyd 
---

Notes:
V3:
- Use ASSERT_EFI_ERROR (Status) in place of ASSERT (FALSE)   [Ard]

  Done   [Girish]

 Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c   
| 22 +-
 Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c 
| 24 +++-
 2 files changed, 44 insertions(+), 2 deletions(-)

diff --git 
a/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c 
b/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c
index 
80603f04df3793b8b62196990c846de9ba8f130d..5247b8e038ac45ba800d0f6c79f8718c99b951da
 100644
--- a/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c
+++ b/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c
@@ -153,6 +153,9 @@ LcdPlatformGetVram (
   EFI_STATUS  Status;
   EFI_ALLOCATE_TYPE   AllocationType;
 
+  ASSERT (VramBaseAddress != NULL);
+  ASSERT (VramSize != NULL);
+
   // Set the vram size
   *VramSize = LCD_VRAM_SIZE;
 
@@ -171,6 +174,7 @@ LcdPlatformGetVram (
   VramBaseAddress
   );
   if (EFI_ERROR (Status)) {
+ASSERT_EFI_ERROR (Status);
 return Status;
   }
 
@@ -181,8 +185,8 @@ LcdPlatformGetVram (
   *VramSize,
   EFI_MEMORY_WC
   );
-  ASSERT_EFI_ERROR (Status);
   if (EFI_ERROR (Status)) {
+ASSERT_EFI_ERROR (Status);
 gBS->FreePages (*VramBaseAddress, EFI_SIZE_TO_PAGES (*VramSize));
 return Status;
   }
@@ -221,6 +225,7 @@ LcdPlatformSetMode (
   EFI_STATUSStatus;
 
   if (ModeNumber >= LcdPlatformGetMaxMode ()) {
+ASSERT (FALSE);
 return EFI_INVALID_PARAMETER;
   }
 
@@ -279,7 +284,10 @@ LcdPlatformQueryMode (
   OUT EFI_GRAPHICS_OUTPUT_MODE_INFORMATION  *Info
   )
 {
+  ASSERT (Info != NULL);
+
   if (ModeNumber >= LcdPlatformGetMaxMode ()) {
+ASSERT (FALSE);
 return EFI_INVALID_PARAMETER;
   }
 
@@ -343,7 +351,18 @@ LcdPlatformGetTimings (
   OUT UINT32* VFrontPorch
   )
 {
+  // One of the pointers is NULL
+  ASSERT (HRes != NULL);
+  ASSERT (HSync != NULL);
+  ASSERT (HBackPorch != NULL);
+  ASSERT (HFrontPorch != NULL);
+  ASSERT (VRes != NULL);
+  ASSERT (VSync != NULL);
+  ASSERT (VBackPorch != NULL);
+  ASSERT (VFrontPorch != NULL);
+
   if (ModeNumber >= LcdPlatformGetMaxMode ()) {
+ASSERT (FALSE);
 return EFI_INVALID_PARAMETER;
   }
 
@@ -376,6 +395,7 @@ LcdPlatformGetBpp (
   )
 {
   if (ModeNumber >= LcdPlatformGetMaxMode ()) {
+ASSERT (FALSE);
 return EFI_INVALID_PARAMETER;
   }
 
diff --git 
a/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c 
b/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c
index 
3e3102623ebc46cbe31b7f3500021f53f2281d1b..3d2ec7b1bf658a5fd644cd82fd1341245ba0f5d3
 100644
--- 
a/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c
+++ 
b/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c
@@ -205,6 +205,9 @@ LcdPlatformGetVram (
 
   Status = EFI_SUCCESS;
 
+  ASSERT (VramBaseAddress != NULL);
+  ASSERT (VramSize != NULL);
+
   // Is it on the motherboard or on the daughterboard?
   switch (PL111_CLCD_SITE) {
 
@@ -225,6 +228,7 @@ LcdPlatformGetVram (
 VramBaseAddress
 );
 if (EFI_ERROR (Status)) {
+  ASSERT_EFI_ERROR (Status);
   return Status;
 }
 
@@ -235,8 +239,8 @@ LcdPlatformGetVram (
 *VramSize,
 EFI_MEMORY_WC
 );
-ASSERT_EFI_ERROR (Status);
 if (EFI_ERROR (Status)) {
+  ASSERT_EFI_ERROR (Status);
   gBS->FreePages (*VramBaseAddress, EFI_SIZE_TO_PAGES (*VramSize));
   return Status;
 }
@@ -294,6 +298,7 @@ LcdPlatformSetMode (
   UINT32SysId;
 
   if (ModeNumber >= LcdPlatformGetMaxMode ()) {
+ASSERT (FALSE);
 return EFI_INVALID_PARAMETER;
   }
 
@@ -369,7 +374,10 @@ LcdPlatformQueryMode (
   OUT EFI_GRAPHICS_OUTPUT_MODE_INFORMATION  *Info
   )
 {
+  ASSERT (Info != NULL);
+
   if (ModeNumber >= LcdPlatformGetMaxMode ()) {
+ASSERT (FALSE);
 return EFI_INVALID_PARAMETER;
   }
 
@@ -433,7 +441,18 @@ LcdPlatformGetTimings (
   OUT UINT32* VFrontPorch
   )
 {
+  // One of the pointers is NULL
+  ASSERT (HRes != NULL);
+  ASSERT (HSync != NULL);
+  ASSERT (HBackPorch != NULL);
+  ASSERT (HFrontPorch != NULL);
+  ASSERT (VRes != NULL);
+  ASSERT (VSync != NULL);
+  ASSERT (VBackPorch != NULL);
+  ASSERT (VFrontPorch != NULL);
+
   if

[edk2] [PATCH edk2-platforms v3 02/17] ARM/VExpressPkg: Tidy HDLCD and PL11LCD platform Lib: Coding standard

2018-03-20 Thread Girish Pathak 
From: Girish Pathak 

There is no functional modification in this change
As preparation for further work, the formatting is corrected to meet
the EDKII coding standard.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Girish Pathak 
Signed-off-by: Evan Lloyd 
Reviewed-by: Ard Biesheuvel 
---
 Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c   
| 136 ++-
 Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpressLib.inf  
|   5 +-
 Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c 
| 238 +++-
 3 files changed, 218 insertions(+), 161 deletions(-)

diff --git 
a/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c 
b/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c
index 
b1106ee19b98cebac01820924514eac79b97d0d5..36ea484bbceac51566bfeaf029b1aa0ede93dee1
 100644
--- a/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c
+++ b/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c
@@ -1,6 +1,6 @@
-/**
+/** @file
 
-  Copyright (c) 2012, ARM Ltd. All rights reserved.
+  Copyright (c) 2012-2018, ARM Ltd. All rights reserved.
 
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD 
License
@@ -44,35 +44,40 @@ typedef struct {
   UINT32 VFrontPorch;
 } LCD_RESOLUTION;
 
-
 LCD_RESOLUTION mResolutions[] = {
   { // Mode 0 : VGA : 640 x 480 x 24 bpp
-VGA, VGA_H_RES_PIXELS, VGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, 
VGA_OSC_FREQUENCY,
+VGA, VGA_H_RES_PIXELS, VGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24,
+VGA_OSC_FREQUENCY,
 VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH,
 VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH
   },
   { // Mode 1 : SVGA : 800 x 600 x 24 bpp
-SVGA, SVGA_H_RES_PIXELS, SVGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, 
SVGA_OSC_FREQUENCY,
+SVGA, SVGA_H_RES_PIXELS, SVGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24,
+SVGA_OSC_FREQUENCY,
 SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH,
 SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH
   },
   { // Mode 2 : XGA : 1024 x 768 x 24 bpp
-XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, 
XGA_OSC_FREQUENCY,
+XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24,
+XGA_OSC_FREQUENCY,
 XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH,
 XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH
   },
   { // Mode 3 : SXGA : 1280 x 1024 x 24 bpp
-SXGA, SXGA_H_RES_PIXELS, SXGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, 
(SXGA_OSC_FREQUENCY/2),
+SXGA, SXGA_H_RES_PIXELS, SXGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24,
+(SXGA_OSC_FREQUENCY/2),
 SXGA_H_SYNC, SXGA_H_BACK_PORCH, SXGA_H_FRONT_PORCH,
 SXGA_V_SYNC, SXGA_V_BACK_PORCH, SXGA_V_FRONT_PORCH
   },
   { // Mode 4 : UXGA : 1600 x 1200 x 24 bpp
-UXGA, UXGA_H_RES_PIXELS, UXGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, 
(UXGA_OSC_FREQUENCY/2),
+UXGA, UXGA_H_RES_PIXELS, UXGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24,
+(UXGA_OSC_FREQUENCY/2),
 UXGA_H_SYNC, UXGA_H_BACK_PORCH, UXGA_H_FRONT_PORCH,
 UXGA_V_SYNC, UXGA_V_BACK_PORCH, UXGA_V_FRONT_PORCH
   },
   { // Mode 5 : HD : 1920 x 1080 x 24 bpp
-HD, HD_H_RES_PIXELS, HD_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, 
(HD_OSC_FREQUENCY/2),
+HD, HD_H_RES_PIXELS, HD_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24,
+(HD_OSC_FREQUENCY/2),
 HD_H_SYNC, HD_H_BACK_PORCH, HD_H_FRONT_PORCH,
 HD_V_SYNC, HD_V_BACK_PORCH, HD_V_FRONT_PORCH
   }
@@ -95,19 +100,25 @@ LcdPlatformInitializeDisplay (
 {
   EFI_STATUS  Status;
 
-  // Set the FPGA multiplexer to select the video output from the motherboard 
or the daughterboard
-  Status = ArmPlatformSysConfigSet (SYS_CFG_MUXFPGA, 
ARM_VE_DAUGHTERBOARD_1_SITE);
-  if (EFI_ERROR(Status)) {
+  // Set the FPGA multiplexer to select the video output from the
+  // motherboard or the daughterboard
+  Status = ArmPlatformSysConfigSet (
+ SYS_CFG_MUXFPGA,
+ ARM_VE_DAUGHTERBOARD_1_SITE
+ );
+  if (EFI_ERROR (Status)) {
 return Status;
   }
 
   // Install the EDID Protocols
   Status = gBS->InstallMultipleProtocolInterfaces (
-,
-,  ,
-,  ,
-NULL
-  );
+  ,
+  ,
+  ,
+  ,
+  ,
+  NULL
+  );
 
   return Status;
 }
@@ -132,16 +143,25 @@ LcdPlatformGetVram (
   } else {
 AllocationType = AllocateAddress;
   }
-  Status = gBS->AllocatePages (AllocationType, EfiBootServicesData, 
EFI_SIZE_TO_PAGES(((UINTN)LCD_VRAM_SIZE)), VramBaseAddress);
-  if (EFI_ERROR(Status)) {
+  Status = gBS->AllocatePages (
+  AllocationType,
+  EfiBootServicesData,
+  EFI_SIZE_TO_PAGES (((UINTN)LCD_VRAM_SIZE)),
+

[edk2] [PATCH edk2-platforms v3 04/17] ARM/VExpressPkg: Remove unused PcdPL111LcdMaxMode from HDLCD inf

2018-03-20 Thread Girish Pathak 
PCD PcdPL111LcdMaxMode is not used in HDLCD platform library.
Presence of this PCD in HDLCD is probably due to copy/paste code
from PL111 Lcd platform library. This change removes it from
the HdLcdArmVExpressLib.inf file.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Girish Pathak 
Signed-off-by: Evan Lloyd 
Reviewed-by: Ard Biesheuvel 
---
 Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpressLib.inf | 
1 -
 1 file changed, 1 deletion(-)

diff --git 
a/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpressLib.inf 
b/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpressLib.inf
index 
bedbaea3a296bea5184564c582659381733d08a9..34db24d4ee6162b0e963d500a8ed1097bd8a5ceb
 100644
--- 
a/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpressLib.inf
+++ 
b/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpressLib.inf
@@ -40,5 +40,4 @@ [Protocols]
   gEfiEdidActiveProtocolGuid# Produced
 
 [Pcd]
-  gArmVExpressTokenSpaceGuid.PcdPL111LcdMaxMode
   gArmVExpressTokenSpaceGuid.PcdHdLcdVideoModeOscId
-- 
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'


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[edk2] [PATCH edk2-platforms v3 03/17] ARM/VExpressPkg: Tidy HdLcd/PL111Lcd code: Updated comments

2018-03-20 Thread Girish Pathak 
From: Girish Pathak 

There is no functional modification in this change.
In this change some comments in HDLCD and PL111LCD platform library
code are modified and a few new comments are added. This is to
prevent mixing formatting changes with functional changes.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Girish Pathak 
Signed-off-by: Evan Lloyd 
Reviewed-by: Ard Biesheuvel 
---
 Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c
| 74 
 Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c  
| 73 +++
 
Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpressLib.inf
 |  2 +-
 3 files changed, 148 insertions(+), 1 deletion(-)

diff --git 
a/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c 
b/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c
index 
36ea484bbceac51566bfeaf029b1aa0ede93dee1..80603f04df3793b8b62196990c846de9ba8f130d
 100644
--- a/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c
+++ b/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c
@@ -44,6 +44,8 @@ typedef struct {
   UINT32 VFrontPorch;
 } LCD_RESOLUTION;
 
+/** The display modes supported by the platform.
+**/
 LCD_RESOLUTION mResolutions[] = {
   { // Mode 0 : VGA : 640 x 480 x 24 bpp
 VGA, VGA_H_RES_PIXELS, VGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24,
@@ -93,6 +95,13 @@ EFI_EDID_ACTIVE_PROTOCOL  mEdidActive = {
   NULL
 };
 
+/** HDLCD platform specific initialization function.
+
+  @param[in] Handle  Handle to the LCD device instance.
+
+  @retval EFI_SUCCESSPlaform library initialized successfully.
+  @retval !(EFI_SUCCESS) Other errors.
+**/
 EFI_STATUS
 LcdPlatformInitializeDisplay (
   IN EFI_HANDLE   Handle
@@ -123,6 +132,18 @@ LcdPlatformInitializeDisplay (
   return Status;
 }
 
+/** Allocate VRAM memory in DRAM for the framebuffer
+  (unless it is reserved already).
+
+  The allocated address can be used to set the framebuffer.
+
+  @param[out] VramBaseAddress A pointer to the framebuffer address.
+  @param[out] VramSizeA pointer to the size of the framebuffer
+  in bytes
+
+  @retval EFI_SUCCESS Framebuffer memory allocated successfully.
+  @retval !(EFI_SUCCESS)  Other errors.
+**/
 EFI_STATUS
 LcdPlatformGetVram (
   OUT EFI_PHYSICAL_ADDRESS*  VramBaseAddress,
@@ -169,6 +190,13 @@ LcdPlatformGetVram (
   return EFI_SUCCESS;
 }
 
+/** Return total number of modes supported.
+
+  Note: Valid mode numbers are 0 to MaxMode - 1
+  See Section 12.9 of the UEFI Specification 2.7
+
+  @retval UINT32 Mode Number.
+**/
 UINT32
 LcdPlatformGetMaxMode (VOID)
 {
@@ -177,6 +205,14 @@ LcdPlatformGetMaxMode (VOID)
   return (sizeof (mResolutions) / sizeof (LCD_RESOLUTION));
 }
 
+/** Set the requested display mode.
+
+  @param[in] ModeNumber Mode Number.
+
+  @retval EFI_SUCCESS   Mode set successfully.
+  @retval EFI_INVALID_PARAMETER Requested mode not found.
+  @retval !(EFI_SUCCESS)Other errors.
+**/
 EFI_STATUS
 LcdPlatformSetMode (
   IN UINT32 ModeNumber
@@ -226,6 +262,17 @@ LcdPlatformSetMode (
   return Status;
 }
 
+/** Return information for the requested mode number.
+
+  @param[in]  ModeNumber  Mode Number.
+
+  @param[out] InfoPointer for returned mode information
+  (on success).
+
+  @retval EFI_SUCCESS Mode information for the requested mode
+  returned successfully.
+  @retval EFI_INVALID_PARAMETER   Requested mode not found.
+**/
 EFI_STATUS
 LcdPlatformQueryMode (
   IN  UINT32ModeNumber,
@@ -266,6 +313,23 @@ LcdPlatformQueryMode (
   return EFI_SUCCESS;
 }
 
+/** Return display timing information for the requested mode number.
+
+  @param[in]  ModeNumber  Mode Number.
+
+  @param[out] HResPointer to horizontal resolution.
+  @param[out] HSync   Pointer to horizontal sync width.
+  @param[out] HBackPorch  Pointer to horizontal back porch.
+  @param[out] HFrontPorch Pointer to horizontal front porch.
+  @param[out] VResPointer to vertical resolution.
+  @param[out] VSync   Pointer to vertical sync width.
+  @param[out] VBackPorch  Pointer to vertical back porch.
+  @param[out] VFrontPorch Pointer to vertical front porch.
+
+  @retval EFI_SUCCESS Display timing information for the requested
+  mode returned successfully.
+  @retval EFI_INVALID_PARAMETER   Requested mode not found.
+**/
 EFI_STATUS
 LcdPlatformGetTimings (
   IN  UINT32

[edk2] [PATCH edk2-platforms v3 00/17] Update GOP

2018-03-20 Thread Girish Pathak 
This patch series addresses comments on the patch v2
(https://lists.01.org/pipermail/edk2-devel/2017-December/019406.html)
reworking of the Graphics Output Protocol code in ArmPlatformPkg.
It also contains updates for the new SCMI protocol (MTL Library).

Code is available for examination at:
  https://github.com/girishpathak/edk2-platforms/tree/201_gop_v3


Ard Biesheuvel (1):
  ARM/VExpressPkg: Fix MODULE_TYPE of HDLCD/PL111 platform libraries

EvanLloyd (2):
  ARM/VExpressPkg: HdLcdArmVExpressLib: Remove redundant Bpp
  ARM/VExpressPkg: Redefine LcdPlatformGetTimings function

Girish Pathak (14):
  ARM/VExpressPkg: Tidy HDLCD and PL11LCD platform Lib: Coding standard
  ARM/VExpressPkg: Tidy HdLcd/PL111Lcd code: Updated comments
  ARM/VExpressPkg: Remove unused PcdPL111LcdMaxMode from HDLCD inf
  ARM/VExpressPkg: Add and update debug ASSERTS
  ARM/VExpressPkg: PL111Lcd/HdLcd plaform libs: Minor code cleanup
  ARM/VExpressPkg: PL111 and HDLCD: Use FixedPcdGet32
  ARM/VExpressPkg: HdLcdArmVExpressLib: Remove status check EFI_TIMEOUT
  ARM/VExpressPkg: PL111 and HDLCD: Add PCD to select pixel format
  ARM/VExpressPkg: Allocate framebuffer using EfiRuntimeServicesData
  ARM/VExpressPkg: Reserving framebuffer at build
  ARM/VExpressPkg: Set EFI_MEMORY_XP flag on GOP framebuffer
  ARM/VExpressPkg: New DP500/DP550/DP650 platform library
  ARM/JunoPkg: Adding SCMI MTL library
  ARM/JunoPkg: Add HDLCD platform library

 Platform/ARM/JunoPkg/ArmJuno.dec   
|  17 +-
 Platform/ARM/JunoPkg/ArmJuno.dsc   
|  31 +-
 Platform/ARM/JunoPkg/ArmJuno.fdf   
|  12 +-
 Platform/ARM/JunoPkg/Library/ArmJunoLib/ArmJunoLib.inf 
|   5 +-
 Platform/ARM/JunoPkg/Library/ArmJunoLib/ArmJunoMem.c   
|  29 +-
 Platform/ARM/JunoPkg/Library/ArmJunoMtlLib/ArmJunoMtlLib.c 
| 198 +++
 Platform/ARM/JunoPkg/Library/ArmJunoMtlLib/ArmJunoMtlLib.inf   
|  39 ++
 Platform/ARM/JunoPkg/Library/ArmJunoMtlLib/ArmJunoMtlPrivateLib.h  
|  94 
 Platform/ARM/JunoPkg/Library/HdLcdArmJunoLib/HdLcdArmJuno.c
| 555 
 Platform/ARM/JunoPkg/Library/HdLcdArmJunoLib/HdLcdArmJunoLib.inf   
|  41 ++
 Platform/ARM/VExpressPkg/ArmVExpressPkg.dec
|   3 +-
 Platform/ARM/VExpressPkg/Library/ArmMaliDpLib/ArmMaliDpLib.c   
| 387 ++
 Platform/ARM/VExpressPkg/Library/ArmMaliDpLib/ArmMaliDpLib.inf 
|  43 ++
 Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf 
|   7 +-
 Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c  
|  53 +-
 Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c
| 310 +++
 Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpressLib.inf   
|  14 +-
 Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c  
| 389 +-
 
Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpressLib.inf
 |  10 +-
 19 files changed, 1945 insertions(+), 292 deletions(-)
 create mode 100644 Platform/ARM/JunoPkg/Library/ArmJunoMtlLib/ArmJunoMtlLib.c
 create mode 100644 Platform/ARM/JunoPkg/Library/ArmJunoMtlLib/ArmJunoMtlLib.inf
 create mode 100644 
Platform/ARM/JunoPkg/Library/ArmJunoMtlLib/ArmJunoMtlPrivateLib.h
 create mode 100644 Platform/ARM/JunoPkg/Library/HdLcdArmJunoLib/HdLcdArmJuno.c
 create mode 100644 
Platform/ARM/JunoPkg/Library/HdLcdArmJunoLib/HdLcdArmJunoLib.inf
 create mode 100644 Platform/ARM/VExpressPkg/Library/ArmMaliDpLib/ArmMaliDpLib.c
 create mode 100644 
Platform/ARM/VExpressPkg/Library/ArmMaliDpLib/ArmMaliDpLib.inf

-- 
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'


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[edk2] [PATCH edk2-platforms v3 01/17] ARM/VExpressPkg: Fix MODULE_TYPE of HDLCD/PL111 platform libraries

2018-03-20 Thread Girish Pathak 
From: Ard Biesheuvel 

This change fixes incorrect MODULE_TYPE of HDLCD and PL111
LcdPlatformLibs. Currently set MODUL_TYPE DXE_DRIVER is incorrect
for these platform libraries. Hence set this to type BASE.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel 
Signed-off-by: Girish Pathak 
Signed-off-by: Evan Lloyd 
---
 Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpressLib.inf   
| 4 ++--
 
Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpressLib.inf
 | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git 
a/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpressLib.inf 
b/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpressLib.inf
index 
fc51c781b45122eaf4f2269af61b44c8630cdfb8..5bbfb7eabb5d475a8c6ef21d0a3f75490be47467
 100644
--- 
a/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpressLib.inf
+++ 
b/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpressLib.inf
@@ -2,7 +2,7 @@
 #
 #  Component description file for HdLcdArmLib module
 #
-#  Copyright (c) 2011-2012, ARM Ltd. All rights reserved.
+#  Copyright (c) 2011-2018, ARM Ltd. All rights reserved.
 #
 #  This program and the accompanying materials
 #  are licensed and made available under the terms and conditions of the BSD 
License
@@ -18,7 +18,7 @@ [Defines]
   INF_VERSION= 0x00010005
   BASE_NAME  = HdLcdArmVExpress
   FILE_GUID  = 535a720e-06c0-4bb9-b563-452216abbed4
-  MODULE_TYPE= DXE_DRIVER
+  MODULE_TYPE= BASE
   VERSION_STRING = 1.0
   LIBRARY_CLASS  = LcdPlatformLib
 
diff --git 
a/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpressLib.inf
 
b/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpressLib.inf
index 
fd83d2412d4fd2dfa59204f21626c62e377e3c55..7ffd217a7d1eefb06b99042c2b2a9ed0079f2bd3
 100644
--- 
a/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpressLib.inf
+++ 
b/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpressLib.inf
@@ -2,7 +2,7 @@
 #
 #  Component description file for ArmVeGraphicsDxe module
 #
-#  Copyright (c) 2011-2012, ARM Ltd. All rights reserved.
+#  Copyright (c) 2011-2018, ARM Ltd. All rights reserved.
 #
 #  This program and the accompanying materials
 #  are licensed and made available under the terms and conditions of the BSD 
License
@@ -18,7 +18,7 @@ [Defines]
   INF_VERSION= 0x00010005
   BASE_NAME  = PL111LcdArmVExpressLib
   FILE_GUID  = b7f06f20-496f-11e0-a8e8-0002a5d5c51b
-  MODULE_TYPE= DXE_DRIVER
+  MODULE_TYPE= BASE
   VERSION_STRING = 1.0
   LIBRARY_CLASS  = LcdPlatformLib
 
-- 
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'


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[edk2] [PATCH v3 16/16] ArmPkg: Introduce SCMI protocol

2018-03-20 Thread Girish Pathak 
This change introduces a new SCMI protocol driver for
Arm systems. The driver currently supports only clock
and performance management protocols. Other protocols
will be added as and when needed.

Clock management protocol is used to configure various clocks
available on the platform e.g. HDLCD clock on the Juno platforms.

Whereas performance management protocol allows adjustment
of various performance domains. Currently this is used to evaluate
performance of the Juno platform.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Girish Pathak 
Signed-off-by: Evan Lloyd 
---

Notes:
v3:
- Please rename ArmMtl.h to ArmMtlLibi.h, and
  declare it as a library class in the package file.  [Ard]

  Done, however ArmMtlLib.h is now part of earlier commit [Girish]

- Move ArmScmiDxe to ArmPkg from ArmPlatformPkg   [Ard]

  Done[Girish]

- Declare gArmScmiBaseProtocolGuid and similar
  protocols Guids in ArmPkg.dec   [Ard]

  Done[Girish]

- Replace flexible array member [] with [1]   [Ard]

  Done[Girish]

- Move protocol init function which are not part of
  of protocol like  ScmiBaseProtocolInit elsewhere[Ard]

  Done[Girish]

- Please don't put stuff in Include/Drivers.  [Ard]

  Moved headers to Include/Protocol.  [Girish]

 ArmPkg/ArmPkg.dec |  13 +
 ArmPkg/ArmPkg.dsc |   6 +-
 ArmPkg/Drivers/ArmScmiDxe/ArmScmiBaseProtocolPrivate.h|  46 ++
 ArmPkg/Drivers/ArmScmiDxe/ArmScmiClockProtocolPrivate.h   |  84 
 ArmPkg/Drivers/ArmScmiDxe/ArmScmiDxe.inf  |  53 +++
 ArmPkg/Drivers/ArmScmiDxe/ArmScmiPerformanceProtocolPrivate.h |  55 +++
 ArmPkg/Drivers/ArmScmiDxe/Scmi.c  | 262 +++
 ArmPkg/Drivers/ArmScmiDxe/ScmiBaseProtocol.c  | 318 
++
 ArmPkg/Drivers/ArmScmiDxe/ScmiClockProtocol.c | 418 
++
 ArmPkg/Drivers/ArmScmiDxe/ScmiDxe.c   | 138 ++
 ArmPkg/Drivers/ArmScmiDxe/ScmiDxe.h   |  41 ++
 ArmPkg/Drivers/ArmScmiDxe/ScmiPerformanceProtocol.c   | 457 

 ArmPkg/Drivers/ArmScmiDxe/ScmiPrivate.h   | 174 
 ArmPkg/Include/Protocol/ArmScmi.h |  27 ++
 ArmPkg/Include/Protocol/ArmScmiBaseProtocol.h | 174 
 ArmPkg/Include/Protocol/ArmScmiClockProtocol.h| 218 ++
 ArmPkg/Include/Protocol/ArmScmiPerformanceProtocol.h  | 265 

 17 files changed, 2748 insertions(+), 1 deletion(-)

diff --git a/ArmPkg/ArmPkg.dec b/ArmPkg/ArmPkg.dec
index 
881751d81c6384a3eb0b4c180c76d01a58266a74..16f7e40046429142b44b526043b61a3d5e089d2c
 100644
--- a/ArmPkg/ArmPkg.dec
+++ b/ArmPkg/ArmPkg.dec
@@ -51,6 +51,19 @@ [Guids.common]
 
   gArmGicDxeFileGuid = { 0xde371f7c, 0xdec4, 0x4d21, { 0xad, 0xf1, 0x59, 0x3a, 
0xbc, 0xc1, 0x58, 0x82 } }
 
+[Protocols.common]
+  ## Arm System Control and Management Interface(SCMI) Base protocol
+  ## ArmPkg/Include/Protocol/ArmScmiBaseProtocol.h
+  gArmScmiBaseProtocolGuid = { 0xd7e5abe9, 0x33ab, 0x418e, { 0x9f, 0x91, 0x72, 
0xda, 0xe2, 0xba, 0x8e, 0x2f } }
+
+  ## Arm System Control and Management Interface(SCMI) Clock management 
protocol
+  ## ArmPkg/Include/Protocol/ArmScmiClockProtocol.h
+  gArmScmiClockProtocolGuid = { 0x91ce67a8, 0xe0aa, 0x4012, { 0xb9, 0x9f, 
0xb6, 0xfc, 0xf3, 0x4, 0x8e, 0xaa } }
+
+  ## Arm System Control and Management Interface(SCMI) Clock management 
protocol
+  ## ArmPkg/Include/Protocol/ArmScmiPerformanceProtocol.h
+  gArmScmiPerformanceProtocolGuid = { 0x9b8ba84, 0x3dd3, 0x49a6, { 0xa0, 0x5a, 
0x31, 0x34, 0xa5, 0xf0, 0x7b, 0xad } }
+
 [Ppis]
   ## Include/Ppi/ArmMpCoreInfo.h
   gArmMpCoreInfoPpiGuid = { 0x6847cc74, 0xe9ec, 0x4f8f, {0xa2, 0x9d, 0xab, 
0x44, 0xe7, 0x54, 0xa8, 0xfc} }
diff --git a/ArmPkg/ArmPkg.dsc b/ArmPkg/ArmPkg.dsc
index 
526909458e0d80dbc5a65c8ad12ec1095dda48d2..22332090db7111e0668607a16288cefc1bace926
 100644
--- a/ArmPkg/ArmPkg.dsc
+++ b/ArmPkg/ArmPkg.dsc
@@ -2,7 +2,7 @@
 # ARM processor package.
 #
 # Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.
-# Copyright (c) 2011 - 2015, ARM Ltd. All rights reserved.
+# Copyright (c) 2011 - 2018, ARM Ltd. All rights reserved.
 # Copyright (c) 2016, Linaro Ltd. All rights reserved.
 #
 #This program and the accompanying materials
@@ -87,6 +87,8 @@ [LibraryClasses.common]

[edk2] [PATCH v3 01/16] ArmPlatformPkg: Rectify line endings of LcdHwNullLib

2018-03-20 Thread Girish Pathak 
This fix changes line endings of LcdHwNullLib.c to DOS
style line endings from UNIX style line endings to meet the
EDK2 coding standard. Note it also fixes an end of line
whitespace.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Girish Pathak 
Signed-off-by: Evan Lloyd 
---
 ArmPlatformPkg/Library/LcdHwNullLib/LcdHwNullLib.c | 150 ++--
 1 file changed, 75 insertions(+), 75 deletions(-)

diff --git a/ArmPlatformPkg/Library/LcdHwNullLib/LcdHwNullLib.c 
b/ArmPlatformPkg/Library/LcdHwNullLib/LcdHwNullLib.c
index 
2d31b5183c959c88eb1dab7703ec9b87f03eb50f..50e1c88112db690545979e7d008678c4f8ecd949
 100644
--- a/ArmPlatformPkg/Library/LcdHwNullLib/LcdHwNullLib.c
+++ b/ArmPlatformPkg/Library/LcdHwNullLib/LcdHwNullLib.c
@@ -1,75 +1,75 @@
-/** @file
-
-  Copyright (c) 2017, Linaro, Ltd. All rights reserved.
-
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD 
License
-  which accompanies this distribution.  The full text of the license may be 
found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include 
-#include 
-#include 
-#include 
-
-/**
-  Check for presence of display
-  
-  @retval EFI_SUCCESSPlatform implements display.
-  @retval EFI_NOT_FOUND  Display not found on the platform.
-
-**/
-EFI_STATUS
-LcdIdentify (
-  VOID
-  )
-{
-  return EFI_SUCCESS;
-}
-
-/**
-  Initialize display.
-
-  @param  FrameBaseAddress   Address of the frame buffer.
-  @retval EFI_SUCCESSDisplay initialization success.
-  @retval !(EFI_SUCCESS) Display initialization failure.
-
-**/
-EFI_STATUS
-LcdInitialize (
-  EFI_PHYSICAL_ADDRESS  FrameBaseAddress
-  )
-{
-  return EFI_SUCCESS;
-}
-
-/**
-  Set requested mode of the display.
-
-  @param  ModeNumber Display mode number.
-  @retval EFI_SUCCESSDisplay set mode success.
-  @retval EFI_DEVICE_ERROR   If mode not found/supported.
-
-**/
-EFI_STATUS
-LcdSetMode (
-  IN UINT32  ModeNumber
-  )
-{
-  return EFI_SUCCESS;
-}
-
-/**
-  De-initializes the display.
-**/
-VOID
-LcdShutdown (
-  VOID
-  )
-{
-}
+/** @file
+
+  Copyright (c) 2017, Linaro, Ltd. All rights reserved.
+
+  This program and the accompanying materials
+  are licensed and made available under the terms and conditions of the BSD 
License
+  which accompanies this distribution.  The full text of the license may be 
found at
+  http://opensource.org/licenses/bsd-license.php
+
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include 
+#include 
+#include 
+#include 
+
+/**
+  Check for presence of display
+
+  @retval EFI_SUCCESSPlatform implements display.
+  @retval EFI_NOT_FOUND  Display not found on the platform.
+
+**/
+EFI_STATUS
+LcdIdentify (
+  VOID
+  )
+{
+  return EFI_SUCCESS;
+}
+
+/**
+  Initialize display.
+
+  @param  FrameBaseAddress   Address of the frame buffer.
+  @retval EFI_SUCCESSDisplay initialization success.
+  @retval !(EFI_SUCCESS) Display initialization failure.
+
+**/
+EFI_STATUS
+LcdInitialize (
+  EFI_PHYSICAL_ADDRESS  FrameBaseAddress
+  )
+{
+  return EFI_SUCCESS;
+}
+
+/**
+  Set requested mode of the display.
+
+  @param  ModeNumber Display mode number.
+  @retval EFI_SUCCESSDisplay set mode success.
+  @retval EFI_DEVICE_ERROR   If mode not found/supported.
+
+**/
+EFI_STATUS
+LcdSetMode (
+  IN UINT32  ModeNumber
+  )
+{
+  return EFI_SUCCESS;
+}
+
+/**
+  De-initializes the display.
+**/
+VOID
+LcdShutdown (
+  VOID
+  )
+{
+}
-- 
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'


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[edk2] [PATCH v3 15/16] ArmPkg: MTL Library interface and Null library implementation

2018-03-20 Thread Girish Pathak 
Upcoming new component ArmPkg/Drivers/ArmScmiDxe is dependent on
platform specific ArmMtlLib library implementation, however in order
to be able to build the ArmScmiDxe component outside of the context of a
particular platform, this change adds Null implementation of the
ArmMtlLib along with ARM MTL library header.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Girish Pathak 
Signed-off-by: Evan Lloyd 
---
 ArmPkg/ArmPkg.dec  |   3 +-
 ArmPkg/Include/Library/ArmMtlLib.h | 137 
 ArmPkg/Library/ArmMtlNullLib/ArmMtlNullLib.c   | 108 +++
 ArmPkg/Library/ArmMtlNullLib/ArmMtlNullLib.inf |  26 
 4 files changed, 273 insertions(+), 1 deletion(-)

diff --git a/ArmPkg/ArmPkg.dec b/ArmPkg/ArmPkg.dec
index 
a55b6268ff85ffd7da140be813ec875f7f242c4d..881751d81c6384a3eb0b4c180c76d01a58266a74
 100644
--- a/ArmPkg/ArmPkg.dec
+++ b/ArmPkg/ArmPkg.dec
@@ -2,7 +2,7 @@
 # ARM processor package.
 #
 # Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.
-# Copyright (c) 2011 - 2017, ARM Limited. All rights reserved.
+# Copyright (c) 2011 - 2018, ARM Limited. All rights reserved.
 #
 #This program and the accompanying materials
 #are licensed and made available under the terms and conditions of the BSD 
License
@@ -40,6 +40,7 @@ [LibraryClasses.common]
   ArmDisassemblerLib|Include/Library/ArmDisassemblerLib.h
   ArmGicArchLib|Include/Library/ArmGicArchLib.h
   ArmSvcLib|Include/Library/ArmSvcLib.h
+  ArmMtlLib|ArmPlatformPkg/Include/Library/ArmMtlLib.h
 
 [Guids.common]
   gArmTokenSpaceGuid   = { 0xBB11ECFE, 0x820F, 0x4968, { 0xBB, 0xA6, 0xF7, 
0x6A, 0xFE, 0x30, 0x25, 0x96 } }
diff --git a/ArmPkg/Include/Library/ArmMtlLib.h 
b/ArmPkg/Include/Library/ArmMtlLib.h
new file mode 100644
index 
..4218a741e5ebddd08022b94354d5ef47576cd3b8
--- /dev/null
+++ b/ArmPkg/Include/Library/ArmMtlLib.h
@@ -0,0 +1,137 @@
+/** @file
+
+  Copyright (c) 2017-2018, Arm Limited. All rights reserved.
+
+  This program and the accompanying materials
+  are licensed and made available under the terms and conditions of the BSD 
License
+  which accompanies this distribution.  The full text of the license may be 
found at
+  http://opensource.org/licenses/bsd-license.php
+
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+  System Control and Management Interface V1.0
+http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/
+DEN0056A_System_Control_and_Management_Interface.pdf
+**/
+
+#ifndef ARM_MTL_LIB_H_
+#define ARM_MTL_LIB_H_
+
+#include 
+
+// Ideally we don't need packed struct. However we can't rely on compilers.
+#pragma pack(1)
+
+typedef struct {
+  UINT32 Reserved1;
+  UINT32 ChannelStatus;
+  UINT64 Reserved2;
+  UINT32 Flags;
+  UINT32 Length;
+  UINT32 MessageHeader;
+
+  // NOTE: Since EDK2 does not allow flexible array member [] we declare
+  // here array of 1 element length. However below is used as a variable
+  // length array.
+  UINT32 Payload[1];// size less object gives offset to payload.
+} MTL_MAILBOX;
+
+#pragma pack()
+
+// Channel Type, Low-priority, and High-priority
+typedef enum {
+  MTL_CHANNEL_TYPE_LOW = 0,
+  MTL_CHANNEL_TYPE_HIGH = 1
+} MTL_CHANNEL_TYPE;
+
+typedef struct {
+  UINT64 PhysicalAddress;
+  UINT32 ModifyMask;
+  UINT32 PreserveMask;
+} MTL_DOORBELL;
+
+typedef struct {
+  MTL_CHANNEL_TYPE ChannelType;
+  MTL_MAILBOX  * CONST MailBox;
+  MTL_DOORBELL DoorBell;
+} MTL_CHANNEL;
+
+/** Wait until channel is free.
+
+  @param[in] ChannelPointer to a channel.
+  @param[in] TimeOutInMicroSeconds  Time out in micro seconds.
+
+  @retval EFI_SUCCESS   Channel is free.
+  @retval EFI_TIMEOUT   Time out error.
+**/
+EFI_STATUS
+MtlWaitUntilChannelFree (
+  IN MTL_CHANNEL  *Channel,
+  IN UINT64   TimeOutInMicroSeconds
+  );
+
+/** Return the address of the message payload.
+
+  @param[in] Channel   Pointer to a channel.
+
+  @retval UINT32*  Pointer to the payload.
+**/
+UINT32*
+MtlGetChannelPayload (
+  IN MTL_CHANNEL  *Channel
+  );
+
+/** Return pointer to a channel for the requested channel type.
+
+  @param[in] ChannelTypeChannelType, Low or High priority channel.
+MTL_CHANNEL_TYPE_LOW or
+MTL_CHANNEL_TYPE_HIGH
+
+  @param[out] Channel   Holds pointer to the channel.
+
+  @retval EFI_SUCCESS   Pointer to channel is returned.
+  @retval EFI_UNSUPPORTED   Requested channel type not supported.
+**/
+EFI_STATUS
+MtlGetChannel (
+  IN  MTL_CHANNEL_TYPE  ChannelType,
+  OUT MTL_CHANNEL   **Channel
+  );
+
+/** Mark the channel busy and ring the doorbell.
+
+  @param[in] Channel   Pointer to a channel.
+  @param[in] MessageHeader

[edk2] [PATCH v3 13/16] ArmPlatformPkg: Reserving framebuffer at build

2018-03-20 Thread Girish Pathak 
From: Girish Pathak 

Currently framebuffer memory is either reserved in special VRAM or
dynamically allocated using boot services memory allocation functions.
When allocated using boot services calls the memory has to be allocated
as EfiBootServicesData. Unfortunately failures have been seen with this
case.  There is also an unfortunate lack of control on the placement of
the framebuffer.

This change introduces two PCDs, PcdArmLcdFrameBufferBase and
PcdArmLcdFrameBufferSize which enable build time reservation of the
framebuffer, avoiding the need to allocate dynamically. This allows
the framebuffer to appear as "I/O memory" outside of the normal RAM
map, which is similar to the "VRAM" case.

This change has no impact on current code, only enables the option
of build time reservation of framebuffers.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Girish Pathak 
Signed-off-by: Evan Lloyd 
---
 ArmPlatformPkg/ArmPlatformPkg.dec | 5 +
 1 file changed, 5 insertions(+)

diff --git a/ArmPlatformPkg/ArmPlatformPkg.dec 
b/ArmPlatformPkg/ArmPlatformPkg.dec
index 
5231ea822f05c2f281a6190d6eae0fc7d0bc0cb3..5c702718a78a78e6c67ab407e198382e0a0df4be
 100644
--- a/ArmPlatformPkg/ArmPlatformPkg.dec
+++ b/ArmPlatformPkg/ArmPlatformPkg.dec
@@ -93,6 +93,11 @@ [PcdsFixedAtBuild.common]
   gArmPlatformTokenSpaceGuid.PcdPL111LcdBase|0x0|UINT32|0x0026
   gArmPlatformTokenSpaceGuid.PcdArmHdLcdBase|0x0|UINT32|0x0027
 
+  ## Default size for display modes upto 1920x1080 (1920 * 1080 * 4 Bytes Per 
Pixel)
+  
gArmPlatformTokenSpaceGuid.PcdArmLcdDdrFrameBufferSize|0x7E9000|UINT32|0x0043
+  ## If set, framebuffer memory will be reserved and mapped in the system RAM
+  gArmPlatformTokenSpaceGuid.PcdArmLcdDdrFrameBufferBase|0x0|UINT64|0x0044
+
   ## PL180 MCI
   
gArmPlatformTokenSpaceGuid.PcdPL180SysMciRegAddress|0x|UINT32|0x0028
   
gArmPlatformTokenSpaceGuid.PcdPL180MciBaseAddress|0x|UINT32|0x0029
-- 
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'


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[edk2] [PATCH v3 04/16] ArmPlatformPkg: Tidy Lcd code: Updated comments

2018-03-20 Thread Girish Pathak 
From: Girish Pathak 

There is no functional modification in this change
some comments are modified and a few new comments are added.
This is to prevent mixing formatting changes with functional
changes.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Girish Pathak 
Signed-off-by: Evan Lloyd 
---

Notes:
v3:
- Propagated comments to LcdPlatformNullLib

 ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.c | 20 ++---
 ArmPlatformPkg/Include/Library/LcdPlatformLib.h| 92 
+++-
 ArmPlatformPkg/Library/HdLcd/HdLcd.c   | 26 +-
 ArmPlatformPkg/Library/LcdPlatformNullLib/LcdPlatformNullLib.c | 65 
++
 ArmPlatformPkg/Library/PL111Lcd/PL111Lcd.c | 24 -
 5 files changed, 189 insertions(+), 38 deletions(-)

diff --git a/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.c 
b/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.c
index 
905eb26ee01b5037dfbaf3c054a62593837c8b5f..872361cd23fbdf52c5f128d0e172701e76d832b2
 100644
--- a/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.c
+++ b/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.c
@@ -1,13 +1,14 @@
 /** @file
+  This file implements the Graphics Output protocol for Arm platforms
 
- Copyright (c) 2011-2018, ARM Ltd. All rights reserved.
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD 
License
- which accompanies this distribution.  The full text of the license may be 
found at
- http://opensource.org/licenses/bsd-license.php
+  Copyright (c) 2011-2018, ARM Ltd. All rights reserved.
+  This program and the accompanying materials
+  are licensed and made available under the terms and conditions of the BSD 
License
+  which accompanies this distribution.  The full text of the license may be 
found at
+  http://opensource.org/licenses/bsd-license.php
 
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 
 **/
 
@@ -22,11 +23,6 @@
 
 #include "LcdGraphicsOutputDxe.h"
 
-/** This file implements the Graphics Output protocol on ArmVersatileExpress
-  using the Lcd controller
-
-**/
-
 //
 // Global variables
 //
diff --git a/ArmPlatformPkg/Include/Library/LcdPlatformLib.h 
b/ArmPlatformPkg/Include/Library/LcdPlatformLib.h
index 
3d13e417972c67cc51ae4410efd548053511e5d1..e51e78640ae7b1acd51ac333ba3faa8c78aea5a5
 100644
--- a/ArmPlatformPkg/Include/Library/LcdPlatformLib.h
+++ b/ArmPlatformPkg/Include/Library/LcdPlatformLib.h
@@ -18,9 +18,7 @@
 
 #define LCD_VRAM_SIZE SIZE_8MB
 
-//
 // Modes definitions
-//
 #define VGA   0
 #define SVGA  1
 #define XGA   2
@@ -29,9 +27,7 @@
 #define UXGA  5
 #define HD6
 
-//
 // VGA Mode: 640 x 480
-//
 #define VGA_H_RES_PIXELS  640
 #define VGA_V_RES_PIXELS  480
 #define VGA_OSC_FREQUENCY 2375  /* 0x016A6570 */
@@ -44,9 +40,7 @@
 #define VGA_V_FRONT_PORCH (  3 - 1)
 #define VGA_V_BACK_PORCH  ( 13 - 1)
 
-//
 // SVGA Mode: 800 x 600
-//
 #define SVGA_H_RES_PIXELS 800
 #define SVGA_V_RES_PIXELS 600
 #define SVGA_OSC_FREQUENCY3825  /* 0x0247A610 */
@@ -59,9 +53,7 @@
 #define SVGA_V_FRONT_PORCH(  3 - 1)
 #define SVGA_V_BACK_PORCH ( 17 - 1)
 
-//
 // XGA Mode: 1024 x 768
-//
 #define XGA_H_RES_PIXELS  1024
 #define XGA_V_RES_PIXELS  768
 #define XGA_OSC_FREQUENCY 6350  /* 0x03C8EEE0 */
@@ -74,9 +66,7 @@
 #define XGA_V_FRONT_PORCH (  3 - 1)
 #define XGA_V_BACK_PORCH  ( 23 - 1)
 
-//
 // SXGA Mode: 1280 x 1024
-//
 #define SXGA_H_RES_PIXELS 1280
 #define SXGA_V_RES_PIXELS 1024
 #define SXGA_OSC_FREQUENCY10900  /* 0x067F3540 */
@@ -89,9 +79,7 @@
 #define SXGA_V_FRONT_PORCH(  3 - 1)
 #define SXGA_V_BACK_PORCH ( 29 - 1)
 
-//
 // WSXGA+ Mode: 1680 x 1050
-//
 #define WSXGA_H_RES_PIXELS1680
 #define WSXGA_V_RES_PIXELS1050
 #define WSXGA_OSC_FREQUENCY   14700  /* 0x08C30AC0 */
@@ -104,9 +92,7 @@
 #define WSXGA_V_FRONT_PORCH   (  4 - 1)
 #define WSXGA_V_BACK_PORCH( 41 - 1)
 
-//
 // UXGA Mode: 1600 x 1200
-//
 #define UXGA_H_RES_PIXELS 1600
 #define UXGA_V_RES_PIXELS 1200

[edk2] [PATCH v3 09/16] ArmPlatformPkg: Redefine LcdPlatformGetTimings function

2018-03-20 Thread Girish Pathak 
From: Girish Pathak 

The LcdPlatformGetTimings interface function takes similar sets of
multiple parameters for horizontal and vertical timings which can be
aggregated in a common data type. This change defines a structure
SCAN_TIMINGS for this which can be used to describe both horizontal and
vertical scan timings, and accordingly redefines the
LcdPlatformGetTiming interface, greatly reducing the amount of data
passed about.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Girish Pathak 
Signed-off-by: Evan Lloyd 
Reviewed-by: Ard Biesheuvel 
---
 ArmPlatformPkg/Include/Library/LcdPlatformLib.h| 31 
++--
 ArmPlatformPkg/Library/HdLcd/HdLcd.c   | 50 
+---
 ArmPlatformPkg/Library/LcdPlatformNullLib/LcdPlatformNullLib.c | 10 +---
 ArmPlatformPkg/Library/PL111Lcd/PL111Lcd.c | 43 
+
 4 files changed, 64 insertions(+), 70 deletions(-)

diff --git a/ArmPlatformPkg/Include/Library/LcdPlatformLib.h 
b/ArmPlatformPkg/Include/Library/LcdPlatformLib.h
index 
e51e78640ae7b1acd51ac333ba3faa8c78aea5a5..8338b327fd2dd0d6b31653e278e25da5ac850939
 100644
--- a/ArmPlatformPkg/Include/Library/LcdPlatformLib.h
+++ b/ArmPlatformPkg/Include/Library/LcdPlatformLib.h
@@ -153,6 +153,14 @@ typedef enum {
   LCD_BITS_PER_PIXEL_12_444
 } LCD_BPP;
 
+// Display timing settings.
+typedef struct {
+  UINT32  Resolution;
+  UINT32  Sync;
+  UINT32  BackPorch;
+  UINT32  FrontPorch;
+} SCAN_TIMINGS;
+
 /** Platform related initialization function.
 
   @param[in] Handle  Handle to the LCD device instance.
@@ -228,14 +236,11 @@ LcdPlatformQueryMode (
 
   @param[in]  ModeNumber  Mode Number.
 
-  @param[out] HResPointer to horizontal resolution.
-  @param[out] HSync   Pointer to horizontal sync width.
-  @param[out] HBackPorch  Pointer to horizontal back porch.
-  @param[out] HFrontPorch Pointer to horizontal front porch.
-  @param[out] VResPointer to vertical resolution.
-  @param[out] VSync   Pointer to vertical sync width.
-  @param[out] VBackPorch  Pointer to vertical back porch.
-  @param[out] VFrontPorch Pointer to vertical front porch.
+  @param[out] Horizontal  Pointer to horizontal timing parameters.
+  (Resolution, Sync, Back porch, Front porch)
+  @param[out] VerticalPointer to vertical timing parameters.
+  (Resolution, Sync, Back porch, Front porch)
+
 
   @retval EFI_SUCCESS Display timing information for the requested
   mode returned successfully.
@@ -244,14 +249,8 @@ LcdPlatformQueryMode (
 EFI_STATUS
 LcdPlatformGetTimings (
   IN  UINT32  ModeNumber,
-  OUT UINT32* HRes,
-  OUT UINT32* HSync,
-  OUT UINT32* HBackPorch,
-  OUT UINT32* HFrontPorch,
-  OUT UINT32* VRes,
-  OUT UINT32* VSync,
-  OUT UINT32* VBackPorch,
-  OUT UINT32* VFrontPorch
+  OUT SCAN_TIMINGS**Horizontal,
+  OUT SCAN_TIMINGS**Vertical
   );
 
 /** Return bits per pixel information for a mode number.
diff --git a/ArmPlatformPkg/Library/HdLcd/HdLcd.c 
b/ArmPlatformPkg/Library/HdLcd/HdLcd.c
index 
039048398c531ec944bc4b43a5551a554a368481..f5886848ce582b475b597ccca015c816707ade0e
 100644
--- a/ArmPlatformPkg/Library/HdLcd/HdLcd.c
+++ b/ArmPlatformPkg/Library/HdLcd/HdLcd.c
@@ -98,34 +98,25 @@ LcdSetMode (
   )
 {
   EFI_STATUSStatus;
-  UINT32HRes;
-  UINT32HSync;
-  UINT32HBackPorch;
-  UINT32HFrontPorch;
-  UINT32VRes;
-  UINT32VSync;
-  UINT32VBackPorch;
-  UINT32VFrontPorch;
+  SCAN_TIMINGS  *Horizontal;
+  SCAN_TIMINGS  *Vertical;
   UINT32BytesPerPixel;
   LCD_BPP   LcdBpp;
 
   // Set the video mode timings and other relevant information
   Status = LcdPlatformGetTimings (
  ModeNumber,
- ,
- ,
- ,
- ,
- ,
- ,
- ,
- 
+ ,
+ 
  );
   if (EFI_ERROR (Status)) {
 ASSERT_EFI_ERROR (Status);
 return Status;
   }
 
+  ASSERT (Horizontal != NULL);
+  ASSERT (Vertical != NULL);
+
   Status = LcdPlatformGetBpp (ModeNumber, );
   if (EFI_ERROR (Status)) {
 ASSERT_EFI_ERROR (Status);
@@ -138,21 +129,26 @@ LcdSetMode (
   MmioWrite32 (HDLCD_REG_COMMAND, HDLCD_DISABLE);
 
   // Update the

[edk2] [PATCH v3 12/16] ArmPlatformPkg: Additional display modes

2018-03-20 Thread Girish Pathak 
From: Girish Pathak 

Add definitions for new display modes such as HD 720.
This has no effect on existing display drivers.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Girish Pathak 
Signed-off-by: Evan Lloyd 
Reviewed-by: Ard Biesheuvel 
---
 ArmPlatformPkg/Include/Library/LcdPlatformLib.h | 60 
 1 file changed, 60 insertions(+)

diff --git a/ArmPlatformPkg/Include/Library/LcdPlatformLib.h 
b/ArmPlatformPkg/Include/Library/LcdPlatformLib.h
index 
8338b327fd2dd0d6b31653e278e25da5ac850939..cc535f0cd42db5673d418cbec940023927408687
 100644
--- a/ArmPlatformPkg/Include/Library/LcdPlatformLib.h
+++ b/ArmPlatformPkg/Include/Library/LcdPlatformLib.h
@@ -26,6 +26,11 @@
 #define WSXGA 4
 #define UXGA  5
 #define HD6
+#define WVGA  7
+#define QHD   8
+#define WSVGA 9
+#define HD720 10
+#define WXGA  11
 
 // VGA Mode: 640 x 480
 #define VGA_H_RES_PIXELS  640
@@ -118,6 +123,61 @@
 #define HD_V_FRONT_PORCH  (  3 - 1)
 #define HD_V_BACK_PORCH   ( 32 - 1)
 
+// WVGA Mode: 800 x 480
+#define WVGA_H_RES_PIXELS 800
+#define WVGA_V_RES_PIXELS 480
+#define WVGA_OSC_FREQUENCY2950   /* 0x01C22260 */
+#define WVGA_H_SYNC   ( 72 - 1)
+#define WVGA_H_FRONT_PORCH( 24 - 1)
+#define WVGA_H_BACK_PORCH ( 96 - 1)
+#define WVGA_V_SYNC   (  7 - 1)
+#define WVGA_V_FRONT_PORCH(  3 - 1)
+#define WVGA_V_BACK_PORCH ( 10 - 1)
+
+// QHD Mode: 960 x 540
+#define QHD_H_RES_PIXELS  960
+#define QHD_V_RES_PIXELS  540
+#define QHD_OSC_FREQUENCY 4075   /* 0x026DCBB0 */
+#define QHD_H_SYNC( 96 - 1)
+#define QHD_H_FRONT_PORCH ( 32 - 1)
+#define QHD_H_BACK_PORCH  (128 - 1)
+#define QHD_V_SYNC(  5 - 1)
+#define QHD_V_FRONT_PORCH (  3 - 1)
+#define QHD_V_BACK_PORCH  ( 14 - 1)
+
+// WSVGA Mode: 1024 x 600
+#define WSVGA_H_RES_PIXELS1024
+#define WSVGA_V_RES_PIXELS600
+#define WSVGA_OSC_FREQUENCY   4900   /* 0x02EBAE40 */
+#define WSVGA_H_SYNC  (104 - 1)
+#define WSVGA_H_FRONT_PORCH   ( 40 - 1)
+#define WSVGA_H_BACK_PORCH(144 - 1)
+#define WSVGA_V_SYNC  ( 10 - 1)
+#define WSVGA_V_FRONT_PORCH   (  3 - 1)
+#define WSVGA_V_BACK_PORCH( 11 - 1)
+
+// HD720 Mode: 1280 x 720
+#define HD720_H_RES_PIXELS 1280
+#define HD720_V_RES_PIXELS 720
+#define HD720_OSC_FREQUENCY7450   /* 0x0470C7A0 */
+#define HD720_H_SYNC   (128 - 1)
+#define HD720_H_FRONT_PORCH( 64 - 1)
+#define HD720_H_BACK_PORCH (192 - 1)
+#define HD720_V_SYNC   (  5 - 1)
+#define HD720_V_FRONT_PORCH(  3 - 1)
+#define HD720_V_BACK_PORCH ( 20 - 1)
+
+// WXGA Mode: 1280 x 800
+#define WXGA_H_RES_PIXELS  1280
+#define WXGA_V_RES_PIXELS  800
+#define WXGA_OSC_FREQUENCY 8350  /* 0x04FA1BE0 */
+#define WXGA_H_SYNC(128 - 1)
+#define WXGA_H_FRONT_PORCH ( 72 - 1)
+#define WXGA_H_BACK_PORCH  (200 - 1)
+#define WXGA_V_SYNC(  6 - 1)
+#define WXGA_V_FRONT_PORCH (  3 - 1)
+#define WXGA_V_BACK_PORCH  ( 22 - 1)
+
 // Colour Masks
 #define LCD_24BPP_RED_MASK  0x00FF
 #define LCD_24BPP_GREEN_MASK0xFF00
-- 
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'


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[edk2] [PATCH v3 14/16] ArmPlatformPkg: New DP500/DP550/DP650 GOP driver

2018-03-20 Thread Girish Pathak 
From: Girish Pathak 

This change adds support for the ARM Mali DP500/DP500/DP650 display
processors using the GOP protocol. It has been tested on FVP base
models + DP550 support. This change adds platform independant LcdHwLib
library. A corresponding platform specific library will be submitted
to edk-platforms/Platform/ARM/VExpressPkg.

This change does not modify functionality provided by PL111 or
HDLCD. This LcdHwLib implementation should be suitable for those
platforms that implement ARM Mali DP500/DP550/DP650 replacing
PL111/HDLCD.

Only graphics layer of the ARM Mali DP is configured for rendering
the RGB/BGR format frame buffer to satisfy the UEFI GOP requirements
Other layers e.g. video layers are not configured.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Girish Pathak 
Signed-off-by: Evan Lloyd 
---

Notes:
v3:
- Please add this library as a component to
  ArmPlatformPkg.dsc as well, so we can do build testing
  on it.   [Ard]

  Done [Girish]

- Please drop references to edk2-platforms.
  This driver should be able to be used independently
  from VExpress platform code  [Ard]

  Done [Girish]

 ArmPlatformPkg/ArmPlatformPkg.dec  |   4 +
 ArmPlatformPkg/ArmPlatformPkg.dsc  |   4 +-
 ArmPlatformPkg/Library/ArmMaliDp/ArmMaliDp.c   | 409 
 ArmPlatformPkg/Library/ArmMaliDp/ArmMaliDp.h   | 243 
 ArmPlatformPkg/Library/ArmMaliDp/ArmMaliDp.inf |  43 ++
 5 files changed, 702 insertions(+), 1 deletion(-)

diff --git a/ArmPlatformPkg/ArmPlatformPkg.dec 
b/ArmPlatformPkg/ArmPlatformPkg.dec
index 
5c702718a78a78e6c67ab407e198382e0a0df4be..28cdc259849da11b172ad52045bccc0276669852
 100644
--- a/ArmPlatformPkg/ArmPlatformPkg.dec
+++ b/ArmPlatformPkg/ArmPlatformPkg.dec
@@ -98,6 +98,10 @@ [PcdsFixedAtBuild.common]
   ## If set, framebuffer memory will be reserved and mapped in the system RAM
   gArmPlatformTokenSpaceGuid.PcdArmLcdDdrFrameBufferBase|0x0|UINT64|0x0044
 
+  ## ARM Mali Display Processor DP500/DP550/DP650
+  gArmPlatformTokenSpaceGuid.PcdArmMaliDpBase|0x0|UINT64|0x0050
+  
gArmPlatformTokenSpaceGuid.PcdArmMaliDpMemoryRegionLength|0x0|UINT32|0x0051
+
   ## PL180 MCI
   
gArmPlatformTokenSpaceGuid.PcdPL180SysMciRegAddress|0x|UINT32|0x0028
   
gArmPlatformTokenSpaceGuid.PcdPL180MciBaseAddress|0x|UINT32|0x0029
diff --git a/ArmPlatformPkg/ArmPlatformPkg.dsc 
b/ArmPlatformPkg/ArmPlatformPkg.dsc
index 
82adb9ef8891b7ba1628ede2f8eb124c25c2774a..0013106b94c371f827e01c6d402faa6aa42e4bdd
 100644
--- a/ArmPlatformPkg/ArmPlatformPkg.dsc
+++ b/ArmPlatformPkg/ArmPlatformPkg.dsc
@@ -2,7 +2,7 @@
 # ARM platform package.
 #
 # Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.
-# Copyright (c) 2011 - 2015, ARM Ltd. All rights reserved.
+# Copyright (c) 2011 - 2018, ARM Ltd. All rights reserved.
 # Copyright (c) 2016 - 2017, Linaro Ltd. All rights reserved.
 #
 #This program and the accompanying materials
@@ -120,3 +120,5 @@ [Components.common]
 
   ArmPlatformPkg/PrePi/PeiMPCore.inf
   ArmPlatformPkg/PrePi/PeiUniCore.inf
+
+  ArmPlatformPkg/Library/ArmMaliDp/ArmMaliDp.inf
diff --git a/ArmPlatformPkg/Library/ArmMaliDp/ArmMaliDp.c 
b/ArmPlatformPkg/Library/ArmMaliDp/ArmMaliDp.c
new file mode 100644
index 
..69c88416a448caa506bf8a772432144d8a138495
--- /dev/null
+++ b/ArmPlatformPkg/Library/ArmMaliDp/ArmMaliDp.c
@@ -0,0 +1,409 @@
+/** @file
+
+  ARM Mali DP 500/550/650 display controller driver
+
+  Copyright (c) 2017-2018, Arm Limited. All rights reserved.
+
+  This program and the accompanying materials
+  are licensed and made available under the terms and conditions of the BSD 
License
+  which accompanies this distribution.  The full text of the license may be 
found at
+  http://opensource.org/licenses/bsd-license.php
+
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "ArmMaliDp.h"
+
+// CORE_ID of the MALI DP
+STATIC UINT32 mDpDeviceId;
+
+/** Disable the graphics layer
+
+  This is done by clearing the EN bit of the LG_CONTROL register.
+**/
+STATIC
+VOID
+LayerGraphicsDisable (VOID)
+{
+  MmioAnd32 (DP_BASE + DP_DE_LG_CONTROL, ~DP_DE_LG_ENABLE);
+}
+
+/** Enable the graphics layer
+
+  This is done by setting the EN bit of the LG_CONTROL register.
+**/
+STATIC
+VOID
+LayerGraphicsEnable (VOID)
+{
+  MmioOr32 (DP_BASE + DP_DE_LG_CONTROL, DP_DE_LG_ENABLE);
+}
+
+/** Set the frame address of the graphics layer.
+
+  @param[in]  FrameBaseAddress Address of the data buffer to be used

[edk2] [PATCH v3 10/16] ArmPlatformPkg: Add PCD to select pixel format

2018-03-20 Thread Girish Pathak 
From: Girish Pathak 

Current HDLCD and PL111 platform libraries do not support display modes
with PixelBlueGreenRedReserved8BitPerColor format, i.e. because of
historical confusion, they do not support the UEFI default
PixelBlueGreenRedReserved8BitPerColor format

In LcdPlatformLib for PL111, LcdPlatformQueryMode returns the pixel
format as PixelRedGreenBlueReserved8BitPerColor which is wrong, because
that does not match the display controller's pixel format which is set
to BGR in PL111Lcd LcdHwLib.

Also it is not possible to configure pixel format as RGB/BGR for the
display modes for a platform at build time.

This change adds PcdGopPixelFormat to configure pixel format as
PixelRedGreenBlueReserved8BitPerColoror
PixelBlueGreenRedReserved8BitPerColoror
PixelBitMask.
With this change, pixel format can be selected in the platform specific
.dsc file for all supported display modes.

Support for PixelBitMask is not implemented in PL111 or HDLCD LcdHwLib
libraries, hence  HDLCD and PL111 platform libraries will return error
EFI_UNSUPPORTED if PcdGopPixelFormat is set to PixelBitMask.  Indeed,
it is not clear what selecting PixelBitMask might mean, but the option
is allowed as it might suit a custom platform.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Girish Pathak 
Signed-off-by: Evan Lloyd 
Reviewed-by: Ard Biesheuvel 
---
 ArmPlatformPkg/ArmPlatformPkg.dec  |  9 +++-
 ArmPlatformPkg/Library/HdLcd/HdLcd.c   | 54 +++-
 ArmPlatformPkg/Library/PL111Lcd/PL111Lcd.c | 15 +-
 3 files changed, 40 insertions(+), 38 deletions(-)

diff --git a/ArmPlatformPkg/ArmPlatformPkg.dec 
b/ArmPlatformPkg/ArmPlatformPkg.dec
index 
7cec775abeee219e6821488a2c5abe88d23bbed1..378bee9cbc9e4bd50c37b38156016424e24cba73
 100644
--- a/ArmPlatformPkg/ArmPlatformPkg.dec
+++ b/ArmPlatformPkg/ArmPlatformPkg.dec
@@ -1,6 +1,6 @@
 #/** @file
 #
-#  Copyright (c) 2011-2017, ARM Limited. All rights reserved.
+#  Copyright (c) 2011-2018, ARM Limited. All rights reserved.
 #  Copyright (c) 2015, Intel Corporation. All rights reserved.
 #
 #  This program and the accompanying materials
@@ -97,6 +97,13 @@ [PcdsFixedAtBuild.common]
   
gArmPlatformTokenSpaceGuid.PcdPL180SysMciRegAddress|0x|UINT32|0x0028
   
gArmPlatformTokenSpaceGuid.PcdPL180MciBaseAddress|0x|UINT32|0x0029
 
+  # Graphics Output Pixel format
+  # 0 : PixelRedGreenBlueReserved8BitPerColor
+  # 1 : PixelBlueGreenRedReserved8BitPerColor
+  # 2 : PixelBitMask
+  # Default is set to UEFI console font format 
PixelBlueGreenRedReserved8BitPerColor
+  gArmPlatformTokenSpaceGuid.PcdGopPixelFormat|0x0001|UINT32|0x0040
+
 [PcdsFixedAtBuild.common,PcdsDynamic.common]
   ## PL031 RealTimeClock
   gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x0|UINT32|0x0024
diff --git a/ArmPlatformPkg/Library/HdLcd/HdLcd.c 
b/ArmPlatformPkg/Library/HdLcd/HdLcd.c
index 
f5886848ce582b475b597ccca015c816707ade0e..96f2bf437fbabd2509f860c67c5442def5b5f03d
 100644
--- a/ArmPlatformPkg/Library/HdLcd/HdLcd.c
+++ b/ArmPlatformPkg/Library/HdLcd/HdLcd.c
@@ -22,31 +22,7 @@
 
 #include "HdLcd.h"
 
-STATIC
-UINTN
-GetBytesPerPixel (
-  IN  LCD_BPP   Bpp
-  )
-{
-  switch (Bpp) {
-  case LCD_BITS_PER_PIXEL_24:
-return 4;
-
-  case LCD_BITS_PER_PIXEL_16_565:
-  case LCD_BITS_PER_PIXEL_16_555:
-  case LCD_BITS_PER_PIXEL_12_444:
-return 2;
-
-  case LCD_BITS_PER_PIXEL_8:
-  case LCD_BITS_PER_PIXEL_4:
-  case LCD_BITS_PER_PIXEL_2:
-  case LCD_BITS_PER_PIXEL_1:
-return 1;
-
-  default:
-return 0;
-  }
-}
+#define BYTES_PER_PIXEL 4
 
 /** Initialize display.
 
@@ -78,10 +54,6 @@ LcdInitialize (
 HDLCD_LITTLE_ENDIAN | HDLCD_4BYTES_PER_PIXEL
 );
 
-  MmioWrite32 (HDLCD_REG_RED_SELECT,   (0 << 16 | 8 << 8 | 0));
-  MmioWrite32 (HDLCD_REG_GREEN_SELECT, (0 << 16 | 8 << 8 | 8));
-  MmioWrite32 (HDLCD_REG_BLUE_SELECT,  (0 << 16 | 8 << 8 | 16));
-
   return EFI_SUCCESS;
 }
 
@@ -100,8 +72,8 @@ LcdSetMode (
   EFI_STATUSStatus;
   SCAN_TIMINGS  *Horizontal;
   SCAN_TIMINGS  *Vertical;
-  UINT32BytesPerPixel;
-  LCD_BPP   LcdBpp;
+
+  EFI_GRAPHICS_OUTPUT_MODE_INFORMATION  ModeInfo;
 
   // Set the video mode timings and other relevant information
   Status = LcdPlatformGetTimings (
@@ -117,13 +89,22 @@ LcdSetMode (
   ASSERT (Horizontal != NULL);
   ASSERT (Vertical != NULL);
 
-  Status = LcdPlatformGetBpp (ModeNumber, );
+  // Get the pixel format information.
+  Status = LcdPlatformQueryMode (ModeNumber, );
   if (EFI_ERROR (Status)) {
 ASSERT_EFI_ERROR (Status);
 return Status;
   }
 
-  BytesPerPixel = GetBytesPerPixel (LcdBpp);
+  if (ModeInfo.PixelFormat == PixelBlueGreenRedReserved8BitPerColor) {
+MmioWrite32 (HDLCD_REG_RED_SELECT,  (8 << 8) | 16);
+MmioWrite32 (HDLCD_REG_BLUE_SELECT, (8 << 8) | 0);
+  } else {
+MmioWrite32 (HDLCD_REG_BLUE_SELECT, (8 << 8) | 16);
+

[edk2] [PATCH v3 03/16] ArmPlatformPkg: Tidy Lcd code: Coding standard

2018-03-20 Thread Girish Pathak 
From: Girish Pathak 

There is no functional modification in this change
As preparation for further work, the formatting is corrected to meet
the EDKII coding standard.
Of specific note, some invalid include guards were fixed.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Girish Pathak 
Signed-off-by: Evan Lloyd 
---

Notes:
v3:
- Minor coding style changes  [Ard]

  Done[Girish]

- Changing one style to the other is just pointless churn [Ard]

  Fixing the include guards: is a small improvement.
  (Ideally patchcheck should reject these.)
  Reducing lines to 80 columns: makes Leif (at least)
  happy, and aligns with formatter behaviour. Correcting
  Doxygen format comments: prevents Doxygen generating
  gibberish. Spaces before '(': Maintains consistency,
  and aligns  with desired formatter behaviour.   [Evan]

 ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.c | 187 
+++-
 ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.h |  10 +-
 ArmPlatformPkg/Include/Library/LcdPlatformLib.h|  14 +-
 ArmPlatformPkg/Library/HdLcd/HdLcd.c   |  88 
+
 ArmPlatformPkg/Library/HdLcd/HdLcd.h   |  21 ++-
 ArmPlatformPkg/Library/PL111Lcd/PL111Lcd.c |  64 
---
 6 files changed, 208 insertions(+), 176 deletions(-)

diff --git a/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.c 
b/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.c
index 
b721061fc1df5695092e8c71da97ae0b9af46b3f..905eb26ee01b5037dfbaf3c054a62593837c8b5f
 100644
--- a/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.c
+++ b/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.c
@@ -1,6 +1,6 @@
 /** @file
 
- Copyright (c) 2011-2014, ARM Ltd. All rights reserved.
+ Copyright (c) 2011-2018, ARM Ltd. All rights reserved.
  This program and the accompanying materials
  are licensed and made available under the terms and conditions of the BSD 
License
  which accompanies this distribution.  The full text of the license may be 
found at
@@ -9,7 +9,7 @@
  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 
- **/
+**/
 
 #include 
 #include 
@@ -22,12 +22,10 @@
 
 #include "LcdGraphicsOutputDxe.h"
 
-/**
- *
- *  This file implements the Graphics Output protocol on ArmVersatileExpress
- *  using the Lcd controller
- *
- **/
+/** This file implements the Graphics Output protocol on ArmVersatileExpress
+  using the Lcd controller
+
+**/
 
 //
 // Global variables
@@ -64,7 +62,10 @@ LCD_INSTANCE mLcdTemplate = {
 {
   {
 HARDWARE_DEVICE_PATH, HW_VENDOR_DP,
-{ (UINT8) (sizeof(VENDOR_DEVICE_PATH)), (UINT8) 
((sizeof(VENDOR_DEVICE_PATH)) >> 8) },
+{
+  (UINT8)(sizeof (VENDOR_DEVICE_PATH)),
+  (UINT8)((sizeof (VENDOR_DEVICE_PATH)) >> 8)
+},
   },
   // Hardware Device Path for Lcd
   EFI_CALLER_ID_GUID // Use the driver's GUID
@@ -73,10 +74,13 @@ LCD_INSTANCE mLcdTemplate = {
 {
   END_DEVICE_PATH_TYPE,
   END_ENTIRE_DEVICE_PATH_SUBTYPE,
-  { sizeof(EFI_DEVICE_PATH_PROTOCOL), 0 }
+  {
+sizeof (EFI_DEVICE_PATH_PROTOCOL),
+0
+  }
 }
   },
-  (EFI_EVENT) NULL // ExitBootServicesEvent
+  (EFI_EVENT)NULL // ExitBootServicesEvent
 };
 
 EFI_STATUS
@@ -86,7 +90,7 @@ LcdInstanceContructor (
 {
   LCD_INSTANCE* Instance;
 
-  Instance = AllocateCopyPool (sizeof(LCD_INSTANCE), );
+  Instance = AllocateCopyPool (sizeof (LCD_INSTANCE), );
   if (Instance == NULL) {
 return EFI_OUT_OF_RESOURCES;
   }
@@ -113,23 +117,23 @@ InitializeDisplay (
   UINTN  VramSize;
 
   Status = LcdPlatformGetVram (, );
-  if (EFI_ERROR(Status)) {
+  if (EFI_ERROR (Status)) {
 return Status;
   }
 
   // Setup the LCD
   Status = LcdInitialize (VramBaseAddress);
-  if (EFI_ERROR(Status)) {
+  if (EFI_ERROR (Status)) {
 goto EXIT_ERROR_LCD_SHUTDOWN;
   }
 
   Status = LcdPlatformInitializeDisplay (Instance->Handle);
-  if (EFI_ERROR(Status)) {
+  if (EFI_ERROR (Status)) {
 goto EXIT_ERROR_LCD_SHUTDOWN;
   }
 
   // Setup all the relevant mode information
-  Instance->Gop.Mode->SizeOfInfo  = 
sizeof(EFI_GRAPHICS_OUTPUT_MODE_INFORMATION);
+  Instance->Gop.Mode->SizeOfInfo  = sizeof 
(EFI_GRAPHICS_OUTPUT_MODE_INFORMATION);
   Instance->Gop.Mode->FrameBufferBase = VramBaseAddress;
 
   // Set the flag before changing the mode, to avoid infinite loops
@@ -139,7 +143,8 @@ InitializeDisplay (
   goto EXIT;

[edk2] [PATCH v3 06/16] ArmPlatformPkg: PL111Lcd: Replace magic number with macro

2018-03-20 Thread Girish Pathak 
From: Girish Pathak 

Minor code change, replaces magic number with macro in LCD disable.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Girish Pathak 
Signed-off-by: Evan Lloyd 
Reviewed-by: Ard Biesheuvel 
---
 ArmPlatformPkg/Library/PL111Lcd/PL111Lcd.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/ArmPlatformPkg/Library/PL111Lcd/PL111Lcd.c 
b/ArmPlatformPkg/Library/PL111Lcd/PL111Lcd.c
index 
cb64c57dd79f3bb1345e4d3dbda7f5b3ce859f40..287e3ca272c0c19f8045a3bf4e69a092d8da6fd8
 100644
--- a/ArmPlatformPkg/Library/PL111Lcd/PL111Lcd.c
+++ b/ArmPlatformPkg/Library/PL111Lcd/PL111Lcd.c
@@ -119,8 +119,7 @@ LcdSetMode (
   }
 
   // Disable the CLCD_LcdEn bit
-  LcdControl = MmioRead32 (PL111_REG_LCD_CONTROL);
-  MmioWrite32 (PL111_REG_LCD_CONTROL, LcdControl & ~1);
+  MmioAnd32 (PL111_REG_LCD_CONTROL, ~PL111_CTRL_LCD_EN);
 
   // Set Timings
   MmioWrite32 (
-- 
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'


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[edk2] [PATCH v3 11/16] ArmPlatformPkg: PCD to swap red/blue format for HDLCD

2018-03-20 Thread Girish Pathak 
From: Girish Pathak 

This change adds a new PCD PcdArmHdlcdSwapBlueRedSelect
to swap values for HDLCD RED_SELECT and BLUE_SELECT registers
on platforms where blue and red hardware lines are swapped.

If set to TRUE in the platform dsc, HDLCD library will swap the values
while setting RED_SELECT and BLUE_SELECT registers. The default
value of the PCD is FALSE.

NOTE: The motive for this is that a discrepancy in the Red/Blue lines
exists between some VersatileExpress platforms.  Rather than have
divergent code, this build switch allows a simple, pragmatic solution.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Girish Pathak 
Signed-off-by: Evan Lloyd 
---

Notes:
v3:
- Please don't nest CPP and C conditionals like this.
  It is difficult to follow, and results in poor build
  time coverage (the non-taken branch at the CPP level
  is never seen by the compiler)   [Ard]

  Done [Girish]

 ArmPlatformPkg/ArmPlatformPkg.dec  |  3 +++
 ArmPlatformPkg/Library/HdLcd/HdLcd.c   | 11 ++-
 ArmPlatformPkg/Library/HdLcd/HdLcd.inf |  4 +++-
 3 files changed, 16 insertions(+), 2 deletions(-)

diff --git a/ArmPlatformPkg/ArmPlatformPkg.dec 
b/ArmPlatformPkg/ArmPlatformPkg.dec
index 
378bee9cbc9e4bd50c37b38156016424e24cba73..5231ea822f05c2f281a6190d6eae0fc7d0bc0cb3
 100644
--- a/ArmPlatformPkg/ArmPlatformPkg.dec
+++ b/ArmPlatformPkg/ArmPlatformPkg.dec
@@ -104,6 +104,9 @@ [PcdsFixedAtBuild.common]
   # Default is set to UEFI console font format 
PixelBlueGreenRedReserved8BitPerColor
   gArmPlatformTokenSpaceGuid.PcdGopPixelFormat|0x0001|UINT32|0x0040
 
+  ## If set, this will swap settings for HDLCD RED_SELECT and BLUE_SELECT 
registers
+  
gArmPlatformTokenSpaceGuid.PcdArmHdLcdSwapBlueRedSelect|FALSE|BOOLEAN|0x0045
+
 [PcdsFixedAtBuild.common,PcdsDynamic.common]
   ## PL031 RealTimeClock
   gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x0|UINT32|0x0024
diff --git a/ArmPlatformPkg/Library/HdLcd/HdLcd.c 
b/ArmPlatformPkg/Library/HdLcd/HdLcd.c
index 
96f2bf437fbabd2509f860c67c5442def5b5f03d..5396dde3ba6cd147a8333241a9bc71ab05d7fee3
 100644
--- a/ArmPlatformPkg/Library/HdLcd/HdLcd.c
+++ b/ArmPlatformPkg/Library/HdLcd/HdLcd.c
@@ -73,6 +73,8 @@ LcdSetMode (
   SCAN_TIMINGS  *Horizontal;
   SCAN_TIMINGS  *Vertical;
 
+  EFI_GRAPHICS_PIXEL_FORMAT  PixelFormat;
+
   EFI_GRAPHICS_OUTPUT_MODE_INFORMATION  ModeInfo;
 
   // Set the video mode timings and other relevant information
@@ -96,7 +98,14 @@ LcdSetMode (
 return Status;
   }
 
-  if (ModeInfo.PixelFormat == PixelBlueGreenRedReserved8BitPerColor) {
+  // By default PcdArmHdLcdSwapBlueRedSelect is set to false
+  // However on the Juno platform HW lines for BLUE and RED are swapped
+  // Therefore PcdArmHdLcdSwapBlueRedSelect is set to TRUE for the Juno 
platform
+  PixelFormat = FixedPcdGetBool (PcdArmHdLcdSwapBlueRedSelect)
+? PixelRedGreenBlueReserved8BitPerColor
+: PixelBlueGreenRedReserved8BitPerColor;
+
+  if (ModeInfo.PixelFormat == PixelFormat) {
 MmioWrite32 (HDLCD_REG_RED_SELECT,  (8 << 8) | 16);
 MmioWrite32 (HDLCD_REG_BLUE_SELECT, (8 << 8) | 0);
   } else {
diff --git a/ArmPlatformPkg/Library/HdLcd/HdLcd.inf 
b/ArmPlatformPkg/Library/HdLcd/HdLcd.inf
index 
67aad05d210b95b2d23b8e52e4392685efcf3795..7f2ba7bf1c602f4c214eacaa6425bf9ec7e6da15
 100644
--- a/ArmPlatformPkg/Library/HdLcd/HdLcd.inf
+++ b/ArmPlatformPkg/Library/HdLcd/HdLcd.inf
@@ -2,7 +2,7 @@
 #
 #  Component description file for HDLCD module
 #
-#  Copyright (c) 2011-2012, ARM Ltd. All rights reserved.
+#  Copyright (c) 2011-2018, ARM Ltd. All rights reserved.
 #
 #  This program and the accompanying materials
 #  are licensed and made available under the terms and conditions of the BSD 
License
@@ -40,3 +40,5 @@ [LibraryClasses]
 
 [FixedPcd]
   gArmPlatformTokenSpaceGuid.PcdArmHdLcdBase
+  gArmPlatformTokenSpaceGuid.PcdArmHdLcdSwapBlueRedSelect
+
-- 
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'


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[edk2] [PATCH v3 05/16] ArmPlatformPkg: HDLCD and PL111: Update debug ASSERTS

2018-03-20 Thread Girish Pathak 
From: Girish Pathak 

This change moves some ASSERTs in error handling code
to improve efficiency in DEBUG build. This change also
removes redundant error code returns.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Girish Pathak 
Signed-off-by: Evan Lloyd 
---

Notes:
v3:
- Reverted to ASSERT_EFI_ERROR (Status) from ASSERT (FALSE)

 ArmPlatformPkg/Library/HdLcd/HdLcd.c   | 11 +--
 ArmPlatformPkg/Library/PL111Lcd/PL111Lcd.c | 12 ++--
 2 files changed, 11 insertions(+), 12 deletions(-)

diff --git a/ArmPlatformPkg/Library/HdLcd/HdLcd.c 
b/ArmPlatformPkg/Library/HdLcd/HdLcd.c
index 
be4ccfdc1f421060faec792c8e8acfcfb3232014..28306c530e08b5e0fcef4308435045da3c9e093c
 100644
--- a/ArmPlatformPkg/Library/HdLcd/HdLcd.c
+++ b/ArmPlatformPkg/Library/HdLcd/HdLcd.c
@@ -90,8 +90,7 @@ LcdInitialize (
   @param[in] ModeNumber  Display mode number.
 
   @retval EFI_SUCCESSDisplay mode set successfully.
-  @retval EFI_DEVICE_ERROR   Reurns an error if display timing
- information is not available.
+  @retval !(EFI_SUCCESS) Other errors.
 **/
 EFI_STATUS
 LcdSetMode (
@@ -122,15 +121,15 @@ LcdSetMode (
  ,
  
  );
-  ASSERT_EFI_ERROR (Status);
   if (EFI_ERROR (Status)) {
-return EFI_DEVICE_ERROR;
+ASSERT_EFI_ERROR (Status);
+return Status;
   }
 
   Status = LcdPlatformGetBpp (ModeNumber, );
-  ASSERT_EFI_ERROR (Status);
   if (EFI_ERROR (Status)) {
-return EFI_DEVICE_ERROR;
+ASSERT_EFI_ERROR (Status);
+return Status;
   }
 
   BytesPerPixel = GetBytesPerPixel (LcdBpp);
diff --git a/ArmPlatformPkg/Library/PL111Lcd/PL111Lcd.c 
b/ArmPlatformPkg/Library/PL111Lcd/PL111Lcd.c
index 
ccd7a4d1d43ad5c2f495683ac68236e17f3b55a5..cb64c57dd79f3bb1345e4d3dbda7f5b3ce859f40
 100644
--- a/ArmPlatformPkg/Library/PL111Lcd/PL111Lcd.c
+++ b/ArmPlatformPkg/Library/PL111Lcd/PL111Lcd.c
@@ -75,8 +75,8 @@ LcdInitialize (
   @param[in] ModeNumbe   Display mode number.
 
   @retval EFI_SUCCESSDisplay mode set successfuly.
-  @retval EFI_DEVICE_ERROR   It returns an error if display timing
- information is not available.
+  @retval !(EFI_SUCCESS) Other errors.
+
 **/
 EFI_STATUS
 LcdSetMode (
@@ -107,15 +107,15 @@ LcdSetMode (
  ,
  
  );
-  ASSERT_EFI_ERROR (Status);
   if (EFI_ERROR (Status)) {
-return EFI_DEVICE_ERROR;
+ASSERT_EFI_ERROR (Status);
+return Status;
   }
 
   Status = LcdPlatformGetBpp (ModeNumber, );
-  ASSERT_EFI_ERROR (Status);
   if (EFI_ERROR (Status)) {
-return EFI_DEVICE_ERROR;
+ASSERT_EFI_ERROR (Status);
+return Status;
   }
 
   // Disable the CLCD_LcdEn bit
-- 
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'


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[edk2] [PATCH v3 02/16] ArmPlatformPkg: Rectify line endings of LcdPlatformNullLib

2018-03-20 Thread Girish Pathak 
This fix changes line endings of LcdPlatformNullLib.c to DOS
style line endings from UNIX style line endings to meet the EDK2
coding standard.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Girish Pathak 
Signed-off-by: Evan Lloyd 
---
 ArmPlatformPkg/Library/LcdPlatformNullLib/LcdPlatformNullLib.c | 184 
++--
 1 file changed, 92 insertions(+), 92 deletions(-)

diff --git a/ArmPlatformPkg/Library/LcdPlatformNullLib/LcdPlatformNullLib.c 
b/ArmPlatformPkg/Library/LcdPlatformNullLib/LcdPlatformNullLib.c
index 
071eb5ffd4be895a0ce2ed5144f1f99e8195d1a0..b78d9a3bbd3e1fac4238f2be961a343020360a32
 100644
--- a/ArmPlatformPkg/Library/LcdPlatformNullLib/LcdPlatformNullLib.c
+++ b/ArmPlatformPkg/Library/LcdPlatformNullLib/LcdPlatformNullLib.c
@@ -1,92 +1,92 @@
-/** @file
-
-  Copyright (c) 2017, Linaro, Ltd. All rights reserved.
-
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD 
License
-  which accompanies this distribution.  The full text of the license may be 
found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include 
-#include 
-#include 
-#include 
-
-EFI_STATUS
-LcdPlatformInitializeDisplay (
-  IN EFI_HANDLE   Handle
-  )
-{
-  ASSERT (FALSE);
-  return EFI_UNSUPPORTED;
-}
-
-EFI_STATUS
-LcdPlatformGetVram (
-  OUT EFI_PHYSICAL_ADDRESS* VramBaseAddress,
-  OUT UINTN*VramSize
-  )
-{
-  ASSERT (FALSE);
-  return EFI_UNSUPPORTED;
-}
-
-UINT32
-LcdPlatformGetMaxMode (
-  VOID
-  )
-{
-  ASSERT (FALSE);
-  return 0;
-}
-
-EFI_STATUS
-LcdPlatformSetMode (
-  IN UINT32 ModeNumber
-  )
-{
-  ASSERT (FALSE);
-  return EFI_UNSUPPORTED;
-}
-
-EFI_STATUS
-LcdPlatformQueryMode (
-  IN  UINT32ModeNumber,
-  OUT EFI_GRAPHICS_OUTPUT_MODE_INFORMATION  *Info
-  )
-{
-  ASSERT (FALSE);
-  return EFI_UNSUPPORTED;
-}
-
-EFI_STATUS
-LcdPlatformGetTimings (
-  IN  UINT32  ModeNumber,
-  OUT UINT32* HRes,
-  OUT UINT32* HSync,
-  OUT UINT32* HBackPorch,
-  OUT UINT32* HFrontPorch,
-  OUT UINT32* VRes,
-  OUT UINT32* VSync,
-  OUT UINT32* VBackPorch,
-  OUT UINT32* VFrontPorch
-  )
-{
-  ASSERT (FALSE);
-  return EFI_UNSUPPORTED;
-}
-
-EFI_STATUS
-LcdPlatformGetBpp (
-  IN  UINT32ModeNumber,
-  OUT LCD_BPP*  Bpp
-  )
-{
-  ASSERT (FALSE);
-  return EFI_UNSUPPORTED;
-}
+/** @file
+
+  Copyright (c) 2017, Linaro, Ltd. All rights reserved.
+
+  This program and the accompanying materials
+  are licensed and made available under the terms and conditions of the BSD 
License
+  which accompanies this distribution.  The full text of the license may be 
found at
+  http://opensource.org/licenses/bsd-license.php
+
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include 
+#include 
+#include 
+#include 
+
+EFI_STATUS
+LcdPlatformInitializeDisplay (
+  IN EFI_HANDLE   Handle
+  )
+{
+  ASSERT (FALSE);
+  return EFI_UNSUPPORTED;
+}
+
+EFI_STATUS
+LcdPlatformGetVram (
+  OUT EFI_PHYSICAL_ADDRESS* VramBaseAddress,
+  OUT UINTN*VramSize
+  )
+{
+  ASSERT (FALSE);
+  return EFI_UNSUPPORTED;
+}
+
+UINT32
+LcdPlatformGetMaxMode (
+  VOID
+  )
+{
+  ASSERT (FALSE);
+  return 0;
+}
+
+EFI_STATUS
+LcdPlatformSetMode (
+  IN UINT32 ModeNumber
+  )
+{
+  ASSERT (FALSE);
+  return EFI_UNSUPPORTED;
+}
+
+EFI_STATUS
+LcdPlatformQueryMode (
+  IN  UINT32ModeNumber,
+  OUT EFI_GRAPHICS_OUTPUT_MODE_INFORMATION  *Info
+  )
+{
+  ASSERT (FALSE);
+  return EFI_UNSUPPORTED;
+}
+
+EFI_STATUS
+LcdPlatformGetTimings (
+  IN  UINT32  ModeNumber,
+  OUT UINT32* HRes,
+  OUT UINT32* HSync,
+  OUT UINT32* HBackPorch,
+  OUT UINT32* HFrontPorch,
+  OUT UINT32* VRes,
+  OUT UINT32* VSync,
+  OUT UINT32* VBackPorch,
+  OUT UINT32* VFrontPorch
+  )
+{
+  ASSERT (FALSE);
+  return EFI_UNSUPPORTED;
+}
+
+EFI_STATUS
+LcdPlatformGetBpp (
+  IN  UINT32ModeNumber,
+  OUT LCD_BPP*  Bpp
+  )
+{
+  ASSERT

[edk2] [PATCH v3 00/16] Update GOP

2018-03-20 Thread Girish Pathak 
This patch series addresses comments on the patch v2
(https://lists.01.org/pipermail/edk2-devel/2017-December/019389.html)
reworking of the Graphics Output Protocol code in ArmPlatformPkg.
It also contains updates for the new SCMI protocol.

Corresponding edk2-platforms changes will follow shortly.

Code is available for examination at:
  https://github.com/girishpathak/edk2/tree/201_gop_v3

Girish Pathak (16):
  ArmPlatformPkg: Rectify line endings of LcdHwNullLib
  ArmPlatformPkg: Rectify line endings of LcdPlatformNullLib
  ArmPlatformPkg: Tidy Lcd code: Coding standard
  ArmPlatformPkg: Tidy Lcd code: Updated comments
  ArmPlatformPkg: HDLCD and PL111: Update debug ASSERTS
  ArmPlatformPkg: PL111Lcd: Replace magic number with macro
  ArmPlatformPkg: PL111Lcd: Combine two writes to LCDControl
  ArmPlatformPkg: Implement LcdIdentify function for HDLCD GOP
  ArmPlatformPkg: Redefine LcdPlatformGetTimings function
  ArmPlatformPkg: Add PCD to select pixel format
  ArmPlatformPkg: PCD to swap red/blue format for HDLCD
  ArmPlatformPkg: Additional display modes
  ArmPlatformPkg: Reserving framebuffer at build
  ArmPlatformPkg: New DP500/DP550/DP650 GOP driver
  ArmPkg: MTL Library interface and Null library implementation
  ArmPkg: Introduce SCMI protocol

 ArmPkg/ArmPkg.dec  |  16 +-
 ArmPkg/ArmPkg.dsc  |   6 +-
 ArmPkg/Drivers/ArmScmiDxe/ArmScmiBaseProtocolPrivate.h |  46 ++
 ArmPkg/Drivers/ArmScmiDxe/ArmScmiClockProtocolPrivate.h|  84 
 ArmPkg/Drivers/ArmScmiDxe/ArmScmiDxe.inf   |  53 +++
 ArmPkg/Drivers/ArmScmiDxe/ArmScmiPerformanceProtocolPrivate.h  |  55 +++
 ArmPkg/Drivers/ArmScmiDxe/Scmi.c   | 262 
+++
 ArmPkg/Drivers/ArmScmiDxe/ScmiBaseProtocol.c   | 318 
++
 ArmPkg/Drivers/ArmScmiDxe/ScmiClockProtocol.c  | 418 
++
 ArmPkg/Drivers/ArmScmiDxe/ScmiDxe.c| 138 ++
 ArmPkg/Drivers/ArmScmiDxe/ScmiDxe.h|  41 ++
 ArmPkg/Drivers/ArmScmiDxe/ScmiPerformanceProtocol.c| 457 

 ArmPkg/Drivers/ArmScmiDxe/ScmiPrivate.h| 174 

 ArmPkg/Include/Library/ArmMtlLib.h | 137 ++
 ArmPkg/Include/Protocol/ArmScmi.h  |  27 ++
 ArmPkg/Include/Protocol/ArmScmiBaseProtocol.h  | 174 

 ArmPkg/Include/Protocol/ArmScmiClockProtocol.h | 218 
++
 ArmPkg/Include/Protocol/ArmScmiPerformanceProtocol.h   | 265 

 ArmPkg/Library/ArmMtlNullLib/ArmMtlNullLib.c   | 108 +
 ArmPkg/Library/ArmMtlNullLib/ArmMtlNullLib.inf |  26 ++
 ArmPlatformPkg/ArmPlatformPkg.dec  |  21 +-
 ArmPlatformPkg/ArmPlatformPkg.dsc  |   4 +-
 ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.c | 197 
+
 ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.h |  10 +-
 ArmPlatformPkg/Include/Library/LcdPlatformLib.h| 177 
++--
 ArmPlatformPkg/Library/ArmMaliDp/ArmMaliDp.c   | 409 
++
 ArmPlatformPkg/Library/ArmMaliDp/ArmMaliDp.h   | 243 
+++
 ArmPlatformPkg/Library/ArmMaliDp/ArmMaliDp.inf |  43 ++
 ArmPlatformPkg/Library/HdLcd/HdLcd.c   | 174 

 ArmPlatformPkg/Library/HdLcd/HdLcd.h   |  23 +-
 ArmPlatformPkg/Library/HdLcd/HdLcd.inf |   4 +-
 ArmPlatformPkg/Library/LcdHwNullLib/LcdHwNullLib.c | 150 
+++
 ArmPlatformPkg/Library/LcdPlatformNullLib/LcdPlatformNullLib.c | 243 
+++
 ArmPlatformPkg/Library/PL111Lcd/PL111Lcd.c | 125 --
 34 files changed, 4413 insertions(+), 433 deletions(-)
 create mode 100644 ArmPkg/Drivers/ArmScmiDxe/ArmScmiBaseProtocolPrivate.h
 create mode 100644 ArmPkg/Drivers/ArmScmiDxe/ArmScmiClockProtocolPrivate.h
 create mode 100644 ArmPkg/Drivers/ArmScmiDxe/ArmScmiDxe.inf
 create mode 100644 
ArmPkg/Drivers/ArmScmiDxe/ArmScmiPerformanceProtocolPrivate.h
 create mode 100644 ArmPkg/Drivers/ArmScmiDxe/Scmi.c
 create mode 100644 ArmPkg/Drivers/ArmScmiDxe/ScmiBaseProtocol.c
 create mode 100644 ArmPkg/Drivers/ArmScmiDxe/ScmiClockProtocol.c
 create mode 100644 ArmPkg/Drivers/ArmScmiDxe/ScmiDxe.c
 create mode 100644 ArmPkg/Drivers/ArmScmiDxe/ScmiDxe.h
 create mode 100644 ArmPkg/Drivers/ArmScmiDxe/ScmiPerformanceProtocol.c
 create mode 100644 ArmPkg/Drivers/ArmScmiDxe/ScmiPrivate.h
 create mode 100644 ArmPkg/Include/Library/ArmMtlLib.h
 create mode 100644 ArmPkg/Include/Protocol/ArmScmi.h
 create mode 100644

[edk2] [PATCH v3 07/16] ArmPlatformPkg: PL111Lcd: Combine two writes to LCDControl

2018-03-20 Thread Girish Pathak 
Currenty bit LcdPwr of the LCDControl register is enabled immediately
after setting other bits of the LCDControl register. This two write
sequence is unnecessary. This change removes this extra write by setting
LcdPwr bit along with other bits of the LcdControl register.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Girish Pathak 
Signed-off-by: Evan Lloyd 
---
 ArmPlatformPkg/Library/PL111Lcd/PL111Lcd.c | 6 +-
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/ArmPlatformPkg/Library/PL111Lcd/PL111Lcd.c 
b/ArmPlatformPkg/Library/PL111Lcd/PL111Lcd.c
index 
287e3ca272c0c19f8045a3bf4e69a092d8da6fd8..465cb6845437f57d15f05a271d1b01f634e11b56
 100644
--- a/ArmPlatformPkg/Library/PL111Lcd/PL111Lcd.c
+++ b/ArmPlatformPkg/Library/PL111Lcd/PL111Lcd.c
@@ -137,11 +137,7 @@ LcdSetMode (
 
   // PL111_REG_LCD_CONTROL
   LcdControl = PL111_CTRL_LCD_EN | PL111_CTRL_LCD_BPP (LcdBpp) |
-   PL111_CTRL_LCD_TFT | PL111_CTRL_BGR;
-  MmioWrite32 (PL111_REG_LCD_CONTROL, LcdControl);
-
-  // Turn on power to the LCD Panel
-  LcdControl |= PL111_CTRL_LCD_PWR;
+   PL111_CTRL_LCD_TFT | PL111_CTRL_LCD_PWR | PL111_CTRL_BGR;
   MmioWrite32 (PL111_REG_LCD_CONTROL, LcdControl);
 
   return EFI_SUCCESS;
-- 
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[edk2] [PATCH v3 08/16] ArmPlatformPkg: Implement LcdIdentify function for HDLCD GOP

2018-03-20 Thread Girish Pathak 
From: Girish Pathak 

LcdIdentify function does not currently check presence of HDLCD
controller.

Implement this functionality by reading HDLCD_REG_VERSION and checking
against the PRODUCT_ID field to detect presence of HDLCD controller.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Girish Pathak 
Signed-off-by: Evan Lloyd 
Reviewed-by: Ard Biesheuvel 
---
 ArmPlatformPkg/Library/HdLcd/HdLcd.c | 8 +++-
 ArmPlatformPkg/Library/HdLcd/HdLcd.h | 2 ++
 2 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/ArmPlatformPkg/Library/HdLcd/HdLcd.c 
b/ArmPlatformPkg/Library/HdLcd/HdLcd.c
index 
28306c530e08b5e0fcef4308435045da3c9e093c..039048398c531ec944bc4b43a5551a554a368481
 100644
--- a/ArmPlatformPkg/Library/HdLcd/HdLcd.c
+++ b/ArmPlatformPkg/Library/HdLcd/HdLcd.c
@@ -175,11 +175,17 @@ LcdShutdown (
 
   @retval EFI_SUCCESSReturns success if platform implements a HDLCD
  controller.
+  @retval EFI_NOT_FOUND  HDLCD display controller not found on the
+ platform.
 **/
 EFI_STATUS
 LcdIdentify (
   VOID
   )
 {
-  return EFI_SUCCESS;
+  if ((MmioRead32 (HDLCD_REG_VERSION) >> 16) == HDLCD_PRODUCT_ID) {
+return EFI_SUCCESS;
+  }
+
+  return EFI_NOT_FOUND;
 }
diff --git a/ArmPlatformPkg/Library/HdLcd/HdLcd.h 
b/ArmPlatformPkg/Library/HdLcd/HdLcd.h
index 
cd2c0366c7b563d7fb313f82abeef7eb1aa3ef72..1efa78eedc3013b3ab4615181a59c7d15b851ab5
 100644
--- a/ArmPlatformPkg/Library/HdLcd/HdLcd.h
+++ b/ArmPlatformPkg/Library/HdLcd/HdLcd.h
@@ -85,4 +85,6 @@
 // Number of bytes per pixel
 #define HDLCD_4BYTES_PER_PIXEL   ((4 - 1) << 3)
 
+#define HDLCD_PRODUCT_ID 0x1CDC
+
 #endif /* HDLCD_H_ */
-- 
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Re: [edk2] [PATCH] BaseTools/PosixLike: honor pre-set PYTHONPATH

2018-03-20 Thread Laszlo Ersek 
Hello Liming, Yonghong,

On 03/14/18 11:54, Laszlo Ersek wrote:
> Utilities written in Python may depend on external (preinstalled) Python
> packages; for example, Ecc depends on "antlr_python_runtime-3.0.1". Such
> packages need not be installed system-wide, as long as they are reachable
> through PYTHONPATH. Therefore we shouldn't overwrite the user's PYTHONPATH
> with "BaseTools/Source/Python"; instead, we should prepend the latter to
> the former.
> 
> Cc: Liming Gao 
> Cc: Yonghong Zhu 
> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=896
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Laszlo Ersek 
> ---
> 
> Notes:
> Repo:   https://github.com/lersek/edk2.git
> Branch: pythonpath

Ping -- looks like this patch was missed; can you guys please review it?

Thanks,
Laszlo

>  BaseTools/BinWrappers/PosixLike/BPDG  | 2 +-
>  BaseTools/BinWrappers/PosixLike/Ecc   | 2 +-
>  BaseTools/BinWrappers/PosixLike/GenDepex  | 2 +-
>  BaseTools/BinWrappers/PosixLike/GenFds| 2 +-
>  BaseTools/BinWrappers/PosixLike/GenPatchPcdTable  | 2 +-
>  BaseTools/BinWrappers/PosixLike/PatchPcdValue | 2 +-
>  BaseTools/BinWrappers/PosixLike/Pkcs7Sign | 2 +-
>  BaseTools/BinWrappers/PosixLike/Rsa2048Sha256GenerateKeys | 2 +-
>  BaseTools/BinWrappers/PosixLike/Rsa2048Sha256Sign | 2 +-
>  BaseTools/BinWrappers/PosixLike/TargetTool| 2 +-
>  BaseTools/BinWrappers/PosixLike/Trim  | 2 +-
>  BaseTools/BinWrappers/PosixLike/UPT   | 2 +-
>  BaseTools/BinWrappers/PosixLike/build | 2 +-
>  13 files changed, 13 insertions(+), 13 deletions(-)
> 
> diff --git a/BaseTools/BinWrappers/PosixLike/BPDG 
> b/BaseTools/BinWrappers/PosixLike/BPDG
> index 214d88fff1b1..01ae23ddeb4f 100755
> --- a/BaseTools/BinWrappers/PosixLike/BPDG
> +++ b/BaseTools/BinWrappers/PosixLike/BPDG
> @@ -10,5 +10,5 @@ full_cmd=${BASH_SOURCE:-$0} # see 
> http://mywiki.wooledge.org/BashFAQ/028 for a d
>  dir=$(dirname "$full_cmd")
>  cmd=${full_cmd##*/}
>  
> -export PYTHONPATH="$dir/../../Source/Python"
> +export PYTHONPATH="$dir/../../Source/Python${PYTHONPATH:+:"$PYTHONPATH"}"
>  exec "${python_exe:-python}" "$dir/../../Source/Python/$cmd/$cmd.py" "$@"
> diff --git a/BaseTools/BinWrappers/PosixLike/Ecc 
> b/BaseTools/BinWrappers/PosixLike/Ecc
> index 214d88fff1b1..01ae23ddeb4f 100755
> --- a/BaseTools/BinWrappers/PosixLike/Ecc
> +++ b/BaseTools/BinWrappers/PosixLike/Ecc
> @@ -10,5 +10,5 @@ full_cmd=${BASH_SOURCE:-$0} # see 
> http://mywiki.wooledge.org/BashFAQ/028 for a d
>  dir=$(dirname "$full_cmd")
>  cmd=${full_cmd##*/}
>  
> -export PYTHONPATH="$dir/../../Source/Python"
> +export PYTHONPATH="$dir/../../Source/Python${PYTHONPATH:+:"$PYTHONPATH"}"
>  exec "${python_exe:-python}" "$dir/../../Source/Python/$cmd/$cmd.py" "$@"
> diff --git a/BaseTools/BinWrappers/PosixLike/GenDepex 
> b/BaseTools/BinWrappers/PosixLike/GenDepex
> index bdb6722a1f84..dad174788bc3 100755
> --- a/BaseTools/BinWrappers/PosixLike/GenDepex
> +++ b/BaseTools/BinWrappers/PosixLike/GenDepex
> @@ -10,5 +10,5 @@ full_cmd=${BASH_SOURCE:-$0} # see 
> http://mywiki.wooledge.org/BashFAQ/028 for a d
>  dir=$(dirname "$full_cmd")
>  cmd=${full_cmd##*/}
>  
> -export PYTHONPATH="$dir/../../Source/Python"
> +export PYTHONPATH="$dir/../../Source/Python${PYTHONPATH:+:"$PYTHONPATH"}"
>  exec "${python_exe:-python}" "$dir/../../Source/Python/AutoGen/$cmd.py" "$@"
> diff --git a/BaseTools/BinWrappers/PosixLike/GenFds 
> b/BaseTools/BinWrappers/PosixLike/GenFds
> index 214d88fff1b1..01ae23ddeb4f 100755
> --- a/BaseTools/BinWrappers/PosixLike/GenFds
> +++ b/BaseTools/BinWrappers/PosixLike/GenFds
> @@ -10,5 +10,5 @@ full_cmd=${BASH_SOURCE:-$0} # see 
> http://mywiki.wooledge.org/BashFAQ/028 for a d
>  dir=$(dirname "$full_cmd")
>  cmd=${full_cmd##*/}
>  
> -export PYTHONPATH="$dir/../../Source/Python"
> +export PYTHONPATH="$dir/../../Source/Python${PYTHONPATH:+:"$PYTHONPATH"}"
>  exec "${python_exe:-python}" "$dir/../../Source/Python/$cmd/$cmd.py" "$@"
> diff --git a/BaseTools/BinWrappers/PosixLike/GenPatchPcdTable 
> b/BaseTools/BinWrappers/PosixLike/GenPatchPcdTable
> index 214d88fff1b1..01ae23ddeb4f 100755
> --- a/BaseTools/BinWrappers/PosixLike/GenPatchPcdTable
> +++ b/BaseTools/BinWrappers/PosixLike/GenPatchPcdTable
> @@ -10,5 +10,5 @@ full_cmd=${BASH_SOURCE:-$0} # see 
> http://mywiki.wooledge.org/BashFAQ/028 for a d
>  dir=$(dirname "$full_cmd")
>  cmd=${full_cmd##*/}
>  
> -export PYTHONPATH="$dir/../../Source/Python"
> +export PYTHONPATH="$dir/../../Source/Python${PYTHONPATH:+:"$PYTHONPATH"}"
>  exec "${python_exe:-python}" "$dir/../../Source/Python/$cmd/$cmd.py" "$@"
> diff --git a/BaseTools/BinWrappers/PosixLike/PatchPcdValue 
> b/BaseTools/BinWrappers/PosixLike/PatchPcdValue
> index 214d88fff1b1..01ae23ddeb4f

[edk2] [Patch] SecurityPkg Tpm12CommandLib: Fix TPM12 GetCapability response error

2018-03-20 Thread Zhang, Chao B 
TPM12 command lib doesn't convert Response Size before using. Add logic
to fix the issue.

Cc: Long Qin 
Cc: Yao Jiewen 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chao Zhang 
Signed-off-by: Zhang, Chao B 
---
 SecurityPkg/Library/Tpm12CommandLib/Tpm12GetCapability.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/SecurityPkg/Library/Tpm12CommandLib/Tpm12GetCapability.c 
b/SecurityPkg/Library/Tpm12CommandLib/Tpm12GetCapability.c
index c6eb9e1050..29d7a13edb 100644
--- a/SecurityPkg/Library/Tpm12CommandLib/Tpm12GetCapability.c
+++ b/SecurityPkg/Library/Tpm12CommandLib/Tpm12GetCapability.c
@@ -1,9 +1,9 @@
 /** @file
   Implement TPM1.2 Get Capabilities related commands.
 
-Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved. 
+Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved. 
 This program and the accompanying materials
 are licensed and made available under the terms and conditions of the BSD 
License
 which accompanies this distribution.  The full text of the license may be 
found at
 http://opensource.org/licenses/bsd-license.php
 
@@ -83,11 +83,11 @@ Tpm12GetCapabilityFlagPermanent (
 DEBUG ((DEBUG_ERROR, "Tpm12GetCapabilityFlagPermanent: Response Code 
error! 0x%08x\r\n", SwapBytes32 (Response.Hdr.returnCode)));
 return EFI_DEVICE_ERROR;
   }
 
   ZeroMem (TpmPermanentFlags, sizeof (*TpmPermanentFlags));
-  CopyMem (TpmPermanentFlags, , MIN (sizeof 
(*TpmPermanentFlags), Response.ResponseSize));
+  CopyMem (TpmPermanentFlags, , MIN (sizeof 
(*TpmPermanentFlags), SwapBytes32(Response.ResponseSize)));
 
   return Status;
 }
 
 /**
@@ -129,9 +129,9 @@ Tpm12GetCapabilityFlagVolatile (
 DEBUG ((DEBUG_ERROR, "Tpm12GetCapabilityFlagVolatile: Response Code error! 
0x%08x\r\n", SwapBytes32 (Response.Hdr.returnCode)));
 return EFI_DEVICE_ERROR;
   }
 
   ZeroMem (VolatileFlags, sizeof (*VolatileFlags));
-  CopyMem (VolatileFlags, , MIN (sizeof (*VolatileFlags), 
Response.ResponseSize));
+  CopyMem (VolatileFlags, , MIN (sizeof (*VolatileFlags), 
SwapBytes32(Response.ResponseSize)));
 
   return Status;
 }
-- 
2.16.2.windows.1

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[edk2] internal structure of EFI_TLS_CA_CERTIFICATE_VARIABLE

2018-03-20 Thread Laszlo Ersek 
Hi Jiaxin, Siyuan,

setting *multiple* CA certificates for HTTPS server verification looks
possible, from the following call tree:

TlsConfigCertificate()  [NetworkPkg/HttpDxe/HttpsSupport.c]
  TlsConfigurationSetData() [NetworkPkg/TlsDxe/TlsConfigProtocol.c]
TlsSetCaCertificate()   [CryptoPkg/Library/TlsLib/TlsConfig.c]
  X509_STORE_add_cert()

because the outermost TlsConfigCertificate() function implements a loop
over the EFI_TLS_CA_CERTIFICATE_VARIABLE contents.

Is there natural-language documentation available about the internal
structure of EFI_TLS_CA_CERTIFICATE_VARIABLE?

Because, OVMF should avoid taking one format of CA Cert list from QEMU
(i.e. from the virtualization host) and converting it to the format
expected by TlsConfigCertificate(). Instead, the "update-ca-trust"
command should be taught (on the host system) to generate a binary
certificate list file (somewhere under "/etc/pki/ca-trust/extracted", I
believe) such that the file can be used directly for setting
EFI_TLS_CA_CERTIFICATE_VARIABLE in the guest.

In order to write such an extractor for "update-ca-trust", the format of
EFI_TLS_CA_CERTIFICATE_VARIABLE should be publicly documented. Also, a
promise of stability wouldn't hurt. :)

(To refer back to the cipher suite list discussion
,
this stability / public documentation goal was guaranteed there, due to
EFI_TLS_CIPHER being specified publicly.)

Thanks!
Laszlo
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Re: [edk2] [PATCH 2/2] Hisilicon/D0x: Enable tftp command by default

2018-03-20 Thread Guo Heyi 
I've no idea about how to use Driver; let me spend some time to learn first
:)

Regards,

Heyi

On Tue, Mar 20, 2018 at 09:51:32AM +, Leif Lindholm wrote:
> Ah, apologies.
> 
> I would be reluctant to add commands not covered by the UEFI Shell
> Specification by default.
> 
> Since it is now a dynamic command, is there any way of loading this
> dynamically (perhaps via DRIVER) where you feel the need for it?
> 
> /
> Leif
> 
> On Tue, Mar 20, 2018 at 03:54:46PM +0800, Guo Heyi wrote:
> > Ping :)
> > 
> > 
> > On Wed, Mar 07, 2018 at 04:02:30PM +, Ard Biesheuvel wrote:
> > > On 7 March 2018 at 03:03, Heyi Guo  wrote:
> > > > Since D0x platforms always have network enabled, we would like to
> > > > enable tftp command by default so that we can download something in
> > > > EFI Shell.
> > > >
> > > > Contributed-under: TianoCore Contribution Agreement 1.1
> > > > Signed-off-by: Heyi Guo 
> > > > Cc: Ard Biesheuvel 
> > > > Cc: Leif Lindholm 
> > > 
> > > The first patch looks fine to me, but I would like to give Leif a
> > > chance to comment on the policy side of this patch.
> > > 
> > > Please ping us by the end of next week if we haven't responded by then.
> > > 
> > > > ---
> > > >  Platform/Hisilicon/D03/D03.dsc | 2 ++
> > > >  Platform/Hisilicon/D05/D05.dsc | 1 +
> > > >  2 files changed, 3 insertions(+)
> > > >
> > > > diff --git a/Platform/Hisilicon/D03/D03.dsc 
> > > > b/Platform/Hisilicon/D03/D03.dsc
> > > > index cb0669d639d1..fce1e60b1275 100644
> > > > --- a/Platform/Hisilicon/D03/D03.dsc
> > > > +++ b/Platform/Hisilicon/D03/D03.dsc
> > > > @@ -29,6 +29,8 @@ [Defines]
> > > >SKUID_IDENTIFIER   = DEFAULT
> > > >FLASH_DEFINITION   = 
> > > > Platform/Hisilicon/$(PLATFORM_NAME)/$(PLATFORM_NAME).fdf
> > > >
> > > > +  DEFINE INCLUDE_TFTP_COMMAND= TRUE
> > > > +
> > > >  !include Silicon/Hisilicon/Hisilicon.dsc.inc
> > > >
> > > >  [LibraryClasses.common]
> > > > diff --git a/Platform/Hisilicon/D05/D05.dsc 
> > > > b/Platform/Hisilicon/D05/D05.dsc
> > > > index 8373a821a496..f007f3d2d7e8 100644
> > > > --- a/Platform/Hisilicon/D05/D05.dsc
> > > > +++ b/Platform/Hisilicon/D05/D05.dsc
> > > > @@ -29,6 +29,7 @@ [Defines]
> > > >SKUID_IDENTIFIER   = DEFAULT
> > > >FLASH_DEFINITION   = 
> > > > Platform/Hisilicon/$(PLATFORM_NAME)/$(PLATFORM_NAME).fdf
> > > >DEFINE EDK2_SKIP_PEICORE=0
> > > > +  DEFINE INCLUDE_TFTP_COMMAND= TRUE
> > > >DEFINE NETWORK_IP6_ENABLE  = FALSE
> > > >DEFINE HTTP_BOOT_ENABLE= FALSE
> > > >
> > > > --
> > > > 2.7.4
> > > >
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[edk2] [Patch V2] Build spec: update description for build handles PCDs for SKU support

2018-03-20 Thread Yonghong Zhu 
Cc: Liming Gao 
Cc: Michael Kinney 
Cc: Kevin W Shaw 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yonghong Zhu 
---
 2_design_discussion/27_sku_support.md | 129 +-
 1 file changed, 111 insertions(+), 18 deletions(-)

diff --git a/2_design_discussion/27_sku_support.md 
b/2_design_discussion/27_sku_support.md
index 18d40b7..891fc93 100644
--- a/2_design_discussion/27_sku_support.md
+++ b/2_design_discussion/27_sku_support.md
@@ -1,9 +1,9 @@

Re: [edk2] [PATCH 2/2] Hisilicon/D0x: Enable tftp command by default

2018-03-20 Thread Leif Lindholm 
Ah, apologies.

I would be reluctant to add commands not covered by the UEFI Shell
Specification by default.

Since it is now a dynamic command, is there any way of loading this
dynamically (perhaps via DRIVER) where you feel the need for it?

/
Leif

On Tue, Mar 20, 2018 at 03:54:46PM +0800, Guo Heyi wrote:
> Ping :)
> 
> 
> On Wed, Mar 07, 2018 at 04:02:30PM +, Ard Biesheuvel wrote:
> > On 7 March 2018 at 03:03, Heyi Guo  wrote:
> > > Since D0x platforms always have network enabled, we would like to
> > > enable tftp command by default so that we can download something in
> > > EFI Shell.
> > >
> > > Contributed-under: TianoCore Contribution Agreement 1.1
> > > Signed-off-by: Heyi Guo 
> > > Cc: Ard Biesheuvel 
> > > Cc: Leif Lindholm 
> > 
> > The first patch looks fine to me, but I would like to give Leif a
> > chance to comment on the policy side of this patch.
> > 
> > Please ping us by the end of next week if we haven't responded by then.
> > 
> > > ---
> > >  Platform/Hisilicon/D03/D03.dsc | 2 ++
> > >  Platform/Hisilicon/D05/D05.dsc | 1 +
> > >  2 files changed, 3 insertions(+)
> > >
> > > diff --git a/Platform/Hisilicon/D03/D03.dsc 
> > > b/Platform/Hisilicon/D03/D03.dsc
> > > index cb0669d639d1..fce1e60b1275 100644
> > > --- a/Platform/Hisilicon/D03/D03.dsc
> > > +++ b/Platform/Hisilicon/D03/D03.dsc
> > > @@ -29,6 +29,8 @@ [Defines]
> > >SKUID_IDENTIFIER   = DEFAULT
> > >FLASH_DEFINITION   = 
> > > Platform/Hisilicon/$(PLATFORM_NAME)/$(PLATFORM_NAME).fdf
> > >
> > > +  DEFINE INCLUDE_TFTP_COMMAND= TRUE
> > > +
> > >  !include Silicon/Hisilicon/Hisilicon.dsc.inc
> > >
> > >  [LibraryClasses.common]
> > > diff --git a/Platform/Hisilicon/D05/D05.dsc 
> > > b/Platform/Hisilicon/D05/D05.dsc
> > > index 8373a821a496..f007f3d2d7e8 100644
> > > --- a/Platform/Hisilicon/D05/D05.dsc
> > > +++ b/Platform/Hisilicon/D05/D05.dsc
> > > @@ -29,6 +29,7 @@ [Defines]
> > >SKUID_IDENTIFIER   = DEFAULT
> > >FLASH_DEFINITION   = 
> > > Platform/Hisilicon/$(PLATFORM_NAME)/$(PLATFORM_NAME).fdf
> > >DEFINE EDK2_SKIP_PEICORE=0
> > > +  DEFINE INCLUDE_TFTP_COMMAND= TRUE
> > >DEFINE NETWORK_IP6_ENABLE  = FALSE
> > >DEFINE HTTP_BOOT_ENABLE= FALSE
> > >
> > > --
> > > 2.7.4
> > >
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Re: [edk2] [Patch] BaseTools: Fix bug for --pcd VOID* type when no max size is specified

2018-03-20 Thread Gao, Liming 
Reviewed-by: Liming Gao 

> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of 
> Yonghong Zhu
> Sent: Tuesday, March 20, 2018 4:23 PM
> To: edk2-devel@lists.01.org
> Subject: [edk2] [Patch] BaseTools: Fix bug for --pcd VOID* type when no max 
> size is specified
> 
> when VOID* type non-structure pcd used in --pcd, and its max size is not
> specified in DSC or its value is hex value, build break due to the code
> int(Pcd.MaxDatumSize,10).
> Now this patch remove this code, because tool will calculate the size
> info in later phase.
> 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Yonghong Zhu 
> ---
>  BaseTools/Source/Python/Workspace/DscBuildData.py | 13 -
>  1 file changed, 13 deletions(-)
> 
> diff --git a/BaseTools/Source/Python/Workspace/DscBuildData.py 
> b/BaseTools/Source/Python/Workspace/DscBuildData.py
> index 517385a..6e30b50 100644
> --- a/BaseTools/Source/Python/Workspace/DscBuildData.py
> +++ b/BaseTools/Source/Python/Workspace/DscBuildData.py
> @@ -1252,23 +1252,10 @@ class DscBuildData(PlatformBuildClassObject):
>  SkuInfo.DefaultValue = 
> NoFiledValues[(Pcd.TokenSpaceGuidCName,Pcd.TokenCName)][0]
>  else:
>  SkuInfo.HiiDefaultValue = 
> NoFiledValues[(Pcd.TokenSpaceGuidCName,Pcd.TokenCName)][0]
>  for defaultstore in SkuInfo.DefaultStoreDict:
>  SkuInfo.DefaultStoreDict[defaultstore] =
> NoFiledValues[(Pcd.TokenSpaceGuidCName,Pcd.TokenCName)][0]
> -if Pcd.DatumType == "VOID*":
> -if Pcd.MaxDatumSize is None:
> -Pcd.MaxDatumSize = '0'
> -MaxSize = int(Pcd.MaxDatumSize,10)
> -if Pcd.DefaultValue.startswith("{") and 
> Pcd.DefaultValue.endswith("}"):
> -MaxSize = 
> max([len(Pcd.DefaultValue.split(",")),MaxSize])
> -elif Pcd.DefaultValue.startswith("\"") or 
> Pcd.DefaultValue.startswith("\'"):
> -MaxSize = 
> max([len(Pcd.DefaultValue)-2+1,MaxSize])
> -elif Pcd.DefaultValue.startswith("L\""):
> -MaxSize = 
> max([2*(len(Pcd.DefaultValue)-3+1),MaxSize])
> -else:
> -MaxSize = max([len(Pcd.DefaultValue),MaxSize])
> -Pcd.MaxDatumSize = str(MaxSize)
>  else:
>  PcdInDec = self.DecPcds.get((Name,Guid))
>  if PcdInDec:
>  PcdInDec.PcdValueFromComm = NoFiledValues[(Guid,Name)][0]
>  if PcdInDec.Type in 
> [self._PCD_TYPE_STRING_[MODEL_PCD_FIXED_AT_BUILD],
> --
> 2.6.1.windows.1
> 
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Re: [edk2] [Patch] BaseTools: Add Feature Flag Pcd Type into Override list

2018-03-20 Thread Gao, Liming 
Reviewed-by: Liming Gao 

> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of 
> Yonghong Zhu
> Sent: Tuesday, March 20, 2018 4:23 PM
> To: edk2-devel@lists.01.org
> Subject: [edk2] [Patch] BaseTools: Add Feature Flag Pcd Type into Override 
> list
> 
> when only define the PCD in the DEC file, and use --pcd feature,
> we also need cover this case for Feature Flag Type.
> 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Yonghong Zhu 
> ---
>  BaseTools/Source/Python/Workspace/DscBuildData.py | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/BaseTools/Source/Python/Workspace/DscBuildData.py 
> b/BaseTools/Source/Python/Workspace/DscBuildData.py
> index 6e30b50..d60d491 100644
> --- a/BaseTools/Source/Python/Workspace/DscBuildData.py
> +++ b/BaseTools/Source/Python/Workspace/DscBuildData.py
> @@ -1257,11 +1257,12 @@ class DscBuildData(PlatformBuildClassObject):
>  else:
>  PcdInDec = self.DecPcds.get((Name,Guid))
>  if PcdInDec:
>  PcdInDec.PcdValueFromComm = NoFiledValues[(Guid,Name)][0]
>  if PcdInDec.Type in 
> [self._PCD_TYPE_STRING_[MODEL_PCD_FIXED_AT_BUILD],
> -
> self._PCD_TYPE_STRING_[MODEL_PCD_PATCHABLE_IN_MODULE]]:
> +
> self._PCD_TYPE_STRING_[MODEL_PCD_PATCHABLE_IN_MODULE],
> +
> self._PCD_TYPE_STRING_[MODEL_PCD_FEATURE_FLAG]]:
>  self.Pcds[Name, Guid] = copy.deepcopy(PcdInDec)
>  self.Pcds[Name, Guid].DefaultValue = NoFiledValues[( 
> Guid,Name)][0]
>  return AllPcds
>  def UpdateStructuredPcds(self, TypeList, AllPcds):
> 
> --
> 2.6.1.windows.1
> 
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[edk2] [Patch] Build spec: update description for build handles PCDs for SKU support

2018-03-20 Thread Yonghong Zhu 
Cc: Liming Gao 
Cc: Michael Kinney 
Cc: Kevin W Shaw 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yonghong Zhu 
---
 2_design_discussion/27_sku_support.md | 132 +-
 1 file changed, 114 insertions(+), 18 deletions(-)

diff --git a/2_design_discussion/27_sku_support.md 
b/2_design_discussion/27_sku_support.md
index 18d40b7..fb153a8 100644
--- a/2_design_discussion/27_sku_support.md
+++ b/2_design_discussion/27_sku_support.md
@@ -1,9 +1,9 @@

[edk2] [Patch] SecurityPkg Tpm2CommandLib: Fix TPM2.0 response memory overflow

2018-03-20 Thread Zhang, Chao B 
TPM2.0 command lib always assumes TPM device and transmission channel can
respond correctly. But it is not true when communication channel is exploited
and wrong data is spoofed. Add more logic to prohibit memory overflow attack.

Cc: Long Qin 
Cc: Yao Jiewen 
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chao Zhang 
Signed-off-by: Zhang, Chao B 
---
 .../Library/Tpm2CommandLib/Tpm2Capability.c| 21 ++-
 .../Tpm2CommandLib/Tpm2EnhancedAuthorization.c | 16 ++-
 SecurityPkg/Library/Tpm2CommandLib/Tpm2Integrity.c | 19 ++---
 SecurityPkg/Library/Tpm2CommandLib/Tpm2NVStorage.c | 14 --
 SecurityPkg/Library/Tpm2CommandLib/Tpm2Object.c| 31 +-
 SecurityPkg/Library/Tpm2CommandLib/Tpm2Sequences.c | 10 ++-
 SecurityPkg/Library/Tpm2CommandLib/Tpm2Session.c   |  6 -
 7 files changed, 107 insertions(+), 10 deletions(-)

diff --git a/SecurityPkg/Library/Tpm2CommandLib/Tpm2Capability.c 
b/SecurityPkg/Library/Tpm2CommandLib/Tpm2Capability.c
index 79e80fb7a9..42afe107a6 100644
--- a/SecurityPkg/Library/Tpm2CommandLib/Tpm2Capability.c
+++ b/SecurityPkg/Library/Tpm2CommandLib/Tpm2Capability.c
@@ -1,9 +1,9 @@
 /** @file
   Implement TPM2 Capability related command.
 
-Copyright (c) 2013 - 2016, Intel Corporation. All rights reserved. 
+Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved. 
 This program and the accompanying materials
 are licensed and made available under the terms and conditions of the BSD 
License
 which accompanies this distribution.  The full text of the license may be 
found at
 http://opensource.org/licenses/bsd-license.php
 
@@ -110,10 +110,18 @@ Tpm2GetCapability (
 
   if (RecvBufferSize <= sizeof (TPM2_RESPONSE_HEADER) + sizeof (UINT8)) {
 return EFI_DEVICE_ERROR;
   }
 
+  //
+  // Fail if command failed
+  //
+  if (SwapBytes32(RecvBuffer.Header.responseCode) != TPM_RC_SUCCESS) {
+DEBUG ((EFI_D_ERROR, "Tpm2GetCapability: Response Code error! 0x%08x\r\n", 
SwapBytes32(RecvBuffer.Header.responseCode)));
+return EFI_DEVICE_ERROR;
+  }
+
   //
   // Return the response
   //
   *MoreData = RecvBuffer.MoreData;
   //
@@ -327,10 +335,14 @@ Tpm2GetCapabilitySupportedAlg (
   }
   
   CopyMem (AlgList, , sizeof (TPML_ALG_PROPERTY));
 
   AlgList->count = SwapBytes32 (AlgList->count);
+  if (AlgList->count > MAX_CAP_ALGS) {
+return EFI_DEVICE_ERROR; 
+  }
+
   for (Index = 0; Index < AlgList->count; Index++) {
 AlgList->algProperties[Index].alg = SwapBytes16 
(AlgList->algProperties[Index].alg);
 WriteUnaligned32 ((UINT32 *)>algProperties[Index].algProperties, 
SwapBytes32 (ReadUnaligned32 ((UINT32 
*)>algProperties[Index].algProperties)));
   }
 
@@ -474,13 +486,20 @@ Tpm2GetCapabilityPcrs (
   if (EFI_ERROR (Status)) {
 return Status;
   }
 
   Pcrs->count = SwapBytes32 (TpmCap.data.assignedPCR.count);
+  if (Pcrs->count > HASH_COUNT) {
+return EFI_DEVICE_ERROR;
+  }
+
   for (Index = 0; Index < Pcrs->count; Index++) {
 Pcrs->pcrSelections[Index].hash = SwapBytes16 
(TpmCap.data.assignedPCR.pcrSelections[Index].hash);
 Pcrs->pcrSelections[Index].sizeofSelect = 
TpmCap.data.assignedPCR.pcrSelections[Index].sizeofSelect;
+if (Pcrs->pcrSelections[Index].sizeofSelect > PCR_SELECT_MAX) {
+  return EFI_DEVICE_ERROR;
+}
 CopyMem (Pcrs->pcrSelections[Index].pcrSelect, 
TpmCap.data.assignedPCR.pcrSelections[Index].pcrSelect, 
Pcrs->pcrSelections[Index].sizeofSelect);
   }
 
   return EFI_SUCCESS;
 }
diff --git a/SecurityPkg/Library/Tpm2CommandLib/Tpm2EnhancedAuthorization.c 
b/SecurityPkg/Library/Tpm2CommandLib/Tpm2EnhancedAuthorization.c
index 6f6b3693f8..3e42875b83 100644
--- a/SecurityPkg/Library/Tpm2CommandLib/Tpm2EnhancedAuthorization.c
+++ b/SecurityPkg/Library/Tpm2CommandLib/Tpm2EnhancedAuthorization.c
@@ -1,9 +1,9 @@
 /** @file
   Implement TPM2 EnhancedAuthorization related command.
 
-Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved. 
+Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved. 
 This program and the accompanying materials
 are licensed and made available under the terms and conditions of the BSD 
License
 which accompanies this distribution.  The full text of the license may be 
found at
 http://opensource.org/licenses/bsd-license.php
 
@@ -178,19 +178,29 @@ Tpm2PolicySecret (
   //
   // Return the response
   //
   Buffer = (UINT8 *)
   Timeout->size = SwapBytes16(ReadUnaligned16 ((UINT16 *)Buffer));
+  if (Timeout->size > sizeof(UINT64)) {
+Status = EFI_DEVICE_ERROR;
+goto Done;
+  }
+
   Buffer += sizeof(UINT16);
   CopyMem (Timeout->buffer, Buffer, Timeout->size);
 
   PolicyTicket->tag = SwapBytes16(ReadUnaligned16 ((UINT16 *)Buffer));
   Buffer += sizeof(UINT16);
   PolicyTicket->hierarchy = SwapBytes32(ReadUnaligned32 ((UINT32 *)Buffer));
   Buffer += sizeof(UINT32);

Re: [edk2] [Patch 2/3] DscSpecification: Add DefaultStores section to describe the default setting

2018-03-20 Thread Zhu, Yonghong 
Reviewed-by: Yonghong Zhu  

Best Regards,
Zhu Yonghong


-Original Message-
From: Gao, Liming 
Sent: Friday, March 16, 2018 12:42 PM
To: edk2-devel@lists.01.org
Cc: Kinney, Michael D ; Zhu, Yonghong 

Subject: [Patch 2/3] DscSpecification: Add DefaultStores section to describe 
the default setting

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao 
Cc: Michael Kinney 
Cc: Yonghong Zhu 
---
 .../213_[defaultstores]_section_processing.md  | 49 
 3_edk_ii_dsc_file_format/310_pcd_sections.md   | 86 --
 .../313_[defaultstores]_section.md | 60 +++
 3 files changed, 190 insertions(+), 5 deletions(-)  create mode 100644 
2_dsc_overview/213_[defaultstores]_section_processing.md
 create mode 100644 3_edk_ii_dsc_file_format/313_[defaultstores]_section.md

diff --git a/2_dsc_overview/213_[defaultstores]_section_processing.md 
b/2_dsc_overview/213_[defaultstores]_section_processing.md
new file mode 100644
index 000..88a7ad2
--- /dev/null
+++ b/2_dsc_overview/213_[defaultstores]_section_processing.md
@@ -0,0 +1,49 @@
+
+
+## 2.13 [DefaultStores] Section Processing
+
+The contents of this section are used to define DefaultStores names. 
+Default store is UEFI HII concept. It is used to define HII default 
+setting for the different store, such as standard default, 
+manufacturing default. Platform can define the supported default store 
+for DynamicHii/DynamicExHii PCD in this section, tag name to be used. 
+This section is optional. By default, standard default will be used. Each 
entry below the section header is of the form:
+
+`Number | word`
+
+The following is an example of a `[DefaultStores]` section:
+
+```
+[DefaultStores]
+  0 | Standard# UEFI Standard default
+  1 | Manufacturing   # UEFI Manufacturing default
+```
diff --git a/3_edk_ii_dsc_file_format/310_pcd_sections.md 
b/3_edk_ii_dsc_file_format/310_pcd_sections.md
index 18a243d..f79a0fd 100644
--- a/3_edk_ii_dsc_file_format/310_pcd_sections.md
+++ b/3_edk_ii_dsc_file_format/310_pcd_sections.md
@@ -1,7 +1,7 @@
 
+
+## 3.13 [DefaultStores] Section
+
+The `[DefaultStores]` section is optional in all EDK II DSC files.
+
+ Summary
+
+Entries may appear in any order. This section lists numeric mappings to 
+the Default Store User Interface Name, only valid values from this list 
+can be specified in the PcdsDynamicHii/PcdsDynamicExHii section.
+
+If this section is not specified, the parsing tools will assume 
+standard default be applied in PcdsDynamicHii/PcdsDynamicExHii section.
+
+ Prototype
+
+```c
+ ::= "[DefaultStores]" 
+{*}
+ ::= 
+::= 
+```
+
+ Example
+
+```ini
+[DefaultStores]
+  0 | Standard# UEFI Standard default
+  1 | Manufacturing   # UEFI Manufacturing default
+```
--
2.8.0.windows.1

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Re: [edk2] [Patch 1/3] DSCSpecification: Add syntax to support SKU ID inherit from another SKU ID

2018-03-20 Thread Zhu, Yonghong 
Reviewed-by: Yonghong Zhu  

Best Regards,
Zhu Yonghong


-Original Message-
From: Gao, Liming 
Sent: Friday, March 16, 2018 12:42 PM
To: edk2-devel@lists.01.org
Cc: Kinney, Michael D ; Zhu, Yonghong 

Subject: [Patch 1/3] DSCSpecification: Add syntax to support SKU ID inherit 
from another SKU ID

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao 
Cc: Michael Kinney 
Cc: Yonghong Zhu 
---
 2_dsc_overview/25_[skuids]_section_processing.md | 11 +++  
3_edk_ii_dsc_file_format/37_[skuids]_section.md  | 10 ++
 2 files changed, 13 insertions(+), 8 deletions(-)

diff --git a/2_dsc_overview/25_[skuids]_section_processing.md 
b/2_dsc_overview/25_[skuids]_section_processing.md
index afd102e..70b98b1 100644
--- a/2_dsc_overview/25_[skuids]_section_processing.md
+++ b/2_dsc_overview/25_[skuids]_section_processing.md
@@ -34,16 +34,19 @@
 The contents of this section are used to define valid `SKUID_IDENTIFIER` names.
 Since a platform may support different SKUs, and different SKUs may implement  
different methods for handing platform configuration data (PCD) the user can 
-define, in this section, tag names to use. Use `0` for the `DEFAULT` SKU 
-identifier. Each entry below the section header is of the form:
+define, in this section, tag names to use. One SKU may override some 
+settings in another SKU setting, and inherit other setting from it. If 
+not specified, SKU will inherit DEFAULT SKU setting. Use `0` for the `DEFAULT` 
SKU identifier.
+Each entry below the section header is of the form:
 
-`Number | word`
+`Number | word [|word]`
 
 The following is an example of a `[SkuIds]` section:
 
 ```
 [SkuIds]
+  0|DEFAULT
   1|Sku_Two
   22|Sku1
-  5|SkuSeven
+  5|SkuSeven | Sku1  #SkuSeven inherits Sku1 setting.
 ```
diff --git a/3_edk_ii_dsc_file_format/37_[skuids]_section.md 
b/3_edk_ii_dsc_file_format/37_[skuids]_section.md
index 756ded2..8e70b33 100644
--- a/3_edk_ii_dsc_file_format/37_[skuids]_section.md
+++ b/3_edk_ii_dsc_file_format/37_[skuids]_section.md
@@ -37,8 +37,9 @@ The `[SkuIds]` section is optional in all EDK II DSC files.
 
 Entries may appear in any order. This section lists numeric mappings to the 
SKU  ID User Interface Name, only valid values from this list can be specified 
in -the defines section. Use of the `!include` statement is supported; it is 
-recommended that a ".txt" extension be used.
+the defines section. If one SKU inherits from none DEFAULT SKU, it can 
+specify its parent SKU User Name after its definition. Use of the 
+`!include` statement is supported; it is recommended that a ".txt" extension 
be used.
 
 If this section is not specified, the parsing tools will assume a SkuId of 0,  
with a `UiName` of "DEFAULT". The default entry must not be re-defined.
@@ -51,7 +52,7 @@ The `!include` file can only contain an ASCII (not Unicode) 
list of  ```c
  ::= "[SkuIds]" 
 {*} {} - ::=  
   
+ ::= [ ] 
 ::= 
 ```
 
@@ -60,5 +61,6 @@ The `!include` file can only contain an ASCII (not Unicode) 
list of  ```ini  [SkuIds]
   0|DEFAULT # The entry: 0|DEFAULT is reserved and always required.
-  1|SkuTwo
+  1|SkuOne
+  2|SkuTwo|SkuOne # SkuTwo setting inherits from SkuOne
 ```
--
2.8.0.windows.1

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Re: [edk2] [Patch] BuildSpecification: Clarify structure PCD field value assignment precedence

2018-03-20 Thread Zhu, Yonghong 
Reviewed-by: Yonghong Zhu  

Best Regards,
Zhu Yonghong


-Original Message-
From: Gao, Liming 
Sent: Friday, March 16, 2018 12:43 PM
To: edk2-devel@lists.01.org
Cc: Kinney, Michael D ; Zhu, Yonghong 

Subject: [Patch] BuildSpecification: Clarify structure PCD field value 
assignment precedence

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao 
Cc: Michael Kinney 
Cc: Yonghong Zhu 
---
 8_pre-build_autogen_stage/82_auto-generation_process.md | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/8_pre-build_autogen_stage/82_auto-generation_process.md 
b/8_pre-build_autogen_stage/82_auto-generation_process.md
index efdb53b..b4b59db 100644
--- a/8_pre-build_autogen_stage/82_auto-generation_process.md
+++ b/8_pre-build_autogen_stage/82_auto-generation_process.md
@@ -1,7 +1,7 @@

Re: [edk2] [Patch 3/3] DscSpecification: Add structure PCD field value assignment syntax

2018-03-20 Thread Zhu, Yonghong 
Reviewed-by: Yonghong Zhu  

Best Regards,
Zhu Yonghong


-Original Message-
From: Gao, Liming 
Sent: Friday, March 16, 2018 12:42 PM
To: edk2-devel@lists.01.org
Cc: Kinney, Michael D ; Zhu, Yonghong 

Subject: [Patch 3/3] DscSpecification: Add structure PCD field value assignment 
syntax

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao 
Cc: Michael Kinney 
Cc: Yonghong Zhu 
---
 2_dsc_overview/28_pcd_section_processing.md   | 10 ++
 3_edk_ii_dsc_file_format/310_pcd_sections.md  | 19 +++
 .../33_platform_dsc_definition.md |  6 +-
 3 files changed, 22 insertions(+), 13 deletions(-)

diff --git a/2_dsc_overview/28_pcd_section_processing.md 
b/2_dsc_overview/28_pcd_section_processing.md
index 1adde81..4c5d952 100644
--- a/2_dsc_overview/28_pcd_section_processing.md
+++ b/2_dsc_overview/28_pcd_section_processing.md
@@ -1,7 +1,7 @@

Re: [edk2] [PATCH v1 0/5] BaseTools: improve reuse and remove dead code

2018-03-20 Thread Zhu, Yonghong 
Reviewed-by: Yonghong Zhu 
I will push this series patch.

Best Regards,
Zhu Yonghong


-Original Message-
From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Jaben 
Carsey
Sent: Friday, March 16, 2018 5:39 AM
To: edk2-devel@lists.01.org
Subject: [edk2] [PATCH v1 0/5] BaseTools: improve reuse and remove dead code

remove class and function definitions that are never used re-use existing 
regular expressions instead of compiling use string format instead of eval()

Jaben Carsey (5):
  BaseTools: StrGather has redundant declaration
  BaseTools: StrGather simplify string/int conversion functions
  BaseTools: StrGather remove functions no one calls
  BaseTools: FdfParser & FdfParserLite refactor regular expression for
GUIDs
  BaseTools: FdfParser remove class never used.

 BaseTools/Source/Python/AutoGen/StrGather.py| 57 +++-
 BaseTools/Source/Python/Common/FdfParserLite.py |  4 +-
 BaseTools/Source/Python/GenFds/FdfParser.py | 19 +--
 3 files changed, 10 insertions(+), 70 deletions(-)

--
2.16.2.windows.1

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Re: [edk2] [PATCH v1 0/2] BaseTools: AutoGen code style compliance

2018-03-20 Thread Zhu, Yonghong 
Reviewed-by: Yonghong Zhu  
I will push this patch.

Best Regards,
Zhu Yonghong

-Original Message-
From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Jaben 
Carsey
Sent: Thursday, March 15, 2018 8:20 AM
To: edk2-devel@lists.01.org
Subject: [edk2] [PATCH v1 0/2] BaseTools: AutoGen code style compliance

update the object factory and child classes to use standard functions update 
the file to use is None instead of == None

Jaben Carsey (2):
  BaseTools: Autogen - modify to use standard parent/child class
relationships
  BaseTools: AutoGen should use is None not == None

 BaseTools/Source/Python/AutoGen/AutoGen.py | 231 +++-
 1 file changed, 123 insertions(+), 108 deletions(-)

--
2.16.2.windows.1

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[edk2] [Patch] BaseTools: Fix bug for --pcd VOID* type when no max size is specified

2018-03-20 Thread Yonghong Zhu 
when VOID* type non-structure pcd used in --pcd, and its max size is not
specified in DSC or its value is hex value, build break due to the code
int(Pcd.MaxDatumSize,10).
Now this patch remove this code, because tool will calculate the size
info in later phase.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yonghong Zhu 
---
 BaseTools/Source/Python/Workspace/DscBuildData.py | 13 -
 1 file changed, 13 deletions(-)

diff --git a/BaseTools/Source/Python/Workspace/DscBuildData.py 
b/BaseTools/Source/Python/Workspace/DscBuildData.py
index 517385a..6e30b50 100644
--- a/BaseTools/Source/Python/Workspace/DscBuildData.py
+++ b/BaseTools/Source/Python/Workspace/DscBuildData.py
@@ -1252,23 +1252,10 @@ class DscBuildData(PlatformBuildClassObject):
 SkuInfo.DefaultValue = 
NoFiledValues[(Pcd.TokenSpaceGuidCName,Pcd.TokenCName)][0]
 else:
 SkuInfo.HiiDefaultValue = 
NoFiledValues[(Pcd.TokenSpaceGuidCName,Pcd.TokenCName)][0]
 for defaultstore in SkuInfo.DefaultStoreDict:
 SkuInfo.DefaultStoreDict[defaultstore] = 
NoFiledValues[(Pcd.TokenSpaceGuidCName,Pcd.TokenCName)][0]
-if Pcd.DatumType == "VOID*":
-if Pcd.MaxDatumSize is None:
-Pcd.MaxDatumSize = '0'
-MaxSize = int(Pcd.MaxDatumSize,10)
-if Pcd.DefaultValue.startswith("{") and 
Pcd.DefaultValue.endswith("}"):
-MaxSize = 
max([len(Pcd.DefaultValue.split(",")),MaxSize])
-elif Pcd.DefaultValue.startswith("\"") or 
Pcd.DefaultValue.startswith("\'"):
-MaxSize = max([len(Pcd.DefaultValue)-2+1,MaxSize])
-elif Pcd.DefaultValue.startswith("L\""):
-MaxSize = 
max([2*(len(Pcd.DefaultValue)-3+1),MaxSize])
-else:
-MaxSize = max([len(Pcd.DefaultValue),MaxSize])
-Pcd.MaxDatumSize = str(MaxSize)
 else:
 PcdInDec = self.DecPcds.get((Name,Guid))
 if PcdInDec:
 PcdInDec.PcdValueFromComm = NoFiledValues[(Guid,Name)][0]
 if PcdInDec.Type in 
[self._PCD_TYPE_STRING_[MODEL_PCD_FIXED_AT_BUILD],
-- 
2.6.1.windows.1

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[edk2] [Patch] BaseTools: Add Feature Flag Pcd Type into Override list

2018-03-20 Thread Yonghong Zhu 
when only define the PCD in the DEC file, and use --pcd feature,
we also need cover this case for Feature Flag Type.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yonghong Zhu 
---
 BaseTools/Source/Python/Workspace/DscBuildData.py | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/BaseTools/Source/Python/Workspace/DscBuildData.py 
b/BaseTools/Source/Python/Workspace/DscBuildData.py
index 6e30b50..d60d491 100644
--- a/BaseTools/Source/Python/Workspace/DscBuildData.py
+++ b/BaseTools/Source/Python/Workspace/DscBuildData.py
@@ -1257,11 +1257,12 @@ class DscBuildData(PlatformBuildClassObject):
 else:
 PcdInDec = self.DecPcds.get((Name,Guid))
 if PcdInDec:
 PcdInDec.PcdValueFromComm = NoFiledValues[(Guid,Name)][0]
 if PcdInDec.Type in 
[self._PCD_TYPE_STRING_[MODEL_PCD_FIXED_AT_BUILD],
-
self._PCD_TYPE_STRING_[MODEL_PCD_PATCHABLE_IN_MODULE]]:
+
self._PCD_TYPE_STRING_[MODEL_PCD_PATCHABLE_IN_MODULE],
+
self._PCD_TYPE_STRING_[MODEL_PCD_FEATURE_FLAG]]:
 self.Pcds[Name, Guid] = copy.deepcopy(PcdInDec)
 self.Pcds[Name, Guid].DefaultValue = NoFiledValues[( 
Guid,Name)][0]
 return AllPcds
 def UpdateStructuredPcds(self, TypeList, AllPcds):
 
-- 
2.6.1.windows.1

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Re: [edk2] [PATCH 2/2] Hisilicon/D0x: Enable tftp command by default

2018-03-20 Thread Guo Heyi 
Ping :)


On Wed, Mar 07, 2018 at 04:02:30PM +, Ard Biesheuvel wrote:
> On 7 March 2018 at 03:03, Heyi Guo  wrote:
> > Since D0x platforms always have network enabled, we would like to
> > enable tftp command by default so that we can download something in
> > EFI Shell.
> >
> > Contributed-under: TianoCore Contribution Agreement 1.1
> > Signed-off-by: Heyi Guo 
> > Cc: Ard Biesheuvel 
> > Cc: Leif Lindholm 
> 
> The first patch looks fine to me, but I would like to give Leif a
> chance to comment on the policy side of this patch.
> 
> Please ping us by the end of next week if we haven't responded by then.
> 
> > ---
> >  Platform/Hisilicon/D03/D03.dsc | 2 ++
> >  Platform/Hisilicon/D05/D05.dsc | 1 +
> >  2 files changed, 3 insertions(+)
> >
> > diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
> > index cb0669d639d1..fce1e60b1275 100644
> > --- a/Platform/Hisilicon/D03/D03.dsc
> > +++ b/Platform/Hisilicon/D03/D03.dsc
> > @@ -29,6 +29,8 @@ [Defines]
> >SKUID_IDENTIFIER   = DEFAULT
> >FLASH_DEFINITION   = 
> > Platform/Hisilicon/$(PLATFORM_NAME)/$(PLATFORM_NAME).fdf
> >
> > +  DEFINE INCLUDE_TFTP_COMMAND= TRUE
> > +
> >  !include Silicon/Hisilicon/Hisilicon.dsc.inc
> >
> >  [LibraryClasses.common]
> > diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
> > index 8373a821a496..f007f3d2d7e8 100644
> > --- a/Platform/Hisilicon/D05/D05.dsc
> > +++ b/Platform/Hisilicon/D05/D05.dsc
> > @@ -29,6 +29,7 @@ [Defines]
> >SKUID_IDENTIFIER   = DEFAULT
> >FLASH_DEFINITION   = 
> > Platform/Hisilicon/$(PLATFORM_NAME)/$(PLATFORM_NAME).fdf
> >DEFINE EDK2_SKIP_PEICORE=0
> > +  DEFINE INCLUDE_TFTP_COMMAND= TRUE
> >DEFINE NETWORK_IP6_ENABLE  = FALSE
> >DEFINE HTTP_BOOT_ENABLE= FALSE
> >
> > --
> > 2.7.4
> >
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Re: [edk2] [Patch] Build spec: Add DSC DEFAULT as optional line in Global PCD Section

2018-03-20 Thread Gao, Liming 
Reviewed-by: Liming Gao 

> -Original Message-
> From: Zhu, Yonghong
> Sent: Monday, March 19, 2018 9:49 AM
> To: edk2-devel@lists.01.org
> Cc: Gao, Liming ; Kinney, Michael D 
> ; Shaw, Kevin W 
> Subject: [Patch] Build spec: Add DSC DEFAULT as optional line in Global PCD 
> Section
> 
> Because of the PCD value may override by build option, so current build
> report also display the DSC DEFAULT value.
> 
> Cc: Liming Gao 
> Cc: Michael Kinney 
> Cc: Kevin W Shaw 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Yonghong Zhu 
> ---
>  13_build_reports/136_global_pcd_section.md | 7 ++-
>  1 file changed, 6 insertions(+), 1 deletion(-)
> 
> diff --git a/13_build_reports/136_global_pcd_section.md 
> b/13_build_reports/136_global_pcd_section.md
> index c300920..a9661b6 100644
> --- a/13_build_reports/136_global_pcd_section.md
> +++ b/13_build_reports/136_global_pcd_section.md
> @@ -106,11 +106,16 @@ gTokenSpaceGuid
>0x0001FFF
>  ```
> 
>   13.6.2.2 Default (optional) line
> 
> -The second optional line is present if the value from the DEC was overridden.
> +The second optional line is present if the value from the DSC was overridden
> +by build option. It is formatted as follows:
> +
> +`DSC DEFAULT = `
> +
> +The third optional line is present if the value from the DEC was overridden.
>  It is formatted as follows:
> 
>  `DEC DEFAULT = `
> 
>   Example
> --
> 2.6.1.windows.1

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Re: [edk2] [Patch 2/3] NetworkPkg/TlsDxe: Handle the multiple TLS record messages encryption/decryption.

2018-03-20 Thread Karunakar P 
Reviewed-by: Karunakar p 


-Original Message-
From: Jiaxin Wu [mailto:jiaxin...@intel.com] 
Sent: Tuesday, March 20, 2018 6:07 AM
To: edk2-devel@lists.01.org
Cc: Karunakar P; Fu Siyuan; Ye Ting
Subject: [Patch 2/3] NetworkPkg/TlsDxe: Handle the multiple TLS record messages 
encryption/decryption.

Cc: Karunakar P 
Cc: Fu Siyuan 
Cc: Ye Ting 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiaxin Wu 
---
 NetworkPkg/TlsDxe/TlsImpl.c | 74 +++--
 NetworkPkg/TlsDxe/TlsImpl.h |  6 +---
 2 files changed, 52 insertions(+), 28 deletions(-)

diff --git a/NetworkPkg/TlsDxe/TlsImpl.c b/NetworkPkg/TlsDxe/TlsImpl.c index 
8e1238216b..a026075f36 100644
--- a/NetworkPkg/TlsDxe/TlsImpl.c
+++ b/NetworkPkg/TlsDxe/TlsImpl.c
@@ -1,9 +1,9 @@
 /** @file
   The Miscellaneous Routines for TlsDxe driver.
 
-Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.
+Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.
 
 This program and the accompanying materials  are licensed and made available 
under the terms and conditions of the BSD License  which accompanies this 
distribution.  The full text of the license may be found at  
http://opensource.org/licenses/bsd-license.php
@@ -48,10 +48,11 @@ TlsEncryptPacket (
   UINT16  ThisPlainMessageSize;
   TLS_RECORD_HEADER   *TempRecordHeader;
   UINT16  ThisMessageSize;
   UINT32  BufferOutSize;
   UINT8   *BufferOut;
+  UINT32  RecordCount;
   INTNRet;
 
   Status   = EFI_SUCCESS;
   BytesCopied  = 0;
   BufferInSize = 0;
@@ -59,10 +60,11 @@ TlsEncryptPacket (
   BufferInPtr  = NULL;
   RecordHeaderIn   = NULL;
   TempRecordHeader = NULL;
   BufferOutSize= 0;
   BufferOut= NULL;
+  RecordCount  = 0;
   Ret  = 0;
 
   //
   // Calculate the size according to the fragment table.
   //
@@ -89,34 +91,46 @@ TlsEncryptPacket (
   (*FragmentTable)[Index].FragmentLength
   );
 BytesCopied += (*FragmentTable)[Index].FragmentLength;
   }
 
-  BufferOut = AllocateZeroPool (MAX_BUFFER_SIZE);
+  //
+  // Count TLS record number.
+  //
+  BufferInPtr = BufferIn;
+  while ((UINTN) BufferInPtr < (UINTN) BufferIn + BufferInSize) {
+RecordHeaderIn = (TLS_RECORD_HEADER *) BufferInPtr;
+if (RecordHeaderIn->ContentType != TlsContentTypeApplicationData || 
RecordHeaderIn->Length > TLS_PLAINTEXT_RECORD_MAX_PAYLOAD_LENGTH) {
+  Status = EFI_INVALID_PARAMETER;
+  goto ERROR;
+}
+BufferInPtr += TLS_RECORD_HEADER_LENGTH + RecordHeaderIn->Length;
+RecordCount ++;
+  }
+  
+  //
+  // Allocate enough buffer to hold TLS Ciphertext.
+  //
+  BufferOut = AllocateZeroPool (RecordCount * (TLS_RECORD_HEADER_LENGTH 
+ + TLS_CIPHERTEXT_RECORD_MAX_PAYLOAD_LENGTH));
   if (BufferOut == NULL) {
 Status = EFI_OUT_OF_RESOURCES;
 goto ERROR;
   }
 
   //
-  // Parsing buffer.
+  // Parsing buffer. Received packet may have multiple TLS record messages.
   //
   BufferInPtr = BufferIn;
   TempRecordHeader = (TLS_RECORD_HEADER *) BufferOut;
   while ((UINTN) BufferInPtr < (UINTN) BufferIn + BufferInSize) {
 RecordHeaderIn = (TLS_RECORD_HEADER *) BufferInPtr;
 
-if (RecordHeaderIn->ContentType != TlsContentTypeApplicationData) {
-  Status = EFI_INVALID_PARAMETER;
-  goto ERROR;
-}
-
 ThisPlainMessageSize = RecordHeaderIn->Length;
 
 TlsWrite (TlsInstance->TlsConn, (UINT8 *) (RecordHeaderIn + 1), 
ThisPlainMessageSize);
 
-Ret = TlsCtrlTrafficOut (TlsInstance->TlsConn, (UINT8 
*)(TempRecordHeader), MAX_BUFFER_SIZE - BufferOutSize);
+Ret = TlsCtrlTrafficOut (TlsInstance->TlsConn, (UINT8 
+ *)(TempRecordHeader), TLS_RECORD_HEADER_LENGTH + 
+ TLS_CIPHERTEXT_RECORD_MAX_PAYLOAD_LENGTH);
 
 if (Ret > 0) {
   ThisMessageSize = (UINT16) Ret;
 } else {
   //
@@ -127,11 +141,11 @@ TlsEncryptPacket (
   ThisMessageSize = 0;
 }
 
 BufferOutSize += ThisMessageSize;
 
-BufferInPtr += RECORD_HEADER_LEN + ThisPlainMessageSize;
+BufferInPtr += TLS_RECORD_HEADER_LENGTH + ThisPlainMessageSize;
 TempRecordHeader += ThisMessageSize;
   }
 
   FreePool (BufferIn);
   BufferIn = NULL;
@@ -199,10 +213,11 @@ TlsDecryptPacket (
   UINT16  ThisCipherMessageSize;
   TLS_RECORD_HEADER   *TempRecordHeader;
   UINT16  ThisPlainMessageSize;
   UINT8   *BufferOut;
   UINT32  BufferOutSize;
+  UINT32  RecordCount;
   INTNRet;
 
   Status   = EFI_SUCCESS;
   BytesCopied  = 0;
   BufferIn = NULL;
@@ -210,10 +225,11 @@ TlsDecryptPacket (
   BufferInPtr  = NULL;
   RecordHeaderIn   = NULL;
   TempRecordHeader = NULL;
   BufferOut= NULL;
   BufferOutSize= 0;
+  RecordCount  = 0;
   Ret  = 0;

Re: [edk2] [Patch 1/3] MdePkg/Tls1.h: Add TLS record header length and max payload length.

2018-03-20 Thread Karunakar P 
Reviewed-by: Karunakar p 


-Original Message-
From: Jiaxin Wu [mailto:jiaxin...@intel.com] 
Sent: Tuesday, March 20, 2018 6:07 AM
To: edk2-devel@lists.01.org
Cc: Karunakar P; Fu Siyuan; Ye Ting
Subject: [Patch 1/3] MdePkg/Tls1.h: Add TLS record header length and max 
payload length.

Cc: Karunakar P 
Cc: Fu Siyuan 
Cc: Ye Ting 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiaxin Wu 
---
 MdePkg/Include/IndustryStandard/Tls1.h | 16 +++-
 1 file changed, 15 insertions(+), 1 deletion(-)

diff --git a/MdePkg/Include/IndustryStandard/Tls1.h 
b/MdePkg/Include/IndustryStandard/Tls1.h
index 9009291ee3..cccb6db7fb 100644
--- a/MdePkg/Include/IndustryStandard/Tls1.h
+++ b/MdePkg/Include/IndustryStandard/Tls1.h
@@ -1,11 +1,11 @@
 /** @file
   Transport Layer Security  -- TLS 1.0/1.1/1.2 Standard definitions, from RFC 
2246/4346/5246
 
   This file contains common TLS 1.0/1.1/1.2 definitions from RFC 2246/4346/5246
 
-  Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.
+  Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD 
License
   which accompanies this distribution.  The full text of the license may be 
found at
   http://opensource.org/licenses/bsd-license.php
 
@@ -85,9 +85,23 @@ typedef struct {
   UINT8   ContentType;
   EFI_TLS_VERSION Version;
   UINT16  Length;
 } TLS_RECORD_HEADER;
 
+#define TLS_RECORD_HEADER_LENGTH   5
+
+//
+// The length (in bytes) of the TLSPlaintext records payload MUST NOT exceed 
2^14.
+// Refers to section 6.2 of RFC5246. 
+//
+#define TLS_PLAINTEXT_RECORD_MAX_PAYLOAD_LENGTH   16384
+
+//
+// The length (in bytes) of the TLSCiphertext records payload MUST NOT exceed 
2^14 + 2048.
+// Refers to section 6.2 of RFC5246. 
+//
+#define TLS_CIPHERTEXT_RECORD_MAX_PAYLOAD_LENGTH   18432
+
 #pragma pack()
 
 #endif
 
-- 
2.16.2.windows.1

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Re: [edk2] [Patch 3/3] NetworkPkg/HttpDxe: Handle the large data request via HTTPS channel.

2018-03-20 Thread Karunakar P 
Reviewed-by: Karunakar p 


-Original Message-
From: Jiaxin Wu [mailto:jiaxin...@intel.com] 
Sent: Tuesday, March 20, 2018 6:07 AM
To: edk2-devel@lists.01.org
Cc: Karunakar P; Fu Siyuan; Ye Ting
Subject: [Patch 3/3] NetworkPkg/HttpDxe: Handle the large data request via 
HTTPS channel.

Cc: Karunakar P 
Cc: Fu Siyuan 
Cc: Ye Ting 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiaxin Wu 
---
 NetworkPkg/HttpDxe/HttpProto.c| 121 +++---
 NetworkPkg/HttpDxe/HttpsSupport.c |  17 +-  
NetworkPkg/HttpDxe/HttpsSupport.h |  12 +++-
 3 files changed, 111 insertions(+), 39 deletions(-)

diff --git a/NetworkPkg/HttpDxe/HttpProto.c b/NetworkPkg/HttpDxe/HttpProto.c 
index d7fe271168..35c4a166c4 100644
--- a/NetworkPkg/HttpDxe/HttpProto.c
+++ b/NetworkPkg/HttpDxe/HttpProto.c
@@ -1,9 +1,9 @@
 /** @file
   Miscellaneous routines for HttpDxe driver.
 
-Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.
+Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.
 (C) Copyright 2016 Hewlett Packard Enterprise Development LP  This program 
and the accompanying materials  are licensed and made available under the terms 
and conditions of the BSD License  which accompanies this distribution.  The 
full text of the license may be found at  
http://opensource.org/licenses/bsd-license.php
@@ -1474,64 +1474,101 @@ HttpTransmitTcp (
   EFI_STATUSStatus;
   EFI_TCP4_IO_TOKEN *Tx4Token;
   EFI_TCP4_PROTOCOL *Tcp4;
   EFI_TCP6_IO_TOKEN *Tx6Token;
   EFI_TCP6_PROTOCOL *Tcp6;
-  UINT8 *Buffer;  
-  UINTN BufferSize;
+  UINT8 *TlsRecord;  
+  UINT16PayloadSize;
   NET_FRAGMENT  TempFragment;
+  NET_FRAGMENT  Fragment;
+  UINTN RecordCount;
+  UINTN RemainingLen;
 
   Status= EFI_SUCCESS;
-  Buffer= NULL;
+  TlsRecord = NULL;
+  PayloadSize   = 0;
   TempFragment.Len  = 0;
   TempFragment.Bulk = NULL;
+  Fragment.Len  = 0;
+  Fragment.Bulk = NULL;
+  RecordCount   = 0;
+  RemainingLen  = 0;
 
   //
   // Need to encrypt data.
   //
   if (HttpInstance->UseHttps) {
 //
-// Build BufferOut data
+// Allocate enough buffer for each TLS plaintext records.
 //
-BufferSize = sizeof (TLS_RECORD_HEADER) + TxStringLen;
-Buffer = AllocateZeroPool (BufferSize);
-if (Buffer == NULL) {
+TlsRecord = AllocateZeroPool (TLS_RECORD_HEADER_LENGTH + 
TLS_PLAINTEXT_RECORD_MAX_PAYLOAD_LENGTH);
+if (TlsRecord == NULL) {
   Status = EFI_OUT_OF_RESOURCES;
   return Status;
 }
-((TLS_RECORD_HEADER *) Buffer)->ContentType = 
TlsContentTypeApplicationData;
-((TLS_RECORD_HEADER *) Buffer)->Version.Major = 
HttpInstance->TlsConfigData.Version.Major;
-((TLS_RECORD_HEADER *) Buffer)->Version.Minor = 
HttpInstance->TlsConfigData.Version.Minor;
-((TLS_RECORD_HEADER *) Buffer)->Length = (UINT16) (TxStringLen);
-CopyMem (Buffer + sizeof (TLS_RECORD_HEADER), TxString, TxStringLen);
-
+
 //
-// Encrypt Packet.
+// Allocate enough buffer for all TLS ciphertext records.
 //
-Status = TlsProcessMessage (
-   HttpInstance, 
-   Buffer, 
-   BufferSize, 
-   EfiTlsEncrypt, 
-   
-   );
-
-FreePool (Buffer);
+RecordCount = TxStringLen / TLS_PLAINTEXT_RECORD_MAX_PAYLOAD_LENGTH + 1;
+Fragment.Bulk = AllocateZeroPool (RecordCount * (TLS_RECORD_HEADER_LENGTH 
+ TLS_CIPHERTEXT_RECORD_MAX_PAYLOAD_LENGTH));
+if (Fragment.Bulk == NULL) {
+  Status = EFI_OUT_OF_RESOURCES;
+  goto ON_ERROR;
+}
 
-if (EFI_ERROR (Status)) {
-  return Status;
+//
+// Encrypt each TLS plaintext records.
+//
+RemainingLen = TxStringLen;
+while (RemainingLen != 0) {
+  PayloadSize = (UINT16) MIN 
+ (TLS_PLAINTEXT_RECORD_MAX_PAYLOAD_LENGTH, RemainingLen);
+  
+  ((TLS_RECORD_HEADER *) TlsRecord)->ContentType = 
TlsContentTypeApplicationData;
+  ((TLS_RECORD_HEADER *) TlsRecord)->Version.Major = 
HttpInstance->TlsConfigData.Version.Major;
+  ((TLS_RECORD_HEADER *) TlsRecord)->Version.Minor = 
HttpInstance->TlsConfigData.Version.Minor;
+  ((TLS_RECORD_HEADER *) TlsRecord)->Length = PayloadSize;
+
+  CopyMem (TlsRecord + TLS_RECORD_HEADER_LENGTH, TxString + 
+ (TxStringLen - RemainingLen), PayloadSize);
+  
+  Status = TlsProcessMessage (
+ HttpInstance, 
+ TlsRecord, 
+ TLS_RECORD_HEADER_LENGTH + PayloadSize, 
+ EfiTlsEncrypt, 
+ 
+