Re: [edk2] [PATCH edk2-platforms v2 0/2] ARM Dynamic Configuration
On Fri, Jun 15, 2018 at 6:10 PM, Leif Lindholm wrote:
> On Fri, Jun 15, 2018 at 05:30:00PM +0530, Chandni Cherukuri wrote:
>> On SGI platforms, the trusted firmware executes prior to the SEC
>> phase. It supplies to the SEC phase, a pointer to a HW CONFIG fdt
>> in the x1 which contains platform specific information such as part
>> number and config number of the SGI platform.
>>
>> The HW CONFIG FDT would look as,
>> /dts-v1/;
>> / {
>> /* compatible string */
>> compatible = "arm,sgi-isys3";
>>
>> /* platform ID node */
>> system-id {
>>platform-id = <0x03000783>;
>> }
>> };
>>
>> In the very first step of the assembly code which executes in SEC phase
>> the fdt pointer is stored in a global variable from the register. A PPI
>> is created during the SEC phase which stores the global variable.
>>
>> During PEI phase, a Platform ID PEIM is installed which accessess the PPI
>> and retrieves the platform information using FDT helper functions and a
>> PlatformId HOB is created and populated with the information.
>>
>> During DXE phase the drivers can access the Platform ID HOB to get the
>> platform information and perform platform specific functions based on the
>> platform.
>
> It's helpful for subsequent revisions to keep a revision history in
> cover letter.
>
> Changes since v1:
> - ...
> - ...
> - ...
>
> Kept around and added to for subsequent revisions.
>
> However, you've addressed all of my comments on v1, so for my part -
> for the series:
> Reviewed-by: Leif Lindholm
>
> But we want to hear back from Ard as well.
>
> /
> Leif
Thanks Leif for reviewing the patches. Have addressed the comments from Ard
and submitted v3 patchset and included "Changes since v1:" in the cover letter.
>
>> Chandni Cherukuri (2):
>> Platform/ARM/Sgi: Install a Platform ID HOB
>> Platform/ARM/Sgi: Pick ACPI tables to install based on platform ID
>>
>> Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c | 33 +-
>> Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf | 2 +
>> Platform/ARM/SgiPkg/Include/Ppi/SgiPlatformId.h | 23
>> Platform/ARM/SgiPkg/Include/SgiPlatform.h | 13 +++
>> Platform/ARM/SgiPkg/Library/PlatformLib/AArch64/Helper.S | 13 ++-
>> Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.c | 10 ++
>> Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf | 3 +
>> Platform/ARM/SgiPkg/Library/SgiPlatformPei/SgiPlatformPei.inf | 40 +++
>> Platform/ARM/SgiPkg/Library/SgiPlatformPei/SgiPlatformPeim.c | 112
>>
>> Platform/ARM/SgiPkg/SgiPlatform.dec | 5 +
>> Platform/ARM/SgiPkg/SgiPlatform.dsc | 1 +
>> Platform/ARM/SgiPkg/SgiPlatform.fdf | 1 +
>> 12 files changed, 247 insertions(+), 9 deletions(-)
>> create mode 100644 Platform/ARM/SgiPkg/Include/Ppi/SgiPlatformId.h
>> create mode 100644
>> Platform/ARM/SgiPkg/Library/SgiPlatformPei/SgiPlatformPei.inf
>> create mode 100644
>> Platform/ARM/SgiPkg/Library/SgiPlatformPei/SgiPlatformPeim.c
>>
>> --
>> 2.7.4
>>
>>
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Re: [edk2] [PATCH edk2-platforms v2 2/2] Platform/ARM/Sgi: Pick ACPI tables to install based on platform ID
On Fri, Jun 15, 2018 at 6:35 PM, Ard Biesheuvel
wrote:
> On 15 June 2018 at 14:00, Chandni Cherukuri wrote:
>> Use the platform ID and config ID values from the platform ID
>> HOB to choose the right set of ACPI tables to be installed.
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Chandni Cherukuri
>> ---
>> Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c | 33
>> +---
>> Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf | 2 ++
>> Platform/ARM/SgiPkg/SgiPlatform.dsc | 1 +
>> Platform/ARM/SgiPkg/SgiPlatform.fdf | 1 +
>> 4 files changed, 32 insertions(+), 5 deletions(-)
>>
>> diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
>> b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
>> index edaae5b..f077a2c 100644
>> --- a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
>> +++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
>> @@ -14,6 +14,8 @@
>>
>> #include
>> #include
>> +#include
>> +#include
>>
>> EFI_STATUS
>> InitVirtioBlockIo (
>> @@ -28,20 +30,41 @@ ArmSgiPkgEntryPoint (
>>)
>> {
>>EFI_STATUS Status;
>> + VOID*PlatformIdHob;
>> + SGI_PLATFORM_DESCRIPTOR *HobData;
>> + UINT32 ConfigId;
>> + UINT32 PartNum;
>>
>> - Status = LocateAndInstallAcpiFromFv ();
>> - if (EFI_ERROR (Status)) {
>> -DEBUG ((DEBUG_ERROR, "%a: Failed to install ACPI tables\n",
>> __FUNCTION__));
>> -return Status;
>> + PlatformIdHob = GetFirstGuidHob ();
>> + if (PlatformIdHob == NULL) {
>> +DEBUG ((DEBUG_ERROR, "Platform ID HOB is NULL\n"));
>> +return EFI_INVALID_PARAMETER;
>> + }
>> +
>> + HobData = (SGI_PLATFORM_DESCRIPTOR *)(GET_GUID_HOB_DATA (PlatformIdHob));
>> +
>> + PartNum = (HobData->PlatformId & SGI_PART_NUM_MASK);
>> + ConfigId = ((HobData->PlatformId >> SGI_CONFIG_SHIFT) & SGI_CONFIG_MASK);
>> +
>> + if ((PartNum == SGI575_PART_NUM) && (ConfigId == SGI575_CONF_NUM)) {
>> +Status = LocateAndInstallAcpiFromFv ();
>> +if (EFI_ERROR (Status)) {
>> + DEBUG ((DEBUG_ERROR, "%a: Failed to install ACPI tables\n",
>> __FUNCTION__));
>> + return Status;
>> +}
>> + } else {
>> +DEBUG ((DEBUG_ERROR, "PlatformDxe: Unsupported Platform Id\n"));
>> +return EFI_UNSUPPORTED;
>>}
>>
>
>
>> - Status = EFI_REQUEST_UNLOAD_IMAGE;
>>if (FeaturePcdGet (PcdVirtioSupported)) {
>> Status = InitVirtioBlockIo (ImageHandle);
>> if (EFI_ERROR (Status)) {
>>DEBUG ((DEBUG_ERROR, "%a: Failed to install Virtio Block device\n",
>> __FUNCTION__));
>> }
>> + } else {
>> +Status = EFI_REQUEST_UNLOAD_IMAGE;
>>}
>>
>
> This is an unrelated (and unnecessary) change.
removed this unrelated change in v3 patchset
>
>
>>return Status;
>> diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf
>> b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf
>> index 51ad22f..b6b8209 100644
>> --- a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf
>> +++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf
>> @@ -30,10 +30,12 @@
>>
>> [LibraryClasses]
>>AcpiLib
>> + HobLib
>>UefiDriverEntryPoint
>>VirtioMmioDeviceLib
>>
>> [Guids]
>> + gArmSgiPlatformIdDescriptorGuid
>>gSgi575AcpiTablesiFileGuid
>>
>> [FeaturePcd]
>> diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc
>> b/Platform/ARM/SgiPkg/SgiPlatform.dsc
>> index a56175e..7b8e051 100644
>> --- a/Platform/ARM/SgiPkg/SgiPlatform.dsc
>> +++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc
>> @@ -199,6 +199,7 @@
>>
>>
>> NULL|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
>>}
>> + Platform/ARM/SgiPkg/Library/SgiPlatformPei/SgiPlatformPei.inf
>>
>>#
>># DXE
>> diff --git a/Platform/ARM/SgiPkg/SgiPlatform.fdf
>> b/Platform/ARM/SgiPkg/SgiPlatform.fdf
>> index 17cdf48..0e5739e 100644
>> --- a/Platform/ARM/SgiPkg/SgiPlatform.fdf
>> +++ b/Platform/ARM/SgiPkg/SgiPlatform.fdf
>> @@ -220,6 +220,7 @@ READ_LOCK_STATUS = TRUE
>>INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
>>INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
>>INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
>> + INF Platform/ARM/SgiPkg/Library/SgiPlatformPei/SgiPlatformPei.inf
>>
>>FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
>> SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED
>> = TRUE {
>> --
>> 2.7.4
>>
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[edk2] [PATCH edk2-platforms v3 1/2] Platform/ARM/Sgi: Install a Platform ID HOB
On SGI platforms, the trusted firmware executes prior to
the SEC phase. It supplies to the SEC phase a pointer to
a fdt, that contains platform specific information such as
part number and config number of the SGI platform. The
platform code that executes during the SEC phase creates a
PPI that allows access to other PEIMs to obtain a copy of the
fdt pointer.
Further, during the PEI phase, a Platform ID PEIM installs a
Platform ID HOB. The Platform ID HOB can be used by DXE
drivers to identify the platform it is executing on.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chandni Cherukuri
---
Platform/ARM/SgiPkg/Include/Ppi/SgiPlatformId.h | 23
Platform/ARM/SgiPkg/Include/SgiPlatform.h | 13 +++
Platform/ARM/SgiPkg/Library/PlatformLib/AArch64/Helper.S | 13 ++-
Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.c | 10 ++
Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf | 3 +
Platform/ARM/SgiPkg/Library/SgiPlatformPei/SgiPlatformPei.inf | 40 +++
Platform/ARM/SgiPkg/Library/SgiPlatformPei/SgiPlatformPeim.c | 112
Platform/ARM/SgiPkg/SgiPlatform.dec | 5 +
8 files changed, 215 insertions(+), 4 deletions(-)
diff --git a/Platform/ARM/SgiPkg/Include/Ppi/SgiPlatformId.h
b/Platform/ARM/SgiPkg/Include/Ppi/SgiPlatformId.h
new file mode 100644
index 000..dbc982d
--- /dev/null
+++ b/Platform/ARM/SgiPkg/Include/Ppi/SgiPlatformId.h
@@ -0,0 +1,23 @@
+/** @file
+*
+* Copyright (c) 2018, ARM Limited. All rights reserved.
+*
+* This program and the accompanying materials are licensed and made available
+* under the terms and conditions of the BSD License which accompanies this
+* distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
IMPLIED.
+*
+**/
+
+#ifndef SGI_PLATFORMID_PPI_
+#define SGI_PLATFORMID_PPI_
+
+//HwConfig DT structure
+typedef struct {
+ UINT64 HwConfigDtAddr;
+} SGI_HW_CONFIG_INFO_PPI;
+
+#endif
diff --git a/Platform/ARM/SgiPkg/Include/SgiPlatform.h
b/Platform/ARM/SgiPkg/Include/SgiPlatform.h
index 00ca7e9..1454018 100644
--- a/Platform/ARM/SgiPkg/Include/SgiPlatform.h
+++ b/Platform/ARM/SgiPkg/Include/SgiPlatform.h
@@ -68,4 +68,17 @@
#define SGI_SYSPH_SYS_REG_FLASH 0x4C
#define SGI_SYSPH_SYS_REG_FLASH_RWEN 0x1
+// SGI575_VERSION values
+#define SGI575_CONF_NUM 0x3
+#define SGI575_PART_NUM 0x783
+
+#define SGI_CONFIG_MASK 0x0F
+#define SGI_CONFIG_SHIFT 0x1C
+#define SGI_PART_NUM_MASK 0xFFF
+
+// ARM platform description data.
+typedef struct {
+ UINTN PlatformId;
+} SGI_PLATFORM_DESCRIPTOR;
+
#endif // __SGI_PLATFORM_H__
diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/AArch64/Helper.S
b/Platform/ARM/SgiPkg/Library/PlatformLib/AArch64/Helper.S
index dab6c77..3662266 100644
--- a/Platform/ARM/SgiPkg/Library/PlatformLib/AArch64/Helper.S
+++ b/Platform/ARM/SgiPkg/Library/PlatformLib/AArch64/Helper.S
@@ -22,15 +22,20 @@ GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
+GCC_ASM_IMPORT(HwConfigDtBlob)
//
// First platform specific function to be called in the PEI phase
//
-// This function is actually the first function called by the PrePi
-// or PrePeiCore modules. It allows to retrieve arguments passed to
-// the UEFI firmware through the CPU registers.
-//
+// The trusted firmware passed the hw config DT blob in x1 register.
+// Keep a copy of it in a global variable.
+//VOID
+//ArmPlatformPeiBootAction (
+// VOID
+// );
ASM_PFX(ArmPlatformPeiBootAction):
+ adr x10, HwConfigDtBlob
+ str x1, [x10]
ret
//UINTN
diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.c
b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.c
index ea3201a..13bb423 100644
--- a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.c
+++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.c
@@ -15,6 +15,10 @@
#include
#include
#include
+#include
+
+UINT64 HwConfigDtBlob;
+STATIC SGI_HW_CONFIG_INFO_PPI mHwConfigDtInfoPpi;
STATIC ARM_CORE_INFO mCoreInfoTable[] = {
{
@@ -36,6 +40,7 @@ ArmPlatformInitialize (
IN UINTN MpId
)
{
+ mHwConfigDtInfoPpi.HwConfigDtAddr = HwConfigDtBlob;
return RETURN_SUCCESS;
}
@@ -59,6 +64,11 @@ EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = {
EFI_PEI_PPI_DESCRIPTOR_PPI,
,
+ },
+ {
+EFI_PEI_PPI_DESCRIPTOR_PPI,
+,
+
}
};
diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf
[edk2] [PATCH edk2-platforms v3 2/2] Platform/ARM/Sgi: Pick ACPI tables to install based on platform ID
Use the platform ID and config ID values from the platform ID
HOB to choose the right set of ACPI tables to be installed.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chandni Cherukuri
---
Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c | 30
+---
Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf | 2 ++
Platform/ARM/SgiPkg/SgiPlatform.dsc | 1 +
Platform/ARM/SgiPkg/SgiPlatform.fdf | 1 +
4 files changed, 30 insertions(+), 4 deletions(-)
diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
index edaae5b..83adb63 100644
--- a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
+++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c
@@ -14,6 +14,8 @@
#include
#include
+#include
+#include
EFI_STATUS
InitVirtioBlockIo (
@@ -28,11 +30,31 @@ ArmSgiPkgEntryPoint (
)
{
EFI_STATUS Status;
+ VOID*PlatformIdHob;
+ SGI_PLATFORM_DESCRIPTOR *HobData;
+ UINT32 ConfigId;
+ UINT32 PartNum;
- Status = LocateAndInstallAcpiFromFv ();
- if (EFI_ERROR (Status)) {
-DEBUG ((DEBUG_ERROR, "%a: Failed to install ACPI tables\n", __FUNCTION__));
-return Status;
+ PlatformIdHob = GetFirstGuidHob ();
+ if (PlatformIdHob == NULL) {
+DEBUG ((DEBUG_ERROR, "Platform ID HOB is NULL\n"));
+return EFI_INVALID_PARAMETER;
+ }
+
+ HobData = (SGI_PLATFORM_DESCRIPTOR *)(GET_GUID_HOB_DATA (PlatformIdHob));
+
+ PartNum = (HobData->PlatformId & SGI_PART_NUM_MASK);
+ ConfigId = ((HobData->PlatformId >> SGI_CONFIG_SHIFT) & SGI_CONFIG_MASK);
+
+ if ((PartNum == SGI575_PART_NUM) && (ConfigId == SGI575_CONF_NUM)) {
+Status = LocateAndInstallAcpiFromFv ();
+if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "%a: Failed to install ACPI tables\n",
__FUNCTION__));
+ return Status;
+}
+ } else {
+DEBUG ((DEBUG_ERROR, "PlatformDxe: Unsupported Platform Id\n"));
+return EFI_UNSUPPORTED;
}
Status = EFI_REQUEST_UNLOAD_IMAGE;
diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf
b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf
index 51ad22f..b6b8209 100644
--- a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf
+++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf
@@ -30,10 +30,12 @@
[LibraryClasses]
AcpiLib
+ HobLib
UefiDriverEntryPoint
VirtioMmioDeviceLib
[Guids]
+ gArmSgiPlatformIdDescriptorGuid
gSgi575AcpiTablesiFileGuid
[FeaturePcd]
diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc
b/Platform/ARM/SgiPkg/SgiPlatform.dsc
index a56175e..7b8e051 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dsc
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc
@@ -199,6 +199,7 @@
NULL|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
}
+ Platform/ARM/SgiPkg/Library/SgiPlatformPei/SgiPlatformPei.inf
#
# DXE
diff --git a/Platform/ARM/SgiPkg/SgiPlatform.fdf
b/Platform/ARM/SgiPkg/SgiPlatform.fdf
index 17cdf48..0e5739e 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.fdf
+++ b/Platform/ARM/SgiPkg/SgiPlatform.fdf
@@ -220,6 +220,7 @@ READ_LOCK_STATUS = TRUE
INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
+ INF Platform/ARM/SgiPkg/Library/SgiPlatformPei/SgiPlatformPei.inf
FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED =
TRUE {
--
2.7.4
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[edk2] [platforms: PATCH v2 23/25] Marvell/Drivers: MvBoardDesc: Extend protocol with I2C support
Introduce new callback that can provide information
about I2C controllers to the I2c driver.
Extend ArmadaBoardDescLib with new structure MV_BOARD_I2C_DESC,
for holding board specific data. In further steps it should
be extended and replace PCD I2C devices' representation with the
appropriate structures.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas
---
Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf | 1 +
Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h | 8 +++
Silicon/Marvell/Include/Protocol/BoardDesc.h | 8 +++
Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c | 66
4 files changed, 83 insertions(+)
diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
index dea99fd..41f72d6 100644
--- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
+++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
@@ -58,6 +58,7 @@
[Pcd]
gMarvellTokenSpaceGuid.PcdComPhyDevices
+ gMarvellTokenSpaceGuid.PcdI2cControllersEnabled
gMarvellTokenSpaceGuid.PcdPciEAhci
gMarvellTokenSpaceGuid.PcdPciESdhci
gMarvellTokenSpaceGuid.PcdPciEXhci
diff --git a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
index b11fa9d..ee8e06e 100644
--- a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
+++ b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
@@ -25,6 +25,14 @@ typedef struct {
} MV_BOARD_COMPHY_DESC;
//
+// I2C devices per-board description
+//
+typedef struct {
+ MV_SOC_I2C_DESC *SoC;
+ UINTNI2cDevCount;
+} MV_BOARD_I2C_DESC;
+
+//
// MDIO devices per-board description
//
typedef struct {
diff --git a/Silicon/Marvell/Include/Protocol/BoardDesc.h
b/Silicon/Marvell/Include/Protocol/BoardDesc.h
index 55297f5..1d57a16 100644
--- a/Silicon/Marvell/Include/Protocol/BoardDesc.h
+++ b/Silicon/Marvell/Include/Protocol/BoardDesc.h
@@ -50,6 +50,13 @@ EFI_STATUS
typedef
EFI_STATUS
+(EFIAPI *MV_BOARD_DESC_I2C_GET) (
+ IN MARVELL_BOARD_DESC_PROTOCOL *This,
+ IN OUT MV_BOARD_I2C_DESC **I2cDesc
+ );
+
+typedef
+EFI_STATUS
(EFIAPI *MV_BOARD_DESC_MDIO_GET) (
IN MARVELL_BOARD_DESC_PROTOCOL *This,
IN OUT MV_BOARD_MDIO_DESC **MdioDesc
@@ -99,6 +106,7 @@ VOID
struct _MARVELL_BOARD_DESC_PROTOCOL {
MV_BOARD_DESC_AHCI_GET BoardDescAhciGet;
MV_BOARD_DESC_COMPHY_GET BoardDescComPhyGet;
+ MV_BOARD_DESC_I2C_GET BoardDescI2cGet;
MV_BOARD_DESC_MDIO_GET BoardDescMdioGet;
MV_BOARD_DESC_PP2_GET BoardDescPp2Get;
MV_BOARD_DESC_SDMMC_GETBoardDescSdMmcGet;
diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
index 5dfc559..39dc06c 100644
--- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
+++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
@@ -100,6 +100,71 @@ MvBoardDescComPhyGet (
STATIC
EFI_STATUS
+MvBoardDescI2cGet (
+ IN MARVELL_BOARD_DESC_PROTOCOL *This,
+ IN OUT MV_BOARD_I2C_DESC **I2cDesc
+ )
+{
+ UINT8 *I2cDeviceEnabled;
+ UINTN I2cCount, I2cDeviceEnabledSize, I2cIndex, Index;
+ MV_BOARD_I2C_DESC *BoardDesc;
+ MV_SOC_I2C_DESC *SoCDesc;
+ EFI_STATUS Status;
+
+ /* Get SoC data about all available I2C controllers */
+ Status = ArmadaSoCDescI2cGet (, );
+ if (EFI_ERROR (Status)) {
+return Status;
+ }
+
+ /*
+ * Obtain table with enabled I2C controllers
+ * which is represented as an array of UINT8 values
+ * (0x0 - disabled, 0x1 enabled).
+ */
+ I2cDeviceEnabled = PcdGetPtr (PcdI2cControllersEnabled);
+ if (I2cDeviceEnabled == NULL) {
+/* No I2C on platform */
+return EFI_SUCCESS;
+ }
+
+ I2cDeviceEnabledSize = PcdGetSize (PcdI2cControllersEnabled);
+
+ /* Check if PCD with I2C controllers is correctly defined */
+ if (I2cDeviceEnabledSize > I2cCount) {
+DEBUG ((DEBUG_ERROR,
+ "%a: Wrong PcdI2cControllersEnabled format\n",
+ __FUNCTION__));
+return EFI_INVALID_PARAMETER;
+ }
+
+ /* Allocate and fill board description */
+ BoardDesc = AllocateZeroPool (I2cDeviceEnabledSize * sizeof
(MV_BOARD_I2C_DESC));
+ if (BoardDesc == NULL) {
+DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
+return EFI_OUT_OF_RESOURCES;
+ }
+
+ I2cIndex = 0;
+ for (Index = 0; Index < I2cDeviceEnabledSize; Index++) {
+if (!I2cDeviceEnabled[Index]) {
+ DEBUG ((DEBUG_INFO, "%a: Skip I2c controller %d\n", __FUNCTION__,
Index));
+ continue;
+}
+
+BoardDesc[I2cIndex].SoC = [Index];
+I2cIndex++;
+ }
+
+ BoardDesc->I2cDevCount = I2cIndex;
+
+ *I2cDesc = BoardDesc;
+
+ return EFI_SUCCESS;
+}
+
+STATIC
+EFI_STATUS
MvBoardDescMdioGet (
IN MARVELL_BOARD_DESC_PROTOCOL *This,
IN OUT MV_BOARD_MDIO_DESC **MdioDesc
@@ -491,6 +556,7 @@ MvBoardDescInitProtocol (
{
BoardDescProtocol->BoardDescAhciGet = MvBoardDescAhciGet;
[edk2] [platforms: PATCH v2 21/25] Marvell/Drivers: MvMdioDxe: Switch driver to use MARVELL_BOARD_DESC
MvMdioDxe driver used to get Armada7k8k controller description
from hardcoded values stored in the header file MvHwDescLib.h.
As a result it is very hard to support other
Armada SoC families with this driver.
This patch updates the driver, so that it can obtain the
description from newly introduced MARVELL_BOARD_DESC protocol,
and removes the dependency on the hardcoded structures.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas
Reviewed-by: Leif Lindholm
---
Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.inf | 1 +
Silicon/Marvell/Include/Library/MvHwDescLib.h | 23 -
Silicon/Marvell/Include/Protocol/Mdio.h | 4 +--
Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.c | 35
4 files changed, 31 insertions(+), 32 deletions(-)
diff --git a/Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.inf
b/Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.inf
index c070785..739576f 100644
--- a/Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.inf
+++ b/Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.inf
@@ -60,6 +60,7 @@
UefiLib
[Protocols]
+ gMarvellBoardDescProtocolGuid
gMarvellMdioProtocolGuid
[Depex]
diff --git a/Silicon/Marvell/Include/Library/MvHwDescLib.h
b/Silicon/Marvell/Include/Library/MvHwDescLib.h
index 423ca17..0de435d 100644
--- a/Silicon/Marvell/Include/Library/MvHwDescLib.h
+++ b/Silicon/Marvell/Include/Library/MvHwDescLib.h
@@ -53,16 +53,6 @@ typedef struct {
} MVHW_I2C_DESC;
//
-// MDIO devices description template definition
-//
-#define MVHW_MAX_MDIO_DEVS 2
-
-typedef struct {
- UINT8 MdioDevCount;
- UINTN MdioBaseAddresses[MVHW_MAX_MDIO_DEVS];
-} MVHW_MDIO_DESC;
-
-//
// Platform description of I2C devices
//
#define MVHW_CP0_I2C0_BASE 0xF2701000
@@ -77,17 +67,4 @@ MVHW_I2C_DESC mA7k8kI2cDescTemplate = {\
{ MVHW_CP0_I2C0_BASE, MVHW_CP0_I2C1_BASE, MVHW_CP1_I2C0_BASE,
MVHW_CP1_I2C1_BASE }\
}
-//
-// Platform description of MDIO devices
-//
-#define MVHW_CP0_MDIO_BASE 0xF212A200
-#define MVHW_CP1_MDIO_BASE 0xF412A200
-
-#define DECLARE_A7K8K_MDIO_TEMPLATE \
-STATIC \
-MVHW_MDIO_DESC mA7k8kMdioDescTemplate = {\
- 2,\
- { MVHW_CP0_MDIO_BASE, MVHW_CP1_MDIO_BASE }\
-}
-
#endif /* __MVHWDESCLIB_H__ */
diff --git a/Silicon/Marvell/Include/Protocol/Mdio.h
b/Silicon/Marvell/Include/Protocol/Mdio.h
index d077a8f..076ea26 100644
--- a/Silicon/Marvell/Include/Protocol/Mdio.h
+++ b/Silicon/Marvell/Include/Protocol/Mdio.h
@@ -35,8 +35,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#ifndef __MDIO_H__
#define __MDIO_H__
-#include
-
#define MARVELL_MDIO_PROTOCOL_GUID { 0x40010b03, 0x5f08, 0x496a, { 0xa2, 0x64,
0x10, 0x5e, 0x72, 0xd3, 0x71, 0xaa }}
typedef struct _MARVELL_MDIO_PROTOCOL MARVELL_MDIO_PROTOCOL;
@@ -64,7 +62,7 @@ EFI_STATUS
struct _MARVELL_MDIO_PROTOCOL {
MARVELL_MDIO_READ Read;
MARVELL_MDIO_WRITE Write;
- UINTN BaseAddresses[MVHW_MAX_MDIO_DEVS];
+ UINTN *BaseAddresses;
UINTN ControllerCount;
};
diff --git a/Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.c
b/Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.c
index 6c0a129..72e88bd 100644
--- a/Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.c
+++ b/Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.c
@@ -32,6 +32,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
***/
+#include
#include
#include
@@ -46,8 +47,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#include "MvMdioDxe.h"
-DECLARE_A7K8K_MDIO_TEMPLATE;
-
STATIC
EFI_STATUS
MdioCheckParam (
@@ -216,24 +215,46 @@ MvMdioDxeInitialise (
IN EFI_SYSTEM_TABLE *SystemTable
)
{
- MVHW_MDIO_DESC *Desc =
+ MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol;
+ MV_BOARD_MDIO_DESC *MdioBoardDesc;
UINT8 Index;
MARVELL_MDIO_PROTOCOL *Mdio;
EFI_STATUS Status;
EFI_HANDLE Handle = NULL;
+ /* Obtain list of available controllers */
+ Status = gBS->LocateProtocol (,
+ NULL,
+ (VOID **));
+ if (EFI_ERROR (Status)) {
+return Status;
+ }
+
+ Status = BoardDescProtocol->BoardDescMdioGet (BoardDescProtocol,
+);
+ if (EFI_ERROR (Status)) {
+return Status;
+ }
+
Mdio = AllocateZeroPool (sizeof (MARVELL_MDIO_PROTOCOL));
if (Mdio == NULL) {
DEBUG ((DEBUG_ERROR, "MdioDxe: Protocol allocation failed\n"));
return EFI_OUT_OF_RESOURCES;
}
+ Mdio->BaseAddresses = AllocateZeroPool (MdioBoardDesc->MdioDevCount *
+ sizeof (UINTN));
+ if (Mdio->BaseAddresses == NULL) {
+DEBUG ((DEBUG_ERROR, "MdioDxe: Protocol allocation failed\n"));
+return EFI_OUT_OF_RESOURCES;
+ }
+
/* Obtain base addresses of all possible controllers */
- for (Index = 0; Index < Desc->MdioDevCount; Index++) {
-Mdio->BaseAddresses[Index] = Desc->MdioBaseAddresses[Index];
+
[edk2] [platforms: PATCH v2 24/25] Marvell/Drivers: MvI2cDxe: Switch driver to use MARVELL_BOARD_DESC
MvI2cDxe driver used to get Armada7k8k controller description
from hardcoded values stored in the header file MvHwDescLib.h.
As a result it is very hard to support other
Armada SoC families with this driver.
This patch updates the driver, so that it can obtain the
description from newly introduced MARVELL_BOARD_DESC protocol,
and removes the dependency on the hardcoded structures.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas
---
Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.inf | 1 +
Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.c | 37 +---
2 files changed, 18 insertions(+), 20 deletions(-)
diff --git a/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.inf
b/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.inf
index a7cf52e..0eef350 100755
--- a/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.inf
+++ b/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.inf
@@ -61,6 +61,7 @@
gEfiDevicePathProtocolGuid
gEfiI2cEnumerateProtocolGuid
gEfiI2cBusConfigurationManagementProtocolGuid
+ gMarvellBoardDescProtocolGuid
[Pcd]
gMarvellTokenSpaceGuid.PcdI2cSlaveAddresses
diff --git a/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.c
b/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.c
index d6f590d..9ec4929 100755
--- a/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.c
+++ b/Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.c
@@ -32,6 +32,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
***/
+#include
#include
#include
#include
@@ -43,13 +44,10 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#include
#include
#include
-#include
#include
#include "MvI2cDxe.h"
-DECLARE_A7K8K_I2C_TEMPLATE;
-
STATIC MV_I2C_BAUD_RATE baud_rate;
STATIC MV_I2C_DEVICE_PATH MvI2cDevicePathProtocol = {
@@ -174,38 +172,37 @@ MvI2cInitialise (
IN EFI_SYSTEM_TABLE *SystemTable
)
{
- MVHW_I2C_DESC *Desc =
- UINT8 *I2cDeviceTable, Index;
+ MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol;
+ MV_BOARD_I2C_DESC *Desc;
EFI_STATUS Status;
+ UINTN Index;
- /* Obtain table with enabled I2c devices */
- I2cDeviceTable = (UINT8 *)PcdGetPtr (PcdI2cControllersEnabled);
- if (I2cDeviceTable == NULL) {
-DEBUG ((DEBUG_ERROR, "Missing PcdI2cControllersEnabled\n"));
-return EFI_INVALID_PARAMETER;
+ /* Obtain list of available controllers */
+ Status = gBS->LocateProtocol (,
+ NULL,
+ (VOID **));
+ if (EFI_ERROR (Status)) {
+return Status;
}
- if (PcdGetSize (PcdI2cControllersEnabled) > MVHW_MAX_I2C_DEVS) {
-DEBUG ((DEBUG_ERROR, "Wrong PcdI2cControllersEnabled format\n"));
-return EFI_INVALID_PARAMETER;
+ Status = BoardDescProtocol->BoardDescI2cGet (BoardDescProtocol, );
+ if (EFI_ERROR (Status)) {
+return Status;
}
/* Initialize enabled chips */
- for (Index = 0; Index < PcdGetSize (PcdI2cControllersEnabled); Index++) {
-if (!MVHW_DEV_ENABLED (I2c, Index)) {
- DEBUG ((DEBUG_ERROR, "Skip I2c chip %d\n", Index));
- continue;
-}
-
+ for (Index = 0; Index < Desc->I2cDevCount; Index++) {
Status = MvI2cInitialiseController(
ImageHandle,
SystemTable,
-Desc->I2cBaseAddresses[Index]
+Desc[Index].SoC->I2cBaseAddress
);
if (EFI_ERROR(Status))
return Status;
}
+ BoardDescProtocol->BoardDescFree (Desc);
+
return EFI_SUCCESS;
}
--
2.7.4
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[edk2] [platforms: PATCH v2 20/25] Marvell/Drivers: MvMdioDxe: Enable 64bit addressing
In order to be prepared for operating on registers
in 64-bit address space, this patch adjusts the
MDIO controllers base address array.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas
Reviewed-by: Leif Lindholm
---
Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.c
b/Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.c
index 12aabad..6c0a129 100644
--- a/Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.c
+++ b/Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.c
@@ -70,7 +70,7 @@ MdioCheckParam (
STATIC
EFI_STATUS
MdioWaitReady (
- UINT32 MdioBase
+ UINTN MdioBase
)
{
UINT32 Timeout = MVEBU_SMI_TIMEOUT;
@@ -92,7 +92,7 @@ MdioWaitReady (
STATIC
EFI_STATUS
MdioWaitValid (
- UINT32 MdioBase
+ UINTN MdioBase
)
{
UINT32 Timeout = MVEBU_SMI_TIMEOUT;
@@ -122,7 +122,7 @@ MdioOperation (
IN OUT UINT32 *Data
)
{
- UINT32 MdioBase = This->BaseAddresses[MdioIndex];
+ UINTN MdioBase = This->BaseAddresses[MdioIndex];
UINT32 MdioReg;
EFI_STATUS Status;
--
2.7.4
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[edk2] [platforms: PATCH v2 25/25] Marvell/Drivers: MvPhyDxe: Remove MvHwDescLib.h dependency
Finally, after switching to new MV_BOARD_DESC solution
in all drivers, stop using MvHwDescLib.h by its last user
and safely remove this header.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas
---
Silicon/Marvell/Include/Library/MvHwDescLib.h | 70
Silicon/Marvell/Drivers/Net/MvPhyDxe/MvPhyDxe.c | 4 +-
2 files changed, 2 insertions(+), 72 deletions(-)
delete mode 100644 Silicon/Marvell/Include/Library/MvHwDescLib.h
diff --git a/Silicon/Marvell/Include/Library/MvHwDescLib.h
b/Silicon/Marvell/Include/Library/MvHwDescLib.h
deleted file mode 100644
index 0de435d..000
--- a/Silicon/Marvell/Include/Library/MvHwDescLib.h
+++ /dev/null
@@ -1,70 +0,0 @@
-/
-Copyright (C) 2017 Marvell International Ltd.
-
-Marvell BSD License Option
-
-If you received this File from Marvell, you may opt to use, redistribute and/or
-modify this File under the following licensing terms.
-Redistribution and use in source and binary forms, with or without
modification,
-are permitted provided that the following conditions are met:
-
-* Redistributions of source code must retain the above copyright notice,
- this list of conditions and the following disclaimer.
-
-* Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in the
- documentation and/or other materials provided with the distribution.
-
-* Neither the name of Marvell nor the names of its contributors may be
- used to endorse or promote products derived from this software without
- specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
-ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
-ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-
-***/
-
-#ifndef __MVHWDESCLIB_H__
-#define __MVHWDESCLIB_H__
-
-//
-// Helper macros
-//
-
-// Check if device is enabled - it expects PCD to be read to
'DeviceTable' array
-#define MVHW_DEV_ENABLED(type, index) (type ## DeviceTable[index])
-
-//
-// I2C devices description template definition
-//
-#define MVHW_MAX_I2C_DEVS 4
-
-typedef struct {
- UINT8 I2cDevCount;
- UINTN I2cBaseAddresses[MVHW_MAX_I2C_DEVS];
-} MVHW_I2C_DESC;
-
-//
-// Platform description of I2C devices
-//
-#define MVHW_CP0_I2C0_BASE 0xF2701000
-#define MVHW_CP0_I2C1_BASE 0xF2701100
-#define MVHW_CP1_I2C0_BASE 0xF4701000
-#define MVHW_CP1_I2C1_BASE 0xF4701100
-
-#define DECLARE_A7K8K_I2C_TEMPLATE \
-STATIC \
-MVHW_I2C_DESC mA7k8kI2cDescTemplate = {\
- 4,\
- { MVHW_CP0_I2C0_BASE, MVHW_CP0_I2C1_BASE, MVHW_CP1_I2C0_BASE,
MVHW_CP1_I2C1_BASE }\
-}
-
-#endif /* __MVHWDESCLIB_H__ */
diff --git a/Silicon/Marvell/Drivers/Net/MvPhyDxe/MvPhyDxe.c
b/Silicon/Marvell/Drivers/Net/MvPhyDxe/MvPhyDxe.c
index dd2edae..9be0489 100644
--- a/Silicon/Marvell/Drivers/Net/MvPhyDxe/MvPhyDxe.c
+++ b/Silicon/Marvell/Drivers/Net/MvPhyDxe/MvPhyDxe.c
@@ -41,7 +41,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#include
#include
#include
-#include
#include
#include
#include
@@ -380,7 +379,8 @@ MvPhyInit (
MdioIndex = Phy2MdioController[PhyIndex];
/* Verify correctness of PHY <-> MDIO assignment */
- if (!MVHW_DEV_ENABLED (Mdio, MdioIndex) || MdioIndex >=
Mdio->ControllerCount) {
+ if ((MdioDeviceTable[MdioIndex] == 0) ||
+ (MdioIndex >= Mdio->ControllerCount)) {
DEBUG ((DEBUG_ERROR, "MvPhyDxe: Incorrect Mdio controller assignment for
PHY#%d", PhyIndex));
return EFI_INVALID_PARAMETER;
}
--
2.7.4
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[edk2] [platforms: PATCH v2 17/25] Marvell/Library: ComPhyLib: Switch library to use MARVELL_BOARD_DESC
MvComPhyLib library used to get Armada7k8k SerDes multiplexing
controller description from hardcoded values stored in the header
file MvHwDescLib.h. As a result it is very hard to support other
Armada SoC families with this library.
This patch updates the library, so that it can obtain the
description from newly introduced MARVELL_BOARD_DESC protocol,
and removes the dependency on the hardcoded structures.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas
---
Silicon/Marvell/Include/Library/MvHwDescLib.h | 39 ---
Silicon/Marvell/Library/ComPhyLib/ComPhyLib.c | 74
2 files changed, 45 insertions(+), 68 deletions(-)
diff --git a/Silicon/Marvell/Include/Library/MvHwDescLib.h
b/Silicon/Marvell/Include/Library/MvHwDescLib.h
index 9f383f4..423ca17 100644
--- a/Silicon/Marvell/Include/Library/MvHwDescLib.h
+++ b/Silicon/Marvell/Include/Library/MvHwDescLib.h
@@ -35,8 +35,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#ifndef __MVHWDESCLIB_H__
#define __MVHWDESCLIB_H__
-#include
-
//
// Helper macros
//
@@ -45,20 +43,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#define MVHW_DEV_ENABLED(type, index) (type ## DeviceTable[index])
//
-// CommonPhy devices description template definition
-//
-#define MVHW_MAX_COMPHY_DEVS 4
-
-typedef struct {
- UINT8 ComPhyDevCount;
- UINTN ComPhyBaseAddresses[MVHW_MAX_COMPHY_DEVS];
- UINTN ComPhyHpipe3BaseAddresses[MVHW_MAX_COMPHY_DEVS];
- UINTN ComPhyLaneCount[MVHW_MAX_COMPHY_DEVS];
- UINTN ComPhyMuxBitCount[MVHW_MAX_COMPHY_DEVS];
- MV_COMPHY_CHIP_TYPE ComPhyChipType[MVHW_MAX_COMPHY_DEVS];
-} MVHW_COMPHY_DESC;
-
-//
// I2C devices description template definition
//
#define MVHW_MAX_I2C_DEVS 4
@@ -79,29 +63,6 @@ typedef struct {
} MVHW_MDIO_DESC;
//
-// Platform description of CommonPhy devices
-//
-#define MVHW_CP0_COMPHY_BASE 0xF2441000
-#define MVHW_CP0_HPIPE3_BASE 0xF212
-#define MVHW_CP0_COMPHY_LANES 6
-#define MVHW_CP0_COMPHY_MUX_BITS 4
-#define MVHW_CP1_COMPHY_BASE 0xF4441000
-#define MVHW_CP1_HPIPE3_BASE 0xF412
-#define MVHW_CP1_COMPHY_LANES 6
-#define MVHW_CP1_COMPHY_MUX_BITS 4
-
-#define DECLARE_A7K8K_COMPHY_TEMPLATE \
-STATIC \
-MVHW_COMPHY_DESC mA7k8kComPhyDescTemplate = {\
- 2,\
- { MVHW_CP0_COMPHY_BASE, MVHW_CP1_COMPHY_BASE },\
- { MVHW_CP0_HPIPE3_BASE, MVHW_CP1_HPIPE3_BASE },\
- { MVHW_CP0_COMPHY_LANES, MVHW_CP1_COMPHY_LANES },\
- { MVHW_CP0_COMPHY_MUX_BITS, MVHW_CP1_COMPHY_MUX_BITS },\
- { MvComPhyTypeCp110, MvComPhyTypeCp110 }\
-}
-
-//
// Platform description of I2C devices
//
#define MVHW_CP0_I2C0_BASE 0xF2701000
diff --git a/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.c
b/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.c
index b03bc35..2ef9af4 100644
--- a/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.c
+++ b/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.c
@@ -34,9 +34,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#include "ComPhyLib.h"
#include
-#include
-
-DECLARE_A7K8K_COMPHY_TEMPLATE;
CHAR16 * TypeStringTable [] = {L"unconnected", L"PCIE0", L"PCIE1", L"PCIE2",
L"PCIE3", L"SATA0", L"SATA1", L"SATA2", L"SATA3",
@@ -182,22 +179,20 @@ VOID
InitComPhyConfig (
IN OUT CHIP_COMPHY_CONFIG *ChipConfig,
IN OUT PCD_LANE_MAP *LaneData,
- IN UINT8 Id
+ IN MV_BOARD_COMPHY_DESC *Desc
)
{
- MVHW_COMPHY_DESC *Desc =
-
- ChipConfig->ChipType = Desc->ComPhyChipType[Id];
- ChipConfig->ComPhyBaseAddr = Desc->ComPhyBaseAddresses[Id];
- ChipConfig->Hpipe3BaseAddr = Desc->ComPhyHpipe3BaseAddresses[Id];
- ChipConfig->LanesCount = Desc->ComPhyLaneCount[Id];
- ChipConfig->MuxBitCount = Desc->ComPhyMuxBitCount[Id];
- ChipConfig->ChipId = Id;
+ ChipConfig->ChipType = Desc->SoC->ComPhyChipType;
+ ChipConfig->ComPhyBaseAddr = Desc->SoC->ComPhyBaseAddress;
+ ChipConfig->Hpipe3BaseAddr = Desc->SoC->ComPhyHpipe3BaseAddress;
+ ChipConfig->LanesCount = Desc->SoC->ComPhyLaneCount;
+ ChipConfig->MuxBitCount = Desc->SoC->ComPhyMuxBitCount;
+ ChipConfig->ChipId = Desc->SoC->ComPhyId;
/*
* Below macro contains variable name concatenation (used to form PCD's
name).
*/
- switch (Id) {
+ switch (ChipConfig->ChipId) {
case 0:
GetComPhyPcd (LaneData, 0);
break;
@@ -219,32 +214,49 @@ MvComPhyInit (
)
{
EFI_STATUS Status;
- CHIP_COMPHY_CONFIG ChipConfig[MVHW_MAX_COMPHY_DEVS], *PtrChipCfg;
- PCD_LANE_MAP LaneData[MVHW_MAX_COMPHY_DEVS];
+ CHIP_COMPHY_CONFIG *ChipConfig, *PtrChipCfg;
+ MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol;
+ MV_BOARD_COMPHY_DESC *ComPhyBoardDesc;
+ PCD_LANE_MAP *LaneData;
UINT32 Lane, MaxComphyCount;
- UINT8 *ComPhyDeviceTable, Index;
+ UINTN Index;
/* Obtain table with enabled ComPhy devices */
- ComPhyDeviceTable = (UINT8 *)PcdGetPtr (PcdComPhyDevices);
- if (ComPhyDeviceTable == NULL) {
-DEBUG ((DEBUG_ERROR,
[edk2] [platforms: PATCH v2 19/25] Marvell/Drivers: MvBoardDesc: Extend protocol with MDIO support
Introduce new callback that can provide information
about MDIO controllers to the Mdio driver.
Extend ArmadaBoardDescLib with new structure MV_BOARD_MDIO_DESC,
for holding board specific data.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas
---
Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h | 8 +
Silicon/Marvell/Include/Protocol/BoardDesc.h | 8 +
Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c | 36
3 files changed, 52 insertions(+)
diff --git a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
index 32bd915..b11fa9d 100644
--- a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
+++ b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
@@ -25,6 +25,14 @@ typedef struct {
} MV_BOARD_COMPHY_DESC;
//
+// MDIO devices per-board description
+//
+typedef struct {
+ MV_SOC_MDIO_DESC *SoC;
+ UINTN MdioDevCount;
+} MV_BOARD_MDIO_DESC;
+
+//
// NonDiscoverableDevices per-board description
//
diff --git a/Silicon/Marvell/Include/Protocol/BoardDesc.h
b/Silicon/Marvell/Include/Protocol/BoardDesc.h
index b6dac75..55297f5 100644
--- a/Silicon/Marvell/Include/Protocol/BoardDesc.h
+++ b/Silicon/Marvell/Include/Protocol/BoardDesc.h
@@ -50,6 +50,13 @@ EFI_STATUS
typedef
EFI_STATUS
+(EFIAPI *MV_BOARD_DESC_MDIO_GET) (
+ IN MARVELL_BOARD_DESC_PROTOCOL *This,
+ IN OUT MV_BOARD_MDIO_DESC **MdioDesc
+ );
+
+typedef
+EFI_STATUS
(EFIAPI *MV_BOARD_DESC_AHCI_GET) (
IN MARVELL_BOARD_DESC_PROTOCOL *This,
IN OUT MV_BOARD_AHCI_DESC **AhciDesc
@@ -92,6 +99,7 @@ VOID
struct _MARVELL_BOARD_DESC_PROTOCOL {
MV_BOARD_DESC_AHCI_GET BoardDescAhciGet;
MV_BOARD_DESC_COMPHY_GET BoardDescComPhyGet;
+ MV_BOARD_DESC_MDIO_GET BoardDescMdioGet;
MV_BOARD_DESC_PP2_GET BoardDescPp2Get;
MV_BOARD_DESC_SDMMC_GETBoardDescSdMmcGet;
MV_BOARD_DESC_UTMI_GET BoardDescUtmiGet;
diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
index 6bbe40b..5dfc559 100644
--- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
+++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
@@ -100,6 +100,41 @@ MvBoardDescComPhyGet (
STATIC
EFI_STATUS
+MvBoardDescMdioGet (
+ IN MARVELL_BOARD_DESC_PROTOCOL *This,
+ IN OUT MV_BOARD_MDIO_DESC **MdioDesc
+ )
+{
+ MV_BOARD_MDIO_DESC *BoardDesc;
+ MV_SOC_MDIO_DESC *SoCDesc;
+ UINTN MdioCount, Index;
+ EFI_STATUS Status;
+
+ /* Get SoC data about all available MDIO controllers */
+ Status = ArmadaSoCDescMdioGet (, );
+ if (EFI_ERROR (Status)) {
+return Status;
+ }
+
+ /* Allocate and fill board description */
+ BoardDesc = AllocateZeroPool (MdioCount * sizeof (MV_BOARD_MDIO_DESC));
+ if (BoardDesc == NULL) {
+DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
+return EFI_OUT_OF_RESOURCES;
+ }
+
+ for (Index = 0; Index < MdioCount; Index++) {
+BoardDesc[Index].SoC = [Index];
+ }
+
+ BoardDesc->MdioDevCount = MdioCount;
+ *MdioDesc = BoardDesc;
+
+ return EFI_SUCCESS;
+}
+
+STATIC
+EFI_STATUS
MvBoardDescAhciGet (
IN MARVELL_BOARD_DESC_PROTOCOL *This,
IN OUT MV_BOARD_AHCI_DESC **AhciDesc
@@ -456,6 +491,7 @@ MvBoardDescInitProtocol (
{
BoardDescProtocol->BoardDescAhciGet = MvBoardDescAhciGet;
BoardDescProtocol->BoardDescComPhyGet = MvBoardDescComPhyGet;
+ BoardDescProtocol->BoardDescMdioGet = MvBoardDescMdioGet;
BoardDescProtocol->BoardDescPp2Get = MvBoardDescPp2Get;
BoardDescProtocol->BoardDescSdMmcGet = MvBoardDescSdMmcGet;
BoardDescProtocol->BoardDescUtmiGet = MvBoardDescUtmiGet;
--
2.7.4
___
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[edk2] [platforms: PATCH v2 11/25] Marvell/Armada7k8k: Extend ArmadaSoCDescLib with AHCI/SDMMC/XHCI
This patch introduces new library callbacks for NonDiscoverable devices
i.e. AHCI/XHCI/SDMMC. They dynamically allocate and fill according
structures with the SoC description of the devices.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas
---
Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
| 18
Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
| 48 ++
Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
| 92
3 files changed, 158 insertions(+)
diff --git
a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
index d63c3b5..94fd6fa 100644
---
a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
+++
b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
@@ -24,12 +24,24 @@
#define MV_SOC_CP_BASE(Cp) (0xF200 + ((Cp) * 0x200))
//
+// Platform description of AHCI controllers
+//
+#define MV_SOC_AHCI_BASE(Cp) (MV_SOC_CP_BASE ((Cp)) + 0x54)
+#define MV_SOC_AHCI_ID(Cp) ((Cp) % 2)
+
+//
// Platform description of PP2 NIC
//
#define MV_SOC_PP2_BASE(Cp) MV_SOC_CP_BASE ((Cp))
#define MV_SOC_PP2_CLK_FREQ 3
//
+// Platform description of SDMMC controllers
+//
+#define MV_SOC_MAX_SDMMC_COUNT 2
+#define MV_SOC_SDMMC_BASE(Index) ((Index) == 0 ? 0xF06E :
0xF278)
+
+//
// Platform description of UTMI PHY's
//
#define MV_SOC_UTMI_PER_CP_COUNT 2
@@ -38,4 +50,10 @@
#define MV_SOC_UTMI_CFG_BASE 0x440440
#define MV_SOC_UTMI_USB_CFG_BASE 0x440420
+//
+// Platform description of XHCI controllers
+//
+#define MV_SOC_XHCI_PER_CP_COUNT 2
+#define MV_SOC_XHCI_BASE(Xhci) (0x50 + ((Xhci) * 0x1))
+
#endif
diff --git a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
index cafcc0f..3b29d78 100644
--- a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
+++ b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
@@ -14,6 +14,54 @@
#ifndef __ARMADA_SOC_DESC_LIB_H__
#define __ARMADA_SOC_DESC_LIB_H__
+#include
+
+//
+// NonDiscoverable devices SoC description
+//
+// AHCI
+typedef struct {
+ UINTN AhciId;
+ UINTN AhciBaseAddress;
+ UINTN AhciMemSize;
+ NON_DISCOVERABLE_DEVICE_DMA_TYPE AhciDmaType;
+} MV_SOC_AHCI_DESC;
+
+EFI_STATUS
+EFIAPI
+ArmadaSoCDescAhciGet (
+ IN OUT MV_SOC_AHCI_DESC **AhciDesc,
+ IN OUT UINTN *DescCount
+ );
+
+// SDMMC
+typedef struct {
+ UINTN SdMmcBaseAddress;
+ UINTN SdMmcMemSize;
+ NON_DISCOVERABLE_DEVICE_DMA_TYPE SdMmcDmaType;
+} MV_SOC_SDMMC_DESC;
+
+EFI_STATUS
+EFIAPI
+ArmadaSoCDescSdMmcGet (
+ IN OUT MV_SOC_SDMMC_DESC **SdMmcDesc,
+ IN OUT UINTN *DescCount
+ );
+
+// XHCI
+typedef struct {
+ UINTN XhciBaseAddress;
+ UINTN XhciMemSize;
+ NON_DISCOVERABLE_DEVICE_DMA_TYPE XhciDmaType;
+} MV_SOC_XHCI_DESC;
+
+EFI_STATUS
+EFIAPI
+ArmadaSoCDescXhciGet (
+ IN OUT MV_SOC_XHCI_DESC **XhciDesc,
+ IN OUT UINTN *DescCount
+ );
+
//
// PP2 NIC devices SoC description
//
diff --git
a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
index 61b4e30..97fe3f8 100644
---
a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
+++
b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
@@ -30,6 +30,37 @@
EFI_STATUS
EFIAPI
+ArmadaSoCDescAhciGet (
+ IN OUT MV_SOC_AHCI_DESC **AhciDesc,
+ IN OUT UINTN *DescCount
+ )
+{
+ MV_SOC_AHCI_DESC *Desc;
+ UINTN CpCount, CpIndex;
+
+ CpCount = FixedPcdGet8 (PcdMaxCpCount);
+
+ Desc = AllocateZeroPool (CpCount * sizeof (MV_SOC_AHCI_DESC));
+ if (Desc == NULL) {
+DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
+return EFI_OUT_OF_RESOURCES;
+ }
+
+ for (CpIndex = 0; CpIndex < CpCount; CpIndex++) {
+Desc[CpIndex].AhciId = MV_SOC_AHCI_ID (CpIndex);
+Desc[CpIndex].AhciBaseAddress = MV_SOC_AHCI_BASE (CpIndex);
+Desc[CpIndex].AhciMemSize = SIZE_8KB;
+Desc[CpIndex].AhciDmaType = NonDiscoverableDeviceDmaTypeCoherent;
+ }
+
+ *AhciDesc = Desc;
+ *DescCount = CpCount;
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+EFIAPI
ArmadaSoCDescPp2Get (
IN OUT MV_SOC_PP2_DESC **Pp2Desc,
IN OUT UINTN *DescCount
@@ -59,6 +90,34 @@ ArmadaSoCDescPp2Get (
EFI_STATUS
EFIAPI
+ArmadaSoCDescSdMmcGet (
+ IN OUT MV_SOC_SDMMC_DESC **SdMmcDesc,
+ IN OUT UINTN *DescCount
+ )
+{
+ MV_SOC_SDMMC_DESC *Desc;
+ UINTN Index;
+
+ Desc = AllocateZeroPool (MV_SOC_MAX_SDMMC_COUNT * sizeof
(MV_SOC_SDMMC_DESC));
+ if (Desc == NULL) {
+
[edk2] [platforms: PATCH v2 12/25] Marvell/Drivers: MvBoardDesc: Extend protocol with AHCI/SDMMC/XHCI
Introduce new callback that can provide information
about NonDiscoverableDevices to the relevant drivers and libraries.
Extend ArmadaBoardDescLib with new structures (MV_BOARD_AHCI_DESC/
MV_BOARD_SDMMC_DESC/MV_BOARD_XHCI_DESC) for holding board specific
data.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas
---
Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf | 2 +
Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h | 28 +++
Silicon/Marvell/Include/Protocol/BoardDesc.h | 24 +++
Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c | 192
4 files changed, 246 insertions(+)
diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
index 6f57f06..cc0d9d4 100644
--- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
+++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
@@ -57,6 +57,8 @@
gMarvellBoardDescProtocolGuid
[Pcd]
+ gMarvellTokenSpaceGuid.PcdPciEAhci
+ gMarvellTokenSpaceGuid.PcdPciESdhci
gMarvellTokenSpaceGuid.PcdPciEXhci
gMarvellTokenSpaceGuid.PcdPp2Controllers
gMarvellTokenSpaceGuid.PcdUtmiControllersEnabled
diff --git a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
index ab94877..7e4fa4d 100644
--- a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
+++ b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
@@ -17,6 +17,34 @@
#include
//
+// NonDiscoverableDevices per-board description
+//
+
+//
+// AHCI devices per-board description
+//
+typedef struct {
+ MV_SOC_AHCI_DESC *SoC;
+ UINTN AhciDevCount;
+} MV_BOARD_AHCI_DESC;
+
+//
+// SDMMC devices per-board description
+//
+typedef struct {
+ MV_SOC_SDMMC_DESC *SoC;
+ UINTN SdMmcDevCount;
+} MV_BOARD_SDMMC_DESC;
+
+//
+// XHCI devices per-board description
+//
+typedef struct {
+ MV_SOC_XHCI_DESC *SoC;
+ UINTN XhciDevCount;
+} MV_BOARD_XHCI_DESC;
+
+//
// PP2 NIC devices per-board description
//
typedef struct {
diff --git a/Silicon/Marvell/Include/Protocol/BoardDesc.h
b/Silicon/Marvell/Include/Protocol/BoardDesc.h
index 114a0ec..edf9491 100644
--- a/Silicon/Marvell/Include/Protocol/BoardDesc.h
+++ b/Silicon/Marvell/Include/Protocol/BoardDesc.h
@@ -43,6 +43,27 @@ typedef struct _MARVELL_BOARD_DESC_PROTOCOL
MARVELL_BOARD_DESC_PROTOCOL;
typedef
EFI_STATUS
+(EFIAPI *MV_BOARD_DESC_AHCI_GET) (
+ IN MARVELL_BOARD_DESC_PROTOCOL *This,
+ IN OUT MV_BOARD_AHCI_DESC **AhciDesc
+ );
+
+typedef
+EFI_STATUS
+(EFIAPI *MV_BOARD_DESC_SDMMC_GET) (
+ IN MARVELL_BOARD_DESC_PROTOCOL *This,
+ IN OUT MV_BOARD_SDMMC_DESC **SdMmcDesc
+ );
+
+typedef
+EFI_STATUS
+(EFIAPI *MV_BOARD_DESC_XHCI_GET) (
+ IN MARVELL_BOARD_DESC_PROTOCOL *This,
+ IN OUT MV_BOARD_XHCI_DESC **XhciDesc
+ );
+
+typedef
+EFI_STATUS
(EFIAPI *MV_BOARD_DESC_PP2_GET) (
IN MARVELL_BOARD_DESC_PROTOCOL *This,
IN OUT MV_BOARD_PP2_DESC **Pp2Desc
@@ -62,8 +83,11 @@ VOID
);
struct _MARVELL_BOARD_DESC_PROTOCOL {
+ MV_BOARD_DESC_AHCI_GET BoardDescAhciGet;
MV_BOARD_DESC_PP2_GET BoardDescPp2Get;
+ MV_BOARD_DESC_SDMMC_GETBoardDescSdMmcGet;
MV_BOARD_DESC_UTMI_GET BoardDescUtmiGet;
+ MV_BOARD_DESC_XHCI_GET BoardDescXhciGet;
MV_BOARD_DESC_FREE BoardDescFree;
};
diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
index 7c0bc39..3439017 100644
--- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
+++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
@@ -37,6 +37,195 @@ MV_BOARD_DESC *mBoardDescInstance;
STATIC
EFI_STATUS
+MvBoardDescAhciGet (
+ IN MARVELL_BOARD_DESC_PROTOCOL *This,
+ IN OUT MV_BOARD_AHCI_DESC **AhciDesc
+ )
+{
+ UINT8 *AhciDeviceEnabled;
+ UINTN AhciCount, AhciDeviceTableSize, AhciIndex, Index;
+ MV_BOARD_AHCI_DESC *BoardDesc;
+ MV_SOC_AHCI_DESC *SoCDesc;
+ EFI_STATUS Status;
+
+ /* Get SoC data about all available AHCI controllers */
+ Status = ArmadaSoCDescAhciGet (, );
+ if (EFI_ERROR (Status)) {
+return Status;
+ }
+
+ /*
+ * Obtain table with enabled AHCI controllers
+ * which is represented as an array of UINT8 values
+ * (0x0 - disabled, 0x1 enabled).
+ */
+ AhciDeviceEnabled = PcdGetPtr (PcdPciEAhci);
+ if (AhciDeviceEnabled == NULL) {
+/* No AHCI on the platform */
+return EFI_SUCCESS;
+ }
+
+ AhciDeviceTableSize = PcdGetSize (PcdPciEAhci);
+
+ /* Check if PCD with AHCI controllers is correctly defined */
+ if (AhciDeviceTableSize > AhciCount) {
+DEBUG ((DEBUG_ERROR, "%a: Wrong PcdPciEAhci format\n", __FUNCTION__));
+return EFI_INVALID_PARAMETER;
+ }
+
+ /* Allocate and fill board description */
+ BoardDesc = AllocateZeroPool (AhciDeviceTableSize * sizeof
(MV_BOARD_AHCI_DESC));
+ if (BoardDesc == NULL) {
+DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n",
[edk2] [platforms: PATCH v2 18/25] Marvell/Armada7k8k: Extend ArmadaSoCDescLib with MDIO information
This patch introduces new library callback (ArmadaSoCDescMdioGet ()),
which dynamically allocates and fills MV_SOC_MDIO_DESC structure with
the SoC description of Mdio controllers.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas
---
Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
| 6
Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
| 15 ++
Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
| 29
3 files changed, 50 insertions(+)
diff --git
a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
index f372ca0..c864f94 100644
---
a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
+++
b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
@@ -38,6 +38,12 @@
#define MV_SOC_COMPHY_MUX_BITS 4
//
+// Platform description of MDIO controllers
+//
+#define MV_SOC_MDIO_BASE(Cp) (MV_SOC_CP_BASE ((Cp)) + 0x12A200)
+#define MV_SOC_MDIO_ID(Cp) (Cp)
+
+//
// Platform description of PP2 NIC
//
#define MV_SOC_PP2_BASE(Cp) MV_SOC_CP_BASE ((Cp))
diff --git a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
index a133d1c..304d068 100644
--- a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
+++ b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
@@ -37,6 +37,21 @@ ArmadaSoCDescComPhyGet (
);
//
+// MDIO
+//
+typedef struct {
+ UINTN MdioId;
+ UINTN MdioBaseAddress;
+} MV_SOC_MDIO_DESC;
+
+EFI_STATUS
+EFIAPI
+ArmadaSoCDescMdioGet (
+ IN OUT MV_SOC_MDIO_DESC **MdioDesc,
+ IN OUT UINTN *DescCount
+ );
+
+//
// NonDiscoverable devices SoC description
//
// AHCI
diff --git
a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
index 580c0f4..652677f 100644
---
a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
+++
b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
@@ -63,6 +63,35 @@ ArmadaSoCDescComPhyGet (
EFI_STATUS
EFIAPI
+ArmadaSoCDescMdioGet (
+ IN OUT MV_SOC_MDIO_DESC **MdioDesc,
+ IN OUT UINTN *DescCount
+ )
+{
+ MV_SOC_MDIO_DESC *Desc;
+ UINTN CpCount, CpIndex;
+
+ CpCount = FixedPcdGet8 (PcdMaxCpCount);
+
+ Desc = AllocateZeroPool (CpCount * sizeof (MV_SOC_MDIO_DESC));
+ if (Desc == NULL) {
+DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
+return EFI_OUT_OF_RESOURCES;
+ }
+
+ for (CpIndex = 0; CpIndex < CpCount; CpIndex++) {
+Desc[CpIndex].MdioId = MV_SOC_MDIO_ID (CpIndex);
+Desc[CpIndex].MdioBaseAddress = MV_SOC_MDIO_BASE (CpIndex);
+ }
+
+ *MdioDesc = Desc;
+ *DescCount = CpCount;
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+EFIAPI
ArmadaSoCDescAhciGet (
IN OUT MV_SOC_AHCI_DESC **AhciDesc,
IN OUT UINTN *DescCount
--
2.7.4
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[edk2] [platforms: PATCH v2 14/25] Marvell/Library: ComPhyLib: Get AHCI data with MARVELL_BOARD_DESC
ComPhy Library used to get Armada7k8k AHCI/SDMMC/XHCI controller
description from hardcoded values stored in the header file
MvHwDescLib.h. As a result it is very hard to support other
Armada SoC families with this library.
This patch updates the driver to get AHCI controller
description from newly introduced MARVELL_BOARD_DESC protocol,
and removes the dependency on the hardcoded structures.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas
---
Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf | 1 -
Silicon/Marvell/Library/ComPhyLib/ComPhyLib.inf| 6 +-
Silicon/Marvell/Include/Library/MvHwDescLib.h | 60
Silicon/Marvell/Library/ComPhyLib/ComPhyLib.h | 4 ++
Silicon/Marvell/Library/ComPhyLib/ComPhyCp110.c| 50
5 files changed, 35 insertions(+), 86 deletions(-)
diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf
b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf
index f2c173c..e888566 100644
--- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf
+++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf
@@ -47,7 +47,6 @@
[LibraryClasses]
ArmLib
- ComPhyLib
DebugLib
MemoryAllocationLib
MppLib
diff --git a/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.inf
b/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.inf
index ce0af54..f36c701 100644
--- a/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.inf
+++ b/Silicon/Marvell/Library/ComPhyLib/ComPhyLib.inf
@@ -52,12 +52,16 @@
PcdLib
SampleAtResetLib
IoLib
+ UefiBootServicesTableLib
[Sources.common]
ComPhyLib.c
ComPhyCp110.c
ComPhyMux.c
+[Protocols]
+ gMarvellBoardDescProtocolGuid ## CONSUMES
+
[FixedPcd]
gMarvellTokenSpaceGuid.PcdComPhyDevices
@@ -80,5 +84,3 @@
gMarvellTokenSpaceGuid.PcdChip3ComPhyTypes
gMarvellTokenSpaceGuid.PcdChip3ComPhySpeeds
gMarvellTokenSpaceGuid.PcdChip3ComPhyInvFlags
-
- gMarvellTokenSpaceGuid.PcdPciEAhci
diff --git a/Silicon/Marvell/Include/Library/MvHwDescLib.h
b/Silicon/Marvell/Include/Library/MvHwDescLib.h
index 5fd514c..9f383f4 100644
--- a/Silicon/Marvell/Include/Library/MvHwDescLib.h
+++ b/Silicon/Marvell/Include/Library/MvHwDescLib.h
@@ -36,7 +36,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#define __MVHWDESCLIB_H__
#include
-#include
//
// Helper macros
@@ -80,31 +79,6 @@ typedef struct {
} MVHW_MDIO_DESC;
//
-// NonDiscoverable devices description template definition
-//
-#define MVHW_MAX_XHCI_DEVS 4
-#define MVHW_MAX_AHCI_DEVS 4
-#define MVHW_MAX_SDHCI_DEVS4
-
-typedef struct {
- // XHCI
- UINT8 XhciDevCount;
- UINTN XhciBaseAddresses[MVHW_MAX_XHCI_DEVS];
- UINTN XhciMemSize[MVHW_MAX_XHCI_DEVS];
- NON_DISCOVERABLE_DEVICE_DMA_TYPE XhciDmaType[MVHW_MAX_XHCI_DEVS];
- // AHCI
- UINT8 AhciDevCount;
- UINTN AhciBaseAddresses[MVHW_MAX_AHCI_DEVS];
- UINTN AhciMemSize[MVHW_MAX_AHCI_DEVS];
- NON_DISCOVERABLE_DEVICE_DMA_TYPE AhciDmaType[MVHW_MAX_AHCI_DEVS];
- // SDHCI
- UINT8 SdhciDevCount;
- UINTN SdhciBaseAddresses[MVHW_MAX_SDHCI_DEVS];
- UINTN SdhciMemSize[MVHW_MAX_SDHCI_DEVS];
- NON_DISCOVERABLE_DEVICE_DMA_TYPE SdhciDmaType[MVHW_MAX_SDHCI_DEVS];
-} MVHW_NONDISCOVERABLE_DESC;
-
-//
// Platform description of CommonPhy devices
//
#define MVHW_CP0_COMPHY_BASE 0xF2441000
@@ -155,38 +129,4 @@ MVHW_MDIO_DESC mA7k8kMdioDescTemplate = {\
{ MVHW_CP0_MDIO_BASE, MVHW_CP1_MDIO_BASE }\
}
-//
-// Platform description of NonDiscoverable devices
-//
-#define MVHW_CP0_XHCI0_BASE0xF250
-#define MVHW_CP0_XHCI1_BASE0xF251
-#define MVHW_CP1_XHCI0_BASE0xF450
-#define MVHW_CP1_XHCI1_BASE0xF451
-
-#define MVHW_CP0_AHCI0_BASE0xF254
-#define MVHW_CP0_AHCI0_ID 0
-#define MVHW_CP1_AHCI0_BASE0xF454
-#define MVHW_CP1_AHCI0_ID 1
-
-#define MVHW_AP0_SDHCI0_BASE 0xF06E
-#define MVHW_CP0_SDHCI0_BASE 0xF278
-
-#define DECLARE_A7K8K_NONDISCOVERABLE_TEMPLATE \
-STATIC \
-MVHW_NONDISCOVERABLE_DESC mA7k8kNonDiscoverableDescTemplate = {\
- 4, /* XHCI */\
- { MVHW_CP0_XHCI0_BASE, MVHW_CP0_XHCI1_BASE, MVHW_CP1_XHCI0_BASE,
MVHW_CP1_XHCI1_BASE },\
- { SIZE_16KB, SIZE_16KB, SIZE_16KB, SIZE_16KB },\
- { NonDiscoverableDeviceDmaTypeCoherent,
NonDiscoverableDeviceDmaTypeCoherent,\
-NonDiscoverableDeviceDmaTypeCoherent, NonDiscoverableDeviceDmaTypeCoherent
},\
- 2, /* AHCI */\
- { MVHW_CP0_AHCI0_BASE, MVHW_CP1_AHCI0_BASE },\
- { SIZE_8KB, SIZE_8KB },\
- { NonDiscoverableDeviceDmaTypeCoherent, NonDiscoverableDeviceDmaTypeCoherent
},\
- 2, /* SDHCI */\
- { MVHW_AP0_SDHCI0_BASE, MVHW_CP0_SDHCI0_BASE },\
- { SIZE_1KB, SIZE_1KB },\
- { NonDiscoverableDeviceDmaTypeCoherent, NonDiscoverableDeviceDmaTypeCoherent
}\
-}
-
#endif /* __MVHWDESCLIB_H__ */
diff --git
[edk2] [platforms: PATCH v2 08/25] Marvell/Armada7k8k: Extend ArmadaSoCDescLib with PP2 information
This patch introduces new library callback (ArmadaSoCDescPp2Get ()),
which dynamically allocates and fills MV_SOC_PP2_DESC structure with
the SoC description of PP2 NICs.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas
---
Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
| 6
Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
| 15 ++
Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
| 29
3 files changed, 50 insertions(+)
diff --git
a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
index c5711b0..d63c3b5 100644
---
a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
+++
b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
@@ -24,6 +24,12 @@
#define MV_SOC_CP_BASE(Cp) (0xF200 + ((Cp) * 0x200))
//
+// Platform description of PP2 NIC
+//
+#define MV_SOC_PP2_BASE(Cp) MV_SOC_CP_BASE ((Cp))
+#define MV_SOC_PP2_CLK_FREQ 3
+
+//
// Platform description of UTMI PHY's
//
#define MV_SOC_UTMI_PER_CP_COUNT 2
diff --git a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
index 0d45684..cafcc0f 100644
--- a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
+++ b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
@@ -15,6 +15,21 @@
#define __ARMADA_SOC_DESC_LIB_H__
//
+// PP2 NIC devices SoC description
+//
+typedef struct {
+ UINTN Pp2BaseAddress;
+ UINTN Pp2ClockFrequency;
+} MV_SOC_PP2_DESC;
+
+EFI_STATUS
+EFIAPI
+ArmadaSoCDescPp2Get (
+ IN OUT MV_SOC_PP2_DESC **Pp2Desc,
+ IN OUT UINTN *DescCount
+ );
+
+//
// UTMI PHY devices SoC description
//
typedef struct {
diff --git
a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
index 63fb224..61b4e30 100644
---
a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
+++
b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
@@ -30,6 +30,35 @@
EFI_STATUS
EFIAPI
+ArmadaSoCDescPp2Get (
+ IN OUT MV_SOC_PP2_DESC **Pp2Desc,
+ IN OUT UINTN *DescCount
+ )
+{
+ MV_SOC_PP2_DESC *Desc;
+ UINTN CpCount, CpIndex;
+
+ CpCount = FixedPcdGet8 (PcdMaxCpCount);
+
+ Desc = AllocateZeroPool (CpCount * sizeof (MV_SOC_PP2_DESC));
+ if (Desc == NULL) {
+DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
+return EFI_OUT_OF_RESOURCES;
+ }
+
+ for (CpIndex = 0; CpIndex < CpCount; CpIndex++) {
+Desc[CpIndex].Pp2BaseAddress = MV_SOC_PP2_BASE (CpIndex);
+Desc[CpIndex].Pp2ClockFrequency = MV_SOC_PP2_CLK_FREQ;
+ }
+
+ *Pp2Desc = Desc;
+ *DescCount = CpCount;
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+EFIAPI
ArmadaSoCDescUtmiGet (
IN OUT MV_SOC_UTMI_DESC **UtmiDesc,
IN OUT UINTN *DescCount
--
2.7.4
___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel
[edk2] [platforms: PATCH v2 13/25] Marvell/Drivers: NonDiscoverable: Switch to use MARVELL_BOARD_DESC
NonDiscoverableDevices driver used to get Armada7k8k
AHCI/SDMMC/XHCI controller description from hardcoded values
stored in the header file MvHwDescLib.h. As a result it is
very hard to support other Armada SoC families with this driver.
This patch updates the driver to get AHCI/SDMMC/XHCI controller
description from newly introduced MARVELL_BOARD_DESC protocol,
and removes the dependency on the hardcoded structures.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas
Reviewed-by: Leif Lindholm
---
Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.inf | 6 +-
Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.c | 100
++--
2 files changed, 52 insertions(+), 54 deletions(-)
diff --git a/Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.inf
b/Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.inf
index b62b3fb..98e5b0c 100644
--- a/Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.inf
+++ b/Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.inf
@@ -52,10 +52,8 @@
NonDiscoverableDeviceRegistrationLib
UefiDriverEntryPoint
-[Pcd]
- gMarvellTokenSpaceGuid.PcdPciEAhci
- gMarvellTokenSpaceGuid.PcdPciESdhci
- gMarvellTokenSpaceGuid.PcdPciEXhci
+[Protocols]
+ gMarvellBoardDescProtocolGuid
[Depex]
TRUE
diff --git a/Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.c
b/Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.c
index 6ff90a5..c5cf904 100644
--- a/Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.c
+++ b/Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.c
@@ -35,50 +35,33 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#include
#include
-#include
#include
#include
+#include
#include
-DECLARE_A7K8K_NONDISCOVERABLE_TEMPLATE;
-
-//
-// Tables with used devices
-//
-STATIC UINT8 * CONST XhciDeviceTable = FixedPcdGetPtr (PcdPciEXhci);
-STATIC UINT8 * CONST AhciDeviceTable = FixedPcdGetPtr (PcdPciEAhci);
-STATIC UINT8 * CONST SdhciDeviceTable = FixedPcdGetPtr (PcdPciESdhci);
-
//
// NonDiscoverable devices registration
//
STATIC
EFI_STATUS
NonDiscoverableInitXhci (
+ IN MV_BOARD_XHCI_DESC *Desc
)
{
- MVHW_NONDISCOVERABLE_DESC *Desc =
EFI_STATUS Status;
UINT8 i;
- if (PcdGetSize (PcdPciEXhci) < Desc->XhciDevCount) {
-DEBUG((DEBUG_ERROR, "NonDiscoverable: Wrong PcdPciEXhci format\n"));
-return EFI_INVALID_PARAMETER;
- }
-
for (i = 0; i < Desc->XhciDevCount; i++) {
-if (!MVHW_DEV_ENABLED (Xhci, i)) {
- continue;
-}
-
Status = RegisterNonDiscoverableMmioDevice (
NonDiscoverableDeviceTypeXhci,
- Desc->XhciDmaType[i],
+ Desc[i].SoC->XhciDmaType,
NULL,
NULL,
1,
- Desc->XhciBaseAddresses[i], Desc->XhciMemSize[i]
+ Desc[i].SoC->XhciBaseAddress,
+ Desc[i].SoC->XhciMemSize
);
if (EFI_ERROR(Status)) {
@@ -93,29 +76,21 @@ NonDiscoverableInitXhci (
STATIC
EFI_STATUS
NonDiscoverableInitAhci (
+ IN MV_BOARD_AHCI_DESC *Desc
)
{
- MVHW_NONDISCOVERABLE_DESC *Desc =
EFI_STATUS Status;
UINT8 i;
- if (PcdGetSize (PcdPciEAhci) < Desc->AhciDevCount) {
-DEBUG((DEBUG_ERROR, "NonDiscoverable: Wrong PcdPciEAhci format\n"));
-return EFI_INVALID_PARAMETER;
- }
-
for (i = 0; i < Desc->AhciDevCount; i++) {
-if (!MVHW_DEV_ENABLED (Ahci, i)) {
- continue;
-}
-
Status = RegisterNonDiscoverableMmioDevice (
NonDiscoverableDeviceTypeAhci,
- Desc->AhciDmaType[i],
+ Desc[i].SoC->AhciDmaType,
NULL,
NULL,
1,
- Desc->AhciBaseAddresses[i], Desc->AhciMemSize[i]
+ Desc[i].SoC->AhciBaseAddress,
+ Desc[i].SoC->AhciMemSize
);
if (EFI_ERROR(Status)) {
@@ -130,29 +105,21 @@ NonDiscoverableInitAhci (
STATIC
EFI_STATUS
NonDiscoverableInitSdhci (
+ IN MV_BOARD_SDMMC_DESC *Desc
)
{
- MVHW_NONDISCOVERABLE_DESC *Desc =
EFI_STATUS Status;
UINT8 i;
- if (PcdGetSize (PcdPciESdhci) < Desc->SdhciDevCount) {
-DEBUG((DEBUG_ERROR, "NonDiscoverable: Wrong PcdPciESdhci format\n"));
-return EFI_INVALID_PARAMETER;
- }
-
- for (i = 0; i < Desc->SdhciDevCount; i++) {
-if (!MVHW_DEV_ENABLED (Sdhci, i)) {
- continue;
-}
-
+ for (i = 0; i < Desc->SdMmcDevCount; i++) {
Status = RegisterNonDiscoverableMmioDevice (
NonDiscoverableDeviceTypeSdhci,
- Desc->SdhciDmaType[i],
+ Desc[i].SoC->SdMmcDmaType,
NULL,
NULL,
1,
- Desc->SdhciBaseAddresses[i],
[edk2] [platforms: PATCH v2 16/25] Marvell/Drivers: MvBoardDesc: Extend protocol with ComPhy support
Introduce new callback that can provide information
about ComPhy controllers to the ComPhyLib.
Extend ArmadaBoardDescLib with new structure MV_BOARD_COMPHY_DESC,
for holding board specific data. In further steps it can
be extended and replace PCD SerDes lanes' representation with the
appropriate structures.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas
---
Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf | 1 +
Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h | 8 +++
Silicon/Marvell/Include/Protocol/BoardDesc.h | 8 +++
Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c | 64
4 files changed, 81 insertions(+)
diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
index cc0d9d4..dea99fd 100644
--- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
+++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
@@ -57,6 +57,7 @@
gMarvellBoardDescProtocolGuid
[Pcd]
+ gMarvellTokenSpaceGuid.PcdComPhyDevices
gMarvellTokenSpaceGuid.PcdPciEAhci
gMarvellTokenSpaceGuid.PcdPciESdhci
gMarvellTokenSpaceGuid.PcdPciEXhci
diff --git a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
index 7e4fa4d..32bd915 100644
--- a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
+++ b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
@@ -17,6 +17,14 @@
#include
//
+// COMPHY controllers per-board description
+//
+typedef struct {
+ MV_SOC_COMPHY_DESC *SoC;
+ UINTN ComPhyDevCount;
+} MV_BOARD_COMPHY_DESC;
+
+//
// NonDiscoverableDevices per-board description
//
diff --git a/Silicon/Marvell/Include/Protocol/BoardDesc.h
b/Silicon/Marvell/Include/Protocol/BoardDesc.h
index edf9491..b6dac75 100644
--- a/Silicon/Marvell/Include/Protocol/BoardDesc.h
+++ b/Silicon/Marvell/Include/Protocol/BoardDesc.h
@@ -43,6 +43,13 @@ typedef struct _MARVELL_BOARD_DESC_PROTOCOL
MARVELL_BOARD_DESC_PROTOCOL;
typedef
EFI_STATUS
+(EFIAPI *MV_BOARD_DESC_COMPHY_GET) (
+ IN MARVELL_BOARD_DESC_PROTOCOL *This,
+ IN OUT MV_BOARD_COMPHY_DESC**ComPhyDesc
+ );
+
+typedef
+EFI_STATUS
(EFIAPI *MV_BOARD_DESC_AHCI_GET) (
IN MARVELL_BOARD_DESC_PROTOCOL *This,
IN OUT MV_BOARD_AHCI_DESC **AhciDesc
@@ -84,6 +91,7 @@ VOID
struct _MARVELL_BOARD_DESC_PROTOCOL {
MV_BOARD_DESC_AHCI_GET BoardDescAhciGet;
+ MV_BOARD_DESC_COMPHY_GET BoardDescComPhyGet;
MV_BOARD_DESC_PP2_GET BoardDescPp2Get;
MV_BOARD_DESC_SDMMC_GETBoardDescSdMmcGet;
MV_BOARD_DESC_UTMI_GET BoardDescUtmiGet;
diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
index 3439017..6bbe40b 100644
--- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
+++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c
@@ -37,6 +37,69 @@ MV_BOARD_DESC *mBoardDescInstance;
STATIC
EFI_STATUS
+MvBoardDescComPhyGet (
+ IN MARVELL_BOARD_DESC_PROTOCOL *This,
+ IN OUT MV_BOARD_COMPHY_DESC**ComPhyDesc
+ )
+{
+ UINT8 *ComPhyDeviceEnabled;
+ UINTN ComPhyCount, ComPhyDeviceTableSize, ComPhyIndex, Index;
+ MV_BOARD_COMPHY_DESC *BoardDesc;
+ MV_SOC_COMPHY_DESC *SoCDesc;
+ EFI_STATUS Status;
+
+ /* Get SoC data about all available ComPhy controllers */
+ Status = ArmadaSoCDescComPhyGet (, );
+ if (EFI_ERROR (Status)) {
+return Status;
+ }
+
+ /*
+ * Obtain table with enabled ComPhy controllers
+ * which is represented as an array of UINT8 values
+ * (0x0 - disabled, 0x1 enabled).
+ */
+ ComPhyDeviceEnabled = PcdGetPtr (PcdComPhyDevices);
+ if (ComPhyDeviceEnabled == NULL) {
+/* No ComPhy controllers declared */
+return EFI_NOT_FOUND;
+ }
+
+ ComPhyDeviceTableSize = PcdGetSize (PcdComPhyDevices);
+
+ /* Check if PCD with ComPhy is correctly defined */
+ if (ComPhyDeviceTableSize > ComPhyCount) {
+DEBUG ((DEBUG_ERROR, "%a: Wrong PcdComPhyDevices format\n", __FUNCTION__));
+return EFI_INVALID_PARAMETER;
+ }
+
+ /* Allocate and fill board description */
+ BoardDesc = AllocateZeroPool (ComPhyDeviceTableSize * sizeof
(MV_BOARD_COMPHY_DESC));
+ if (BoardDesc == NULL) {
+DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
+return EFI_OUT_OF_RESOURCES;
+ }
+
+ ComPhyIndex = 0;
+ for (Index = 0; Index < ComPhyDeviceTableSize; Index++) {
+if (!ComPhyDeviceEnabled[Index]) {
+ DEBUG ((DEBUG_ERROR, "%a: Skip ComPhy controller %d\n", __FUNCTION__,
Index));
+ continue;
+}
+
+BoardDesc[ComPhyIndex].SoC = [Index];
+ComPhyIndex++;
+ }
+
+ BoardDesc->ComPhyDevCount = ComPhyIndex;
+
+ *ComPhyDesc = BoardDesc;
+
+ return EFI_SUCCESS;
+}
+
+STATIC
+EFI_STATUS
MvBoardDescAhciGet (
IN MARVELL_BOARD_DESC_PROTOCOL *This,
IN OUT MV_BOARD_AHCI_DESC **AhciDesc
@@ -392,6 +455,7 @@ MvBoardDescInitProtocol (
)
{
BoardDescProtocol->BoardDescAhciGet
[edk2] [platforms: PATCH v2 07/25] Marvell/Library: RealTimeClockLib: Simplify obtaining base address
Hitherto mechanism of obtaining RTC base address proved
to be not flexible enough to support more than one SoC
family. Because there can be a single controller in use
anyway, this patch drops utilization of MvHwDescLib
header with hardcoded structure and replace it with
simple UINT64 PCD.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas
Reviewed-by: Leif Lindholm
---
Silicon/Marvell/Marvell.dec | 2
+-
Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc | 2
+-
Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc | 2
+-
Platform/SolidRun/Armada80x0McBin/Armada80x0McBin.dsc| 2
+-
Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.inf | 2
+-
Silicon/Marvell/Include/Library/MvHwDescLib.h| 25
-
Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.c | 29
7 files changed, 11 insertions(+), 53 deletions(-)
diff --git a/Silicon/Marvell/Marvell.dec b/Silicon/Marvell/Marvell.dec
index 6861cc4..4def897 100644
--- a/Silicon/Marvell/Marvell.dec
+++ b/Silicon/Marvell/Marvell.dec
@@ -195,7 +195,7 @@
gMarvellTokenSpaceGuid.PcdPciESdhci|{ 0x0 }|VOID*|0x335
#RTC
- gMarvellTokenSpaceGuid.PcdRtcEnabled|{ 0x0 }|VOID*|0x4052
+ gMarvellTokenSpaceGuid.PcdRtcBaseAddress|0x0|UINT64|0x4052
#TRNG
gMarvellTokenSpaceGuid.PcdEip76TrngBaseAddress|0x0|UINT64|0x5053
diff --git a/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc
b/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc
index 68813f8..5ccee1b 100644
--- a/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc
+++ b/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc
@@ -134,4 +134,4 @@
gMarvellTokenSpaceGuid.PcdPciESdhci|{ 0x1, 0x1 }
#RTC
- gMarvellTokenSpaceGuid.PcdRtcEnabled|{ 0x1 }
+ gMarvellTokenSpaceGuid.PcdRtcBaseAddress|0xF2284000
diff --git a/Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc
b/Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc
index 582e939..2425c45 100644
--- a/Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc
+++ b/Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc
@@ -155,4 +155,4 @@
gMarvellTokenSpaceGuid.PcdPciESdhci|{ 0x1, 0x1 }
#RTC
- gMarvellTokenSpaceGuid.PcdRtcEnabled|{ 0x0, 0x1 }
+ gMarvellTokenSpaceGuid.PcdRtcBaseAddress|0xF4284000
diff --git a/Platform/SolidRun/Armada80x0McBin/Armada80x0McBin.dsc
b/Platform/SolidRun/Armada80x0McBin/Armada80x0McBin.dsc
index 8230d67..1baed88 100644
--- a/Platform/SolidRun/Armada80x0McBin/Armada80x0McBin.dsc
+++ b/Platform/SolidRun/Armada80x0McBin/Armada80x0McBin.dsc
@@ -146,4 +146,4 @@
gMarvellTokenSpaceGuid.PcdPciESdhci|{ 0x1, 0x1 }
#RTC
- gMarvellTokenSpaceGuid.PcdRtcEnabled|{ 0x0, 0x1 }
+ gMarvellTokenSpaceGuid.PcdRtcBaseAddress|0xF4284000
diff --git
a/Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.inf
b/Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.inf
index 59c71c4..1ecd444 100644
--- a/Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.inf
+++ b/Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.inf
@@ -49,7 +49,7 @@
gEfiEventVirtualAddressChangeGuid
[Pcd]
- gMarvellTokenSpaceGuid.PcdRtcEnabled
+ gMarvellTokenSpaceGuid.PcdRtcBaseAddress
[Depex.common.DXE_RUNTIME_DRIVER]
gEfiCpuArchProtocolGuid
diff --git a/Silicon/Marvell/Include/Library/MvHwDescLib.h
b/Silicon/Marvell/Include/Library/MvHwDescLib.h
index e13814a..34d03d4 100644
--- a/Silicon/Marvell/Include/Library/MvHwDescLib.h
+++ b/Silicon/Marvell/Include/Library/MvHwDescLib.h
@@ -116,17 +116,6 @@ typedef struct {
} MVHW_PP2_DESC;
//
-// RealTimeClock devices description template definition
-//
-#define MVHW_MAX_RTC_DEVS 2
-
-typedef struct {
- UINT8 RtcDevCount;
- UINTN RtcBaseAddresses[MVHW_MAX_RTC_DEVS];
- UINTN RtcMemSize[MVHW_MAX_RTC_DEVS];
-} MVHW_RTC_DESC;
-
-//
// Platform description of CommonPhy devices
//
#define MVHW_CP0_COMPHY_BASE 0xF2441000
@@ -226,18 +215,4 @@ MVHW_PP2_DESC mA7k8kPp2DescTemplate = {\
{ MVHW_PP2_CLK_FREQ, MVHW_PP2_CLK_FREQ } \
}
-//
-// Platform description of RealTimeClock devices
-//
-#define MVHW_CP0_RTC0_BASE 0xF2284000
-#define MVHW_CP1_RTC0_BASE 0xF4284000
-
-#define DECLARE_A7K8K_RTC_TEMPLATE \
-STATIC \
-MVHW_RTC_DESC mA7k8kRtcDescTemplate = {\
- 2,\
- { MVHW_CP0_RTC0_BASE, MVHW_CP1_RTC0_BASE },\
- { SIZE_4KB, SIZE_4KB }\
-}
-
#endif /* __MVHWDESCLIB_H__ */
diff --git
a/Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.c
b/Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.c
index d671b6a..087bd9a 100644
--- a/Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.c
+++ b/Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.c
@@ -26,7 +26,6 @@
#include
#include
#include
-#include
#include
#include
[edk2] [platforms: PATCH v2 10/25] Marvell/Drivers: Pp2Dxe: Switch to use MARVELL_BOARD_DESC protocol
Pp2Dxe driver used to get Armada7k8k PP2 controller description from
hardcoded values stored in the header file MvHwDescLib.h.
As a result it is very hard to support other Armada SoC families
with this driver.
This patch updates the driver to get PP2 controller description from
newly introduced MARVELL_BOARD_DESC protocol, and removes the dependency
on the hardcoded structures.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas
---
Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.inf | 2 +-
Silicon/Marvell/Include/Library/MvHwDescLib.h | 26
Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c | 43
3 files changed, 19 insertions(+), 52 deletions(-)
diff --git a/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.inf
b/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.inf
index fcd0611..be536ab 100644
--- a/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.inf
+++ b/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.inf
@@ -67,11 +67,11 @@
gEfiSimpleNetworkProtocolGuid
gEfiDevicePathProtocolGuid
gEfiCpuArchProtocolGuid
+ gMarvellBoardDescProtocolGuid
gMarvellMdioProtocolGuid
gMarvellPhyProtocolGuid
[Pcd]
- gMarvellTokenSpaceGuid.PcdPp2Controllers
gMarvellTokenSpaceGuid.PcdPp2GopIndexes
gMarvellTokenSpaceGuid.PcdPp2InterfaceAlwaysUp
gMarvellTokenSpaceGuid.PcdPp2InterfaceSpeed
diff --git a/Silicon/Marvell/Include/Library/MvHwDescLib.h
b/Silicon/Marvell/Include/Library/MvHwDescLib.h
index 34d03d4..5fd514c 100644
--- a/Silicon/Marvell/Include/Library/MvHwDescLib.h
+++ b/Silicon/Marvell/Include/Library/MvHwDescLib.h
@@ -105,17 +105,6 @@ typedef struct {
} MVHW_NONDISCOVERABLE_DESC;
//
-// PP2 NIC devices description template definition
-//
-#define MVHW_MAX_PP2_DEVS 4
-
-typedef struct {
- UINT8 Pp2DevCount;
- UINTN Pp2BaseAddresses[MVHW_MAX_PP2_DEVS];
- UINTN Pp2ClockFrequency[MVHW_MAX_PP2_DEVS];
-} MVHW_PP2_DESC;
-
-//
// Platform description of CommonPhy devices
//
#define MVHW_CP0_COMPHY_BASE 0xF2441000
@@ -200,19 +189,4 @@ MVHW_NONDISCOVERABLE_DESC
mA7k8kNonDiscoverableDescTemplate = {\
{ NonDiscoverableDeviceDmaTypeCoherent, NonDiscoverableDeviceDmaTypeCoherent
}\
}
-//
-// Platform description of Pp2 NIC devices
-//
-#define MVHW_CP0_PP2_BASE 0xF200
-#define MVHW_CP1_PP2_BASE 0xF400
-#define MVHW_PP2_CLK_FREQ 3
-
-#define DECLARE_A7K8K_PP2_TEMPLATE \
-STATIC \
-MVHW_PP2_DESC mA7k8kPp2DescTemplate = {\
- 2,\
- { MVHW_CP0_PP2_BASE, MVHW_CP1_PP2_BASE },\
- { MVHW_PP2_CLK_FREQ, MVHW_PP2_CLK_FREQ } \
-}
-
#endif /* __MVHWDESCLIB_H__ */
diff --git a/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c
b/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c
index 3ed10f6..02b2798 100644
--- a/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c
+++ b/Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.c
@@ -32,6 +32,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
***/
+#include
#include
#include
#include
@@ -42,7 +43,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#include
#include
#include
-#include
#include
#include
#include
@@ -54,8 +54,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#define ReturnUnlock(tpl, status) do { gBS->RestoreTPL (tpl); return (status);
} while(0)
-DECLARE_A7K8K_PP2_TEMPLATE;
-
STATIC PP2_DEVICE_PATH Pp2DevicePathTemplate = {
{
{
@@ -1343,35 +1341,28 @@ Pp2DxeInitialise (
IN EFI_SYSTEM_TABLE *SystemTable
)
{
- MVHW_PP2_DESC *Desc =
- UINT8 *Pp2DeviceTable, Index;
+ MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol;
+ MV_BOARD_PP2_DESC *Pp2BoardDesc;
MVPP2_SHARED *Mvpp2Shared;
EFI_STATUS Status;
+ UINTN Index;
/* Obtain table with enabled Pp2 devices */
- Pp2DeviceTable = (UINT8 *)PcdGetPtr (PcdPp2Controllers);
- if (Pp2DeviceTable == NULL) {
-DEBUG ((DEBUG_ERROR, "Missing PcdPp2Controllers\n"));
-return EFI_INVALID_PARAMETER;
- }
-
- if (PcdGetSize (PcdPp2Controllers) > MVHW_MAX_PP2_DEVS) {
-DEBUG ((DEBUG_ERROR, "Wrong PcdPp2Controllers format\n"));
-return EFI_INVALID_PARAMETER;
+ Status = gBS->LocateProtocol (,
+ NULL,
+ (VOID **));
+ if (EFI_ERROR (Status)) {
+return Status;
}
- /* Check amount of declared ports */
- if (PcdGetSize (PcdPp2Port2Controller) > Desc->Pp2DevCount * MVPP2_MAX_PORT)
{
-DEBUG ((DEBUG_ERROR, "Pp2Dxe: Wrong too many ports declared\n"));
-return EFI_INVALID_PARAMETER;
+ Status = BoardDescProtocol->BoardDescPp2Get (BoardDescProtocol,
+);
+ if (EFI_ERROR (Status)) {
+return Status;
}
/* Initialize enabled chips */
- for (Index = 0; Index < PcdGetSize (PcdPp2Controllers); Index++) {
-if (!MVHW_DEV_ENABLED (Pp2, Index)) {
- DEBUG ((DEBUG_ERROR, "Skip Pp2 controller %d\n", Index));
- continue;
-}
+ for (Index = 0; Index <
[edk2] [platforms: PATCH v2 06/25] Marvell/Library: UtmiPhyLib: Switch to use MARVELL_BOARD_DESC protocol
UTMI driver used to get Armada7k8k UTMI controller description from
hardcoded values stored in the header file MvHwDescLib.h.
As a result it is very hard to support other Armada SoC families
with this driver.
This patch updates the driver to get UTMI controller description from
newly introduced MARVELL_BOARD_DESC protocol, and removes the dependency
on the hardcoded structures. Use the protocol and pass information to
further to the library init routine.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas
Reviewed-by: Leif Lindholm
---
Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf | 1 -
Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.inf | 9 ++-
Silicon/Marvell/Include/Library/MvHwDescLib.h | 47
--
Silicon/Marvell/Include/Library/UtmiPhyLib.h | 2 +
Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.h| 5 ++
Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.c| 65
+++-
6 files changed, 32 insertions(+), 97 deletions(-)
diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf
b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf
index d38b467..f2c173c 100644
--- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf
+++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf
@@ -51,7 +51,6 @@
DebugLib
MemoryAllocationLib
MppLib
- UtmiPhyLib
[Sources.common]
Armada7k8kLib.c
diff --git a/Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.inf
b/Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.inf
index 0876879..e2381f4 100644
--- a/Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.inf
+++ b/Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.inf
@@ -51,11 +51,10 @@
IoLib
MemoryAllocationLib
PcdLib
+ UefiBootServicesTableLib
+
+[Protocols]
+ gMarvellBoardDescProtocolGuid ## CONSUMES
[Sources.common]
UtmiPhyLib.c
-
-[Pcd]
- gMarvellTokenSpaceGuid.PcdUtmiControllersEnabled
- gMarvellTokenSpaceGuid.PcdUtmiPortType
- gMarvellTokenSpaceGuid.PcdPciEXhci
diff --git a/Silicon/Marvell/Include/Library/MvHwDescLib.h
b/Silicon/Marvell/Include/Library/MvHwDescLib.h
index 9ae03d0..e13814a 100644
--- a/Silicon/Marvell/Include/Library/MvHwDescLib.h
+++ b/Silicon/Marvell/Include/Library/MvHwDescLib.h
@@ -127,19 +127,6 @@ typedef struct {
} MVHW_RTC_DESC;
//
-// UTMI PHY's description template definition
-//
-
-typedef struct {
- UINT8 UtmiDevCount;
- UINT32 UtmiPhyId[MVHW_MAX_XHCI_DEVS];
- UINTN UtmiBaseAddresses[MVHW_MAX_XHCI_DEVS];
- UINTN UtmiConfigAddresses[MVHW_MAX_XHCI_DEVS];
- UINTN UtmiUsbConfigAddresses[MVHW_MAX_XHCI_DEVS];
- UINTN UtmiMuxBitCount[MVHW_MAX_XHCI_DEVS];
-} MVHW_UTMI_DESC;
-
-//
// Platform description of CommonPhy devices
//
#define MVHW_CP0_COMPHY_BASE 0xF2441000
@@ -253,38 +240,4 @@ MVHW_RTC_DESC mA7k8kRtcDescTemplate = {\
{ SIZE_4KB, SIZE_4KB }\
}
-//
-// Platform description of UTMI PHY's
-//
-#define MVHW_CP0_UTMI0_BASE0xF258
-#define MVHW_CP0_UTMI0_CFG_BASE0xF2440440
-#define MVHW_CP0_UTMI0_USB_CFG_BASE0xF2440420
-#define MVHW_CP0_UTMI0_ID 0x0
-#define MVHW_CP0_UTMI1_BASE0xF2581000
-#define MVHW_CP0_UTMI1_CFG_BASE0xF2440444
-#define MVHW_CP0_UTMI1_USB_CFG_BASE0xF2440420
-#define MVHW_CP0_UTMI1_ID 0x1
-#define MVHW_CP1_UTMI0_BASE0xF458
-#define MVHW_CP1_UTMI0_CFG_BASE0xF4440440
-#define MVHW_CP1_UTMI0_USB_CFG_BASE0xF4440420
-#define MVHW_CP1_UTMI0_ID 0x0
-#define MVHW_CP1_UTMI1_BASE0xF4581000
-#define MVHW_CP1_UTMI1_CFG_BASE0xF4440444
-#define MVHW_CP1_UTMI1_USB_CFG_BASE0xF4440420
-#define MVHW_CP1_UTMI1_ID 0x1
-
-#define DECLARE_A7K8K_UTMI_TEMPLATE \
-STATIC \
-MVHW_UTMI_DESC mA7k8kUtmiDescTemplate = {\
- 4,\
- { MVHW_CP0_UTMI0_ID, MVHW_CP0_UTMI1_ID,\
-MVHW_CP1_UTMI0_ID, MVHW_CP1_UTMI1_ID },\
- { MVHW_CP0_UTMI0_BASE, MVHW_CP0_UTMI1_BASE,\
-MVHW_CP1_UTMI0_BASE, MVHW_CP1_UTMI1_BASE },\
- { MVHW_CP0_UTMI0_CFG_BASE, MVHW_CP0_UTMI1_CFG_BASE,\
-MVHW_CP1_UTMI0_CFG_BASE, MVHW_CP1_UTMI1_CFG_BASE },\
- { MVHW_CP0_UTMI0_USB_CFG_BASE, MVHW_CP0_UTMI1_USB_CFG_BASE,\
-MVHW_CP1_UTMI0_USB_CFG_BASE, MVHW_CP1_UTMI1_USB_CFG_BASE }\
-}
-
#endif /* __MVHWDESCLIB_H__ */
diff --git a/Silicon/Marvell/Include/Library/UtmiPhyLib.h
b/Silicon/Marvell/Include/Library/UtmiPhyLib.h
index 7c62cba..6f4e355 100644
--- a/Silicon/Marvell/Include/Library/UtmiPhyLib.h
+++ b/Silicon/Marvell/Include/Library/UtmiPhyLib.h
@@ -35,6 +35,8 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#ifndef __UTMIPHYLIB_H__
#define __UTMIPHYLIB_H__
+#include
+
EFI_STATUS
UtmiPhyInit (
VOID
diff --git a/Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.h
b/Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.h
index 0d7d72e..7e56f1a 100644
---
[edk2] [platforms: PATCH v2 05/25] Marvell/Armada7k8k: Enable board description driver compilation
From: jinghua This patch enables compilation of MvBoardDescDxe driver for Armada70x0-DB, Armada80x0-DB and Armada80x0McBin. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: jinghua Signed-off-by: Marcin Wojtas Reviewed-by: Leif Lindholm --- Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc | 2 ++ Silicon/Marvell/Armada7k8k/Armada7k8k.fdf | 1 + 2 files changed, 3 insertions(+) diff --git a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc b/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc index 75fa3d4..a9d67a2 100644 --- a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc +++ b/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc @@ -32,6 +32,7 @@ #SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. # [LibraryClasses.common] + ArmadaSoCDescLib|Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.inf ArmPlatformLib|Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf ComPhyLib|Silicon/Marvell/Library/ComPhyLib/ComPhyLib.inf MppLib|Silicon/Marvell/Library/MppLib/MppLib.inf @@ -449,6 +450,7 @@ ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf # Platform Initialization + Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf Silicon/Marvell/Armada7k8k/Drivers/PlatInitDxe/PlatInitDxe.inf # Platform drivers diff --git a/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf b/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf index 180b6c9..18d5d06 100644 --- a/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf +++ b/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf @@ -106,6 +106,7 @@ FvNameGuid = 5eda4200-2c5f-43cb-9da3-0baf74b1b30c # # Platform Initialization # + INF Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf INF Silicon/Marvell/Armada7k8k/Drivers/PlatInitDxe/PlatInitDxe.inf # PI DXE Drivers producing Architectural Protocols (EFI Services) -- 2.7.4 ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
[edk2] [platforms: PATCH v2 01/25] Marvell/Library: Introduce ArmadaSoCDescLib class
From: jinghua
ArmadaSoCDescLib is a per SoC family library, which provides SoC
description, like register base of some hardware module controller,
COMPHY/I2C/NETWORK etc., which right now is hardcoded in MvHwDescLib.h.
There will be a new protocol, which gets SoC description from this
library, and provides board description based on enable/disable
values of each hardware module controller in dsc file.
As a first example implement obtaining UTMI controllers information.
Remaining interfaces will be added in follow-up commits.
This patch introduces new library callback (ArmadaSoCDescUtmiGet ()),
which dynamically allocates and fills MV_SOC_UTMI_DESC structure,
SoC description of UTMI PHYs. A new PCD is introduced (PcdMaxCpCount)
which stores maximal amount of CP110 blocks in the SoC family.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: jinghua
Signed-off-by: Marcin Wojtas
---
Silicon/Marvell/Marvell.dec
| 4 ++
Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.inf
| 37 +++
Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
| 35 +++
Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
| 33 ++
Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
| 65
5 files changed, 174 insertions(+)
create mode 100644
Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.inf
create mode 100644
Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
create mode 100644 Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
create mode 100644
Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
diff --git a/Silicon/Marvell/Marvell.dec b/Silicon/Marvell/Marvell.dec
index be74b4e..2a92eff 100644
--- a/Silicon/Marvell/Marvell.dec
+++ b/Silicon/Marvell/Marvell.dec
@@ -60,6 +60,7 @@
gMarvellSpiFlashDxeGuid = { 0x49d7fb74, 0x306d, 0x42bd, { 0x94, 0xc8, 0xc0,
0xc5, 0x4b, 0x18, 0x1d, 0xd7 } }
[LibraryClasses]
+ ArmadaSoCDescLib|Include/Library/ArmadaSoCDescLib.h
SampleAtResetLib|Include/Library/SampleAtResetLib.h
[Protocols]
@@ -68,6 +69,9 @@
gMarvellPlatformInitCompleteProtocolGuid = { 0x465b8cf7, 0x016f, 0x4ba6, {
0xbe, 0x6b, 0x28, 0x0e, 0x3a, 0x7d, 0x38, 0x6f } }
[PcdsFixedAtBuild.common]
+#Board description
+ gMarvellTokenSpaceGuid.PcdMaxCpCount|0x2|UINT8|0x3072
+
#MPP
gMarvellTokenSpaceGuid.PcdMppChipCount|0|UINT32|0x3001
diff --git
a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.inf
b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.inf
new file mode 100644
index 000..2b73b73
--- /dev/null
+++
b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.inf
@@ -0,0 +1,37 @@
+## @file
+#
+# Copyright (C) 2018, Marvell International Ltd. and its affiliates
+#
+# This program and the accompanying materials are licensed and made available
+# under the terms and conditions of the BSD License which accompanies this
+# distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
+# IMPLIED.
+#
+##
+
+[Defines]
+ INF_VERSION= 0x0001001A
+ BASE_NAME = Armada7k8kDescLib
+ FILE_GUID = c64f0048-4ca3-4573-b0a6-c2e9e6457285
+ MODULE_TYPE= BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = ArmadaSoCDescLib
+
+[Sources]
+ Armada7k8kSoCDescLib.c
+
+[Packages]
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+ Silicon/Marvell/Marvell.dec
+
+[LibraryClasses]
+ DebugLib
+ IoLib
+ PcdLib
+
+[FixedPcd]
+ gMarvellTokenSpaceGuid.PcdMaxCpCount
diff --git
a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
new file mode 100644
index 000..c5711b0
--- /dev/null
+++
b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
@@ -0,0 +1,35 @@
+/**
+*
+* Copyright (C) 2018, Marvell International Ltd. and its affiliates.
+*
+* This program and the accompanying materials are licensed and made available
+* under the terms and conditions of the BSD License which accompanies this
+* distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
IMPLIED.
+*
+* Glossary - abbreviations used in Marvell SampleAtReset library
implementation:
+* AP - Application
[edk2] [platforms: PATCH v2 04/25] Marvell/Drivers: MvBoardDesc: Introduce board description driver
From: jinghua This patch introduces a producer of MARVELL_BOARD_DESC_PROTOCOL, which gets SoC description from ArmadaSoCDescLib, then based on dsc file, provide only enabled hardware module controllers for the consumers, which are typically controllers' drivers. Thanks to that there is a separation between obtaining the platform description and the drivers. A first example of the board description callback is information about UTMI controllers and type. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: jinghua Signed-off-by: Marcin Wojtas --- Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf | 65 Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.h | 57 +++ Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c | 176 3 files changed, 298 insertions(+) create mode 100644 Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf create mode 100644 Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.h create mode 100644 Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf new file mode 100644 index 000..5da5f21 --- /dev/null +++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf @@ -0,0 +1,65 @@ +# +# Marvell BSD License Option +# +# If you received this File from Marvell, you may opt to use, redistribute +# and/or modify this File under the following licensing terms. +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are met: +# +# * Redistributions of source code must retain the above copyright notice, +# this list of conditions and the following disclaimer. +# +# * Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# +# * Neither the name of Marvell nor the names of its contributors may be +# used to endorse or promote products derived from this software without +# specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE +# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# + +[Defines] + INF_VERSION= 0x0001001A + BASE_NAME = BoardDescDxe + FILE_GUID = 4ed385f9-5d2c-4774-95c5-d5d9d70b3c37 + MODULE_TYPE= DXE_DRIVER + VERSION_STRING = 1.0 + ENTRY_POINT= MvBoardDescEntryPoint + +[Sources] + MvBoardDescDxe.c + MvBoardDescDxe.h + +[Packages] + MdeModulePkg/MdeModulePkg.dec + MdePkg/MdePkg.dec + Silicon/Marvell/Marvell.dec + +[LibraryClasses] + ArmadaSoCDescLib + DebugLib + MemoryAllocationLib + UefiDriverEntryPoint + UefiLib + +[Protocols] + gMarvellBoardDescProtocolGuid + +[Pcd] + gMarvellTokenSpaceGuid.PcdPciEXhci + gMarvellTokenSpaceGuid.PcdUtmiControllersEnabled + gMarvellTokenSpaceGuid.PcdUtmiPortType + +[Depex] + TRUE diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.h b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.h new file mode 100644 index 000..2813f0d --- /dev/null +++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.h @@ -0,0 +1,57 @@ +/*** +Copyright (C) 2018 Marvell International Ltd. +Marvell BSD License Option + +If you received this File from Marvell, you may opt to use, redistribute and/or +modify this File under the following licensing terms. +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + +* Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimer. + +* Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + +* Neither the name of Marvell nor the names of its contributors may be + used to endorse or promote products derived from this software without + specific prior written permission. + +THIS SOFTWARE
[edk2] [platforms: PATCH v2 00/25] Armada hardware description rework
Hi, The second version of the patchset comes with a lot of improvements, as requested during review. Please see details in the changelog below. The patches are available in the github: https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/boarddesc-upstream-r20180617 I'm looking forward to review and any comments/remarks. Best regards, Marcin Changelog: v1 -> v2 * All - rebase on top of the master branch - remove internal review residues from the commit logs - increase all files version to 0x1A - use UINTN, where applicable - add Armada7k8kSoCDescLib definitions to a local header - remove assignments from variables declarations * 2,3,5-7,13,20-21 - Add Leif's RBs * 1 - add parentheses in macros - simplify loop and values assignments * 4 - add parentheses in if's - rename table and remove usage of MVHW_DEV_ENABLED - remove redundant NULL check in MvBoardDescFree () - add comments about using UINT8 * arrays, remove casting - use MV prefix in the signature - sort PCDs * 9 - drop TODO comment - rename table and remove usage of MVHW_DEV_ENABLED - add comments about using UINT8 * arrays, remove casting * 11 - simplify ArmadaSoCDescXhciGet * 12 - remove TODO in comment - sort variables, PCDs and assignments - add comments about UINT8 arrays, remove casting - rename table and remove usage of MVHW_DEV_ENABLED * 16 - remove TODO in comment - sort variables, PCDs and assignments - add comments about UINT8 arrays, remove casting - rename table and remove usage of MVHW_DEV_ENABLED * 22 - simplify loop and values assignments *23 - remove TODO in comment - sort variables, PCDs and assignments - add comments about UINT8 arrays, remove casting - rename table and remove usage of MVHW_DEV_ENABLED *25 - add parentheses in if condition Marcin Wojtas (21): Marvell/Library: Introduce ArmadaBoardDescLib class Marvell/Library: UtmiPhyLib: Switch to use MARVELL_BOARD_DESC protocol Marvell/Library: RealTimeClockLib: Simplify obtaining base address Marvell/Armada7k8k: Extend ArmadaSoCDescLib with PP2 information Marvell/Drivers: MvBoardDesc: Extend protocol with PP2 support Marvell/Drivers: Pp2Dxe: Switch to use MARVELL_BOARD_DESC protocol Marvell/Armada7k8k: Extend ArmadaSoCDescLib with AHCI/SDMMC/XHCI Marvell/Drivers: MvBoardDesc: Extend protocol with AHCI/SDMMC/XHCI Marvell/Drivers: NonDiscoverable: Switch to use MARVELL_BOARD_DESC Marvell/Library: ComPhyLib: Get AHCI data with MARVELL_BOARD_DESC Marvell/Armada7k8k: Extend ArmadaSoCDescLib with ComPhy information Marvell/Drivers: MvBoardDesc: Extend protocol with ComPhy support Marvell/Library: ComPhyLib: Switch library to use MARVELL_BOARD_DESC Marvell/Armada7k8k: Extend ArmadaSoCDescLib with MDIO information Marvell/Drivers: MvBoardDesc: Extend protocol with MDIO support Marvell/Drivers: MvMdioDxe: Enable 64bit addressing Marvell/Drivers: MvMdioDxe: Switch driver to use MARVELL_BOARD_DESC Marvell/Armada7k8k: Extend ArmadaSoCDescLib with I2C information Marvell/Drivers: MvBoardDesc: Extend protocol with I2C support Marvell/Drivers: MvI2cDxe: Switch driver to use MARVELL_BOARD_DESC Marvell/Drivers: MvPhyDxe: Remove MvHwDescLib.h dependency jinghua (4): Marvell/Library: Introduce ArmadaSoCDescLib class Marvell: Introduce MARVELL_BOARD_DESC_PROTOCOL Marvell/Drivers: MvBoardDesc: Introduce board description driver Marvell/Armada7k8k: Enable board description driver compilation Silicon/Marvell/Marvell.dec | 8 +- Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc | 2 + Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc | 2 +- Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc | 2 +- Platform/SolidRun/Armada80x0McBin/Armada80x0McBin.dsc | 2 +- Silicon/Marvell/Armada7k8k/Armada7k8k.fdf | 1 + Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.inf | 2 - Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.inf | 37 ++ Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.inf | 2 +- Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf | 70 +++ Silicon/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.inf | 1 + Silicon/Marvell/Drivers/Net/MvMdioDxe/MvMdioDxe.inf | 1 + Silicon/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.inf | 2 +- Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.inf | 6 +- Silicon/Marvell/Library/ComPhyLib/ComPhyLib.inf | 6 +- Silicon/Marvell/Library/UtmiPhyLib/UtmiPhyLib.inf | 9 +-
