Re: [edk2] [Patch 3/3] QuarkPlatformPkg/Tpm12DeviceLibAtmelI2c: Fix GCC build issues

2017-01-10 Thread Leahy, Leroy P 
Reviewed-by: Lee Leahy <leroy.p.le...@intel.com>

-Original Message-
From: Kinney, Michael D 
Sent: Tuesday, January 10, 2017 10:17 AM
To: edk2-devel@lists.01.org
Cc: Steele, Kelly <kelly.ste...@intel.com>; Leahy, Leroy P 
<leroy.p.le...@intel.com>
Subject: [Patch 3/3] QuarkPlatformPkg/Tpm12DeviceLibAtmelI2c: Fix GCC build 
issues

https://bugzilla.tianocore.org/show_bug.cgi?id=335

Fix build issues with GCC49.  There are local variables that may be used before 
initialized in some paths.

Cc: Kelly Steele <kelly.ste...@intel.com>
Cc: Lee Leahy <leroy.p.le...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kin...@intel.com>
---
 .../Library/Tpm12DeviceLibAtmelI2c/TisPc.c | 18 +++---
 1 file changed, 11 insertions(+), 7 deletions(-)

diff --git a/QuarkPlatformPkg/Library/Tpm12DeviceLibAtmelI2c/TisPc.c 
b/QuarkPlatformPkg/Library/Tpm12DeviceLibAtmelI2c/TisPc.c
index 3aab530..894e1e3 100644
--- a/QuarkPlatformPkg/Library/Tpm12DeviceLibAtmelI2c/TisPc.c
+++ b/QuarkPlatformPkg/Library/Tpm12DeviceLibAtmelI2c/TisPc.c
@@ -59,6 +59,8 @@ WriteTpmBufferMultiple (
   UINTN   Index;
   UINTN   PartialLength;
 
+  Status = EFI_SUCCESS;
+
   I2CDeviceAddr.I2CDeviceAddress = ATMEL_I2C_TPM_SLAVE_ADDRESS;
 
   DEBUG ((EFI_D_VERBOSE, "WriteTpmBufferMultiple: Addr=%02x  Length=%02x\n", 
I2CDeviceAddr.I2CDeviceAddress, Length)); @@ -112,6 +114,8 @@ 
ReadTpmBufferMultiple (
   UINTN   Index;
   UINTN   PartialLength;
 
+  Status = EFI_SUCCESS;
+
   I2CDeviceAddr.I2CDeviceAddress = ATMEL_I2C_TPM_SLAVE_ADDRESS;
   WriteLength = 0;
 
@@ -263,6 +267,13 @@ Tpm12SubmitCommand (
   INT64Delta;
 
   //
+  // Initialize local variables
+  //
+  Start   = 0;
+  End = 0;
+  Total   = 0;
+
+  //
   // Make sure response buffer is big enough to hold a response header
   //
   if (*OutputParameterBlockSize < sizeof (TPM_RSP_COMMAND_HDR)) { @@ -276,13 
+287,6 @@ Tpm12SubmitCommand (
   Current = GetPerformanceCounter();
 
   //
-  // Initialize local variables
-  //
-  Start = 0;
-  End   = 0;
-  Total = 0;
-
-  //
   // Retrieve the performance counter properties and compute the number of
   // performance counter ticks required to reach the maximum TIS timeout of
   // TIS_TIMEOUT_A.  TIS_TIMEOUT_A is in microseconds.
--
2.6.3.windows.1

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Re: [edk2] [Patch 2/3] QuarkPlatformPkg/Tpm12DeviceLibAtmelI2c: Fix SubmitCommand() out size

2017-01-10 Thread Leahy, Leroy P 
Reviewed-by: Lee Leahy <leroy.p.le...@intel.com>

-Original Message-
From: Kinney, Michael D 
Sent: Tuesday, January 10, 2017 10:17 AM
To: edk2-devel@lists.01.org
Cc: Steele, Kelly <kelly.ste...@intel.com>; Leahy, Leroy P 
<leroy.p.le...@intel.com>
Subject: [Patch 2/3] QuarkPlatformPkg/Tpm12DeviceLibAtmelI2c: Fix 
SubmitCommand() out size

https://bugzilla.tianocore.org/show_bug.cgi?id=336

When the Tpm12SubmitCommand() detects a response packet that is the same size 
as a TPM_RSP_COMMAND_HDR, it returns EFI_SUCCESS without reading any additional 
response packet information from the TPM.  In that case, the return parameter 
OutputParameterBlockSize is not be updated, so the size of that 
OutputParameterBlock returned is the value passed in which could be larger than 
what is actually returned from the TPM.

Set the OutputParameterBlockSize to the size of the TPM_RSP_COMMAND_HDR when 
this specific condition is detected.

Cc: Kelly Steele <kelly.ste...@intel.com>
Cc: Lee Leahy <leroy.p.le...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kin...@intel.com>
---
 QuarkPlatformPkg/Library/Tpm12DeviceLibAtmelI2c/TisPc.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/QuarkPlatformPkg/Library/Tpm12DeviceLibAtmelI2c/TisPc.c 
b/QuarkPlatformPkg/Library/Tpm12DeviceLibAtmelI2c/TisPc.c
index 08a005f..3aab530 100644
--- a/QuarkPlatformPkg/Library/Tpm12DeviceLibAtmelI2c/TisPc.c
+++ b/QuarkPlatformPkg/Library/Tpm12DeviceLibAtmelI2c/TisPc.c
@@ -355,6 +355,7 @@ Tpm12SubmitCommand (
 
   TpmOutSize = SwapBytes32 (ReadUnaligned32 (>paramSize));
   if (TpmOutSize == sizeof (TPM_RSP_COMMAND_HDR)) {
+*OutputParameterBlockSize = TpmOutSize;
 Status = EFI_SUCCESS;
 goto Done;
   }
--
2.6.3.windows.1

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Re: [edk2] [Patch 1/3] QuarkPlatformPkg/Tpm12DeviceLibAtmelI2c: Remove PP Check

2017-01-10 Thread Leahy, Leroy P 
Reviewed-by: Lee Leahy <leroy.p.le...@intel.com>

-Original Message-
From: Kinney, Michael D 
Sent: Tuesday, January 10, 2017 10:17 AM
To: edk2-devel@lists.01.org
Cc: Steele, Kelly <kelly.ste...@intel.com>; Leahy, Leroy P 
<leroy.p.le...@intel.com>
Subject: [Patch 1/3] QuarkPlatformPkg/Tpm12DeviceLibAtmelI2c: Remove PP Check

https://bugzilla.tianocore.org/show_bug.cgi?id=337

The Tpm12CommandLib in the SecurityPkg was updated to check the returnCode in 
the response packet in the following
commit:

https://github.com/tianocore/edk2/commit/950a3bc788b5b101729b26aed3ff75fd2a64a570

The Tpm12DeviceLibAtmelI2C uses the Tpm12PhysicalPresence() function from the 
Tpm12CommandLib to verify that the I2C device is responding to TPM command 
packets.  However, at this point the TPM device has not been started, and the 
TPM properly responds with an error in the returnCode field of the response 
packet.  Before the commit above, the check worked, but the additional error 
checking in the commit above now returns an error and an Atmel I2C is returned 
as not present.

The fix is to remove the call to the Tpm12PhysicalPresence() API in the 
Tpm12CommandLib from the Tpm12RequestUseTpm() API.
The Atmel I2C TPM device is detected if a byte can be read from the slave 
address assigned to the Atmel I2C device.
When the startup command is sent to the TPM later, the command and response 
packet processing will be verified, and if the I2C device is not an Atmel TPM, 
it will be detected at that point.

Cc: Kelly Steele <kelly.ste...@intel.com>
Cc: Lee Leahy <leroy.p.le...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kin...@intel.com>
---
 QuarkPlatformPkg/Library/Tpm12DeviceLibAtmelI2c/TisPc.c  | 12 +---
 .../Tpm12DeviceLibAtmelI2c/Tpm12DeviceLibAtmelI2c.inf|  3 +--
 2 files changed, 2 insertions(+), 13 deletions(-)

diff --git a/QuarkPlatformPkg/Library/Tpm12DeviceLibAtmelI2c/TisPc.c 
b/QuarkPlatformPkg/Library/Tpm12DeviceLibAtmelI2c/TisPc.c
index 4e5aa41..08a005f 100644
--- a/QuarkPlatformPkg/Library/Tpm12DeviceLibAtmelI2c/TisPc.c
+++ b/QuarkPlatformPkg/Library/Tpm12DeviceLibAtmelI2c/TisPc.c
@@ -1,7 +1,7 @@
 /** @file
   Basic TIS (TPM Interface Specification) functions for Atmel I2C TPM.
 
-  Copyright (c) 2016, Intel Corporation. All rights reserved.
+  Copyright (c) 2016 - 2017, Intel Corporation. All rights 
+ reserved.
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD 
License
   which accompanies this distribution.  The full text of the license may be 
found at @@ -18,7 +18,6 @@  #include   #include 
  #include  -#include 

 
 //
 // Atmel I2C TPM slave address
@@ -224,15 +223,6 @@ Tpm12RequestUseTpm (
 }
   } while (EFI_ERROR (Status));
 
-  //
-  // Send Physical Presence Command to Atmel I2C TPM
-  //
-  Status = Tpm12PhysicalPresence (TPM_PHYSICAL_PRESENCE_PRESENT);
-  if (EFI_ERROR (Status)) {
-DEBUG ((EFI_D_ERROR, "Atmel I2C TPM failed to submit physical presence 
command: %r\n", Status));
-return Status;
-  }
-
   return EFI_SUCCESS;
 }
 
diff --git 
a/QuarkPlatformPkg/Library/Tpm12DeviceLibAtmelI2c/Tpm12DeviceLibAtmelI2c.inf 
b/QuarkPlatformPkg/Library/Tpm12DeviceLibAtmelI2c/Tpm12DeviceLibAtmelI2c.inf
index 5a8734f..1f7e4be 100644
--- a/QuarkPlatformPkg/Library/Tpm12DeviceLibAtmelI2c/Tpm12DeviceLibAtmelI2c.inf
+++ b/QuarkPlatformPkg/Library/Tpm12DeviceLibAtmelI2c/Tpm12DeviceLibAtme
+++ lI2c.inf
@@ -4,7 +4,7 @@
 #  This instance provides basic TPM Interface Specification (TIS) functions  # 
 or Atmel I2C TPM.
 #
-# Copyright (c) 2016, Intel Corporation. All rights reserved.
+# Copyright (c) 2016 - 2017, Intel Corporation. All rights 
+reserved.
 # This program and the accompanying materials  # are licensed and made 
available under the terms and conditions of the BSD License  # which 
accompanies this distribution. The full text of the license may be found at @@ 
-42,4 +42,3 @@
   TimerLib
   DebugLib
   I2cLib
-  Tpm12CommandLib
--
2.6.3.windows.1

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Re: [edk2] [PATCH 1/1] CorebootPayloadPkg: Consume PlatformHookLib in PlatformBootManagerLib

2016-05-23 Thread Leahy, Leroy P 
Reviewed by: Lee Leahy <leroy.p.le...@intel.com>

Lee Leahy
(425) 881-4919
Intel Corporation
Suite 125
2700 - 156th Ave NE
Bellevue, WA  98007-6554


From: Ma, Maurice
Sent: Monday, May 23, 2016 3:03 PM
To: edk2-devel@lists.01.org
Cc: Ma, Maurice; Agyeman, Prince; Leahy, Leroy P
Subject: [PATCH 1/1] CorebootPayloadPkg: Consume PlatformHookLib in 
PlatformBootManagerLib

When coreboot uses different baud rate from the default (115200), the
current BDS driver will not be able to enable serial console display
due to the inconsistent serial port PCD settings.  By adding the
PlatformHookLib reference in the inf file, it will enforce the PCDs
to be aligned with what have been passed from coreboot.

Cc: Prince Agyeman <prince.agye...@intel.com>
Cc: Lee Leahy <leroy.p.le...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma <maurice...@intel.com>
---
 .../Library/PlatformBootManagerLib/PlatformBootManagerLib.inf  | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git 
a/CorebootPayloadPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf 
b/CorebootPayloadPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
index 59227c759886..475c65d8a16f 100644
--- 
a/CorebootPayloadPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
+++ 
b/CorebootPayloadPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
@@ -1,7 +1,7 @@
 ## @file
 #  Include all platform action which can be customized by IBV/OEM.
 #
-#  Copyright (c) 2012 - 2015, Intel Corporation. All rights reserved.
+#  Copyright (c) 2012 - 2016, Intel Corporation. All rights reserved.
 #  This program and the accompanying materials
 #  are licensed and made available under the terms and conditions of the BSD 
License
 #  which accompanies this distribution.  The full text of the license may be 
found at
@@ -52,6 +52,7 @@
   DevicePathLib
   HiiLib
   PrintLib
+  PlatformHookLib

 [Guids]

--
1.9.5.msysgit.0

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Re: [edk2] [PATCH 3/5] CorebootPayloadPkg: Add coreboot PlatfromBootManagerLib implementation

2016-05-18 Thread Leahy, Leroy P 
Reviewed-by: Lee Leahy 

Does not impact Galileo Gen2.


Lee Leahy
(425) 881-4919
Intel Corporation
Suite 125
2700 - 156th Ave NE
Bellevue, WA 98007-6554


-Original Message-
From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Maurice 
Ma
Sent: Wednesday, May 18, 2016 2:20 PM
To: edk2-devel@lists.01.org
Cc: Agyeman, Prince 
Subject: [edk2] [PATCH 3/5] CorebootPayloadPkg: Add coreboot 
PlatfromBootManagerLib implementation

In order to use the generic BdsDxe in MdeModulePkg, a platform specific 
PlatfromBootManagerLib is required. This library will help update the ConIn, 
ConOut and ErrOut variables.

Cc: Prince Agyeman 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma 
---
 CorebootPayloadPkg/CorebootPayloadPkg.dec  |  24 +-
 .../PlatformBootManagerLib/PlatformBootManager.c   | 198 +++
 .../PlatformBootManagerLib/PlatformBootManager.h   | 128 +
 .../PlatformBootManagerLib.inf |  77 +++
 .../PlatformBootManagerLib/PlatformConsole.c   | 617 +
 .../PlatformBootManagerLib/PlatformConsole.h   |  76 +++
 .../Library/PlatformBootManagerLib/PlatformData.c  |  25 +
 7 files changed, 1133 insertions(+), 12 deletions(-)  create mode 100644 
CorebootPayloadPkg/Library/PlatformBootManagerLib/PlatformBootManager.c
 create mode 100644 
CorebootPayloadPkg/Library/PlatformBootManagerLib/PlatformBootManager.h
 create mode 100644 
CorebootPayloadPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
 create mode 100644 
CorebootPayloadPkg/Library/PlatformBootManagerLib/PlatformConsole.c
 create mode 100644 
CorebootPayloadPkg/Library/PlatformBootManagerLib/PlatformConsole.h
 create mode 100644 
CorebootPayloadPkg/Library/PlatformBootManagerLib/PlatformData.c

diff --git a/CorebootPayloadPkg/CorebootPayloadPkg.dec 
b/CorebootPayloadPkg/CorebootPayloadPkg.dec
index 54eb3d2257ba..b33b79c1d6bd 100644
--- a/CorebootPayloadPkg/CorebootPayloadPkg.dec
+++ b/CorebootPayloadPkg/CorebootPayloadPkg.dec
@@ -1,16 +1,16 @@
 ## @file
 # Coreboot Payload Package
 #
-# Provides drivers and definitions to create uefi payload for coreboot. 
+# Provides drivers and definitions to create uefi payload for coreboot.
 #
 # Copyright (c) 2014, Intel Corporation. All rights reserved. -# This 
program and the accompanying materials are licensed and made available under -# 
the terms and conditions of the BSD License that accompanies this distribution. 
 
+# This program and the accompanying materials are licensed and made 
+available under # the terms and conditions of the BSD License that accompanies 
this distribution.
 # The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.  

-# 
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
 
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR 
IMPLIED.  
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 #
 ##
 
@@ -19,15 +19,15 @@
   PACKAGE_NAME   = CorebootPayloadPkg
   PACKAGE_GUID   = 58ABC905-951E-472e-8590-77BA8A50BE63
   PACKAGE_VERSION= 0.1
-  
+
 [LibraryClasses]
-  
+
 [Guids]
   #
   ## Defines the token space for the Coreboot Payload Package PCDs.
   #
-  gUEfiCorebootPayloadPkgTokenSpaceGuid  = {0x1d127ea, 0xf6f1, 0x4ef6, {0x94, 
0x15, 0x8a, 0x0, 0x0, 0x93, 0xf8, 0x9d}}
-  
+  gUEfiCorebootPayloadPkgTokenSpaceGuid  = {0x1d127ea, 0xf6f1, 0x4ef6, 
+ {0x94, 0x15, 0x8a, 0x0, 0x0, 0x93, 0xf8, 0x9d}}
+
   #
   # Gop Temp
   #
@@ -51,4 +51,4 @@
 [PcdsFixedAtBuild, PcdsPatchableInModule]
 
 [PcdsDynamic, PcdsDynamicEx]
- 
+
diff --git 
a/CorebootPayloadPkg/Library/PlatformBootManagerLib/PlatformBootManager.c 
b/CorebootPayloadPkg/Library/PlatformBootManagerLib/PlatformBootManager.c
new file mode 100644
index ..200ea9580877
--- /dev/null
+++ b/CorebootPayloadPkg/Library/PlatformBootManagerLib/PlatformBootManager.c
@@ -0,0 +1,198 @@
+/** @file
+  This file include all platform action which can be customized
+  by IBV/OEM.
+
+Copyright (c) 2015, Intel Corporation. All rights reserved.
+This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD 
License
+which accompanies this distribution.  The full text of the license may be 
found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "PlatformBootManager.h"
+#include "PlatformConsole.h"
+
+/**
+  Return the index of

Re: [edk2] [PATCH 2/5] CorebootModulePkg: Add video resolution PCD initialization

2016-05-18 Thread Leahy, Leroy P 
Reviewed-by: Lee Leahy 

Does not impact Galileo Gen2.


Lee Leahy
(425) 881-4919
Intel Corporation
Suite 125
2700 - 156th Ave NE
Bellevue, WA 98007-6554


-Original Message-
From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Maurice 
Ma
Sent: Wednesday, May 18, 2016 2:19 PM
To: edk2-devel@lists.01.org
Cc: Agyeman, Prince 
Subject: [edk2] [PATCH 2/5] CorebootModulePkg: Add video resolution PCD 
initialization

The video console resolution related PCDs are required to be initialized after 
switching to use the generic BdsDxe driver in MdeModulePkg.

Cc: Prince Agyeman 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma 
---
 CorebootModulePkg/CbSupportDxe/CbSupportDxe.c   | 16 
 CorebootModulePkg/CbSupportDxe/CbSupportDxe.h   |  1 +
 CorebootModulePkg/CbSupportDxe/CbSupportDxe.inf |  9 -
 3 files changed, 25 insertions(+), 1 deletion(-)

diff --git a/CorebootModulePkg/CbSupportDxe/CbSupportDxe.c 
b/CorebootModulePkg/CbSupportDxe/CbSupportDxe.c
index d81b7c23b717..767130475324 100755
--- a/CorebootModulePkg/CbSupportDxe/CbSupportDxe.c
+++ b/CorebootModulePkg/CbSupportDxe/CbSupportDxe.c
@@ -134,6 +134,7 @@ CbDxeEntryPoint (
   EFI_HOB_GUID_TYPE  *GuidHob;
   SYSTEM_TABLE_INFO  *pSystemTableInfo;
   ACPI_BOARD_INFO*pAcpiBoardInfo;
+  FRAME_BUFFER_INFO  *FbInfo;
 
   Status = EFI_SUCCESS;
   //
@@ -184,6 +185,21 @@ CbDxeEntryPoint (
   DEBUG ((EFI_D_ERROR, "PmCtrlReg at 0x%lx\n", (UINT64)mPmCtrlReg));
 
   //
+  // Find the frame buffer information and update PCDs  //  GuidHob = 
+ GetFirstGuidHob ();  ASSERT (GuidHob != 
+ NULL);  FbInfo  = (FRAME_BUFFER_INFO *)GET_GUID_HOB_DATA (GuidHob);  
+ Status = PcdSet32S (PcdVideoHorizontalResolution, 
+ FbInfo->HorizontalResolution);  ASSERT_EFI_ERROR (Status);  Status = 
+ PcdSet32S (PcdVideoVerticalResolution, FbInfo->VerticalResolution);  
+ ASSERT_EFI_ERROR (Status);  Status = PcdSet32S 
+ (PcdSetupVideoHorizontalResolution, FbInfo->HorizontalResolution);  
+ ASSERT_EFI_ERROR (Status);  Status = PcdSet32S 
+ (PcdSetupVideoVerticalResolution, FbInfo->VerticalResolution);  
+ ASSERT_EFI_ERROR (Status);
+
+  //
   // Register callback on the ready to boot event
   // in order to enable SCI
   //
diff --git a/CorebootModulePkg/CbSupportDxe/CbSupportDxe.h 
b/CorebootModulePkg/CbSupportDxe/CbSupportDxe.h
index bace2728e63b..4c59ed94d76c 100644
--- a/CorebootModulePkg/CbSupportDxe/CbSupportDxe.h
+++ b/CorebootModulePkg/CbSupportDxe/CbSupportDxe.h
@@ -29,6 +29,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER 
EXPRESS OR IMPLIED.
 #include 
 #include 
 #include 
+#include 
 
 #include 
 
diff --git a/CorebootModulePkg/CbSupportDxe/CbSupportDxe.inf 
b/CorebootModulePkg/CbSupportDxe/CbSupportDxe.inf
index c92db8ded45e..99245183eaeb 100644
--- a/CorebootModulePkg/CbSupportDxe/CbSupportDxe.inf
+++ b/CorebootModulePkg/CbSupportDxe/CbSupportDxe.inf
@@ -49,11 +49,18 @@
   IoLib
   HobLib
 
-[Guids]  
+[Guids]
   gEfiAcpiTableGuid
   gEfiSmbiosTableGuid
   gUefiSystemTableInfoGuid
   gUefiAcpiBoardInfoGuid
+  gUefiFrameBufferInfoGuid
+
+[Pcd]
+  gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution
+  gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution
+  gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoHorizontalResolution
+  gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoVerticalResolution
 
 [Depex]
   TRUE
--
1.9.5.msysgit.0

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Re: [edk2] [PATCH 1/5] CorebootModulePkg: Convert TAB to white space for CbSupportDxe driver

2016-05-18 Thread Leahy, Leroy P 
Reviewed-by: Lee Leahy 

Works on Galileo Gen2.

Lee Leahy
(425) 881-4919
Intel Corporation
Suite 125
2700 - 156th Ave NE
Bellevue, WA 98007-6554

-Original Message-
From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Maurice 
Ma
Sent: Wednesday, May 18, 2016 2:19 PM
To: edk2-devel@lists.01.org
Cc: Agyeman, Prince 
Subject: [edk2] [PATCH 1/5] CorebootModulePkg: Convert TAB to white space for 
CbSupportDxe driver

Convert TAB to white space for CbSupportDxe driver.

Cc: Prince Agyeman 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma 
---
 CorebootModulePkg/CbSupportDxe/CbSupportDxe.c | 142 +-
 1 file changed, 71 insertions(+), 71 deletions(-)

diff --git a/CorebootModulePkg/CbSupportDxe/CbSupportDxe.c 
b/CorebootModulePkg/CbSupportDxe/CbSupportDxe.c
index 68baad6d00e0..d81b7c23b717 100755
--- a/CorebootModulePkg/CbSupportDxe/CbSupportDxe.c
+++ b/CorebootModulePkg/CbSupportDxe/CbSupportDxe.c
@@ -1,7 +1,7 @@
 /** @file
-  This driver will report some MMIO/IO resources to dxe core, extract smbios 
and acpi 
+  This driver will report some MMIO/IO resources to dxe core, extract 
+ smbios and acpi
   tables from coreboot and install.
-  
+
   Copyright (c) 2014, Intel Corporation. All rights reserved.
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD 
License @@ -37,7 +37,7 @@ CbReserveResourceInGcd (
   IN EFI_HANDLEImageHandle
   )
 {
-   EFI_STATUS   Status;
+  EFI_STATUS   Status;
 
   if (IsMMIO) {
 Status = gDS->AddMemorySpace (
@@ -103,21 +103,21 @@ OnReadyToBoot (
   IN  EFI_EVENT  Event,
   IN  VOID   *Context
   )
-{  
-   //
-   // Enable SCI
-   //
-   IoOr16 (mPmCtrlReg, BIT0);
-   
-   DEBUG ((EFI_D_ERROR, "Enable SCI bit at 0x%lx before boot\n", 
(UINT64)mPmCtrlReg)); 
+{
+  //
+  // Enable SCI
+  //
+  IoOr16 (mPmCtrlReg, BIT0);
+
+  DEBUG ((EFI_D_ERROR, "Enable SCI bit at 0x%lx before boot\n", 
+ (UINT64)mPmCtrlReg));
 }
 
 /**
   Main entry for the Coreboot Support DXE module.
-  
+
   @param[in] ImageHandleThe firmware allocated handle for the EFI image.
   @param[in] SystemTableA pointer to the EFI System Table.
-  
+
   @retval EFI_SUCCESS   The entry point is executed successfully.
   @retval other Some error occurs when executing this entry point.
 
@@ -128,66 +128,66 @@ CbDxeEntryPoint (
   IN EFI_HANDLE ImageHandle,
   IN EFI_SYSTEM_TABLE   *SystemTable
   )
-{  
-   EFI_STATUS Status;
-   EFI_EVENT  ReadyToBootEvent;
-   EFI_HOB_GUID_TYPE  *GuidHob;
-   SYSTEM_TABLE_INFO  *pSystemTableInfo;
-   ACPI_BOARD_INFO*pAcpiBoardInfo;
-   
-   Status = EFI_SUCCESS;
-   //
-   // Report MMIO/IO Resources
-   //
-   Status = CbReserveResourceInGcd (TRUE, EfiGcdMemoryTypeMemoryMappedIo, 
0xFEE0, SIZE_1MB, 0, SystemTable); // LAPIC 
-   ASSERT_EFI_ERROR (Status);
-   
-   Status = CbReserveResourceInGcd (TRUE, EfiGcdMemoryTypeMemoryMappedIo, 
0xFEC0, SIZE_4KB, 0, SystemTable); // IOAPIC 
-   ASSERT_EFI_ERROR (Status);
-   
-   Status = CbReserveResourceInGcd (TRUE, EfiGcdMemoryTypeMemoryMappedIo, 
0xFED0, SIZE_1KB, 0, SystemTable); // HPET 
-   ASSERT_EFI_ERROR (Status);
-   
-   //
-   // Find the system table information guid hob
-   //
-   GuidHob = GetFirstGuidHob ();
-   ASSERT (GuidHob != NULL);
+{
+  EFI_STATUS Status;
+  EFI_EVENT  ReadyToBootEvent;
+  EFI_HOB_GUID_TYPE  *GuidHob;
+  SYSTEM_TABLE_INFO  *pSystemTableInfo;
+  ACPI_BOARD_INFO*pAcpiBoardInfo;
+
+  Status = EFI_SUCCESS;
+  //
+  // Report MMIO/IO Resources
+  //
+  Status = CbReserveResourceInGcd (TRUE, 
+ EfiGcdMemoryTypeMemoryMappedIo, 0xFEE0, SIZE_1MB, 0, SystemTable); 
+ // LAPIC  ASSERT_EFI_ERROR (Status);
+
+  Status = CbReserveResourceInGcd (TRUE, 
+ EfiGcdMemoryTypeMemoryMappedIo, 0xFEC0, SIZE_4KB, 0, SystemTable); 
+ // IOAPIC  ASSERT_EFI_ERROR (Status);
+
+  Status = CbReserveResourceInGcd (TRUE, 
+ EfiGcdMemoryTypeMemoryMappedIo, 0xFED0, SIZE_1KB, 0, SystemTable); 
+ // HPET  ASSERT_EFI_ERROR (Status);
+
+  //
+  // Find the system table information guid hob  //  GuidHob = 
+ GetFirstGuidHob ();  ASSERT (GuidHob != 
+ NULL);
   pSystemTableInfo = (SYSTEM_TABLE_INFO *)GET_GUID_HOB_DATA (GuidHob);
-   
-   //
-   // Install Acpi Table
-   //
-   if (pSystemTableInfo->AcpiTableBase != 0 && 
pSystemTableInfo->AcpiTableSize != 0) { 
-   DEBUG ((EFI_D_ERROR, "Install Acpi Table at 0x%lx, length 
0x%x\n", pSystemTableInfo->AcpiTableBase, pSystemTableInfo->AcpiTableSize));  
-   Status = gBS->InstallConfigurationTable (, 
(VOID *)(UINTN)pSystemTableInfo->AcpiTableBase);
-

Re: [edk2] [PATCH] CorebootPayloadPkg: Use generic PciBus/PciHostBridge driver

2016-05-16 Thread Leahy, Leroy P 
Please hold off on this patch until the one for MdeModulePkg is merged

Lee Leahy
(425) 881-4919
Intel Corporation
Suite 125
2700 - 156th Ave NE
Bellevue, WA 98007-6554


-Original Message-
From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Maurice 
Ma
Sent: Monday, May 16, 2016 4:40 PM
To: edk2-devel@lists.01.org
Cc: Agyeman, Prince 
Subject: [edk2] [PATCH] CorebootPayloadPkg: Use generic PciBus/PciHostBridge 
driver

Current CorebootPayloadPkg uses PciBusNoEnumerationDxe and 
PciRootBridgenoEnumerationDxe copied from the DuetPkg. Now it will switch to 
use the standard PciBusDxe and PciHostBridgeDxe from MdeModulePkg. As a result, 
a coreboot specific PciHostBridgeLib is added to collect pre-allocated PCI 
resources.

Cc: Prince Agyeman 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma 
---
 CorebootPayloadPkg/CorebootPayloadPkg.fdf  |   4 +-
 CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc  |  20 +-
 CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc   |  20 +-
 .../Library/PciHostBridgeLib/PciHostBridge.h   |  86 +++
 .../Library/PciHostBridgeLib/PciHostBridgeLib.c| 228 
 .../Library/PciHostBridgeLib/PciHostBridgeLib.inf  |  47 ++
 .../PciHostBridgeLib/PciHostBridgeSupport.c| 581 +
 7 files changed, 976 insertions(+), 10 deletions(-)  create mode 100644 
CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridge.h
 create mode 100644 
CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c
 create mode 100644 
CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf
 create mode 100644 
CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c

diff --git a/CorebootPayloadPkg/CorebootPayloadPkg.fdf 
b/CorebootPayloadPkg/CorebootPayloadPkg.fdf
index 848438f..1aac1db 100644
--- a/CorebootPayloadPkg/CorebootPayloadPkg.fdf
+++ b/CorebootPayloadPkg/CorebootPayloadPkg.fdf
@@ -110,8 +110,8 @@ INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
 #
 # PCI Support
 #
-INF 
CorebootModulePkg/PciRootBridgeNoEnumerationDxe/PciRootBridgeNoEnumeration.inf
-INF CorebootModulePkg/PciBusNoEnumerationDxe/PciBusNoEnumeration.inf
+INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
+INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
 
 #
 # ISA Support
diff --git a/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc 
b/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc
index 7db4e15..6234548 100644
--- a/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc
+++ b/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc
@@ -39,6 +39,11 @@
   DEFINE MAX_LOGICAL_PROCESSORS  = 64
 
   #
+  # PCI options
+  #
+  DEFINE PCIE_BASE= 0xE000
+
+  #
   # Serial port set up
   #
   DEFINE BAUD_RATE= 115200
@@ -115,8 +120,9 @@
   PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
   CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
   IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
-  PciLib|MdePkg/Library/BasePciLibCf8/BasePciLibCf8.inf
-  PciCf8Lib|MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf
+  PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf
+  PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf
+  
+ PciSegmentLib|MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci
+ .inf
   PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf
   
PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf
   
CacheMaintenanceLib|MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf
@@ -248,6 +254,8 @@
 
   gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress|0x0
 
+  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|$(PCIE_BASE)
+
 !if $(SOURCE_DEBUG_ENABLE)
   gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2
 !endif
@@ -279,6 +287,7 @@
   gEfiMdeModulePkgTokenSpaceGuid.PcdSerialFifoControl|$(SERIAL_FIFO_CONTROL)
   
gEfiMdeModulePkgTokenSpaceGuid.PcdSerialExtendedTxFifoSize|$(SERIAL_EXTENDED_TX_FIFO_SIZE)
 
+  gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration|TRUE
   gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|$(UART_DEFAULT_BAUD_RATE)
   gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits|$(UART_DEFAULT_DATA_BITS)
   gEfiMdePkgTokenSpaceGuid.PcdUartDefaultParity|$(UART_DEFAULT_PARITY)
@@ -396,8 +405,11 @@
   #
   # PCI Support
   #
-  
CorebootModulePkg/PciRootBridgeNoEnumerationDxe/PciRootBridgeNoEnumeration.inf
-  CorebootModulePkg/PciBusNoEnumerationDxe/PciBusNoEnumeration.inf
+  MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
+  MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf {
+
+  
+ PciHostBridgeLib|CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBr
+ idgeLib.inf
+  }
 
   #
   # SCSI/ATA/IDE/DISK Support
diff --git a/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc 
b/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc
index 7301346..1f6eee4 100644

Re: [edk2] [PATCH] MdeModulePkg: Skip invalid bus number scanning in PciBusDxe driver

2016-05-16 Thread Leahy, Leroy P 
Reviewed-by: Lee Leahy 

Lee Leahy
(425) 881-4919
Intel Corporation
Suite 125
2700 - 156th Ave NE
Bellevue, WA 98007-6554

-Original Message-
From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Maurice 
Ma
Sent: Monday, May 16, 2016 2:26 PM
To: edk2-devel@lists.01.org
Cc: Tian, Feng ; Zeng, Star 
Subject: [edk2] [PATCH] MdeModulePkg: Skip invalid bus number scanning in 
PciBusDxe driver

When PcdPciDisableBusEnumeration is enabled, the PciBus driver might get into a 
dead loop if the secondary bus register on PCI bridge is not programmed or 
programmed improperly. Adding this check to avoid any potential dead loop 
caused by this.

Cc: Feng Tian 
Cc: Star Zeng 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma 
---
 MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c 
b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
index a6ade26e3a09..086c481130c8 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
@@ -165,6 +165,14 @@ PciPciDeviceInfoCollector (
   }
 
   //
+  // Ensure secondary bus number is greater than the primary bus 
number to avoid
+  // any potential dead loop when PcdPciDisableBusEnumeration is set 
to TRUE
+  //
+  if (SecBus <= StartBusNumber) {
+break;
+  }
+
+  //
   // Get resource padding for PPB
   //
   GetResourcePaddingPpb (PciIoDevice);
--
1.9.5.msysgit.0

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Re: [edk2] [PATCH] CorebootPayloadPkg: Use generic SerialDxe driver

2016-05-13 Thread Leahy, Leroy P 
Looks good to me
Reviewed-by: Lee Leahy 

Lee Leahy
(425) 881-4919
Intel Corporation
Suite 125
2700 - 156th Ave NE
Bellevue, WA 98007-6554


-Original Message-
From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Maurice 
Ma
Sent: Friday, May 13, 2016 12:10 PM
To: edk2-devel@lists.01.org
Cc: Agyeman, Prince 
Subject: [edk2] [PATCH] CorebootPayloadPkg: Use generic SerialDxe driver

Use generic SerialDxe driver in MdeModulePkg instead of the one in 
CorebootModulePkg. By doing this the reference for PciSioSerialDxe driver will 
also be removed from DSC and FDF file.

Cc: Prince Agyeman 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma 
---
 CorebootPayloadPkg/CorebootPayloadPkg.fdf| 3 +--
 CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc| 3 +--
 CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc | 3 +--
 3 files changed, 3 insertions(+), 6 deletions(-)

diff --git a/CorebootPayloadPkg/CorebootPayloadPkg.fdf 
b/CorebootPayloadPkg/CorebootPayloadPkg.fdf
index 4aee5ac63133..848438ffad30 100644
--- a/CorebootPayloadPkg/CorebootPayloadPkg.fdf
+++ b/CorebootPayloadPkg/CorebootPayloadPkg.fdf
@@ -112,12 +112,11 @@ INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
 #
 INF 
CorebootModulePkg/PciRootBridgeNoEnumerationDxe/PciRootBridgeNoEnumeration.inf
 INF CorebootModulePkg/PciBusNoEnumerationDxe/PciBusNoEnumeration.inf
-INF CorebootModulePkg/PciSioSerialDxe/PciSioSerialDxe.inf
 
 #
 # ISA Support
 #
-INF CorebootModulePkg/SerialDxe/SerialDxe.inf
+INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
 
 #
 # Console Support
diff --git a/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc 
b/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc
index 725c912db808..7db4e15edc92 100644
--- a/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc
+++ b/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc
@@ -398,7 +398,6 @@
   #
   
CorebootModulePkg/PciRootBridgeNoEnumerationDxe/PciRootBridgeNoEnumeration.inf
   CorebootModulePkg/PciBusNoEnumerationDxe/PciBusNoEnumeration.inf
-  CorebootModulePkg/PciSioSerialDxe/PciSioSerialDxe.inf
 
   #
   # SCSI/ATA/IDE/DISK Support
@@ -438,7 +437,7 @@
   #
   # ISA Support
   #
-  CorebootModulePkg/SerialDxe/SerialDxe.inf
+  MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
 
   #
   # Console Support
diff --git a/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc 
b/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc
index c2396592d19a..730134637fa6 100644
--- a/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc
+++ b/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc
@@ -402,7 +402,6 @@
   #
   
CorebootModulePkg/PciRootBridgeNoEnumerationDxe/PciRootBridgeNoEnumeration.inf
   CorebootModulePkg/PciBusNoEnumerationDxe/PciBusNoEnumeration.inf
-  CorebootModulePkg/PciSioSerialDxe/PciSioSerialDxe.inf
 
   #
   # SCSI/ATA/IDE/DISK Support
@@ -442,7 +441,7 @@
   #
   # ISA Support
   #
-  CorebootModulePkg/SerialDxe/SerialDxe.inf
+  MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
 
   #
   # Console Support
--
1.9.5.msysgit.0

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Re: [edk2] [Patch v3 3/3] QuarkSocPkg/SDControllerDxe: Add EFIAPI to SetHighSpeedMode

2016-05-13 Thread Leahy, Leroy P 
Looks good to me
Reviewed-by: Lee Leahy <leroy.p.le...@intel.com>

Lee Leahy
(425) 881-4919
Intel Corporation
Suite 125
2700 - 156th Ave NE
Bellevue, WA 98007-6554


-Original Message-
From: Kinney, Michael D 
Sent: Thursday, May 12, 2016 4:04 PM
To: edk2-devel@lists.01.org
Cc: Leahy, Leroy P <leroy.p.le...@intel.com>
Subject: [Patch v3 3/3] QuarkSocPkg/SDControllerDxe: Add EFIAPI to 
SetHighSpeedMode

From: Lee Leahy <leroy.p.le...@intel.com>

Add the missing EFIAPI to fix the inconsistent routine declaration and 
implementation of a protocol service.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.le...@intel.com>
Reviewed-by: Michael Kinney <michael.d.kin...@intel.com>
---
 QuarkSocPkg/QuarkSouthCluster/Sdio/Dxe/SDControllerDxe/SDController.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git 
a/QuarkSocPkg/QuarkSouthCluster/Sdio/Dxe/SDControllerDxe/SDController.c 
b/QuarkSocPkg/QuarkSouthCluster/Sdio/Dxe/SDControllerDxe/SDController.c
index 18e85c8..96c8774 100644
--- a/QuarkSocPkg/QuarkSouthCluster/Sdio/Dxe/SDControllerDxe/SDController.c
+++ b/QuarkSocPkg/QuarkSouthCluster/Sdio/Dxe/SDControllerDxe/SDControlle
+++ r.c
@@ -2,7 +2,7 @@
 
 The SD host controller driver model and HC protocol routines.
 
-Copyright (c) 2013-2015 Intel Corporation.
+Copyright (c) 2013-2016 Intel Corporation.
 
 This program and the accompanying materials  are licensed and made available 
under the terms and conditions of the BSD License @@ -244,6 +244,7 @@ 
GetErrorReason (
   @return EFI_SUCCESS
 **/
 EFI_STATUS
+EFIAPI
 SetHighSpeedMode (
   IN  EFI_SD_HOST_IO_PROTOCOL*This,
   IN  BOOLEANEnable
--
2.6.3.windows.1

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Re: [edk2] [Patch v3 2/3] QuarkPlatformPkg: Fix variable set but not used build errors

2016-05-13 Thread Leahy, Leroy P 
Looks good to me
Reviewed-by: Lee Leahy <leroy.p.le...@intel.com>

Lee Leahy
(425) 881-4919
Intel Corporation
Suite 125
2700 - 156th Ave NE
Bellevue, WA 98007-6554


-Original Message-
From: Kinney, Michael D 
Sent: Thursday, May 12, 2016 4:04 PM
To: edk2-devel@lists.01.org
Cc: Leahy, Leroy P <leroy.p.le...@intel.com>
Subject: [Patch v3 2/3] QuarkPlatformPkg: Fix variable set but not used build 
errors

From: Lee Leahy <leroy.p.le...@intel.com>

Fix variable set but not used errors detected by GCC 4.8.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.le...@intel.com>
Reviewed-by: Michael Kinney <michael.d.kin...@intel.com>
---
 QuarkPlatformPkg/Acpi/DxeSmm/SmmPowerManagement/Ppm.c| 16 ++--
 .../Library/PlatformHelperLib/PlatformHelperPei.c|  4 +---
 .../Platform/SpiFvbServices/FwBlockService.c |  7 +--
 3 files changed, 4 insertions(+), 23 deletions(-)

diff --git a/QuarkPlatformPkg/Acpi/DxeSmm/SmmPowerManagement/Ppm.c 
b/QuarkPlatformPkg/Acpi/DxeSmm/SmmPowerManagement/Ppm.c
index 8f5e6a3..4fb9ca1 100644
--- a/QuarkPlatformPkg/Acpi/DxeSmm/SmmPowerManagement/Ppm.c
+++ b/QuarkPlatformPkg/Acpi/DxeSmm/SmmPowerManagement/Ppm.c
@@ -2,7 +2,7 @@
 
 Processor power management initialization code.
 
-Copyright (c) 2013-2015 Intel Corporation.
+Copyright (c) 2013-2016 Intel Corporation.
 
 This program and the accompanying materials  are licensed and made available 
under the terms and conditions of the BSD License @@ -79,7 +79,6 @@ 
PpmPatchFadtTable (
   EFI_ACPI_TABLE_VERSIONVersion;
   UINTN Index;
   UINTN Handle;
-  EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE  *FadtPointer;
 
   //
   // Scan all the acpi tables to find FADT 2.0 @@ -106,9 +105,7 @@ 
PpmPatchFadtTable (
   ASSERT (Table != NULL);
   CopyMem (Table, CurrentTable, CurrentTable->Length);
 
-  FadtPointer = (EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE*) Table;
-
-//
+  //
   // Update the ACPI table and recalculate checksum
   //
   Status = mAcpiTable->UninstallAcpiTable (mAcpiTable, Handle); @@ -322,7 
+319,6 @@ PpmLoadAndPatchPMTables (
   UINTN TableHandle;
   UINT32FvStatus;
   UINTN Size;
-   EFI_ACPI_TABLE_VERSION   Version;
 
 Status = LocateSupportProtocol (, 
(VOID**), 1);
 if (EFI_ERROR (Status)) {
@@ -348,14 +344,6 @@ PpmLoadAndPatchPMTables (
   );
 
 if (!EFI_ERROR(Status)) {
-Version = EFI_ACPI_TABLE_VERSION_1_0B | EFI_ACPI_TABLE_VERSION_2_0 | 
EFI_ACPI_TABLE_VERSION_3_0;
-
-  if(((EFI_ACPI_DESCRIPTION_HEADER*) CurrentTable)->OemTableId == 
SIGNATURE_64 ('C', 'p', 'u', '0', 'I', 's', 't', 0)) {
-  Version = EFI_ACPI_TABLE_VERSION_NONE;
-  } else if(((EFI_ACPI_DESCRIPTION_HEADER*) CurrentTable)->OemTableId == 
SIGNATURE_64 ('C', 'p', 'u', '1', 'I', 's', 't', 0)) {
-  Version = EFI_ACPI_TABLE_VERSION_NONE;
-  }
-
   SsdtTableUpdate ((EFI_ACPI_DESCRIPTION_HEADER *) CurrentTable);
 
   //
diff --git a/QuarkPlatformPkg/Library/PlatformHelperLib/PlatformHelperPei.c 
b/QuarkPlatformPkg/Library/PlatformHelperLib/PlatformHelperPei.c
index 50a0e42..c242c9e 100644
--- a/QuarkPlatformPkg/Library/PlatformHelperLib/PlatformHelperPei.c
+++ b/QuarkPlatformPkg/Library/PlatformHelperLib/PlatformHelperPei.c
@@ -1,7 +1,7 @@
 /** @file
 Implementation of Helper routines for PEI enviroment.
 
-Copyright (c) 2013-2015 Intel Corporation.
+Copyright (c) 2013-2016 Intel Corporation.
 
 This program and the accompanying materials  are licensed and made available 
under the terms and conditions of the BSD License @@ -63,7 +63,6 @@ 
PlatformFindFvFileRawDataSection (
   EFI_SECTION_TYPE  SearchType;
   EFI_FV_INFO   VolumeInfo;
   EFI_FV_FILE_INFO  FileInfo;
-  CONST EFI_PEI_SERVICES**PeiServices;
 
   if (FileNameGuid == NULL || SectionData == NULL || SectionDataSize == NULL) {
 return EFI_INVALID_PARAMETER;
@@ -71,7 +70,6 @@ PlatformFindFvFileRawDataSection (
   *SectionData = NULL;
   *SectionDataSize = 0;
 
-  PeiServices = GetPeiServicesTablePointer ();
   SearchType = EFI_SECTION_RAW;
   for (Instance = 0; !EFI_ERROR((PeiServicesFfsFindNextVolume (Instance, 
))); Instance++) {
 if (FvNameGuid != NULL) {
diff --git a/QuarkPlatformPkg/Platform/SpiFvbServices/FwBlockService.c 
b/QuarkPlatformPkg/Platform/SpiFvbServices/FwBlockService.c
index 6cfe710..dbb5512 100644
--- a/QuarkPlatformPkg/Platform/SpiFvbServices/FwBlockService.c
+++ b/QuarkPlatformPkg/Platform/SpiFvbServices/FwBlockService.c
@@ -1,6 +1,6 @@
 /** @file
 
-Copyright (c) 2013-2015 Intel Corporation.
+Copyright (c) 2013-2016 Intel Corporation.
 
 This program and the accompanying materials  are licensed and made available 
under the terms and conditions of the BSD License @@ -590,9 +590,6

Re: [edk2] [Patch v3 1/3] QuarkPlatformPkg: Fix build errors

2016-05-13 Thread Leahy, Leroy P 
Looks good to me
Reviewed-by: Lee Leahy <leroy.p.le...@intel.com>

Lee Leahy
(425) 881-4919
Intel Corporation
Suite 125
2700 - 156th Ave NE
Bellevue, WA 98007-6554

-Original Message-
From: Kinney, Michael D 
Sent: Thursday, May 12, 2016 4:04 PM
To: edk2-devel@lists.01.org
Cc: Leahy, Leroy P <leroy.p.le...@intel.com>
Subject: [Patch v3 1/3] QuarkPlatformPkg: Fix build errors

From: Lee Leahy <leroy.p.le...@intel.com>

Fix build errors detected with GCC 4.8.4: local variable set but not used!

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.le...@intel.com>
Reviewed-by: Michael Kinney <michael.d.kin...@intel.com>
---
 QuarkPlatformPkg/Acpi/Dxe/AcpiPlatform/AcpiPciUpdate.c| 4 +---
 QuarkPlatformPkg/Acpi/Dxe/AcpiPlatform/AcpiPlatform.c | 6 +-
 .../Dxe/SmbiosMiscDxe/MiscNumberOfInstallableLanguagesFunction.c  | 6 ++
 .../Platform/Dxe/SmbiosMiscDxe/MiscOemStringFunction.c| 5 +
 .../Platform/Dxe/SmbiosMiscDxe/MiscSystemOptionStringFunction.c   | 5 +
 QuarkPlatformPkg/Platform/Pei/PlatformInit/Generic/Recovery.c | 8 +---
 QuarkPlatformPkg/Platform/Pei/PlatformInit/MrcWrapper.c   | 5 +
 7 files changed, 8 insertions(+), 31 deletions(-)

diff --git a/QuarkPlatformPkg/Acpi/Dxe/AcpiPlatform/AcpiPciUpdate.c 
b/QuarkPlatformPkg/Acpi/Dxe/AcpiPlatform/AcpiPciUpdate.c
index b0f0b44..96af046 100644
--- a/QuarkPlatformPkg/Acpi/Dxe/AcpiPlatform/AcpiPciUpdate.c
+++ b/QuarkPlatformPkg/Acpi/Dxe/AcpiPlatform/AcpiPciUpdate.c
@@ -1,7 +1,7 @@
 /** @file
 Update the _PRT and _PRW method for pci devices
 
-Copyright (c) 2013-2015 Intel Corporation.
+Copyright (c) 2013-2016 Intel Corporation.
 
 This program and the accompanying materials  are licensed and made available 
under the terms and conditions of the BSD License @@ -261,9 +261,7 @@ 
SdtGetNameStringSize (  {
   UINTN SegCount;
   UINTN Length;
-  UINT8 *Name;
 
-  Name = Buffer;
   Length = 0;
 
   //
diff --git a/QuarkPlatformPkg/Acpi/Dxe/AcpiPlatform/AcpiPlatform.c 
b/QuarkPlatformPkg/Acpi/Dxe/AcpiPlatform/AcpiPlatform.c
index aa18cae..309eb04 100644
--- a/QuarkPlatformPkg/Acpi/Dxe/AcpiPlatform/AcpiPlatform.c
+++ b/QuarkPlatformPkg/Acpi/Dxe/AcpiPlatform/AcpiPlatform.c
@@ -1,7 +1,7 @@
 /** @file
 ACPI Platform Driver
 
-Copyright (c) 2013-2015 Intel Corporation.
+Copyright (c) 2013-2016 Intel Corporation.
 
 This program and the accompanying materials  are licensed and made available 
under the terms and conditions of the BSD License @@ -255,7 +255,6 @@ 
ApicTableUpdate (
   UINT8  CurrProcessor;
   UINTN  NumberOfCPUs;
   UINTN  NumberOfEnabledCPUs;
-  UINTN  BufferSize;
   EFI_PROCESSOR_INFORMATION  MpContext;
   ACPI_APIC_STRUCTURE_PTR*ApicPtr;
 
@@ -298,7 +297,6 @@ ApicTableUpdate (
 switch (ApicPtr->AcpiApicCommon.Type) {
 
   case EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC:
-BufferSize = sizeof (EFI_PROCESSOR_INFORMATION);
 ApicPtr->AcpiLocalApic.Flags = 0;
 ApicPtr->AcpiLocalApic.ApicId = 0;
 Status = MpService->GetProcessorInfo ( @@ -562,7 +560,6 @@ 
AcpiPlatformEntryPoint (
   UINT32FvStatus;
   UINTN Size;
   EFI_ACPI_TABLE_VERSIONVersion;
-  QNC_DEVICE_ENABLESQNCDeviceEnables;
   EFI_HANDLEHandle;
   UINTN Index;
   PCI_DEVICE_INFO   *PciDeviceInfo;
@@ -577,7 +574,6 @@ AcpiPlatformEntryPoint (
   TableHandle = 0;
   CurrentTable = NULL;
   mConfigData  = NULL;
-  QNCDeviceEnables.Uint32 = PcdGet32 (PcdDeviceEnables);
 
   //
   // Initialize the EFI Driver Library
diff --git 
a/QuarkPlatformPkg/Platform/Dxe/SmbiosMiscDxe/MiscNumberOfInstallableLanguagesFunction.c
 
b/QuarkPlatformPkg/Platform/Dxe/SmbiosMiscDxe/MiscNumberOfInstallableLanguagesFunction.c
index d17f5ea..322d7ce 100644
--- 
a/QuarkPlatformPkg/Platform/Dxe/SmbiosMiscDxe/MiscNumberOfInstallableLanguagesFunction.c
+++ b/QuarkPlatformPkg/Platform/Dxe/SmbiosMiscDxe/MiscNumberOfInstallabl
+++ eLanguagesFunction.c
@@ -2,7 +2,7 @@
 This driver parses the mSmbiosMiscDataTable structure and reports  any 
generated data.
 
-Copyright (c) 2013-2015 Intel Corporation.
+Copyright (c) 2013-2016 Intel Corporation.
 
 This program and the accompanying materials  are licensed and made available 
under the terms and conditions of the BSD License @@ -190,7 +190,6 @@ 
MISC_SMBIOS_TABLE_FUNCTION(NumberOfInstallableLanguages)
   CHAR8 
CurrentLang[SMBIOS_STRING_MAX_LENGTH + 1];
   CHAR8 *OptionalStrStart;
   UINT16Offset;
-  BOOLEAN   LangMatch;
   EFI_STATUSStatus;
   EFI_SMBIOS_HANDLE

Re: [edk2] [PATCH] CorebootPayloadPkg: Add OHCI driver

2016-05-12 Thread Leahy, Leroy P 
Hi Mike,

This was the specific request from the CorebootPayloadPkg maintainers.  The 
first version of the patch copied the code into CorebootModulePkg to eliminate 
this require dependency.

Lee Leahy
(425) 881-4919
Intel Corporation
Suite 125
2700 - 156th Ave NE
Bellevue, WA 98007-6554

-Original Message-
From: Kinney, Michael D 
Sent: Thursday, May 12, 2016 4:12 PM
To: Leahy, Leroy P <leroy.p.le...@intel.com>; edk2-devel@lists.01.org; Leahy, 
Leroy P <leroy.p.le...@intel.com>; maruice...@intel.com; Agyeman, Prince 
<prince.agye...@intel.com>; Ma, Maurice <maurice...@intel.com>; El-Haj-Mahmoud, 
Samer <samer.el-haj-mahm...@hpe.com>; Kinney, Michael D 
<michael.d.kin...@intel.com>
Subject: RE: [edk2] [PATCH] CorebootPayloadPkg: Add OHCI driver

Hi Lee,

It seems strange for the CorebootPayloadPkg to depend on the QuarkPlatformPkg.

There is a request to add OHCI to MdeModulePkg.

http://article.gmane.org/gmane.comp.bios.edk2.devel/7536/match=ohci

Maybe Samer has some updates on testing.  

Thanks,

Mike

> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of 
> Lee Leahy
> Sent: Thursday, May 12, 2016 4:05 PM
> To: edk2-devel@lists.01.org; Leahy, Leroy P <leroy.p.le...@intel.com>; 
> maruice...@intel.com; Agyeman, Prince <prince.agye...@intel.com>; Ma, 
> Maurice <maurice...@intel.com>
> Subject: [edk2] [PATCH] CorebootPayloadPkg: Add OHCI driver
> 
> Add the USB OHCI driver from revision 24ca2f35 of QuarkSocPkg.
> 
> Change-Id: Ie7aa0bc47d4ff06adc57976a5efb0e40ce4e1673
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Lee Leahy <leroy.p.le...@intel.com>
> ---
>  CorebootPayloadPkg/CorebootPayloadPkg.fdf| 5 +
>  CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc| 5 +
>  CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc | 5 +
>  3 files changed, 15 insertions(+)
> 
> diff --git a/CorebootPayloadPkg/CorebootPayloadPkg.fdf
> b/CorebootPayloadPkg/CorebootPayloadPkg.fdf
> index 4102e60..0e8ec43 100644
> --- a/CorebootPayloadPkg/CorebootPayloadPkg.fdf
> +++ b/CorebootPayloadPkg/CorebootPayloadPkg.fdf
> @@ -159,6 +159,11 @@ INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
>  INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
> 
>  #
> +# OHCI Support
> +#
> +INF QuarkSocPkg/QuarkSouthCluster/Usb/Ohci/Dxe/OhciDxe.inf
> +
> +#
>  # Shell
>  #
>  !if $(SHELL_TYPE) == BUILD_SHELL
> diff --git a/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc
> b/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc
> index 9f155f3..dc86eb1 100644
> --- a/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc
> +++ b/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc
> @@ -431,6 +431,11 @@
>MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
> 
>#
> +  # OHCI support
> +  #
> +  QuarkSocPkg/QuarkSouthCluster/Usb/Ohci/Dxe/OhciDxe.inf
> +
> +  #
># ISA Support
>#
>CorebootModulePkg/SerialDxe/SerialDxe.inf
> diff --git a/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc
> b/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc
> index 7b065a6..dabd2dd 100644
> --- a/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc
> +++ b/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc
> @@ -435,6 +435,11 @@
>MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
> 
>#
> +  # OHCI support
> +  #
> +  QuarkSocPkg/QuarkSouthCluster/Usb/Ohci/Dxe/OhciDxe.inf
> +
> +  #
># ISA Support
>#
>CorebootModulePkg/SerialDxe/SerialDxe.inf
> --
> 1.9.1
> 
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Re: [edk2] [PATCH 3/7] CorebootPayloadPkg: Use correct BaseSerialPortLib16550

2016-05-11 Thread Leahy, Leroy P 
As we had discussed on the phone last week.  I am going to make these changes 
first in CorebootModulePkg and then post the patches to MdeModulePkg.  When the 
patches get merged into MdeModulePkg then I will be able to remove the 
corresponding components from CorebootModulePkg.

Lee Leahy
(425) 881-4919
Intel Corporation
Suite 125
2700 - 156th Ave NE
Bellevue, WA 98007-6554


-Original Message-
From: Ma, Maurice 
Sent: Wednesday, May 11, 2016 11:24 AM
To: Leahy, Leroy P <leroy.p.le...@intel.com>; edk2-devel@lists.01.org; Agyeman, 
Prince <prince.agye...@intel.com>
Subject: RE: [PATCH 3/7] CorebootPayloadPkg: Use correct BaseSerialPortLib16550

Hi, Leah,

Is this flow control specific to coreboot?   If not, why not suggest the change 
in MdeModulePkg instead ?

Thanks
Maurice

-Original Message-
From: Leahy, Leroy P 
Sent: Tuesday, May 10, 2016 3:34 PM
To: edk2-devel@lists.01.org; Leahy, Leroy P; Agyeman, Prince; Ma, Maurice
Subject: [PATCH 3/7] CorebootPayloadPkg: Use correct BaseSerialPortLib16550

Use the BaseSerialPortLib16550 which sets RTS and DTR during initialization.  
This fixes the mis-matched flow control issue when the flow control signals are 
connected between the host and target and the host has flow control enabled.

Change-Id: I3505e129b2de3c5c17fff23c62553f15cd892dca
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.le...@intel.com>
---
 CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc| 2 +-
 CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc 
b/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc
index cc88502..9be96e3 100644
--- a/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc
+++ b/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc
@@ -160,7 +160,7 @@
   #
   TimerLib|CorebootPayloadPkg/Library/AcpiTimerLib/AcpiTimerLib.inf
   ResetSystemLib|CorebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.inf
-  
SerialPortLib|MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf
+  
+ SerialPortLib|CorebootModulePkg/Library/BaseSerialPortLib16550/BaseSer
+ ialPortLib16550.inf
   
PlatformHookLib|CorebootPayloadPkg/Library/PlatformHookLib/PlatformHookLib.inf
   PlatformBdsLib|CorebootPayloadPkg/Library/PlatformBdsLib/PlatformBdsLib.inf
 
diff --git a/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc 
b/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc
index 77a33a9..561c0c9 100644
--- a/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc
+++ b/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc
@@ -162,7 +162,7 @@
   #
   TimerLib|CorebootPayloadPkg/Library/AcpiTimerLib/AcpiTimerLib.inf
   ResetSystemLib|CorebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.inf
-  
SerialPortLib|MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf
+  
+ SerialPortLib|CorebootModulePkg/Library/BaseSerialPortLib16550/BaseSer
+ ialPortLib16550.inf
   
PlatformHookLib|CorebootPayloadPkg/Library/PlatformHookLib/PlatformHookLib.inf
   PlatformBdsLib|CorebootPayloadPkg/Library/PlatformBdsLib/PlatformBdsLib.inf
 
--
1.9.1

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Re: [edk2] [PATCH 2/7] CorebootPayloadPkg: Assume no PCI serial devices

2016-05-11 Thread Leahy, Leroy P 
Hi Maurice,

This is the intent.  The entire PCD needs to be present.  If coreboot uses a 
PCI device for its console then this PCD is written with the necessary values.  
The first two bytes are set to the vendor and device ID values of the PCI 
device that coreboot is using.

Lee Leahy
(425) 881-4919
Intel Corporation
Suite 125
2700 - 156th Ave NE
Bellevue, WA 98007-6554

-Original Message-
From: Ma, Maurice 
Sent: Wednesday, May 11, 2016 11:16 AM
To: Leahy, Leroy P <leroy.p.le...@intel.com>; edk2-devel@lists.01.org; Agyeman, 
Prince <prince.agye...@intel.com>
Subject: RE: [PATCH 2/7] CorebootPayloadPkg: Assume no PCI serial devices

Hi, Leah,

Is this list really consumed?   
I saw the 0x terminator at the very beginning of the list.   So it 
indicates an empty list.Is this the intention?

Thanks
Maurice
-Original Message-
From: Leahy, Leroy P
Sent: Tuesday, May 10, 2016 3:34 PM
To: edk2-devel@lists.01.org; Leahy, Leroy P; Agyeman, Prince; Ma, Maurice
Subject: [PATCH 2/7] CorebootPayloadPkg: Assume no PCI serial devices

Set the vendor to 0x which indicates the end of the list.

Change-Id: If6475e04d3675f0a932571a85d1dd3f301416b6a
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.le...@intel.com>
---
 CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc| 4 ++--
 CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc 
b/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc
index 907e952..cc88502 100644
--- a/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc
+++ b/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc
@@ -67,10 +67,10 @@
   #UINT8   Reserved[2];
   #  } PCI_SERIAL_PARAMETER;
   #
-  # Vendor  Device  Prog Interface 1, BAR #0, Offset 0, Stride = 1, 
Clock 1843200 (0x1c2000)
+  # Vendor  Device  Prog Interface 1, BAR #0, Offset 0, Stride 
+ = 1, Clock 1843200 (0x1c2000)
   #
   #   [Vendor]   [Device]  
[ClockRate---]  [Offset---] [Bar] [Stride] [RxFifo] 
[TxFifo]   [Rsvd]   [Vendor]
-  DEFINE PCI_SERIAL_PARAMETERS= {0x00,0x00, 0x00,0x00, 
0x0,0x20,0x1c,0x00, 0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0, 0x00,0x01, 0x0,0x0, 
0x0,0x0, 0x0,0x0, 0xff,0xff}
+  DEFINE PCI_SERIAL_PARAMETERS= {0xff,0xff, 0x00,0x00, 
0x0,0x20,0x1c,0x00, 0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0, 0x00,0x01, 0x0,0x0, 
0x0,0x0, 0x0,0x0, 0xff,0xff}
 
   #
   # Shell options: [BUILD_SHELL, FULL_BIN, MIN_BIN, NONE, UEFI] diff --git 
a/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc 
b/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc
index 90a484d..77a33a9 100644
--- a/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc
+++ b/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc
@@ -67,10 +67,10 @@
   #UINT8   Reserved[2];
   #  } PCI_SERIAL_PARAMETER;
   #
-  # Vendor  Device  Prog Interface 1, BAR #0, Offset 0, Stride = 1, 
Clock 1843200 (0x1c2000)
+  # Vendor  Device  Prog Interface 1, BAR #0, Offset 0, Stride 
+ = 1, Clock 1843200 (0x1c2000)
   #
   #   [Vendor]   [Device]  
[ClockRate---]  [Offset---] [Bar] [Stride] [RxFifo] 
[TxFifo]   [Rsvd]   [Vendor]
-  DEFINE PCI_SERIAL_PARAMETERS= {0x00,0x00, 0x00,0x00, 
0x0,0x20,0x1c,0x00, 0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0, 0x00,0x01, 0x0,0x0, 
0x0,0x0, 0x0,0x0, 0xff,0xff}
+  DEFINE PCI_SERIAL_PARAMETERS= {0xff,0xff, 0x00,0x00, 
0x0,0x20,0x1c,0x00, 0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0, 0x00,0x01, 0x0,0x0, 
0x0,0x0, 0x0,0x0, 0xff,0xff}
 
   #
   # Shell options: [BUILD_SHELL, FULL_BIN, MIN_BIN, NONE, UEFI]
--
1.9.1

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Re: [edk2] [PATCH 1/7] CorebootPayloadPkg/PlatformHelperLib: Remove unreferenced function

2016-05-06 Thread Leahy, Leroy P 
Hi Laszlo,

The error seems to be related to a missing PCD value and a reference to 
SecStartup which are unrelated to this patch.  See the portion of the log below.

Lee Leahy
(425) 881-4919
Intel Corporation
Suite 125
2700 - 156th Ave NE
Bellevue, WA 98007-6554


"ld" -o 
Build/CorebootPayloadPkgX64/DEBUG_GCC49/IA32/CorebootModulePkg/SecCore/SecCore/DEBUG/SecCore.dll
 -nostdlib -n -q --gc-sections -z common-page-size=0x40 --entry 
_ModuleEntryPoint -u _ModuleEntryPoint -Map 
Build/CorebootPayloadPkgX64/DEBUG_GCC49/IA32/CorebootModulePkg/SecCore/SecCore/DEBUG/SecCore.map
 -m elf_i386 --oformat=elf32-i386 -flto --start-group  
@Build/CorebootPayloadPkgX64/DEBUG_GCC49/IA32/CorebootModulePkg/SecCore/SecCore/OUTPUT/static_library_files.lst
 --end-group --defsym=PECOFF_HEADER_SIZE=0x220 
--script=BaseTools/Scripts/GccBase.lds
Build/CorebootPayloadPkgX64/DEBUG_GCC49/IA32/CorebootModulePkg/SecCore/SecCore/OUTPUT/SecCore.lib(SecEntry.obj):
 In function `_ModuleEntryPoint':
(.text+0x8): undefined reference to `_gPcd_FixedAtBuild_PcdPayloadFdMemBase'
Build/CorebootPayloadPkgX64/DEBUG_GCC49/IA32/CorebootModulePkg/SecCore/SecCore/OUTPUT/SecCore.lib(SecEntry.obj):
 In function `_ModuleEntryPoint':
(.text+0x17): undefined reference to `SecStartup'
GNUmakefile:359: recipe for target 
'Build/CorebootPayloadPkgX64/DEBUG_GCC49/IA32/CorebootModulePkg/SecCore/SecCore/DEBUG/SecCore.dll'
 failed
make: *** 
[Build/CorebootPayloadPkgX64/DEBUG_GCC49/IA32/CorebootModulePkg/SecCore/SecCore/DEBUG/SecCore.dll]
 Error 1


build.py...
 : error 7000: Failed to execute command
make tbuild 
[Build/CorebootPayloadPkgX64/DEBUG_GCC49/IA32/CorebootModulePkg/SecCore/SecCore]


build.py...
 : error 7000: Failed to execute command
make tbuild 
[Build/CorebootPayloadPkgX64/DEBUG_GCC49/IA32/MdeModulePkg/Core/Pei/PeiMain]


build.py...
 : error F002: Failed to build module
CorebootModulePkg/SecCore/SecCore.inf [IA32, GCC49, DEBUG]


-Original Message-
From: Laszlo Ersek [mailto:ler...@redhat.com] 
Sent: Friday, May 6, 2016 12:58 AM
To: Leahy, Leroy P <leroy.p.le...@intel.com>; edk2-de...@ml01.01.org; Ma, 
Maurice <maurice...@intel.com>; Agyeman, Prince <prince.agye...@intel.com>
Cc: Gerd Hoffmann <kra...@redhat.com>
Subject: Re: [edk2] [PATCH 1/7] CorebootPayloadPkg/PlatformHelperLib: Remove 
unreferenced function

Hi,

On 05/05/16 02:37, Lee Leahy wrote:
> Remove the PlatformFlashEraseWrite function which is not used within 
> CorebootPayloadPkg.
> 
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Lee Leahy <leroy.p.le...@intel.com>
> ---
>  .../Include/Library/PlatformHelperLib.h|  38 +-
>  .../Library/PlatformHelperLib/PlatformHelperDxe.c  | 141 
> -
>  2 files changed, 1 insertion(+), 178 deletions(-)

This series seems to break Gerd's Coreboot build.

I'm not familiar with this platform, so I won't try to analyze the issue; I'll 
just attach the report I received from Gerd's Jenkins instance.

Thanks
Laszlo

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Re: [edk2] [PATCH 04/12] CorebootPayloadPkg/PciBusNoEnumerationDxe: Skip disabled devices

2016-04-19 Thread Leahy, Leroy P 
HI Maurice,

Coreboot only assigns resources to devices which are enabled.  If the device is 
set to OFF in the mainboard/.../devicetree.cb file then no resources are 
assigned and the device is left disabled.  This is the issue that I am running 
into which is causing PciBusNoEnumerationDxe to fail.

Lee Leahy
(425) 881-4919
Intel Corporation
Suite 125
2700 - 156th Ave NE
Bellevue, WA 98007-6554


-Original Message-
From: Ma, Maurice 
Sent: Tuesday, April 19, 2016 2:51 PM
To: Leahy, Leroy P <leroy.p.le...@intel.com>
Cc: edk2-devel@lists.01.org; Agyeman, Prince <prince.agye...@intel.com>
Subject: RE: [PATCH 04/12] CorebootPayloadPkg/PciBusNoEnumerationDxe: Skip 
disabled devices

Hi, Lee,

Do we assume all PCI devices will be enabled in  the command registers in 
coreboot before transitioning to the UEFI payload ?
How about those PCI devices with command register disabled but with PCI BARs 
programmed ?   If we skip them, then the resource will not be collected by the 
PciBus driver.

Thanks
Maurice

-Original Message-
From: Leahy, Leroy P 
Sent: Tuesday, April 19, 2016 1:30 PM
To: edk2-devel@lists.01.org; Ma, Maurice; Agyeman, Prince; Leahy, Leroy P
Subject: [PATCH 04/12] CorebootPayloadPkg/PciBusNoEnumerationDxe: Skip disabled 
devices

Skip non-bridge devices which are not enabled either for memory or I/O access.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.le...@intel.com>
---
 CorebootModulePkg/PciBusNoEnumerationDxe/PciEnumeratorSupport.c | 9 +
 1 file changed, 9 insertions(+)

diff --git a/CorebootModulePkg/PciBusNoEnumerationDxe/PciEnumeratorSupport.c 
b/CorebootModulePkg/PciBusNoEnumerationDxe/PciEnumeratorSupport.c
index ca300cf..3802424 100644
--- a/CorebootModulePkg/PciBusNoEnumerationDxe/PciEnumeratorSupport.c
+++ b/CorebootModulePkg/PciBusNoEnumerationDxe/PciEnumeratorSupport.c
@@ -227,6 +227,15 @@ Returns:
   if (!EFI_ERROR (Status)) {
 
 //
+// Skip non-bridge devices which are not enabled
+//
+if (((Pci.Hdr.Command & (EFI_PCI_COMMAND_IO_SPACE
+  | EFI_PCI_COMMAND_MEMORY_SPACE)) == 0)
+  && (!(IS_PCI_BRIDGE () || IS_CARDBUS_BRIDGE ( {
+  continue;
+}
+
+//
 // Collect all the information about the PCI device discovered
 //
 Status = PciSearchDevice (
--
1.9.1

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Re: [edk2] [PATCH 03/12] CorebootModulePkg/SerialDxe: Use PlatformHookLib

2016-04-19 Thread Leahy, Leroy P 
Hi Maurice,

This driver is being built with PlatformHelperLib to pass the serial port 
configuration from coreboot.  The .inf file is modified and the driver is being 
rebuilt.

Lee Leahy
(425) 881-4919
Intel Corporation
Suite 125
2700 - 156th Ave NE
Bellevue, WA 98007-6554


-Original Message-
From: Ma, Maurice 
Sent: Tuesday, April 19, 2016 2:36 PM
To: Leahy, Leroy P <leroy.p.le...@intel.com>
Cc: edk2-devel@lists.01.org; Agyeman, Prince <prince.agye...@intel.com>
Subject: RE: [PATCH 03/12] CorebootModulePkg/SerialDxe: Use PlatformHookLib

Hi, Lee,

I have the same question as previous patch.   
Please let us know why the driver in MdeModulePkg does not fit your needs.   
If it is only for PCD initialization,  we might consider using PcdsDynamic type 
and set them in platform driver instead.

Thanks
Maurice

-Original Message-
From: Leahy, Leroy P
Sent: Tuesday, April 19, 2016 1:30 PM
To: edk2-devel@lists.01.org; Ma, Maurice; Agyeman, Prince; Leahy, Leroy P
Subject: [PATCH 03/12] CorebootModulePkg/SerialDxe: Use PlatformHookLib

Copy the driver from MdeModulePkg/Universal/SerialDxe.  Add PlatformHookLib to 
the Library section of the .inf file to adjust the PCDs for the UART.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.le...@intel.com>
---
 CorebootModulePkg/SerialDxe/SerialDxe.inf  |  55 +++
 CorebootModulePkg/SerialDxe/SerialDxe.uni  |  21 +
 CorebootModulePkg/SerialDxe/SerialDxeExtra.uni |  19 +
 CorebootModulePkg/SerialDxe/SerialIo.c | 528 +
 4 files changed, 623 insertions(+)
 create mode 100644 CorebootModulePkg/SerialDxe/SerialDxe.inf
 create mode 100644 CorebootModulePkg/SerialDxe/SerialDxe.uni
 create mode 100644 CorebootModulePkg/SerialDxe/SerialDxeExtra.uni
 create mode 100644 CorebootModulePkg/SerialDxe/SerialIo.c

diff --git a/CorebootModulePkg/SerialDxe/SerialDxe.inf 
b/CorebootModulePkg/SerialDxe/SerialDxe.inf
new file mode 100644
index 000..8489e06
--- /dev/null
+++ b/CorebootModulePkg/SerialDxe/SerialDxe.inf
@@ -0,0 +1,55 @@
+## @file
+#  Serial driver that layers on top of a Serial Port Library instance.
+#
+#  Copyright (c) 2008 - 2015, Intel Corporation. All rights 
+reserved. #  This program and the accompanying materials #  are 
+licensed and made available under the terms and conditions of the BSD 
+License #  which accompanies this distribution.  The full text of the 
+license may be found at # 
+http://opensource.org/licenses/bsd-license.php
+#
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" 
+BASIS, #  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR 
IMPLIED.
+#
+#
+##
+
+[Defines]
+  INF_VERSION= 0x00010005
+  BASE_NAME  = SerialDxe
+  MODULE_UNI_FILE= SerialDxe.uni
+  FILE_GUID  = D3987D4B-971A-435F-8CAF-4967EB627241
+  MODULE_TYPE= DXE_DRIVER
+  VERSION_STRING = 1.0
+
+  ENTRY_POINT= SerialDxeInitialize
+
+[Sources.common]
+  SerialIo.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  CorebootModulePkg/CorebootModulePkg.dec
+
+[LibraryClasses]
+  UefiDriverEntryPoint
+  UefiBootServicesTableLib
+  DebugLib
+  PcdLib
+  PlatformHookLib
+  SerialPortLib
+
+[Protocols]
+  gEfiSerialIoProtocolGuid  ## PRODUCES
+  gEfiDevicePathProtocolGuid## PRODUCES
+
+[Pcd]
+  gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate ## CONSUMES
+  gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits ## CONSUMES
+  gEfiMdePkgTokenSpaceGuid.PcdUartDefaultParity   ## CONSUMES
+  gEfiMdePkgTokenSpaceGuid.PcdUartDefaultStopBits ## CONSUMES
+
+[Depex]
+  TRUE
+
+[UserExtensions.TianoCore."ExtraFiles"]
+  SerialDxeExtra.uni
diff --git a/CorebootModulePkg/SerialDxe/SerialDxe.uni 
b/CorebootModulePkg/SerialDxe/SerialDxe.uni
new file mode 100644
index 000..e2daf27
--- /dev/null
+++ b/CorebootModulePkg/SerialDxe/SerialDxe.uni
@@ -0,0 +1,21 @@
+// /** @file
+// Serial driver that layers on top of a Serial Port Library instance.
+//
+// Serial driver that layers on top of a Serial Port Library instance.
+//
+// Copyright (c) 2008 - 2015, Intel Corporation. All rights 
+reserved. // // This program and the accompanying materials // are 
+licensed and made available under the terms and conditions of the BSD 
+License // which accompanies this distribution. The full text of the 
+license may be found at // 
+http://opensource.org/licenses/bsd-license.php
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" 
+BASIS, // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR 
IMPLIED.
+//
+// **/
+
+
+#string STR_MODULE_ABSTRACT #language en-US "Serial driver that 
layers on top of a Serial Port Library instance"
+
+#string STR_MODULE_DESCRIPTION  #language en-US "Serial driver that 
layers on top of a Serial Port Library instance.&qu

Re: [edk2] [PATCH 02/12] CorebootModulePkg/PciSioSerialDxe: Use PlatformHookLib

2016-04-19 Thread Leahy, Leroy P 
Hi Maurice,

Quark uses a PCI serial port, not the legacy serial port.  As such, I need to 
pass parameters from coreboot to the PCI serial driver.  This requires the use 
of PlatformHelperLib which requires that I modify the .inf file and rebuild the 
serial driver.

Lee Leahy
(425) 881-4919
Intel Corporation
Suite 125
2700 - 156th Ave NE
Bellevue, WA 98007-6554

-Original Message-
From: Ma, Maurice 
Sent: Tuesday, April 19, 2016 2:33 PM
To: Leahy, Leroy P <leroy.p.le...@intel.com>
Cc: edk2-devel@lists.01.org; Agyeman, Prince <prince.agye...@intel.com>
Subject: RE: [PATCH 02/12] CorebootModulePkg/PciSioSerialDxe: Use 
PlatformHookLib

Hi, Lee,

For this change,  could you let us know why you decided to copy the 
PciSioSerialDxe over to the CorebootModulePkg ?
I am wondering why the current driver in MdeModulePkg cannot be reused.

Thanks
Maurice

-Original Message-
From: Leahy, Leroy P 
Sent: Tuesday, April 19, 2016 1:29 PM
To: edk2-devel@lists.01.org; Ma, Maurice; Agyeman, Prince; Leahy, Leroy P
Subject: [PATCH 02/12] CorebootModulePkg/PciSioSerialDxe: Use PlatformHookLib

Copy the driver from MdeModulePkg/Bus/Pci/PciSioSerialDxe.  Add
PlatformHookLib to the Library section of the .inf file to adjust the
PCDs for the UART.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.le...@intel.com>
---
 CorebootModulePkg/PciSioSerialDxe/ComponentName.c  |  288 +
 .../PciSioSerialDxe/PciSioSerialDxe.inf|   82 ++
 .../PciSioSerialDxe/PciSioSerialDxe.uni|   21 +
 .../PciSioSerialDxe/PciSioSerialDxeExtra.uni   |   18 +
 CorebootModulePkg/PciSioSerialDxe/Serial.c | 1248 ++
 CorebootModulePkg/PciSioSerialDxe/Serial.h |  789 
 CorebootModulePkg/PciSioSerialDxe/SerialIo.c   | 1320 
 7 files changed, 3766 insertions(+)
 create mode 100644 CorebootModulePkg/PciSioSerialDxe/ComponentName.c
 create mode 100644 CorebootModulePkg/PciSioSerialDxe/PciSioSerialDxe.inf
 create mode 100644 CorebootModulePkg/PciSioSerialDxe/PciSioSerialDxe.uni
 create mode 100644 CorebootModulePkg/PciSioSerialDxe/PciSioSerialDxeExtra.uni
 create mode 100644 CorebootModulePkg/PciSioSerialDxe/Serial.c
 create mode 100644 CorebootModulePkg/PciSioSerialDxe/Serial.h
 create mode 100644 CorebootModulePkg/PciSioSerialDxe/SerialIo.c

diff --git a/CorebootModulePkg/PciSioSerialDxe/ComponentName.c 
b/CorebootModulePkg/PciSioSerialDxe/ComponentName.c
new file mode 100644
index 000..994dc84
--- /dev/null
+++ b/CorebootModulePkg/PciSioSerialDxe/ComponentName.c
@@ -0,0 +1,288 @@
+/** @file
+  UEFI Component Name and Name2 protocol for Isa serial driver.
+
+Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.
+This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD 
License
+which accompanies this distribution.  The full text of the license may be 
found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "Serial.h"
+
+//
+// EFI Component Name Protocol
+//
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME_PROTOCOL  
gPciSioSerialComponentName = {
+  SerialComponentNameGetDriverName,
+  SerialComponentNameGetControllerName,
+  "eng"
+};
+
+//
+// EFI Component Name 2 Protocol
+//
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL 
gPciSioSerialComponentName2 = {
+  (EFI_COMPONENT_NAME2_GET_DRIVER_NAME) SerialComponentNameGetDriverName,
+  (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME) 
SerialComponentNameGetControllerName,
+  "en"
+};
+
+
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE 
mSerialDriverNameTable[] = {
+  {
+"eng;en",
+L"PCI SIO Serial Driver"
+  },
+  {
+NULL,
+NULL
+  }
+};
+
+GLOBAL_REMOVE_IF_UNREFERENCED CHAR16 mSioSerialPortName[] = L"SIO Serial Port 
#%d";
+GLOBAL_REMOVE_IF_UNREFERENCED CHAR16 mPciSerialPortName[] = L"PCI Serial Port 
#%d";
+
+/**
+  Retrieves a Unicode string that is the user readable name of the driver.
+
+  This function retrieves the user readable name of a driver in the form of a
+  Unicode string. If the driver specified by This has a user readable name in
+  the language specified by Language, then a pointer to the driver name is
+  returned in DriverName, and EFI_SUCCESS is returned. If the driver specified
+  by This does not support the language specified by Language,
+  then EFI_UNSUPPORTED is returned.
+
+  @param  This[in]  A pointer to the EFI_COMPONENT_NAME2_PROTOCOL 
or
+EFI_COMPONENT_NAME_PROTOCOL instance.
+
+  @param  Language[in]  A pointer to a Null-terminated ASCII string
+array indicating the