[edk2] [edk2-platforms/devel-MinPlatform][PATCH v4 2/3] ClevoOpenBoardPkg/N1xxWU: Flash map update

[Michael Kubacki]

Updates the total BIOS flash image size to 0x5E. This size
matches the BIOS region size already configured in the SPI
flash descriptor.

To write an image produced from the N1xxWU board build, write
the N1XXWU.fd file (~6 MB) to the beginning of the BIOS region
in the SPI flash (currently 0x22).

Always back up the original SPI flash image. These offsets and
sizes are subject to change over time.

Cc: Ankit Sinha 
Cc: Nate DeSimone 
Cc: Chasel Chiu 
Cc: Liming Gao 
Cc: Michael D Kinney 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kubacki 
---
 .../ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc  |  2 +-
 .../N1xxWU/Include/Fdf/FlashMapInclude.fdf | 44 +++---
 .../Intel/ClevoOpenBoardPkg/N1xxWU/prebuild.bat|  4 +-
 3 files changed, 26 insertions(+), 24 deletions(-)

diff --git a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc 
b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc
index 81487ed58d..2116c48fc0 100644
--- a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc
+++ b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc
@@ -55,7 +55,7 @@
   #
   # Default value for OpenBoardPkg.fdf use
   #
-  DEFINE BIOS_SIZE_OPTION = SIZE_70
+  DEFINE BIOS_SIZE_OPTION = SIZE_60
 
 

 #
diff --git 
a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Include/Fdf/FlashMapInclude.fdf 
b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Include/Fdf/FlashMapInclude.fdf
index a727eb3b83..423c6b18f5 100644
--- a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Include/Fdf/FlashMapInclude.fdf
+++ b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Include/Fdf/FlashMapInclude.fdf
@@ -14,39 +14,41 @@
 ##
 
 
#=#
-# 8 M BIOS - for FSP wrapper
+# 6 M BIOS - for FSP wrapper
 
#=#
-DEFINE FLASH_BASE   = 
0xFF80  #
-DEFINE FLASH_SIZE   = 
0x0080  #
+DEFINE FLASH_BASE   = 
0xFFA2  #
+DEFINE FLASH_SIZE   = 
0x005E  #
 DEFINE FLASH_BLOCK_SIZE = 
0x0001  #
-DEFINE FLASH_NUM_BLOCKS = 
0x0080  #
+DEFINE FLASH_NUM_BLOCKS = 
0x005E  #
 
#=#
 
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageOffset   = 
0x  # Flash addr (0xFF80)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageOffset   = 
0x  # Flash addr (0xFFA2)
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageSize = 
0x0004  #
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageVariableOffset   = 
0x  # Flash addr (0xFF80)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageVariableOffset   = 
0x  # Flash addr (0xFFA2)
 SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize= 
0x0001E000  #
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingOffset = 
0x0001E000  # Flash addr (0xFF81E000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingOffset = 
0x0001E000  # Flash addr (0xFFA3E000)
 SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize  = 
0x2000  #
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset   = 
0x0002  # Flash addr (0xFF82)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset   = 
0x0002  # Flash addr (0xFFA4)
 SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize= 
0x0002  #
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedOffset  = 
0x0004  # Flash addr (0xFF84)
+SET gBoardModuleTokenSpaceGuid.PcdFlashNvDebugMessageOffset = 
0x0004  # Flash addr (0xFFA6)
+SET gBoardModuleTokenSpaceGuid.PcdFlashNvDebugMessageSize   = 
0x0001  #
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedOffset  = 
0x0005  # Flash addr (0xFFA7)
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize= 
0x0006  #
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset  = 
0x000A  # Flash addr (0xFF8A)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset  = 
0x000B  # Flash addr (0xFFAD)
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecuritySize= 
0x0007  #
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset= 
0x0011  # Flash addr (0xFF91)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset= 
0x0012  # Flash addr (0xFFB4)
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootSize

[edk2] [edk2-platforms/devel-MinPlatform][PATCH v4 0/3] Enable SPI flash debug messages

[Michael Kubacki]

Adds support to the N1xxWU board series in the ClevoOpenBoardPkg
to write debug messages to a dedicated area on SPI flash. This
supports simple closed chassis debug. At this time, only a PEI
library instance is added since it is anticipated an alternative
mechanism will be available in DXE such as USB debug.

Cc: Ankit Sinha 
Cc: Nate DeSimone 
Cc: Chasel Chiu 
Cc: Ray Ni 
Cc: Liming Gao 
Cc: Michael D Kinney 

Michael Kubacki (3):
  KabylakeSiliconPkg: Add SPI write support in PEI
  ClevoOpenBoardPkg/N1xxWU: Flash map update
  ClevoOpenBoardPkg/N1xxWU: Write PEI debug messages to SPI flash

 Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec  |   5 +
 .../ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc  |  22 +-
 Silicon/Intel/KabylakeSiliconPkg/SiPkgPeiLib.dsc   |   3 +-
 .../N1xxWU/Include/Fdf/FlashMapInclude.fdf |  44 +--
 .../ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.fdf  |   4 +
 .../PeiSerialPortLibSpiFlash.inf   |  56 
 .../Pch/Library/PeiSpiLib/PeiSpiLib.inf|  50 
 .../Pch/Include/Library/SpiLib.h   |  32 ++
 .../PeiSerialPortLibSpiFlash.c | 326 +
 .../Pch/Library/PeiSpiLib/PeiSpiLib.c  | 225 ++
 .../LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c |   5 +-
 .../Intel/ClevoOpenBoardPkg/N1xxWU/prebuild.bat|   4 +-
 12 files changed, 744 insertions(+), 32 deletions(-)
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.inf
 create mode 100644 
Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf
 create mode 100644 
Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiLib.h
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.c
 create mode 100644 
Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c

--
2.16.2.windows.1

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[edk2] [edk2-platforms/devel-MinPlatform][PATCH v4 1/3] KabylakeSiliconPkg: Add SPI write support in PEI

[Michael Kubacki]

Adds a new library PeiSpiLib to perform the initialization necessary
to perform SPI write cycles in PEI. After initialization, it installs
an instance of the PCH_SPI_PPI.

Cc: Nate DeSimone 
Cc: Chasel Chiu 
Cc: Liming Gao 
Cc: Michael D Kinney 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kubacki 
---
 Silicon/Intel/KabylakeSiliconPkg/SiPkgPeiLib.dsc   |   3 +-
 .../Pch/Library/PeiSpiLib/PeiSpiLib.inf|  50 +
 .../Pch/Include/Library/SpiLib.h   |  32 +++
 .../Pch/Library/PeiSpiLib/PeiSpiLib.c  | 225 +
 .../LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c |   5 +-
 5 files changed, 311 insertions(+), 4 deletions(-)
 create mode 100644 
Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf
 create mode 100644 
Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiLib.h
 create mode 100644 
Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c

diff --git a/Silicon/Intel/KabylakeSiliconPkg/SiPkgPeiLib.dsc 
b/Silicon/Intel/KabylakeSiliconPkg/SiPkgPeiLib.dsc
index b81a736486..bb95ce3888 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/SiPkgPeiLib.dsc
+++ b/Silicon/Intel/KabylakeSiliconPkg/SiPkgPeiLib.dsc
@@ -1,7 +1,7 @@
 ## @file
 #  Component description file for the SkyLake SiPkg PEI libraries.
 #
-# Copyright (c) 2017, Intel Corporation. All rights reserved.
+# Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.
 #
 # This program and the accompanying materials are licensed and made available 
under
 # the terms and conditions of the BSD License which accompanies this 
distribution.
@@ -30,6 +30,7 @@
 !endif
  
ResetSystemLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/PeiResetSystemLib/PeiResetSystemLib.inf
  
PchResetLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/PeiPchResetLib/PeiPchResetLib.inf
+ SpiLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/PeiSpiLib/PeiSpiLib.inf
 
 #
 # Cpu
diff --git 
a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf 
b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf
new file mode 100644
index 00..9240b6ef06
--- /dev/null
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf
@@ -0,0 +1,50 @@
+## @file
+# Component description file for PEI PCH SPI Initialization
+#
+# Copyright (c) 2019, Intel Corporation. All rights reserved.
+#
+# This program and the accompanying materials are licensed and made available 
under
+# the terms and conditions of the BSD License which accompanies this 
distribution.
+# The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+[Defines]
+  INF_VERSION = 0x00010017
+  BASE_NAME   = PeiSpiLib
+  FILE_GUID   = 4998447D-7948-448F-AB75-96E24E18FF23
+  VERSION_STRING  = 1.0
+  MODULE_TYPE = PEIM
+  LIBRARY_CLASS   = SpiLib|PEIM PEI_CORE
+  #
+  # The following information is for reference only and not required by the 
build tools.
+  #
+  # VALID_ARCHITECTURES = IA32 X64 IPF
+  #
+
+[LibraryClasses]
+  DebugLib
+  MemoryAllocationLib
+  PcdLib
+  PchCycleDecodingLib
+  PchSpiCommonLib
+  PciSegmentLib
+  PeiServicesLib
+  PeiServicesTablePointerLib
+
+[Packages]
+  MdePkg/MdePkg.dec
+  KabylakeSiliconPkg/SiPkg.dec
+
+[Sources]
+  PeiSpiLib.c
+
+[Pcd]
+  gSiPkgTokenSpaceGuid.PcdAcpiBaseAddress   ## CONSUMES
+
+[Ppis]
+  gPchSpiPpiGuid  ## PRODUCES
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiLib.h 
b/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiLib.h
new file mode 100644
index 00..6af66f8869
--- /dev/null
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiLib.h
@@ -0,0 +1,32 @@
+/** @file
+  Library to initialize SPI services for future SPI accesses.
+
+Copyright (c) 2019, Intel Corporation. All rights reserved.
+This program and the accompanying materials are licensed and made available 
under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef _SPI_LIB_H_
+#define _SPI_LIB_H_
+
+/**
+  Initializes SPI for access from future services.
+
+  @retval EFI_SUCCESS The SPI service was initialized successfully.
+  @retval EFI_OUT_OF_RESOUCES Insufficient memory available to allocate 
structures required for initialization.
+  @retval Others  An error occurred initializing SPI services.
+
+**/
+EFI_STATUS
+EFIAPI
+SpiServiceInit (
+  VOID
+  );
+
+#endif
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c 
b/Silicon/Intel/KabylakeSiliconPkg/P

[edk2] [edk2-platforms/devel-MinPlatform][PATCH v4 3/3] ClevoOpenBoardPkg/N1xxWU: Write PEI debug messages to SPI flash

[Michael Kubacki]

Adds a new SerialPortLib instance to the ClevoOpenBoardPkg to support
writing debug messages to a dedicated area on SPI flash. This is to
enable closed chassis debug support on the system.

DXE and later phases after memory initialization are expected to use
USB debug.

Cc: Ankit Sinha 
Cc: Nate DeSimone 
Cc: Chasel Chiu 
Cc: Liming Gao 
Cc: Michael D Kinney 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kubacki 
---
 Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec  |   5 +
 .../ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc  |  20 +-
 .../ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.fdf  |   4 +
 .../PeiSerialPortLibSpiFlash.inf   |  56 
 .../PeiSerialPortLibSpiFlash.c | 326 +
 5 files changed, 407 insertions(+), 4 deletions(-)
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.inf
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.c

diff --git a/Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec 
b/Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec
index 87bbfb2240..aa457e64db 100644
--- a/Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec
+++ b/Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec
@@ -30,6 +30,7 @@ Features\Tbt\Include
 [Guids]
 gBoardModuleTokenSpaceGuid=  {0x72d1fff7, 0xa42a, 0x4219, {0xb9, 
0x95, 0x5a, 0x67, 0x53, 0x6e, 0xa4, 0x2a}}
 gTianoLogoGuid=  {0x7BB28B99, 0x61BB, 0x11D5, {0x9A, 
0x5D, 0x00, 0x90, 0x27, 0x3F, 0xC1, 0x4D}}
+gSpiFlashDebugHobGuid =  {0xcaaaf418, 0x38a5, 0x4d49, {0xbe, 
0x74, 0xe6, 0x06, 0xe4, 0x02, 0x6d, 0x25}}
 gTbtInfoHobGuid   =  {0x74a81eaa, 0x033c, 0x4783, {0xbe, 
0x2b, 0x84, 0x85, 0x74, 0xa6, 0x97, 0xb7}}
 gPlatformModuleTokenSpaceGuid =  {0x69d13bf0, 0xaf91, 0x4d96, {0xaa, 
0x9f, 0x21, 0x84, 0xc5, 0xce, 0x3b, 0xc0}}
 
@@ -64,6 +65,10 @@ 
gBoardModuleTokenSpaceGuid.PcdSwSmiDTbtEnumerate|0xF7|UINT8|0x00110
 
 gBoardModuleTokenSpaceGuid.PcdSmcExtSmiBitPosition|0x01|UINT8|0x9015
 
+gBoardModuleTokenSpaceGuid.PcdFlashNvDebugMessageBase|0x|UINT32|0x9030
+gBoardModuleTokenSpaceGuid.PcdFlashNvDebugMessageSize|0x|UINT32|0x9031
+gBoardModuleTokenSpaceGuid.PcdFlashNvDebugMessageOffset|0x|UINT32|0x9032
+
 [PcdsDynamic]
 
 # Board GPIO Table
diff --git a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc 
b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc
index 2116c48fc0..c43a30de34 100644
--- a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc
+++ b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc
@@ -116,10 +116,18 @@
 #
 !include $(PLATFORM_SI_PACKAGE)/SiPkgCommonLib.dsc
 
+[LibraryClasses.IA32.SEC]
+  SerialPortLib|MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNull.inf
+  DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+  
TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/SecTestPointCheckLib.inf
+  
SecBoardInitLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/SecBoardInitLibNull/SecBoardInitLibNull.inf
+
 [LibraryClasses.IA32]
   #
   # PEI phase common
   #
+  
SerialPortLib|$(PLATFORM_BOARD_PACKAGE)/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.inf
+  
DebugLib|MdeModulePkg/Library/PeiDxeDebugLibReportStatusCode/PeiDxeDebugLibReportStatusCode.inf
   
FspWrapperPlatformLib|$(PLATFORM_PACKAGE)/FspWrapper/Library/PeiFspWrapperPlatformLib/PeiFspWrapperPlatformLib.inf
 !if $(TARGET) == DEBUG
   
TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/PeiTestPointCheckLib.inf
@@ -138,10 +146,6 @@
 #
 !include $(PLATFORM_SI_PACKAGE)/SiPkgPeiLib.dsc
 
-[LibraryClasses.IA32.SEC]
-  
TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/SecTestPointCheckLib.inf
-  
SecBoardInitLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/SecBoardInitLibNull/SecBoardInitLibNull.inf
-
 [LibraryClasses.X64]
   #
   # DXE phase common
@@ -185,6 +189,14 @@
 #
 !include $(PLATFORM_PACKAGE)/Include/Dsc/CorePeiInclude.dsc
 
+  #
+  # Core
+  #
+  MdeModulePkg/Universal/StatusCodeHandler/Pei/StatusCodeHandlerPei.inf {
+
+  DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+  }
+
   #
   # FSP wrapper SEC Core
   #
diff --git a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.fdf 
b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.fdf
index 95c1758ff3..7f3e965c75 100644
--- a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.fdf
+++ b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.fdf
@@ -136,6 +136,10 @@ 
gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset|gEfiMdeModulePkgTo
 
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
 #NV_FTW_SPARE
 
+gBoardModuleTokenSpaceGuid.PcdFlashNvDebugMessageOffset

[edk2] [edk2-platforms/devel-MinPlatform][PATCH v3 2/3] ClevoOpenBoardPkg/N1xxWU: Flash map update

[Michael Kubacki]

Updates the total BIOS flash image size to 0x5E. This size
matches the BIOS region size already configured in the SPI
flash descriptor.

To write an image produced from the N1xxWU board build, write
the N1XXWU.fd file (~6 MB) to the beginning of the BIOS region
in the SPI flash (currently 0x22).

Always back up the original SPI flash image. These offsets and
sizes are subject to change over time.

Cc: Ankit Sinha 
Cc: Nate DeSimone 
Cc: Chasel Chiu 
Cc: Liming Gao 
Cc: Michael D Kinney 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kubacki 
---
 .../ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc  |  2 +-
 .../N1xxWU/Include/Fdf/FlashMapInclude.fdf | 44 +++---
 .../Intel/ClevoOpenBoardPkg/N1xxWU/prebuild.bat|  4 +-
 3 files changed, 26 insertions(+), 24 deletions(-)

diff --git a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc 
b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc
index 81487ed58d..2116c48fc0 100644
--- a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc
+++ b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc
@@ -55,7 +55,7 @@
   #
   # Default value for OpenBoardPkg.fdf use
   #
-  DEFINE BIOS_SIZE_OPTION = SIZE_70
+  DEFINE BIOS_SIZE_OPTION = SIZE_60
 
 

 #
diff --git 
a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Include/Fdf/FlashMapInclude.fdf 
b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Include/Fdf/FlashMapInclude.fdf
index a727eb3b83..423c6b18f5 100644
--- a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Include/Fdf/FlashMapInclude.fdf
+++ b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Include/Fdf/FlashMapInclude.fdf
@@ -14,39 +14,41 @@
 ##
 
 
#=#
-# 8 M BIOS - for FSP wrapper
+# 6 M BIOS - for FSP wrapper
 
#=#
-DEFINE FLASH_BASE   = 
0xFF80  #
-DEFINE FLASH_SIZE   = 
0x0080  #
+DEFINE FLASH_BASE   = 
0xFFA2  #
+DEFINE FLASH_SIZE   = 
0x005E  #
 DEFINE FLASH_BLOCK_SIZE = 
0x0001  #
-DEFINE FLASH_NUM_BLOCKS = 
0x0080  #
+DEFINE FLASH_NUM_BLOCKS = 
0x005E  #
 
#=#
 
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageOffset   = 
0x  # Flash addr (0xFF80)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageOffset   = 
0x  # Flash addr (0xFFA2)
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageSize = 
0x0004  #
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageVariableOffset   = 
0x  # Flash addr (0xFF80)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageVariableOffset   = 
0x  # Flash addr (0xFFA2)
 SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize= 
0x0001E000  #
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingOffset = 
0x0001E000  # Flash addr (0xFF81E000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingOffset = 
0x0001E000  # Flash addr (0xFFA3E000)
 SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize  = 
0x2000  #
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset   = 
0x0002  # Flash addr (0xFF82)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset   = 
0x0002  # Flash addr (0xFFA4)
 SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize= 
0x0002  #
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedOffset  = 
0x0004  # Flash addr (0xFF84)
+SET gBoardModuleTokenSpaceGuid.PcdFlashNvDebugMessageOffset = 
0x0004  # Flash addr (0xFFA6)
+SET gBoardModuleTokenSpaceGuid.PcdFlashNvDebugMessageSize   = 
0x0001  #
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedOffset  = 
0x0005  # Flash addr (0xFFA7)
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize= 
0x0006  #
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset  = 
0x000A  # Flash addr (0xFF8A)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset  = 
0x000B  # Flash addr (0xFFAD)
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecuritySize= 
0x0007  #
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset= 
0x0011  # Flash addr (0xFF91)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset= 
0x0012  # Flash addr (0xFFB4)
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootSize

[edk2] [edk2-platforms/devel-MinPlatform][PATCH v3 1/3] KabylakeSiliconPkg: Add SPI write support in PEI

[Michael Kubacki]

Adds a new library PeiSpiLib to perform the initialization necessary
to perform SPI write cycles in PEI. After initialization, it installs
an instance of the PCH_SPI_PPI.

Cc: Nate DeSimone 
Cc: Chasel Chiu 
Cc: Liming Gao 
Cc: Michael D Kinney 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kubacki 
---
 Silicon/Intel/KabylakeSiliconPkg/SiPkgPeiLib.dsc   |   3 +-
 .../Pch/Library/PeiSpiLib/PeiSpiLib.inf|  50 +
 .../Pch/Include/Library/SpiLib.h   |  32 +++
 .../Pch/Library/PeiSpiLib/PeiSpiLib.c  | 221 +
 .../LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c |   5 +-
 5 files changed, 307 insertions(+), 4 deletions(-)
 create mode 100644 
Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf
 create mode 100644 
Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiLib.h
 create mode 100644 
Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c

diff --git a/Silicon/Intel/KabylakeSiliconPkg/SiPkgPeiLib.dsc 
b/Silicon/Intel/KabylakeSiliconPkg/SiPkgPeiLib.dsc
index b81a736486..bb95ce3888 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/SiPkgPeiLib.dsc
+++ b/Silicon/Intel/KabylakeSiliconPkg/SiPkgPeiLib.dsc
@@ -1,7 +1,7 @@
 ## @file
 #  Component description file for the SkyLake SiPkg PEI libraries.
 #
-# Copyright (c) 2017, Intel Corporation. All rights reserved.
+# Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.
 #
 # This program and the accompanying materials are licensed and made available 
under
 # the terms and conditions of the BSD License which accompanies this 
distribution.
@@ -30,6 +30,7 @@
 !endif
  
ResetSystemLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/PeiResetSystemLib/PeiResetSystemLib.inf
  
PchResetLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/PeiPchResetLib/PeiPchResetLib.inf
+ SpiLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/PeiSpiLib/PeiSpiLib.inf
 
 #
 # Cpu
diff --git 
a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf 
b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf
new file mode 100644
index 00..9240b6ef06
--- /dev/null
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf
@@ -0,0 +1,50 @@
+## @file
+# Component description file for PEI PCH SPI Initialization
+#
+# Copyright (c) 2019, Intel Corporation. All rights reserved.
+#
+# This program and the accompanying materials are licensed and made available 
under
+# the terms and conditions of the BSD License which accompanies this 
distribution.
+# The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+[Defines]
+  INF_VERSION = 0x00010017
+  BASE_NAME   = PeiSpiLib
+  FILE_GUID   = 4998447D-7948-448F-AB75-96E24E18FF23
+  VERSION_STRING  = 1.0
+  MODULE_TYPE = PEIM
+  LIBRARY_CLASS   = SpiLib|PEIM PEI_CORE
+  #
+  # The following information is for reference only and not required by the 
build tools.
+  #
+  # VALID_ARCHITECTURES = IA32 X64 IPF
+  #
+
+[LibraryClasses]
+  DebugLib
+  MemoryAllocationLib
+  PcdLib
+  PchCycleDecodingLib
+  PchSpiCommonLib
+  PciSegmentLib
+  PeiServicesLib
+  PeiServicesTablePointerLib
+
+[Packages]
+  MdePkg/MdePkg.dec
+  KabylakeSiliconPkg/SiPkg.dec
+
+[Sources]
+  PeiSpiLib.c
+
+[Pcd]
+  gSiPkgTokenSpaceGuid.PcdAcpiBaseAddress   ## CONSUMES
+
+[Ppis]
+  gPchSpiPpiGuid  ## PRODUCES
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiLib.h 
b/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiLib.h
new file mode 100644
index 00..6af66f8869
--- /dev/null
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiLib.h
@@ -0,0 +1,32 @@
+/** @file
+  Library to initialize SPI services for future SPI accesses.
+
+Copyright (c) 2019, Intel Corporation. All rights reserved.
+This program and the accompanying materials are licensed and made available 
under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef _SPI_LIB_H_
+#define _SPI_LIB_H_
+
+/**
+  Initializes SPI for access from future services.
+
+  @retval EFI_SUCCESS The SPI service was initialized successfully.
+  @retval EFI_OUT_OF_RESOUCES Insufficient memory available to allocate 
structures required for initialization.
+  @retval Others  An error occurred initializing SPI services.
+
+**/
+EFI_STATUS
+EFIAPI
+SpiServiceInit (
+  VOID
+  );
+
+#endif
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c 
b/Silicon/Intel/KabylakeSiliconPkg/P

[edk2] [edk2-platforms/devel-MinPlatform][PATCH v3 0/3] Enable SPI flash debug messages

[Michael Kubacki]

Adds support to the N1xxWU board series in the ClevoOpenBoardPkg
to write debug messages to a dedicated area on SPI flash. This
supports simple closed chassis debug. At this time, only a PEI
library instance is added since it is anticipated an alternative
mechanism will be available in DXE such as USB debug.

Cc: Ankit Sinha 
Cc: Nate DeSimone 
Cc: Chasel Chiu 
Cc: Ray Ni 
Cc: Liming Gao 
Cc: Michael D Kinney 

Michael Kubacki (3):
  KabylakeSiliconPkg: Add SPI write support in PEI
  ClevoOpenBoardPkg/N1xxWU: Flash map update
  ClevoOpenBoardPkg/N1xxWU: Write PEI debug messages to SPI flash

 Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec  |   5 +
 .../ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc  |  22 +-
 Silicon/Intel/KabylakeSiliconPkg/SiPkgPeiLib.dsc   |   3 +-
 .../N1xxWU/Include/Fdf/FlashMapInclude.fdf |  44 +--
 .../ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.fdf  |   4 +
 .../PeiSerialPortLibSpiFlash.inf   |  56 
 .../Pch/Library/PeiSpiLib/PeiSpiLib.inf|  50 
 .../Pch/Include/Library/SpiLib.h   |  32 ++
 .../PeiSerialPortLibSpiFlash.c | 326 +
 .../Pch/Library/PeiSpiLib/PeiSpiLib.c  | 221 ++
 .../LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c |   5 +-
 .../Intel/ClevoOpenBoardPkg/N1xxWU/prebuild.bat|   4 +-
 12 files changed, 740 insertions(+), 32 deletions(-)
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.inf
 create mode 100644 
Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf
 create mode 100644 
Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiLib.h
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.c
 create mode 100644 
Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c

--
2.16.2.windows.1

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[edk2] [edk2-platforms/devel-MinPlatform][PATCH v3 3/3] ClevoOpenBoardPkg/N1xxWU: Write PEI debug messages to SPI flash

[Michael Kubacki]

Adds a new SerialPortLib instance to the ClevoOpenBoardPkg to support
writing debug messages to a dedicated area on SPI flash. This is to
enable closed chassis debug support on the system.

DXE and later phases after memory initialization are expected to use
USB debug.

Cc: Ankit Sinha 
Cc: Nate DeSimone 
Cc: Chasel Chiu 
Cc: Liming Gao 
Cc: Michael D Kinney 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kubacki 
---
 Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec  |   5 +
 .../ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc  |  20 +-
 .../ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.fdf  |   4 +
 .../PeiSerialPortLibSpiFlash.inf   |  56 
 .../PeiSerialPortLibSpiFlash.c | 326 +
 5 files changed, 407 insertions(+), 4 deletions(-)
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.inf
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.c

diff --git a/Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec 
b/Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec
index 87bbfb2240..aa457e64db 100644
--- a/Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec
+++ b/Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec
@@ -30,6 +30,7 @@ Features\Tbt\Include
 [Guids]
 gBoardModuleTokenSpaceGuid=  {0x72d1fff7, 0xa42a, 0x4219, {0xb9, 
0x95, 0x5a, 0x67, 0x53, 0x6e, 0xa4, 0x2a}}
 gTianoLogoGuid=  {0x7BB28B99, 0x61BB, 0x11D5, {0x9A, 
0x5D, 0x00, 0x90, 0x27, 0x3F, 0xC1, 0x4D}}
+gSpiFlashDebugHobGuid =  {0xcaaaf418, 0x38a5, 0x4d49, {0xbe, 
0x74, 0xe6, 0x06, 0xe4, 0x02, 0x6d, 0x25}}
 gTbtInfoHobGuid   =  {0x74a81eaa, 0x033c, 0x4783, {0xbe, 
0x2b, 0x84, 0x85, 0x74, 0xa6, 0x97, 0xb7}}
 gPlatformModuleTokenSpaceGuid =  {0x69d13bf0, 0xaf91, 0x4d96, {0xaa, 
0x9f, 0x21, 0x84, 0xc5, 0xce, 0x3b, 0xc0}}
 
@@ -64,6 +65,10 @@ 
gBoardModuleTokenSpaceGuid.PcdSwSmiDTbtEnumerate|0xF7|UINT8|0x00110
 
 gBoardModuleTokenSpaceGuid.PcdSmcExtSmiBitPosition|0x01|UINT8|0x9015
 
+gBoardModuleTokenSpaceGuid.PcdFlashNvDebugMessageBase|0x|UINT32|0x9030
+gBoardModuleTokenSpaceGuid.PcdFlashNvDebugMessageSize|0x|UINT32|0x9031
+gBoardModuleTokenSpaceGuid.PcdFlashNvDebugMessageOffset|0x|UINT32|0x9032
+
 [PcdsDynamic]
 
 # Board GPIO Table
diff --git a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc 
b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc
index 2116c48fc0..c43a30de34 100644
--- a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc
+++ b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc
@@ -116,10 +116,18 @@
 #
 !include $(PLATFORM_SI_PACKAGE)/SiPkgCommonLib.dsc
 
+[LibraryClasses.IA32.SEC]
+  SerialPortLib|MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNull.inf
+  DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+  
TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/SecTestPointCheckLib.inf
+  
SecBoardInitLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/SecBoardInitLibNull/SecBoardInitLibNull.inf
+
 [LibraryClasses.IA32]
   #
   # PEI phase common
   #
+  
SerialPortLib|$(PLATFORM_BOARD_PACKAGE)/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.inf
+  
DebugLib|MdeModulePkg/Library/PeiDxeDebugLibReportStatusCode/PeiDxeDebugLibReportStatusCode.inf
   
FspWrapperPlatformLib|$(PLATFORM_PACKAGE)/FspWrapper/Library/PeiFspWrapperPlatformLib/PeiFspWrapperPlatformLib.inf
 !if $(TARGET) == DEBUG
   
TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/PeiTestPointCheckLib.inf
@@ -138,10 +146,6 @@
 #
 !include $(PLATFORM_SI_PACKAGE)/SiPkgPeiLib.dsc
 
-[LibraryClasses.IA32.SEC]
-  
TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/SecTestPointCheckLib.inf
-  
SecBoardInitLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/SecBoardInitLibNull/SecBoardInitLibNull.inf
-
 [LibraryClasses.X64]
   #
   # DXE phase common
@@ -185,6 +189,14 @@
 #
 !include $(PLATFORM_PACKAGE)/Include/Dsc/CorePeiInclude.dsc
 
+  #
+  # Core
+  #
+  MdeModulePkg/Universal/StatusCodeHandler/Pei/StatusCodeHandlerPei.inf {
+
+  DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+  }
+
   #
   # FSP wrapper SEC Core
   #
diff --git a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.fdf 
b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.fdf
index 95c1758ff3..7f3e965c75 100644
--- a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.fdf
+++ b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.fdf
@@ -136,6 +136,10 @@ 
gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset|gEfiMdeModulePkgTo
 
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
 #NV_FTW_SPARE
 
+gBoardModuleTokenSpaceGuid.PcdFlashNvDebugMessageOffset

[edk2] [edk2-platforms/devel-MinPlatform][PATCH v2 3/3] ClevoOpenBoardPkg/N1xxWU: Write PEI debug messages to SPI flash

[Michael Kubacki]

Adds a new SerialPortLib instance to the ClevoOpenBoardPkg to support
writing debug messages to a dedicated area on SPI flash. This is to
enable closed chassis debug support on the system.

DXE and later phases after memory initialization are expected to use
USB debug.

Cc: Ankit Sinha 
Cc: Nate DeSimone 
Cc: Chasel Chiu 
Cc: Liming Gao 
Cc: Michael D Kinney 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kubacki 
---
 Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec  |   5 +
 .../ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc  |  20 +-
 .../ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.fdf  |   4 +
 .../PeiSerialPortLibSpiFlash.inf   |  56 
 .../PeiSerialPortLibSpiFlash.c | 326 +
 5 files changed, 407 insertions(+), 4 deletions(-)
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.inf
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.c

diff --git a/Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec 
b/Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec
index 87bbfb2240..aa457e64db 100644
--- a/Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec
+++ b/Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec
@@ -30,6 +30,7 @@ Features\Tbt\Include
 [Guids]
 gBoardModuleTokenSpaceGuid=  {0x72d1fff7, 0xa42a, 0x4219, {0xb9, 
0x95, 0x5a, 0x67, 0x53, 0x6e, 0xa4, 0x2a}}
 gTianoLogoGuid=  {0x7BB28B99, 0x61BB, 0x11D5, {0x9A, 
0x5D, 0x00, 0x90, 0x27, 0x3F, 0xC1, 0x4D}}
+gSpiFlashDebugHobGuid =  {0xcaaaf418, 0x38a5, 0x4d49, {0xbe, 
0x74, 0xe6, 0x06, 0xe4, 0x02, 0x6d, 0x25}}
 gTbtInfoHobGuid   =  {0x74a81eaa, 0x033c, 0x4783, {0xbe, 
0x2b, 0x84, 0x85, 0x74, 0xa6, 0x97, 0xb7}}
 gPlatformModuleTokenSpaceGuid =  {0x69d13bf0, 0xaf91, 0x4d96, {0xaa, 
0x9f, 0x21, 0x84, 0xc5, 0xce, 0x3b, 0xc0}}
 
@@ -64,6 +65,10 @@ 
gBoardModuleTokenSpaceGuid.PcdSwSmiDTbtEnumerate|0xF7|UINT8|0x00110
 
 gBoardModuleTokenSpaceGuid.PcdSmcExtSmiBitPosition|0x01|UINT8|0x9015
 
+gBoardModuleTokenSpaceGuid.PcdFlashNvDebugMessageBase|0x|UINT32|0x9030
+gBoardModuleTokenSpaceGuid.PcdFlashNvDebugMessageSize|0x|UINT32|0x9031
+gBoardModuleTokenSpaceGuid.PcdFlashNvDebugMessageOffset|0x|UINT32|0x9032
+
 [PcdsDynamic]
 
 # Board GPIO Table
diff --git a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc 
b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc
index 2116c48fc0..c43a30de34 100644
--- a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc
+++ b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc
@@ -116,10 +116,18 @@
 #
 !include $(PLATFORM_SI_PACKAGE)/SiPkgCommonLib.dsc
 
+[LibraryClasses.IA32.SEC]
+  SerialPortLib|MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNull.inf
+  DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+  
TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/SecTestPointCheckLib.inf
+  
SecBoardInitLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/SecBoardInitLibNull/SecBoardInitLibNull.inf
+
 [LibraryClasses.IA32]
   #
   # PEI phase common
   #
+  
SerialPortLib|$(PLATFORM_BOARD_PACKAGE)/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.inf
+  
DebugLib|MdeModulePkg/Library/PeiDxeDebugLibReportStatusCode/PeiDxeDebugLibReportStatusCode.inf
   
FspWrapperPlatformLib|$(PLATFORM_PACKAGE)/FspWrapper/Library/PeiFspWrapperPlatformLib/PeiFspWrapperPlatformLib.inf
 !if $(TARGET) == DEBUG
   
TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/PeiTestPointCheckLib.inf
@@ -138,10 +146,6 @@
 #
 !include $(PLATFORM_SI_PACKAGE)/SiPkgPeiLib.dsc
 
-[LibraryClasses.IA32.SEC]
-  
TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/SecTestPointCheckLib.inf
-  
SecBoardInitLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/SecBoardInitLibNull/SecBoardInitLibNull.inf
-
 [LibraryClasses.X64]
   #
   # DXE phase common
@@ -185,6 +189,14 @@
 #
 !include $(PLATFORM_PACKAGE)/Include/Dsc/CorePeiInclude.dsc
 
+  #
+  # Core
+  #
+  MdeModulePkg/Universal/StatusCodeHandler/Pei/StatusCodeHandlerPei.inf {
+
+  DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+  }
+
   #
   # FSP wrapper SEC Core
   #
diff --git a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.fdf 
b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.fdf
index 95c1758ff3..7f3e965c75 100644
--- a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.fdf
+++ b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.fdf
@@ -136,6 +136,10 @@ 
gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset|gEfiMdeModulePkgTo
 
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
 #NV_FTW_SPARE
 
+gBoardModuleTokenSpaceGuid.PcdFlashNvDebugMessageOffset

[edk2] [edk2-platforms/devel-MinPlatform][PATCH v2 0/3] Enable SPI flash debug messages

[Michael Kubacki]

Adds support to the N1xxWU board series in the ClevoOpenBoardPkg
to write debug messages to a dedicated area on SPI flash. This
supports simple closed chassis debug. At this time, only a PEI
library instance is added since it is anticipated an alternative
mechanism will be available in DXE such as USB debug.

Cc: Ankit Sinha 
Cc: Nate DeSimone 
Cc: Chasel Chiu 
Cc: Ray Ni 
Cc: Liming Gao 
Cc: Michael D Kinney 

Michael Kubacki (3):
  KabylakeSiliconPkg: Add SPI write support in PEI
  ClevoOpenBoardPkg/N1xxWU: Flash map update
  ClevoOpenBoardPkg/N1xxWU: Write PEI debug messages to SPI flash

 Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec  |   5 +
 .../ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc  |  22 +-
 Silicon/Intel/KabylakeSiliconPkg/SiPkgPeiLib.dsc   |   3 +-
 .../N1xxWU/Include/Fdf/FlashMapInclude.fdf |  44 +--
 .../ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.fdf  |   4 +
 .../PeiSerialPortLibSpiFlash.inf   |  56 
 .../Pch/Library/PeiSpiLib/PeiSpiLib.inf|  50 
 .../BasePchSpiCommonLib/BasePchSpiCommonLib.inf|   6 +-
 .../Pch/Include/Library/SpiLib.h   |  32 ++
 .../PeiSerialPortLibSpiFlash.c | 326 +
 .../Pch/Library/PeiSpiLib/PeiSpiLib.c  | 221 ++
 .../LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c |   6 +-
 .../Intel/ClevoOpenBoardPkg/N1xxWU/prebuild.bat|   4 +-
 13 files changed, 746 insertions(+), 33 deletions(-)
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.inf
 create mode 100644 
Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf
 create mode 100644 
Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiLib.h
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.c
 create mode 100644 
Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c

-- 
2.16.2.windows.1

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[edk2] [edk2-platforms/devel-MinPlatform][PATCH v2 2/3] ClevoOpenBoardPkg/N1xxWU: Flash map update

[Michael Kubacki]

Updates the total BIOS flash image size to 0x5E. This size
matches the BIOS region size already configured in the SPI
flash descriptor.

To write an image produced from the N1xxWU board build, write
the N1XXWU.fd file (~6 MB) to the beginning of the BIOS region
in the SPI flash (currently 0x22).

Always back up the original SPI flash image. These offsets and
sizes are subject to change over time.

Cc: Ankit Sinha 
Cc: Nate DeSimone 
Cc: Chasel Chiu 
Cc: Liming Gao 
Cc: Michael D Kinney 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kubacki 
---
 .../ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc  |  2 +-
 .../N1xxWU/Include/Fdf/FlashMapInclude.fdf | 44 +++---
 .../Intel/ClevoOpenBoardPkg/N1xxWU/prebuild.bat|  4 +-
 3 files changed, 26 insertions(+), 24 deletions(-)

diff --git a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc 
b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc
index 81487ed58d..2116c48fc0 100644
--- a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc
+++ b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc
@@ -55,7 +55,7 @@
   #
   # Default value for OpenBoardPkg.fdf use
   #
-  DEFINE BIOS_SIZE_OPTION = SIZE_70
+  DEFINE BIOS_SIZE_OPTION = SIZE_60
 
 

 #
diff --git 
a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Include/Fdf/FlashMapInclude.fdf 
b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Include/Fdf/FlashMapInclude.fdf
index a727eb3b83..423c6b18f5 100644
--- a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Include/Fdf/FlashMapInclude.fdf
+++ b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Include/Fdf/FlashMapInclude.fdf
@@ -14,39 +14,41 @@
 ##
 
 
#=#
-# 8 M BIOS - for FSP wrapper
+# 6 M BIOS - for FSP wrapper
 
#=#
-DEFINE FLASH_BASE   = 
0xFF80  #
-DEFINE FLASH_SIZE   = 
0x0080  #
+DEFINE FLASH_BASE   = 
0xFFA2  #
+DEFINE FLASH_SIZE   = 
0x005E  #
 DEFINE FLASH_BLOCK_SIZE = 
0x0001  #
-DEFINE FLASH_NUM_BLOCKS = 
0x0080  #
+DEFINE FLASH_NUM_BLOCKS = 
0x005E  #
 
#=#
 
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageOffset   = 
0x  # Flash addr (0xFF80)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageOffset   = 
0x  # Flash addr (0xFFA2)
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageSize = 
0x0004  #
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageVariableOffset   = 
0x  # Flash addr (0xFF80)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageVariableOffset   = 
0x  # Flash addr (0xFFA2)
 SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize= 
0x0001E000  #
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingOffset = 
0x0001E000  # Flash addr (0xFF81E000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingOffset = 
0x0001E000  # Flash addr (0xFFA3E000)
 SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize  = 
0x2000  #
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset   = 
0x0002  # Flash addr (0xFF82)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset   = 
0x0002  # Flash addr (0xFFA4)
 SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize= 
0x0002  #
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedOffset  = 
0x0004  # Flash addr (0xFF84)
+SET gBoardModuleTokenSpaceGuid.PcdFlashNvDebugMessageOffset = 
0x0004  # Flash addr (0xFFA6)
+SET gBoardModuleTokenSpaceGuid.PcdFlashNvDebugMessageSize   = 
0x0001  #
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedOffset  = 
0x0005  # Flash addr (0xFFA7)
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize= 
0x0006  #
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset  = 
0x000A  # Flash addr (0xFF8A)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset  = 
0x000B  # Flash addr (0xFFAD)
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecuritySize= 
0x0007  #
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset= 
0x0011  # Flash addr (0xFF91)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset= 
0x0012  # Flash addr (0xFFB4)
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootSize

[edk2] [edk2-platforms/devel-MinPlatform][PATCH v2 1/3] KabylakeSiliconPkg: Add SPI write support in PEI

[Michael Kubacki]

Adds a new library PeiSpiLib to perform the initialization necessary
to perform SPI write cycles in PEI. After initialization, it installs
an instance of the PCH_SPI_PPI.

Cc: Nate DeSimone 
Cc: Chasel Chiu 
Cc: Liming Gao 
Cc: Michael D Kinney 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kubacki 
---
 Silicon/Intel/KabylakeSiliconPkg/SiPkgPeiLib.dsc   |   3 +-
 .../Pch/Library/PeiSpiLib/PeiSpiLib.inf|  50 +
 .../BasePchSpiCommonLib/BasePchSpiCommonLib.inf|   6 +-
 .../Pch/Include/Library/SpiLib.h   |  32 +++
 .../Pch/Library/PeiSpiLib/PeiSpiLib.c  | 221 +
 .../LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c |   6 +-
 6 files changed, 313 insertions(+), 5 deletions(-)
 create mode 100644 
Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf
 create mode 100644 
Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiLib.h
 create mode 100644 
Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c

diff --git a/Silicon/Intel/KabylakeSiliconPkg/SiPkgPeiLib.dsc 
b/Silicon/Intel/KabylakeSiliconPkg/SiPkgPeiLib.dsc
index b81a736486..bb95ce3888 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/SiPkgPeiLib.dsc
+++ b/Silicon/Intel/KabylakeSiliconPkg/SiPkgPeiLib.dsc
@@ -1,7 +1,7 @@
 ## @file
 #  Component description file for the SkyLake SiPkg PEI libraries.
 #
-# Copyright (c) 2017, Intel Corporation. All rights reserved.
+# Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.
 #
 # This program and the accompanying materials are licensed and made available 
under
 # the terms and conditions of the BSD License which accompanies this 
distribution.
@@ -30,6 +30,7 @@
 !endif
  
ResetSystemLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/PeiResetSystemLib/PeiResetSystemLib.inf
  
PchResetLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/PeiPchResetLib/PeiPchResetLib.inf
+ SpiLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/PeiSpiLib/PeiSpiLib.inf
 
 #
 # Cpu
diff --git 
a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf 
b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf
new file mode 100644
index 00..9240b6ef06
--- /dev/null
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf
@@ -0,0 +1,50 @@
+## @file
+# Component description file for PEI PCH SPI Initialization
+#
+# Copyright (c) 2019, Intel Corporation. All rights reserved.
+#
+# This program and the accompanying materials are licensed and made available 
under
+# the terms and conditions of the BSD License which accompanies this 
distribution.
+# The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+[Defines]
+  INF_VERSION = 0x00010017
+  BASE_NAME   = PeiSpiLib
+  FILE_GUID   = 4998447D-7948-448F-AB75-96E24E18FF23
+  VERSION_STRING  = 1.0
+  MODULE_TYPE = PEIM
+  LIBRARY_CLASS   = SpiLib|PEIM PEI_CORE
+  #
+  # The following information is for reference only and not required by the 
build tools.
+  #
+  # VALID_ARCHITECTURES = IA32 X64 IPF
+  #
+
+[LibraryClasses]
+  DebugLib
+  MemoryAllocationLib
+  PcdLib
+  PchCycleDecodingLib
+  PchSpiCommonLib
+  PciSegmentLib
+  PeiServicesLib
+  PeiServicesTablePointerLib
+
+[Packages]
+  MdePkg/MdePkg.dec
+  KabylakeSiliconPkg/SiPkg.dec
+
+[Sources]
+  PeiSpiLib.c
+
+[Pcd]
+  gSiPkgTokenSpaceGuid.PcdAcpiBaseAddress   ## CONSUMES
+
+[Ppis]
+  gPchSpiPpiGuid  ## PRODUCES
diff --git 
a/Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf
 
b/Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf
index 128f7adcea..2c531e7816 100644
--- 
a/Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf
+++ 
b/Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf
@@ -1,7 +1,7 @@
 ## @file
 #  Component description file for the PchSpiCommonLib
 #
-# Copyright (c) 2017, Intel Corporation. All rights reserved.
+# Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.
 #
 # This program and the accompanying materials are licensed and made available 
under
 # the terms and conditions of the BSD License which accompanies this 
distribution.
@@ -32,4 +32,8 @@
 [LibraryClasses]
   IoLib
   DebugLib
+  PcdLib
   PchCycleDecodingLib
+
+[Pcd]
+  gSiPkgTokenSpaceGuid.PcdAcpiBaseAddress   ## CONSUMES
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiLib.h 
b/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiLib.h
new file mode 100644
index 00..6af66f8869
--- /dev/null
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiLib.h
@@ -0,0 +1,32 @@
+/** @file
+  Library to initialize SPI services for future SP

[edk2] [edk2-platforms][PATCH v1 2/3] ClevoOpenBoardPkg/N1xxWU: Flash map update

[Michael Kubacki]

Updates the total BIOS flash image size to 0x5E. This size
matches the BIOS region size already configured in the SPI
flash descriptor.

To write an image produced from the N1xxWU board build, write
the N1XXWU.fd file (~6 MB) to the beginning of the BIOS region
in the SPI flash (currently 0x22).

Always back up the original SPI flash image. These offsets and
sizes are subject to change over time.

Cc: Ankit Sinha 
Cc: Nate DeSimone 
Cc: Chasel Chiu 
Cc: Liming Gao 
Cc: Michael D Kinney 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kubacki 
---
 .../ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc  |  2 +-
 .../N1xxWU/Include/Fdf/FlashMapInclude.fdf | 44 +++---
 .../Intel/ClevoOpenBoardPkg/N1xxWU/prebuild.bat|  4 +-
 3 files changed, 26 insertions(+), 24 deletions(-)

diff --git a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc 
b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc
index 81487ed58d..2116c48fc0 100644
--- a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc
+++ b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc
@@ -55,7 +55,7 @@
   #
   # Default value for OpenBoardPkg.fdf use
   #
-  DEFINE BIOS_SIZE_OPTION = SIZE_70
+  DEFINE BIOS_SIZE_OPTION = SIZE_60
 
 

 #
diff --git 
a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Include/Fdf/FlashMapInclude.fdf 
b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Include/Fdf/FlashMapInclude.fdf
index a727eb3b83..423c6b18f5 100644
--- a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Include/Fdf/FlashMapInclude.fdf
+++ b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Include/Fdf/FlashMapInclude.fdf
@@ -14,39 +14,41 @@
 ##
 
 
#=#
-# 8 M BIOS - for FSP wrapper
+# 6 M BIOS - for FSP wrapper
 
#=#
-DEFINE FLASH_BASE   = 
0xFF80  #
-DEFINE FLASH_SIZE   = 
0x0080  #
+DEFINE FLASH_BASE   = 
0xFFA2  #
+DEFINE FLASH_SIZE   = 
0x005E  #
 DEFINE FLASH_BLOCK_SIZE = 
0x0001  #
-DEFINE FLASH_NUM_BLOCKS = 
0x0080  #
+DEFINE FLASH_NUM_BLOCKS = 
0x005E  #
 
#=#
 
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageOffset   = 
0x  # Flash addr (0xFF80)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageOffset   = 
0x  # Flash addr (0xFFA2)
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageSize = 
0x0004  #
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageVariableOffset   = 
0x  # Flash addr (0xFF80)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageVariableOffset   = 
0x  # Flash addr (0xFFA2)
 SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize= 
0x0001E000  #
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingOffset = 
0x0001E000  # Flash addr (0xFF81E000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingOffset = 
0x0001E000  # Flash addr (0xFFA3E000)
 SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize  = 
0x2000  #
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset   = 
0x0002  # Flash addr (0xFF82)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset   = 
0x0002  # Flash addr (0xFFA4)
 SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize= 
0x0002  #
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedOffset  = 
0x0004  # Flash addr (0xFF84)
+SET gBoardModuleTokenSpaceGuid.PcdFlashNvDebugMessageOffset = 
0x0004  # Flash addr (0xFFA6)
+SET gBoardModuleTokenSpaceGuid.PcdFlashNvDebugMessageSize   = 
0x0001  #
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedOffset  = 
0x0005  # Flash addr (0xFFA7)
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize= 
0x0006  #
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset  = 
0x000A  # Flash addr (0xFF8A)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset  = 
0x000B  # Flash addr (0xFFAD)
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecuritySize= 
0x0007  #
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset= 
0x0011  # Flash addr (0xFF91)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset= 
0x0012  # Flash addr (0xFFB4)
 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootSize

[edk2] [edk2-platforms][PATCH v1 3/3] ClevoOpenBoardPkg/N1xxWU: Write PEI debug messages to SPI flash

[Michael Kubacki]

Adds a new SerialPortLib instance to the ClevoOpenBoardPkg to support
writing debug messages to a dedicated area on SPI flash. This is to
enable closed chassis debug support on the system.

DXE and later phases after memory initialization are expected to use
USB debug.

Cc: Ankit Sinha 
Cc: Nate DeSimone 
Cc: Chasel Chiu 
Cc: Liming Gao 
Cc: Michael D Kinney 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kubacki 
---
 Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec  |   5 +
 .../ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc  |  20 +-
 .../ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.fdf  |   4 +
 .../PeiSerialPortLibSpiFlash.inf   |  56 
 .../PeiSerialPortLibSpiFlash.c | 326 +
 5 files changed, 407 insertions(+), 4 deletions(-)
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.inf
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.c

diff --git a/Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec 
b/Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec
index 87bbfb2240..aa457e64db 100644
--- a/Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec
+++ b/Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec
@@ -30,6 +30,7 @@ Features\Tbt\Include
 [Guids]
 gBoardModuleTokenSpaceGuid=  {0x72d1fff7, 0xa42a, 0x4219, {0xb9, 
0x95, 0x5a, 0x67, 0x53, 0x6e, 0xa4, 0x2a}}
 gTianoLogoGuid=  {0x7BB28B99, 0x61BB, 0x11D5, {0x9A, 
0x5D, 0x00, 0x90, 0x27, 0x3F, 0xC1, 0x4D}}
+gSpiFlashDebugHobGuid =  {0xcaaaf418, 0x38a5, 0x4d49, {0xbe, 
0x74, 0xe6, 0x06, 0xe4, 0x02, 0x6d, 0x25}}
 gTbtInfoHobGuid   =  {0x74a81eaa, 0x033c, 0x4783, {0xbe, 
0x2b, 0x84, 0x85, 0x74, 0xa6, 0x97, 0xb7}}
 gPlatformModuleTokenSpaceGuid =  {0x69d13bf0, 0xaf91, 0x4d96, {0xaa, 
0x9f, 0x21, 0x84, 0xc5, 0xce, 0x3b, 0xc0}}
 
@@ -64,6 +65,10 @@ 
gBoardModuleTokenSpaceGuid.PcdSwSmiDTbtEnumerate|0xF7|UINT8|0x00110
 
 gBoardModuleTokenSpaceGuid.PcdSmcExtSmiBitPosition|0x01|UINT8|0x9015
 
+gBoardModuleTokenSpaceGuid.PcdFlashNvDebugMessageBase|0x|UINT32|0x9030
+gBoardModuleTokenSpaceGuid.PcdFlashNvDebugMessageSize|0x|UINT32|0x9031
+gBoardModuleTokenSpaceGuid.PcdFlashNvDebugMessageOffset|0x|UINT32|0x9032
+
 [PcdsDynamic]
 
 # Board GPIO Table
diff --git a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc 
b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc
index 2116c48fc0..c43a30de34 100644
--- a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc
+++ b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc
@@ -116,10 +116,18 @@
 #
 !include $(PLATFORM_SI_PACKAGE)/SiPkgCommonLib.dsc
 
+[LibraryClasses.IA32.SEC]
+  SerialPortLib|MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNull.inf
+  DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+  
TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/SecTestPointCheckLib.inf
+  
SecBoardInitLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/SecBoardInitLibNull/SecBoardInitLibNull.inf
+
 [LibraryClasses.IA32]
   #
   # PEI phase common
   #
+  
SerialPortLib|$(PLATFORM_BOARD_PACKAGE)/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.inf
+  
DebugLib|MdeModulePkg/Library/PeiDxeDebugLibReportStatusCode/PeiDxeDebugLibReportStatusCode.inf
   
FspWrapperPlatformLib|$(PLATFORM_PACKAGE)/FspWrapper/Library/PeiFspWrapperPlatformLib/PeiFspWrapperPlatformLib.inf
 !if $(TARGET) == DEBUG
   
TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/PeiTestPointCheckLib.inf
@@ -138,10 +146,6 @@
 #
 !include $(PLATFORM_SI_PACKAGE)/SiPkgPeiLib.dsc
 
-[LibraryClasses.IA32.SEC]
-  
TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/SecTestPointCheckLib.inf
-  
SecBoardInitLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/SecBoardInitLibNull/SecBoardInitLibNull.inf
-
 [LibraryClasses.X64]
   #
   # DXE phase common
@@ -185,6 +189,14 @@
 #
 !include $(PLATFORM_PACKAGE)/Include/Dsc/CorePeiInclude.dsc
 
+  #
+  # Core
+  #
+  MdeModulePkg/Universal/StatusCodeHandler/Pei/StatusCodeHandlerPei.inf {
+
+  DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+  }
+
   #
   # FSP wrapper SEC Core
   #
diff --git a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.fdf 
b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.fdf
index 95c1758ff3..7f3e965c75 100644
--- a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.fdf
+++ b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.fdf
@@ -136,6 +136,10 @@ 
gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset|gEfiMdeModulePkgTo
 
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
 #NV_FTW_SPARE
 
+gBoardModuleTokenSpaceGuid.PcdFlashNvDebugMessageOffset

[edk2] [edk2-platforms][PATCH v1 1/3] KabylakeSiliconPkg: Add SPI write support in PEI

[Michael Kubacki]

Adds a new library PeiSpiLib to perform the initialization necessary
to perform SPI write cycles in PEI. After initialization, it installs
an instance of the PCH_SPI_PPI.

Cc: Nate DeSimone 
Cc: Chasel Chiu 
Cc: Liming Gao 
Cc: Michael D Kinney 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kubacki 
---
 Silicon/Intel/KabylakeSiliconPkg/SiPkgPeiLib.dsc   |   3 +-
 .../Pch/Library/PeiSpiLib/PeiSpiLib.inf|  45 +
 .../BasePchSpiCommonLib/BasePchSpiCommonLib.inf|   6 +-
 .../Pch/Include/Library/SpiLib.h   |  32 
 .../Pch/Library/PeiSpiLib/PeiSpiLib.c  | 211 +
 .../LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c |  10 +-
 6 files changed, 302 insertions(+), 5 deletions(-)
 create mode 100644 
Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf
 create mode 100644 
Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiLib.h
 create mode 100644 
Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c

diff --git a/Silicon/Intel/KabylakeSiliconPkg/SiPkgPeiLib.dsc 
b/Silicon/Intel/KabylakeSiliconPkg/SiPkgPeiLib.dsc
index b81a736486..bb95ce3888 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/SiPkgPeiLib.dsc
+++ b/Silicon/Intel/KabylakeSiliconPkg/SiPkgPeiLib.dsc
@@ -1,7 +1,7 @@
 ## @file
 #  Component description file for the SkyLake SiPkg PEI libraries.
 #
-# Copyright (c) 2017, Intel Corporation. All rights reserved.
+# Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.
 #
 # This program and the accompanying materials are licensed and made available 
under
 # the terms and conditions of the BSD License which accompanies this 
distribution.
@@ -30,6 +30,7 @@
 !endif
  
ResetSystemLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/PeiResetSystemLib/PeiResetSystemLib.inf
  
PchResetLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/PeiPchResetLib/PeiPchResetLib.inf
+ SpiLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/PeiSpiLib/PeiSpiLib.inf
 
 #
 # Cpu
diff --git 
a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf 
b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf
new file mode 100644
index 00..6d2e70f012
--- /dev/null
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf
@@ -0,0 +1,45 @@
+## @file
+# Component description file for PEI PCH SPI Initialization
+#
+# Copyright (c) 2019, Intel Corporation. All rights reserved.
+#
+# This program and the accompanying materials are licensed and made available 
under
+# the terms and conditions of the BSD License which accompanies this 
distribution.
+# The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+[Defines]
+  INF_VERSION = 0x00010017
+  BASE_NAME   = PeiSpiLib
+  FILE_GUID   = 4998447D-7948-448F-AB75-96E24E18FF23
+  VERSION_STRING  = 1.0
+  MODULE_TYPE = PEIM
+  LIBRARY_CLASS   = SpiLib|PEIM PEI_CORE
+  #
+  # The following information is for reference only and not required by the 
build tools.
+  #
+  # VALID_ARCHITECTURES = IA32 X64 IPF
+  #
+
+[LibraryClasses]
+  DebugLib
+  MemoryAllocationLib
+  PchSpiCommonLib
+  PciSegmentLib
+  PeiServicesLib
+  PeiServicesTablePointerLib
+
+[Packages]
+  MdePkg/MdePkg.dec
+  KabylakeSiliconPkg/SiPkg.dec
+
+[Sources]
+  PeiSpiLib.c
+
+[Ppis]
+  gPchSpiPpiGuid  ## PRODUCES
diff --git 
a/Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf
 
b/Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf
index 128f7adcea..2c531e7816 100644
--- 
a/Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf
+++ 
b/Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf
@@ -1,7 +1,7 @@
 ## @file
 #  Component description file for the PchSpiCommonLib
 #
-# Copyright (c) 2017, Intel Corporation. All rights reserved.
+# Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.
 #
 # This program and the accompanying materials are licensed and made available 
under
 # the terms and conditions of the BSD License which accompanies this 
distribution.
@@ -32,4 +32,8 @@
 [LibraryClasses]
   IoLib
   DebugLib
+  PcdLib
   PchCycleDecodingLib
+
+[Pcd]
+  gSiPkgTokenSpaceGuid.PcdAcpiBaseAddress   ## CONSUMES
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiLib.h 
b/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiLib.h
new file mode 100644
index 00..6af66f8869
--- /dev/null
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiLib.h
@@ -0,0 +1,32 @@
+/** @file
+  Library to initialize SPI services for future SPI accesses.
+
+Copyright (c) 2019, Intel Corporation. All rights reserved.
+This program and the accompanying

[edk2] [edk2-platforms][PATCH v1 0/3] Enable SPI flash debug messages

[Michael Kubacki]

Adds support to the N1xxWU board series in the ClevoOpenBoardPkg
to write debug messages to a dedicated area on SPI flash. This
supports simple closed chassis debug. At this time, only a PEI
library instance is added since it is anticipated an alternative
mechanism will be available in DXE such as USB debug.

Cc: Ankit Sinha 
Cc: Nate DeSimone 
Cc: Chasel Chiu 
Cc: Ray Ni 
Cc: Liming Gao 
Cc: Michael D Kinney 

Michael Kubacki (3):
  KabylakeSiliconPkg: Add SPI write support in PEI
  ClevoOpenBoardPkg/N1xxWU: Flash map update
  ClevoOpenBoardPkg/N1xxWU: Write PEI debug messages to SPI flash

 Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec  |   5 +
 .../ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc  |  22 +-
 Silicon/Intel/KabylakeSiliconPkg/SiPkgPeiLib.dsc   |   3 +-
 .../N1xxWU/Include/Fdf/FlashMapInclude.fdf |  44 +--
 .../ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.fdf  |   4 +
 .../PeiSerialPortLibSpiFlash.inf   |  56 
 .../Pch/Library/PeiSpiLib/PeiSpiLib.inf|  45 +++
 .../BasePchSpiCommonLib/BasePchSpiCommonLib.inf|   6 +-
 .../Pch/Include/Library/SpiLib.h   |  32 ++
 .../PeiSerialPortLibSpiFlash.c | 326 +
 .../Pch/Library/PeiSpiLib/PeiSpiLib.c  | 211 +
 .../LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c |  10 +-
 .../Intel/ClevoOpenBoardPkg/N1xxWU/prebuild.bat|   4 +-
 13 files changed, 735 insertions(+), 33 deletions(-)
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.inf
 create mode 100644 
Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf
 create mode 100644 
Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiLib.h
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.c
 create mode 100644 
Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c

--
2.16.2.windows.1

___
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[edk2] [edk2-platforms/devel-MinPlatform][PATCH v3 1/1] ReadMe.md: Update Minimum Platform details

[Michael Kubacki]

Adds details on the EDK II Minimum Platform design for Intel
platforms.

* Overview of Minimum Platform
* Board package purpose and conventions
* Stage boot concept and control
* Minimum Platform firmware solution stack overview
* Updates build instructions for all OpenBoardPkgs
* Adds information for the ClevoOpenBoardPkg
* Adds planned activities and ideas for the future

Cc: Michael D Kinney 
Cc: Nate DeSimone 
Cc: Ankit Sinha 
Cc: Chasel Chiu 
Cc: Isaac W Oram 
Cc: Liming Gao 

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kubacki 
---
 ReadMe.md | 164 ++
 1 file changed, 132 insertions(+), 32 deletions(-)

diff --git a/ReadMe.md b/ReadMe.md
index 9b873da2e3..72e332a476 100644
--- a/ReadMe.md
+++ b/ReadMe.md
@@ -1,8 +1,73 @@
-# **EDK II Minimized firmware for Intel(R) platforms**
+# **EDK II Minimum Platform Firmware for Intel(R) Platforms**
 
-## Features
-* The Minimized Kabylake provides the minimal feature of the Kabylake BIOS.
-* The Minimized Purley provides the minimal feature of the Purley BIOS.
+The Minimum Platform is a software architecture that guides uniform delivery 
of Intel platforms enabling firmware
+solutions for basic boot functionality with extensibility built-in.
+
+Package maintainers for the Minimum Platform projects are listed in 
Maintainers.txt.
+
+## Overview
+The key elements of the architecture are organized into a staged boot approach 
where each stage has requirements and
+functionality for specific use cases. The generic control flow through the 
boot process is implemented in the
+[`MinPlatformPkg`](https://github.com/tianocore/edk2-platforms/tree/devel-MinPlatform/Platform/Intel/MinPlatformPkg).
+The generic nature of the tasks performed in MinPlatformPkg lends to reuse 
across all Intel platforms with no
+source modification. Details for any particular board are made accessible to 
the MinPlatformPkg through a well-defined
+statically linked board API. A complete platform solution then consists of the 
MinPlatformPkg and a compatible board
+package.
+
+## Board Naming Convention
+The board packages supported by Intel follow the naming convention 
\OpenBoardPkg where xxx refers to the
+encompassing platform name for a particular platform generation. For example, 
the 
[`KabylakeOpenBoardPkg`](https://github.com/tianocore/edk2-platforms/tree/devel-MinPlatform/Platform/Intel/KabylakeOpenBoardPkg)
 contains the
+board code for Intel Kaby Lake reference systems. Intel uses the moniker 
"OpenBoardPkg" to indicate that this package
+is the open source board code. A closed source counterpart may exist which 
simply uses "BoardPkg". Both directly use
+the MinPlatformPkg from edk2-platforms.
+
+## Stage Selection
+Stage selection is controlled via the PCD 
`gMinPlatformPkgTokenSpaceGuid.PcdBootStage` in 
[`MinPlatformPkg.dec`](https://github.com/tianocore/edk2-platforms/blob/devel-MinPlatform/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec).
+The stage should be configured in the board package DSC file to the 
appropriate value. For example, a board may disable
+all advanced features by setting this value to 4 instead of 6. This may be 
used to improve boot time for a particular
+use case. Decrementing the stage can also be used for debug since only the 
actions required for that stage objective
+should be executed. As an example, ACPI initialization is not required for a 
Stage 3 boot.
+
+The stages are defined as follows:
+
+| Stage  | Functional Objective | Example Capabilities 
  |
+| 
---|--||
+| I  | Minimal Debug| Serial port output, source debug 
enabled, hardware debugger enabled|
+| II | Memory Functional| Basic hardware initialization 
necessary to reach memory initialization, permanent memory available |
+| III| Boot to UI   | Simple console input and output to a 
UI, UEFI shell|
+| IV | Boot to OS   | Boot an operating system with the 
minimally required features  |
+| V  | Security Enable  | UEFI Secure Boot, TCG measured boot, 
DMA protections   |
+| VI | Advanced Feature Enable  | Firmware update, power management, 
non-essential I/O   |
+
+## Minimum Platform Firmware Solution Stack
+A UEFI firmware implementation using MinPlatformPkg is constructed using the 
following pieces.
+
+||
+||
+| [EDK II](https://githu

[edk2] [edk2-platforms/devel-MinPlatform][PATCH v2 1/1] ReadMe.md: Update Minimum Platform details

[Michael Kubacki]

Adds details on the EDK II Minimum Platform design for Intel
platforms.

* Overview of Minimum Platform
* Board package purpose and conventions
* Stage boot concept and control
* Minimum Platform firmware solution stack overview
* Updates build instructions for all OpenBoardPkgs
* Adds information for the ClevoOpenBoardPkg
* Adds planned activities and ideas for the future

Cc: Michael D Kinney 
Cc: Nate DeSimone 
Cc: Ankit Sinha 
Cc: Chasel Chiu 
Cc: Isaac W Oram 
Cc: Liming Gao 

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kubacki 
---
 ReadMe.md | 163 ++
 1 file changed, 131 insertions(+), 32 deletions(-)

diff --git a/ReadMe.md b/ReadMe.md
index 9b873da2e3..0a5e5593d2 100644
--- a/ReadMe.md
+++ b/ReadMe.md
@@ -1,8 +1,72 @@
-# **EDK II Minimized firmware for Intel(R) platforms**
+# **EDK II Minimum Platform Firmware for Intel(R) Platforms**
 
-## Features
-* The Minimized Kabylake provides the minimal feature of the Kabylake BIOS.
-* The Minimized Purley provides the minimal feature of the Purley BIOS.
+The Minimum Platform is a software architecture that guides uniform delivery 
of Intel platforms enabling firmware
+solutions for basic boot functionality with extensibility built-in.
+
+Package maintainers for the Minimum Platform projects are listed in 
Maintainers.txt.
+
+## Overview
+The key elements of the architecture are organized into a staged boot approach 
where each stage has requirements and
+functionality for specific use cases. The generic control flow through the 
boot process is implemented in the
+[`MinPlatformPkg`](https://github.com/tianocore/edk2-platforms/tree/devel-MinPlatform/Platform/Intel/MinPlatformPkg).
+The generic nature of the tasks performed in MinPlatformPkg allows lends to 
reuse across all Intel platforms with no
+source modification. Details for any particular board are made accessible to 
the MinPlatformPkg through well-defined
+statically linked board API. A complete platform solution then consists of the 
MinPlatformPkg and a compatible board
+package.
+
+## Board Naming Convention
+The board packages supported by Intel follow the naming convention 
\OpenBoardPkg where xxx refers to the
+encompassing platform name for a particular platform generation. For example, 
the 
[`KabylakeOpenBoardPkg`](https://github.com/tianocore/edk2-platforms/tree/devel-MinPlatform/Platform/Intel/KabylakeOpenBoardPkg)
 contains the
+board code for Intel Kaby Lake reference systems. Intel uses the moniker 
"OpenBoardPkg" to indicate that this package
+is the open source board code. A closed source counterpart may exist which 
simply uses "BoardPkg". Both directly use
+the MinPlatformPkg from edk2-platforms.
+
+## Stage Selection
+Stage selection is controlled via the PCD 
`gMinPlatformPkgTokenSpaceGuid.PcdBootStage` in 
[`MinPlatformPkg.dec`](https://github.com/tianocore/edk2-platforms/blob/devel-MinPlatform/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec).
+The stage should be configured in the board package DSC file to the 
appropriate value. For example, a board may disable
+all advanced features by setting this value to 4 instead of 6. This may be 
used to improve boot time for a particular
+use case. Decrementing the stage can also be used for debug since only the 
actions required for that stage objective
+should be executed. As an example, ACPI initialization is not required for a 
Stage 3 boot.
+
+The stages are defined as follows:
+| Stage  | Functional Objective | Example Capabilities 
  |
+| 
---|--||
+| I  | Minimal Debug| Serial port output, source debug 
enabled, hardware debugger enabled|
+| II | Memory Functional| Basic hardware initialization 
necessary to reach memory initialization, permanent memory available |
+| III| Boot to UI   | Simple console input and output to a 
UI, UEFI shell|
+| IV | Boot to OS   | Boot an operating system with the 
minimally required features  |
+| V  | Security Enable  | UEFI Secure Boot, TCG measured boot, 
DMA protections   |
+| VI | Advanced Feature Enable  | Firmware update, power management, 
non-essential I/O   |
+
+## Minimum Platform Firmware Solution Stack
+A UEFI firmware implementation using MinPlatformPkg is constructed using the 
following pieces.
+
+||
+||
+| [EDK II](https://githu

[edk2] [edk2-platforms/devel-MinPlatform][PATCH v1 1/1] ReadMe.md: Update Minimum Platform details

[Michael Kubacki]

Adds details on the EDK II Minimum Platform design for Intel
platforms.

* Overview of Minimum Platform
* Board package purpose and conventions
* Stage boot concept and control
* Minimum Platform firmware solution stack overview
* Updates build instructions for all OpenBoardPkgs
* Adds information for the ClevoOpenBoardPkg
* Adds planned activities and ideas for the future

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kubacki 
---
 ReadMe.md | 163 ++
 1 file changed, 131 insertions(+), 32 deletions(-)

diff --git a/ReadMe.md b/ReadMe.md
index 9b873da2e3..0a5e5593d2 100644
--- a/ReadMe.md
+++ b/ReadMe.md
@@ -1,8 +1,72 @@
-# **EDK II Minimized firmware for Intel(R) platforms**
+# **EDK II Minimum Platform Firmware for Intel(R) Platforms**
 
-## Features
-* The Minimized Kabylake provides the minimal feature of the Kabylake BIOS.
-* The Minimized Purley provides the minimal feature of the Purley BIOS.
+The Minimum Platform is a software architecture that guides uniform delivery 
of Intel platforms enabling firmware
+solutions for basic boot functionality with extensibility built-in.
+
+Package maintainers for the Minimum Platform projects are listed in 
Maintainers.txt.
+
+## Overview
+The key elements of the architecture are organized into a staged boot approach 
where each stage has requirements and
+functionality for specific use cases. The generic control flow through the 
boot process is implemented in the
+[`MinPlatformPkg`](https://github.com/tianocore/edk2-platforms/tree/devel-MinPlatform/Platform/Intel/MinPlatformPkg).
+The generic nature of the tasks performed in MinPlatformPkg allows lends to 
reuse across all Intel platforms with no
+source modification. Details for any particular board are made accessible to 
the MinPlatformPkg through well-defined
+statically linked board API. A complete platform solution then consists of the 
MinPlatformPkg and a compatible board
+package.
+
+## Board Naming Convention
+The board packages supported by Intel follow the naming convention 
\OpenBoardPkg where xxx refers to the
+encompassing platform name for a particular platform generation. For example, 
the 
[`KabylakeOpenBoardPkg`](https://github.com/tianocore/edk2-platforms/tree/devel-MinPlatform/Platform/Intel/KabylakeOpenBoardPkg)
 contains the
+board code for Intel Kaby Lake reference systems. Intel uses the moniker 
"OpenBoardPkg" to indicate that this package
+is the open source board code. A closed source counterpart may exist which 
simply uses "BoardPkg". Both directly use
+the MinPlatformPkg from edk2-platforms.
+
+## Stage Selection
+Stage selection is controlled via the PCD 
`gMinPlatformPkgTokenSpaceGuid.PcdBootStage` in 
[`MinPlatformPkg.dec`](https://github.com/tianocore/edk2-platforms/blob/devel-MinPlatform/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec).
+The stage should be configured in the board package DSC file to the 
appropriate value. For example, a board may disable
+all advanced features by setting this value to 4 instead of 6. This may be 
used to improve boot time for a particular
+use case. Decrementing the stage can also be used for debug since only the 
actions required for that stage objective
+should be executed. As an example, ACPI initialization is not required for a 
Stage 3 boot.
+
+The stages are defined as follows:
+| Stage  | Functional Objective | Example Capabilities 
  |
+| 
---|--||
+| I  | Minimal Debug| Serial port output, source debug 
enabled, hardware debugger enabled|
+| II | Memory Functional| Basic hardware initialization 
necessary to reach memory initialization, permanent memory available |
+| III| Boot to UI   | Simple console input and output to a 
UI, UEFI shell|
+| IV | Boot to OS   | Boot an operating system with the 
minimally required features  |
+| V  | Security Enable  | UEFI Secure Boot, TCG measured boot, 
DMA protections   |
+| VI | Advanced Feature Enable  | Firmware update, power management, 
non-essential I/O   |
+
+## Minimum Platform Firmware Solution Stack
+A UEFI firmware implementation using MinPlatformPkg is constructed using the 
following pieces.
+
+||
+||
+| [EDK II](https://github.com/tianocore/edk2)  
|
+| [Intel(r) FSP](https://git

[edk2] [edk2-platforms/devel-MinPlatform][PATCH v1 1/1] Maintainers.txt: AdvancedFeaturePkg and ClevoOpenBoardPkg maintainers

[Michael Kubacki]

Adds maintainers and reviewers for the AdvancedFeaturePkg and
ClevoOpenBoardPkg.

Cc: Nate DeSimone 
Cc: Sai Chaganty 
Cc: Ankit Sinha 
Cc: Michael D Kinney 
Cc: Isaac W Oram 
Cc: Liming Gao 

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kubacki 
---
 Platform/Intel/Maintainers.txt | 10 +-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/Platform/Intel/Maintainers.txt b/Platform/Intel/Maintainers.txt
index 7b27459fcf..0004f6a829 100644
--- a/Platform/Intel/Maintainers.txt
+++ b/Platform/Intel/Maintainers.txt
@@ -37,6 +37,15 @@ W: 
https://github.com/tianocore/tianocore.github.io/wiki/Security
 
 EDK II Packages:
 
+AdvancedFeaturePkg
+M: Michael Kubacki 
+M: Sai Chaganty 
+
+ClevoOpenBoardPkg
+M: Michael Kubacki 
+M: Ankit Sinha 
+R: Nate DeSimone 
+
 KabylakeOpenBoardPkg
 M: Chasel Chiu 
 M: Michael Kubacki 
@@ -49,4 +58,3 @@ PurleyOpenBoardPkg
 M: Shifei A Lu 
 M: Xiaohu Zhou 
 M: Isaac W Oram 
-
-- 
2.16.2.windows.1

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[edk2] [edk2-platforms/devel-MinPlatform][PATCH v4 3/7] ClevoOpenBoardPkg: Add library instances

[Michael Kubacki]

Based on KabylakeOpenBoardPkg from the following branch:
https://github.com/tianocore/edk2-platforms/tree/devel-MinPlatform

Library instances shared across Clevo board instances.

* BaseGpioExpanderLib - Support for the TCA6424 IO expander.
* PeiI2cAccessLib - Provides I2C read and write services.
* PeiDTbtInitLib - PEI discrete Thunderbolt initialization services.
* PeiTbtPolicyLib - PEI Thunderbolt policy initialization.
* DxeTbtPolicyLib - DXE Thunderbolt policy initialization.
* TbtCommonLib - Common Thunderbolt services.

Cc: Hao Wu 
Cc: Liming Gao 
Cc: Jiewen Yao 
Cc: Michael D Kinney 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kubacki 
---
 .../Library/DxeTbtPolicyLib/DxeTbtPolicyLib.inf|  73 +++
 .../Library/PeiDxeSmmTbtCommonLib/TbtCommonLib.inf |  68 +++
 .../Library/PeiTbtPolicyLib/PeiTbtPolicyLib.inf|  62 +++
 .../Private/PeiDTbtInitLib/PeiDTbtInitLib.inf  |  47 ++
 .../BaseGpioExpanderLib/BaseGpioExpanderLib.inf|  39 ++
 .../Library/PeiI2cAccessLib/PeiI2cAccessLib.inf|  42 ++
 .../Tbt/Library/DxeTbtPolicyLib/DxeTbtPolicyLib.c  | 166 ++
 .../Library/PeiDxeSmmTbtCommonLib/TbtCommonLib.c   | 321 
 .../Tbt/Library/PeiTbtPolicyLib/PeiTbtPolicyLib.c  | 210 
 .../Private/PeiDTbtInitLib/PeiDTbtInitLib.c| 572 +
 .../BaseGpioExpanderLib/BaseGpioExpanderLib.c  | 315 
 .../Library/PeiI2cAccessLib/PeiI2cAccessLib.c  | 121 +
 12 files changed, 2036 insertions(+)
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Library/DxeTbtPolicyLib/DxeTbtPolicyLib.inf
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Library/PeiDxeSmmTbtCommonLib/TbtCommonLib.inf
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Library/PeiTbtPolicyLib/PeiTbtPolicyLib.inf
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Library/Private/PeiDTbtInitLib/PeiDTbtInitLib.inf
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Library/BaseGpioExpanderLib/BaseGpioExpanderLib.inf
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Library/PeiI2cAccessLib/PeiI2cAccessLib.inf
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Library/DxeTbtPolicyLib/DxeTbtPolicyLib.c
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Library/PeiDxeSmmTbtCommonLib/TbtCommonLib.c
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Library/PeiTbtPolicyLib/PeiTbtPolicyLib.c
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Library/Private/PeiDTbtInitLib/PeiDTbtInitLib.c
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Library/BaseGpioExpanderLib/BaseGpioExpanderLib.c
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Library/PeiI2cAccessLib/PeiI2cAccessLib.c

diff --git 
a/Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Library/DxeTbtPolicyLib/DxeTbtPolicyLib.inf
 
b/Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Library/DxeTbtPolicyLib/DxeTbtPolicyLib.inf
new file mode 100644
index 00..75a7473060
--- /dev/null
+++ 
b/Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Library/DxeTbtPolicyLib/DxeTbtPolicyLib.inf
@@ -0,0 +1,73 @@
+## @file
+# Component description file for Tbt functionality
+#
+# Copyright (c) 2019, Intel Corporation. All rights reserved.
+#
+# This program and the accompanying materials are licensed and made available 
under
+# the terms and conditions of the BSD License which accompanies this 
distribution.
+# The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+
+[Defines]
+INF_VERSION = 0x00010017
+BASE_NAME = DxeTbtPolicyLib
+FILE_GUID = 28ABF346-4E52-4BD3-b1FF-63BA7563C9D4
+VERSION_STRING = 1.0
+MODULE_TYPE = BASE
+LIBRARY_CLASS = DxeTbtPolicyLib
+
+
+[LibraryClasses]
+BaseMemoryLib
+UefiRuntimeServicesTableLib
+UefiBootServicesTableLib
+DebugLib
+PostCodeLib
+HobLib
+
+[Packages]
+  MdePkg/MdePkg.dec
+  MdeModulePkg/MdeModulePkg.dec
+  MinPlatformPkg/MinPlatformPkg.dec
+  ClevoOpenBoardPkg/OpenBoardPkg.dec
+  KabylakeSiliconPkg/SiPkg.dec
+
+[Pcd]
+gBoardModuleTokenSpaceGuid.PcdDTbtSecurityMode   ## CONSUMES
+gBoardModuleTokenSpaceGuid.PcdDTbtGpio5Filter## CONSUMES
+gBoardModuleTokenSpaceGuid.PcdDTbtWakeupSupport  ## CONSUMES
+gBoardModuleTokenSpaceGuid.PcdDTbtHotSMI ## CONSUMES
+gBoardModuleTokenSpaceGuid.PcdDTbtHotNotify  ## CONSUMES
+gBoardModuleTokenSpaceGuid.PcdDTbtSetClkReq  ## CONSUMES
+gBoardModuleTokenSpaceGuid.PcdDTbtAspm   ## CONSUMES
+gBoardModuleTokenSpaceGuid.PcdDTbtAcDcSwitch ## CONSUMES
+gBoardModuleTokenSpaceGuid.PcdRtd3Tbt## CONSUMES
+gBoardModuleTokenSpaceGuid.PcdRtd3TbtClkReq  ## CONSUMES
+gBoardModuleTokenSpaceGuid.PcdDTbtWin10Support   #

[edk2] [edk2-platforms/devel-MinPlatform][PATCH v4 6/7] ClevoOpenBoardPkg/N1xxWU: Add DSC and build files

[Michael Kubacki]

Based on KabylakeOpenBoardPkg from the following branch:
https://github.com/tianocore/edk2-platforms/tree/devel-MinPlatform

Adds the DSC and build files necessary to build the N1xxWU Clevo
board instance.

The board follows the same build procedure as other OpenBoardPkg
instances in Platform/Intel in devel-MinPlatform.

Key files
=
* GitEdk2Clevo.bat - Sets up the local environment for build.
* OpenBoardPkg.dsc - The N1xxWU board description file.
* OpenBoardPkgConfig.dsc - Used for feature-related PCD
  customization.
* OpenBoardPkgPcd.dsc - Used for other PCD customization.
* OpenBoardPkg.fdf - The N1xxWU board flash file.
* FlashMapInclude.fdf - The N1xxWU board flash map.
* cln.bat - Cleans temporary files from the workspace.
* prep.bat - Performs pre-build steps.
* bld.bat - Performs build steps.
* postbuild.bat - Performs post-build steps.
* OpenBoardPkgBuildOption.dsc - Sets build options Based
  on PCD values.

Cc: Hao Wu 
Cc: Liming Gao 
Cc: Jiewen Yao 
Cc: Michael D Kinney 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kubacki 
---
 .../ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc  | 351 ++
 .../N1xxWU/OpenBoardPkgBuildOption.dsc | 155 +
 .../N1xxWU/OpenBoardPkgConfig.dsc  | 139 
 .../ClevoOpenBoardPkg/N1xxWU/OpenBoardPkgPcd.dsc   | 268 
 .../N1xxWU/Include/Fdf/FlashMapInclude.fdf |  52 ++
 .../ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.fdf  | 716 +
 .../ClevoOpenBoardPkg/N1xxWU/GitEdk2Clevo.bat  |  85 +++
 Platform/Intel/ClevoOpenBoardPkg/N1xxWU/bld.bat| 165 +
 Platform/Intel/ClevoOpenBoardPkg/N1xxWU/cln.bat|  54 ++
 .../Intel/ClevoOpenBoardPkg/N1xxWU/postbuild.bat   |  45 ++
 .../Intel/ClevoOpenBoardPkg/N1xxWU/prebuild.bat| 220 +++
 Platform/Intel/ClevoOpenBoardPkg/N1xxWU/prep.bat   |  85 +++
 12 files changed, 2335 insertions(+)
 create mode 100644 Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkgBuildOption.dsc
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkgConfig.dsc
 create mode 100644 Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkgPcd.dsc
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Include/Fdf/FlashMapInclude.fdf
 create mode 100644 Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.fdf
 create mode 100644 Platform/Intel/ClevoOpenBoardPkg/N1xxWU/GitEdk2Clevo.bat
 create mode 100644 Platform/Intel/ClevoOpenBoardPkg/N1xxWU/bld.bat
 create mode 100644 Platform/Intel/ClevoOpenBoardPkg/N1xxWU/cln.bat
 create mode 100644 Platform/Intel/ClevoOpenBoardPkg/N1xxWU/postbuild.bat
 create mode 100644 Platform/Intel/ClevoOpenBoardPkg/N1xxWU/prebuild.bat
 create mode 100644 Platform/Intel/ClevoOpenBoardPkg/N1xxWU/prep.bat

diff --git a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc 
b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc
new file mode 100644
index 00..81487ed58d
--- /dev/null
+++ b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc
@@ -0,0 +1,351 @@
+## @file
+#  Clevo N1xxWU board description file.
+#
+# Copyright (c) 2019, Intel Corporation. All rights reserved.
+#
+# This program and the accompanying materials are licensed and made available 
under
+# the terms and conditions of the BSD License which accompanies this 
distribution.
+# The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+[Defines]
+  #
+  # Set platform specific package/folder name, same as passed from PREBUILD 
script.
+  # PLATFORM_PACKAGE would be the same as PLATFORM_NAME as well as package 
build folder
+  # DEFINE only takes effect at R9 DSC and FDF.
+  #
+  DEFINE  PLATFORM_PACKAGE= MinPlatformPkg
+  DEFINE  PLATFORM_SI_PACKAGE = KabylakeSiliconPkg
+  DEFINE  PLATFORM_SI_BIN_PACKAGE = KabylakeSiliconBinPkg
+  DEFINE  PLATFORM_FSP_BIN_PACKAGE= KabylakeFspBinPkg
+  DEFINE  PLATFORM_BOARD_PACKAGE  = ClevoOpenBoardPkg
+  DEFINE  BOARD   = N1xxWU
+  DEFINE  PROJECT = 
$(PLATFORM_BOARD_PACKAGE)/$(BOARD)
+
+  #
+  # Platform On/Off features are defined here
+  #
+  !include OpenBoardPkgConfig.dsc
+
+
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+
+[Defines]
+  PLATFORM_NAME   = $(PLATFORM_PACKAGE)
+  PLATFORM_GUID   = 465B0A0B-7AC1-443b-8F67-7B8DEC145F90
+  PLATFORM_VERSION= 0.1
+  DSC_SPECIFICATION   = 

[edk2] [edk2-platforms/devel-MinPlatform][PATCH v4 2/7] ClevoOpenBoardPkg/N1xxWU: Add headers

[Michael Kubacki]

Based on KabylakeOpenBoardPkg from the following branch:
https://github.com/tianocore/edk2-platforms/tree/devel-MinPlatform

Header files for the N1XXWU Clevo board instance.

* PeiPchPolicyUpdate.h - Shared interfaces and includes used for
  Platform Controller Hub (PCH) initialization in
  PeiSiliconPolicyUpdateLibFsp.
* PeiSaPolicyUpdate.h - Shared interfaces and includes used for
  System Agent (SA) initialization in PeiSiliconPolicyUpdateLibFsp.
* N1xxWUId.h - The board IDs for N1xxWU boards. Exposed for use
  in libraries/modules in the N1xxWU directory.
* PeiN1xxWUInitLib.h - Shared interfaces and includes for the
  N1xxWU PEI board initialization library.
* DxeGopPolicyInit.h - Shared interfaces and includes used for GOP
  policy initialization in DxeSiliconPolicyUpdateLib.
* DxeSaPolicyInit.h - Shared interfaces and includes used for
  System Agent (SA) initialization in DxeSiliconPolicyUpdateLib.

Cc: Hao Wu 
Cc: Liming Gao 
Cc: Jiewen Yao 
Cc: Michael D Kinney 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kubacki 
---
 .../PeiPchPolicyUpdate.h   | 34 +++
 .../PeiSaPolicyUpdate.h| 36 +++
 .../ClevoOpenBoardPkg/N1xxWU/Include/N1xxWUId.h| 19 ++
 .../N1xxWU/Library/BoardInitLib/PeiN1xxWUInitLib.h | 48 +++
 .../DxeSiliconPolicyUpdateLib/DxeGopPolicyInit.h   | 45 ++
 .../DxeSiliconPolicyUpdateLib/DxeSaPolicyInit.h| 70 ++
 6 files changed, 252 insertions(+)
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/N1xxWU/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiPchPolicyUpdate.h
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/N1xxWU/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiSaPolicyUpdate.h
 create mode 100644 Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Include/N1xxWUId.h
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Library/BoardInitLib/PeiN1xxWUInitLib.h
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Policy/Library/DxeSiliconPolicyUpdateLib/DxeGopPolicyInit.h
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Policy/Library/DxeSiliconPolicyUpdateLib/DxeSaPolicyInit.h

diff --git 
a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiPchPolicyUpdate.h
 
b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiPchPolicyUpdate.h
new file mode 100644
index 00..b736111344
--- /dev/null
+++ 
b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiPchPolicyUpdate.h
@@ -0,0 +1,34 @@
+/** @file
+
+Copyright (c) 2019, Intel Corporation. All rights reserved.
+This program and the accompanying materials are licensed and made available 
under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef _PEI_PCH_POLICY_UPDATE_H_
+#define _PEI_PCH_POLICY_UPDATE_H_
+
+//
+// External include files do NOT need to be explicitly specified in real EDKII
+// environment
+//
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#endif
diff --git 
a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiSaPolicyUpdate.h
 
b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiSaPolicyUpdate.h
new file mode 100644
index 00..10122af262
--- /dev/null
+++ 
b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiSaPolicyUpdate.h
@@ -0,0 +1,36 @@
+/** @file
+
+Copyright (c) 2019, Intel Corporation. All rights reserved.
+This program and the accompanying materials are licensed and made available 
under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef _PEI_SA_POLICY_UPDATE_H_
+#define _PEI_SA_POLICY_UPDATE_H_
+
+//
+// External include files do NOT need to be explicitly specified in real EDKII
+// environment
+//
+#include 
+#include 
+#include 
+#include 
+#include "PeiPchPolicyUpdate.h"
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+extern EFI_GUID gTianoLogoGuid;
+
+#endif
+
diff --git a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Include/N1xxWUId.h 
b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Include/N1xxWUId.h
new file mode 100644
index 00..c5cf2e3143
--- /dev/null
+++ b/Platform/Intel/ClevoOpenBoar

[edk2] [edk2-platforms/devel-MinPlatform][PATCH v4 1/7] ClevoOpenBoardPkg: Add package and headers

[Michael Kubacki]

Based on KabylakeOpenBoardPkg from the following branch:
https://github.com/tianocore/edk2-platforms/tree/devel-MinPlatform

Create the ClevoOpenBoardPkg to provide an initial board package
for Clevo boards. The ClevoOpenBoardPkg is intended to contain a
series of specific Clevo board instances such as the N1XXWU and
N1XXZU series. A given board instance serves as a board
implementation for use with the MinPlatformPkg.

* Common resources are shared at the top-level of ClevoOpenBoardPkg.
* Features are organized into the Features directory.
  * Features not mandatory to load the OS in the standard hardware
configuration are considered advanced and only enabled when
gMinPlatformPkgTokenSpaceGuid.PcdBootStage is greater than 5.

Cc: Hao Wu 
Cc: Liming Gao 
Cc: Jiewen Yao 
Cc: Michael D Kinney 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kubacki 
---
 Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec  | 306 +
 .../Features/PciHotPlug/PciHotPlug.h   | 136 +
 .../Features/Tbt/Include/Acpi/TbtNvsAreaDef.h  |  68 +
 .../Features/Tbt/Include/Library/DxeTbtPolicyLib.h |  52 
 .../Features/Tbt/Include/Library/PeiTbtPolicyLib.h |  47 
 .../Features/Tbt/Include/Library/TbtCommonLib.h| 247 +
 .../Features/Tbt/Include/Ppi/PeiTbtPolicy.h|  35 +++
 .../Tbt/Include/Private/Library/PeiDTbtInitLib.h   | 114 
 .../Include/Private/Library/PeiTbtCommonInitLib.h  |  47 
 .../Features/Tbt/Include/Protocol/DxeTbtPolicy.h   | 116 
 .../Features/Tbt/Include/Protocol/TbtNvsArea.h |  48 
 .../Features/Tbt/Include/TbtBoardInfo.h|  28 ++
 .../Tbt/Include/TbtPolicyCommonDefinition.h|  83 ++
 .../Library/DxeTbtPolicyLib/DxeTbtPolicyLibrary.h  |  28 ++
 .../Library/PeiTbtPolicyLib/PeiTbtPolicyLibrary.h  |  23 ++
 .../Features/Tbt/TbtInit/Smm/TbtSmiHandler.h   | 185 +
 .../Include/Acpi/GlobalNvsAreaDef.h| 122 
 .../Intel/ClevoOpenBoardPkg/Include/IoExpander.h   |  73 +
 .../Include/Library/GpioExpanderLib.h  | 128 +
 .../Include/Library/I2cAccessLib.h |  39 +++
 .../ClevoOpenBoardPkg/Include/PchHsioPtssTables.h  |  57 
 .../Include/Protocol/GlobalNvsArea.h   |  53 
 Platform/Intel/ClevoOpenBoardPkg/Include/SioRegs.h | 163 +++
 Platform/Intel/ClevoOpenBoardPkg/Contributions.txt | 218 +++
 Platform/Intel/ClevoOpenBoardPkg/License.txt   |  25 ++
 25 files changed, 2441 insertions(+)
 create mode 100644 Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Features/PciHotPlug/PciHotPlug.h
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Include/Acpi/TbtNvsAreaDef.h
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Include/Library/DxeTbtPolicyLib.h
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Include/Library/PeiTbtPolicyLib.h
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Include/Library/TbtCommonLib.h
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Include/Ppi/PeiTbtPolicy.h
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Include/Private/Library/PeiDTbtInitLib.h
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Include/Private/Library/PeiTbtCommonInitLib.h
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Include/Protocol/DxeTbtPolicy.h
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Include/Protocol/TbtNvsArea.h
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Include/TbtBoardInfo.h
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Include/TbtPolicyCommonDefinition.h
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Library/DxeTbtPolicyLib/DxeTbtPolicyLibrary.h
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Library/PeiTbtPolicyLib/PeiTbtPolicyLibrary.h
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/TbtInit/Smm/TbtSmiHandler.h
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Include/Acpi/GlobalNvsAreaDef.h
 create mode 100644 Platform/Intel/ClevoOpenBoardPkg/Include/IoExpander.h
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Include/Library/GpioExpanderLib.h
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Include/Library/I2cAccessLib.h
 create mode 100644 Platform/Intel/ClevoOpenBoardPkg/Include/PchHsioPtssTables.h
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Include/Protocol/GlobalNvsArea.h
 create mode 100644 Platform/Intel/ClevoOpenBoardPkg/Include/SioRegs.h
 create mode 100644 Platform/Intel/ClevoOpenBoardPkg/Contributions.txt
 create mode 100644 Platform/Intel/ClevoOpenBoardPkg/License.txt

diff --git a/Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec 
b/Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec
new

[edk2] [edk2-platforms/devel-MinPlatform][PATCH v4 7/7] ClevoOpenBoardPkg/N1xxWU: Update DEBUG print level macro usage

[Michael Kubacki]

Uses DEBUG_INFO instead of EFI_D_INFO in all ClevoOpenBoardPkg files.

Cc: Hao Wu 
Cc: Liming Gao 
Cc: Jiewen Yao 
Cc: Michael D Kinney 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kubacki 
---
 .../ClevoOpenBoardPkg/N1xxWU/Library/BoardInitLib/PeiN1xxWUDetect.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git 
a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Library/BoardInitLib/PeiN1xxWUDetect.c
 
b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Library/BoardInitLib/PeiN1xxWUDetect.c
index edda4da7a0..2f39587ea2 100644
--- 
a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Library/BoardInitLib/PeiN1xxWUDetect.c
+++ 
b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Library/BoardInitLib/PeiN1xxWUDetect.c
@@ -60,7 +60,7 @@ N1xxWUBoardDetect (
 return EFI_SUCCESS;
   }
 
-  DEBUG ((EFI_D_INFO, "N1xxWUDetectionCallback\n"));
+  DEBUG ((DEBUG_INFO, "N1xxWUDetectionCallback\n"));
 
   if (IsN1xxWU ()) {
 LibPcdSetSku (BoardIdN1xxWU);
-- 
2.16.2.windows.1

___
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[edk2] [edk2-platforms/devel-MinPlatform][PATCH v4 0/7] Add initial ClevoOpenBoardPkg

[Michael Kubacki]

This series adds a new board package in Platform/Intel for Clevo
boards. This provides a board implementation for use with the
MinPlatformPkg. Currently, this is largely a copy of
KabylakeOpenBoardPkg with the name refactored. It is intended to
serve as a base for future community development.

A board directory for the N1xxWU series of Clevo boards based on
Kaby Lake-R is provided as this is the first board planned to be
enabled. The next board instance expected to be supported is the
N1xxZU series based on Whiskey Lake. This directory will be a
peer to N1xxWU in ClevoOpenBoardPkg. Both boards share common
resources in the ClevoOpenBoardPkg root directory.

To minimize intial delta from the source KabylakeOpenBoardPkg,
changes required for boot have not yet been made. Therefore,
in this current state boot functionality should not be expected.

The build instructions are similar to the other boards already
present in Platform/Intel and can be found in ReadMe.md on
devel-MinPlatform.
https://github.com/tianocore/edk2-platforms/tree/devel-MinPlatform

Cc: Hao Wu 
Cc: Liming Gao 
Cc: Jiewen Yao 
Cc: Michael D Kinney 

Michael Kubacki (7):
  ClevoOpenBoardPkg: Add package and headers
  ClevoOpenBoardPkg/N1xxWU: Add headers
  ClevoOpenBoardPkg: Add library instances
  ClevoOpenBoardPkg/N1xxWU: Add library instances
  ClevoOpenBoardPkg: Add modules
  ClevoOpenBoardPkg/N1xxWU: Add DSC and build files
  ClevoOpenBoardPkg/N1xxWU: Update DEBUG print level macro usage

 Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec  |  306 
 .../ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc  |  351 
 .../N1xxWU/OpenBoardPkgBuildOption.dsc |  155 ++
 .../N1xxWU/OpenBoardPkgConfig.dsc  |  139 ++
 .../ClevoOpenBoardPkg/N1xxWU/OpenBoardPkgPcd.dsc   |  268 +++
 .../N1xxWU/Include/Fdf/FlashMapInclude.fdf |   52 +
 .../ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.fdf  |  716 
 .../Acpi/BoardAcpiDxe/BoardAcpiDxe.inf |   75 +
 .../Features/PciHotPlug/PciHotPlug.inf |   65 +
 .../Library/DxeTbtPolicyLib/DxeTbtPolicyLib.inf|   73 +
 .../Library/PeiDxeSmmTbtCommonLib/TbtCommonLib.inf |   68 +
 .../Library/PeiTbtPolicyLib/PeiTbtPolicyLib.inf|   62 +
 .../Private/PeiDTbtInitLib/PeiDTbtInitLib.inf  |   47 +
 .../Features/Tbt/TbtInit/Dxe/TbtDxe.inf|   55 +
 .../Features/Tbt/TbtInit/Pei/PeiTbtInit.inf|   50 +
 .../Features/Tbt/TbtInit/Smm/TbtSmm.inf|   83 +
 .../BaseGpioExpanderLib/BaseGpioExpanderLib.inf|   39 +
 .../Library/PeiI2cAccessLib/PeiI2cAccessLib.inf|   42 +
 .../PeiSiliconPolicyUpdateLibFsp.inf   |  149 ++
 .../BasePlatformHookLib/BasePlatformHookLib.inf|   57 +
 .../Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf  |   53 +
 .../BoardAcpiLib/DxeMultiBoardAcpiSupportLib.inf   |   54 +
 .../Library/BoardAcpiLib/SmmBoardAcpiEnableLib.inf |   53 +
 .../BoardAcpiLib/SmmMultiBoardAcpiSupportLib.inf   |   54 +
 .../BoardInitLib/PeiBoardInitPostMemLib.inf|   59 +
 .../Library/BoardInitLib/PeiBoardInitPreMemLib.inf |  138 ++
 .../BoardInitLib/PeiMultiBoardInitPostMemLib.inf   |   61 +
 .../BoardInitLib/PeiMultiBoardInitPreMemLib.inf|  140 ++
 .../DxeSiliconPolicyUpdateLib.inf  |   55 +
 .../Features/PciHotPlug/PciHotPlug.h   |  136 ++
 .../Features/Tbt/Include/Acpi/TbtNvsAreaDef.h  |   68 +
 .../Features/Tbt/Include/Library/DxeTbtPolicyLib.h |   52 +
 .../Features/Tbt/Include/Library/PeiTbtPolicyLib.h |   47 +
 .../Features/Tbt/Include/Library/TbtCommonLib.h|  247 +++
 .../Features/Tbt/Include/Ppi/PeiTbtPolicy.h|   35 +
 .../Tbt/Include/Private/Library/PeiDTbtInitLib.h   |  114 ++
 .../Include/Private/Library/PeiTbtCommonInitLib.h  |   47 +
 .../Features/Tbt/Include/Protocol/DxeTbtPolicy.h   |  116 ++
 .../Features/Tbt/Include/Protocol/TbtNvsArea.h |   48 +
 .../Features/Tbt/Include/TbtBoardInfo.h|   28 +
 .../Tbt/Include/TbtPolicyCommonDefinition.h|   83 +
 .../Library/DxeTbtPolicyLib/DxeTbtPolicyLibrary.h  |   28 +
 .../Library/PeiTbtPolicyLib/PeiTbtPolicyLibrary.h  |   23 +
 .../Features/Tbt/TbtInit/Smm/TbtSmiHandler.h   |  185 ++
 .../Include/Acpi/GlobalNvsAreaDef.h|  122 ++
 .../Intel/ClevoOpenBoardPkg/Include/IoExpander.h   |   73 +
 .../Include/Library/GpioExpanderLib.h  |  128 ++
 .../Include/Library/I2cAccessLib.h |   39 +
 .../ClevoOpenBoardPkg/Include/PchHsioPtssTables.h  |   57 +
 .../Include/Protocol/GlobalNvsArea.h   |   53 +
 Platform/Intel/ClevoOpenBoardPkg/Include/SioRegs.h |  163 ++
 .../PeiPchPolicyUpdate.h   |   34 +
 .../PeiSaPolicyUpdate.h|   36 +
 .../ClevoOpenBoardPkg/N1xxWU/Include/N1xxWUId.h|   19 +
 .../N1xxWU/Library/BoardInitLib/PeiN1xxWUInitLib.h |   48 +
 .../DxeSiliconPolicyUpdateLib/DxeGopPolicyInit.h   |   45 +
 .../DxeSiliconPolicyUpdateLib/DxeSaPolicyInit.h|   70 +
 .../Acpi

[edk2] [edk2-platforms/devel-MinPlatform][PATCH v3 1/6] ClevoOpenBoardPkg: Add package and headers

[Michael Kubacki]

Based on KabylakeOpenBoardPkg from the following branch:
https://github.com/tianocore/edk2-platforms/tree/devel-MinPlatform

Create the ClevoOpenBoardPkg to provide an initial board package
for Clevo boards. The ClevoOpenBoardPkg is intended to contain a
series of specific Clevo board instances such as the N1XXWU and
N1XXZU series. A given board instance serves as a board
implementation for use with the MinPlatformPkg.

* Common resources are shared at the top-level of ClevoOpenBoardPkg.
* Features are organized into the Features directory.
  * Features not mandatory to load the OS in the standard hardware
configuration are considered advanced and only enabled when
gMinPlatformPkgTokenSpaceGuid.PcdBootStage is greater than 5.

Cc: Hao Wu 
Cc: Liming Gao 
Cc: Jiewen Yao 
Cc: Michael D Kinney 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kubacki 
---
 Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec  | 306 +
 .../Features/PciHotPlug/PciHotPlug.h   | 136 +
 .../Features/Tbt/Include/Acpi/TbtNvsAreaDef.h  |  68 +
 .../Features/Tbt/Include/Library/DxeTbtPolicyLib.h |  52 
 .../Features/Tbt/Include/Library/PeiTbtPolicyLib.h |  47 
 .../Features/Tbt/Include/Library/TbtCommonLib.h| 247 +
 .../Features/Tbt/Include/Ppi/PeiTbtPolicy.h|  35 +++
 .../Tbt/Include/Private/Library/PeiDTbtInitLib.h   | 114 
 .../Include/Private/Library/PeiTbtCommonInitLib.h  |  47 
 .../Features/Tbt/Include/Protocol/DxeTbtPolicy.h   | 116 
 .../Features/Tbt/Include/Protocol/TbtNvsArea.h |  48 
 .../Features/Tbt/Include/TbtBoardInfo.h|  28 ++
 .../Tbt/Include/TbtPolicyCommonDefinition.h|  83 ++
 .../Library/DxeTbtPolicyLib/DxeTbtPolicyLibrary.h  |  28 ++
 .../Library/PeiTbtPolicyLib/PeiTbtPolicyLibrary.h  |  23 ++
 .../Features/Tbt/TbtInit/Smm/TbtSmiHandler.h   | 185 +
 .../Include/Acpi/GlobalNvsAreaDef.h| 122 
 .../Intel/ClevoOpenBoardPkg/Include/IoExpander.h   |  73 +
 .../Include/Library/GpioExpanderLib.h  | 128 +
 .../Include/Library/I2cAccessLib.h |  39 +++
 .../ClevoOpenBoardPkg/Include/PchHsioPtssTables.h  |  57 
 .../Include/Protocol/GlobalNvsArea.h   |  53 
 Platform/Intel/ClevoOpenBoardPkg/Include/SioRegs.h | 163 +++
 Platform/Intel/ClevoOpenBoardPkg/Contributions.txt | 218 +++
 Platform/Intel/ClevoOpenBoardPkg/License.txt   |  25 ++
 25 files changed, 2441 insertions(+)
 create mode 100644 Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Features/PciHotPlug/PciHotPlug.h
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Include/Acpi/TbtNvsAreaDef.h
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Include/Library/DxeTbtPolicyLib.h
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Include/Library/PeiTbtPolicyLib.h
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Include/Library/TbtCommonLib.h
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Include/Ppi/PeiTbtPolicy.h
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Include/Private/Library/PeiDTbtInitLib.h
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Include/Private/Library/PeiTbtCommonInitLib.h
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Include/Protocol/DxeTbtPolicy.h
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Include/Protocol/TbtNvsArea.h
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Include/TbtBoardInfo.h
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Include/TbtPolicyCommonDefinition.h
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Library/DxeTbtPolicyLib/DxeTbtPolicyLibrary.h
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Library/PeiTbtPolicyLib/PeiTbtPolicyLibrary.h
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/TbtInit/Smm/TbtSmiHandler.h
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Include/Acpi/GlobalNvsAreaDef.h
 create mode 100644 Platform/Intel/ClevoOpenBoardPkg/Include/IoExpander.h
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Include/Library/GpioExpanderLib.h
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Include/Library/I2cAccessLib.h
 create mode 100644 Platform/Intel/ClevoOpenBoardPkg/Include/PchHsioPtssTables.h
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Include/Protocol/GlobalNvsArea.h
 create mode 100644 Platform/Intel/ClevoOpenBoardPkg/Include/SioRegs.h
 create mode 100644 Platform/Intel/ClevoOpenBoardPkg/Contributions.txt
 create mode 100644 Platform/Intel/ClevoOpenBoardPkg/License.txt

diff --git a/Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec 
b/Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec
new

[edk2] [edk2-platforms/devel-MinPlatform][PATCH v3 6/6] ClevoOpenBoardPkg/N1xxWU: Add DSC and build files

[Michael Kubacki]

Based on KabylakeOpenBoardPkg from the following branch:
https://github.com/tianocore/edk2-platforms/tree/devel-MinPlatform

Adds the DSC and build files necessary to build the N1xxWU Clevo
board instance.

The board follows the same build procedure as other OpenBoardPkg
instances in Platform/Intel in devel-MinPlatform.

Key files
=
* GitEdk2Clevo.bat - Sets up the local environment for build.
* OpenBoardPkg.dsc - The N1xxWU board description file.
* OpenBoardPkgConfig.dsc - Used for feature-related PCD
  customization.
* OpenBoardPkgPcd.dsc - Used for other PCD customization.
* OpenBoardPkg.fdf - The N1xxWU board flash file.
* FlashMapInclude.fdf - The N1xxWU board flash map.
* cln.bat - Cleans temporary files from the workspace.
* prep.bat - Performs pre-build steps.
* bld.bat - Performs build steps.
* postbuild.bat - Performs post-build steps.
* OpenBoardPkgBuildOption.dsc - Sets build options Based
  on PCD values.

Cc: Hao Wu 
Cc: Liming Gao 
Cc: Jiewen Yao 
Cc: Michael D Kinney 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kubacki 
---
 .../ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc  | 351 ++
 .../N1xxWU/OpenBoardPkgBuildOption.dsc | 155 +
 .../N1xxWU/OpenBoardPkgConfig.dsc  | 139 
 .../ClevoOpenBoardPkg/N1xxWU/OpenBoardPkgPcd.dsc   | 268 
 .../N1xxWU/Include/Fdf/FlashMapInclude.fdf |  52 ++
 .../ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.fdf  | 716 +
 .../ClevoOpenBoardPkg/N1xxWU/GitEdk2Clevo.bat  |  85 +++
 Platform/Intel/ClevoOpenBoardPkg/N1xxWU/bld.bat| 165 +
 Platform/Intel/ClevoOpenBoardPkg/N1xxWU/cln.bat|  54 ++
 .../Intel/ClevoOpenBoardPkg/N1xxWU/postbuild.bat   |  45 ++
 .../Intel/ClevoOpenBoardPkg/N1xxWU/prebuild.bat| 220 +++
 Platform/Intel/ClevoOpenBoardPkg/N1xxWU/prep.bat   |  85 +++
 12 files changed, 2335 insertions(+)
 create mode 100644 Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkgBuildOption.dsc
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkgConfig.dsc
 create mode 100644 Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkgPcd.dsc
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Include/Fdf/FlashMapInclude.fdf
 create mode 100644 Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.fdf
 create mode 100644 Platform/Intel/ClevoOpenBoardPkg/N1xxWU/GitEdk2Clevo.bat
 create mode 100644 Platform/Intel/ClevoOpenBoardPkg/N1xxWU/bld.bat
 create mode 100644 Platform/Intel/ClevoOpenBoardPkg/N1xxWU/cln.bat
 create mode 100644 Platform/Intel/ClevoOpenBoardPkg/N1xxWU/postbuild.bat
 create mode 100644 Platform/Intel/ClevoOpenBoardPkg/N1xxWU/prebuild.bat
 create mode 100644 Platform/Intel/ClevoOpenBoardPkg/N1xxWU/prep.bat

diff --git a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc 
b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc
new file mode 100644
index 00..81487ed58d
--- /dev/null
+++ b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc
@@ -0,0 +1,351 @@
+## @file
+#  Clevo N1xxWU board description file.
+#
+# Copyright (c) 2019, Intel Corporation. All rights reserved.
+#
+# This program and the accompanying materials are licensed and made available 
under
+# the terms and conditions of the BSD License which accompanies this 
distribution.
+# The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+[Defines]
+  #
+  # Set platform specific package/folder name, same as passed from PREBUILD 
script.
+  # PLATFORM_PACKAGE would be the same as PLATFORM_NAME as well as package 
build folder
+  # DEFINE only takes effect at R9 DSC and FDF.
+  #
+  DEFINE  PLATFORM_PACKAGE= MinPlatformPkg
+  DEFINE  PLATFORM_SI_PACKAGE = KabylakeSiliconPkg
+  DEFINE  PLATFORM_SI_BIN_PACKAGE = KabylakeSiliconBinPkg
+  DEFINE  PLATFORM_FSP_BIN_PACKAGE= KabylakeFspBinPkg
+  DEFINE  PLATFORM_BOARD_PACKAGE  = ClevoOpenBoardPkg
+  DEFINE  BOARD   = N1xxWU
+  DEFINE  PROJECT = 
$(PLATFORM_BOARD_PACKAGE)/$(BOARD)
+
+  #
+  # Platform On/Off features are defined here
+  #
+  !include OpenBoardPkgConfig.dsc
+
+
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+
+[Defines]
+  PLATFORM_NAME   = $(PLATFORM_PACKAGE)
+  PLATFORM_GUID   = 465B0A0B-7AC1-443b-8F67-7B8DEC145F90
+  PLATFORM_VERSION= 0.1
+  DSC_SPECIFICATION   = 

[edk2] [edk2-platforms/devel-MinPlatform][PATCH v3 2/6] ClevoOpenBoardPkg/N1xxWU: Add headers

[Michael Kubacki]

Based on KabylakeOpenBoardPkg from the following branch:
https://github.com/tianocore/edk2-platforms/tree/devel-MinPlatform

Header files for the N1XXWU Clevo board instance.

* PeiPchPolicyUpdate.h - Shared interfaces and includes used for
  Platform Controller Hub (PCH) initialization in
  PeiSiliconPolicyUpdateLibFsp.
* PeiSaPolicyUpdate.h - Shared interfaces and includes used for
  System Agent (SA) initialization in PeiSiliconPolicyUpdateLibFsp.
* N1xxWUId.h - The board IDs for N1xxWU boards. Exposed for use
  in libraries/modules in the N1xxWU directory.
* PeiN1xxWUInitLib.h - Shared interfaces and includes for the
  N1xxWU PEI board initialization library.
* DxeGopPolicyInit.h - Shared interfaces and includes used for GOP
  policy initialization in DxeSiliconPolicyUpdateLib.
* DxeSaPolicyInit.h - Shared interfaces and includes used for
  System Agent (SA) initialization in DxeSiliconPolicyUpdateLib.

Cc: Hao Wu 
Cc: Liming Gao 
Cc: Jiewen Yao 
Cc: Michael D Kinney 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kubacki 
---
 .../PeiPchPolicyUpdate.h   | 34 +++
 .../PeiSaPolicyUpdate.h| 36 +++
 .../ClevoOpenBoardPkg/N1xxWU/Include/N1xxWUId.h| 19 ++
 .../N1xxWU/Library/BoardInitLib/PeiN1xxWUInitLib.h | 48 +++
 .../DxeSiliconPolicyUpdateLib/DxeGopPolicyInit.h   | 45 ++
 .../DxeSiliconPolicyUpdateLib/DxeSaPolicyInit.h| 70 ++
 6 files changed, 252 insertions(+)
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/N1xxWU/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiPchPolicyUpdate.h
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/N1xxWU/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiSaPolicyUpdate.h
 create mode 100644 Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Include/N1xxWUId.h
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Library/BoardInitLib/PeiN1xxWUInitLib.h
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Policy/Library/DxeSiliconPolicyUpdateLib/DxeGopPolicyInit.h
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Policy/Library/DxeSiliconPolicyUpdateLib/DxeSaPolicyInit.h

diff --git 
a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiPchPolicyUpdate.h
 
b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiPchPolicyUpdate.h
new file mode 100644
index 00..b736111344
--- /dev/null
+++ 
b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiPchPolicyUpdate.h
@@ -0,0 +1,34 @@
+/** @file
+
+Copyright (c) 2019, Intel Corporation. All rights reserved.
+This program and the accompanying materials are licensed and made available 
under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef _PEI_PCH_POLICY_UPDATE_H_
+#define _PEI_PCH_POLICY_UPDATE_H_
+
+//
+// External include files do NOT need to be explicitly specified in real EDKII
+// environment
+//
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#endif
diff --git 
a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiSaPolicyUpdate.h
 
b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiSaPolicyUpdate.h
new file mode 100644
index 00..10122af262
--- /dev/null
+++ 
b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiSaPolicyUpdate.h
@@ -0,0 +1,36 @@
+/** @file
+
+Copyright (c) 2019, Intel Corporation. All rights reserved.
+This program and the accompanying materials are licensed and made available 
under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef _PEI_SA_POLICY_UPDATE_H_
+#define _PEI_SA_POLICY_UPDATE_H_
+
+//
+// External include files do NOT need to be explicitly specified in real EDKII
+// environment
+//
+#include 
+#include 
+#include 
+#include 
+#include "PeiPchPolicyUpdate.h"
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+extern EFI_GUID gTianoLogoGuid;
+
+#endif
+
diff --git a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Include/N1xxWUId.h 
b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Include/N1xxWUId.h
new file mode 100644
index 00..c5cf2e3143
--- /dev/null
+++ b/Platform/Intel/ClevoOpenBoar

[edk2] [edk2-platforms/devel-MinPlatform][PATCH v3 3/6] ClevoOpenBoardPkg: Add library instances

[Michael Kubacki]

Based on KabylakeOpenBoardPkg from the following branch:
https://github.com/tianocore/edk2-platforms/tree/devel-MinPlatform

Library instances shared across Clevo board instances.

* BaseGpioExpanderLib - Support for the TCA6424 IO expander.
* PeiI2cAccessLib - Provides I2C read and write services.
* PeiDTbtInitLib - PEI discrete Thunderbolt initialization services.
* PeiTbtPolicyLib - PEI Thunderbolt policy initialization.
* DxeTbtPolicyLib - DXE Thunderbolt policy initialization.
* TbtCommonLib - Common Thunderbolt services.

Cc: Hao Wu 
Cc: Liming Gao 
Cc: Jiewen Yao 
Cc: Michael D Kinney 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kubacki 
---
 .../Library/DxeTbtPolicyLib/DxeTbtPolicyLib.inf|  73 +++
 .../Library/PeiDxeSmmTbtCommonLib/TbtCommonLib.inf |  68 +++
 .../Library/PeiTbtPolicyLib/PeiTbtPolicyLib.inf|  62 +++
 .../Private/PeiDTbtInitLib/PeiDTbtInitLib.inf  |  47 ++
 .../BaseGpioExpanderLib/BaseGpioExpanderLib.inf|  39 ++
 .../Library/PeiI2cAccessLib/PeiI2cAccessLib.inf|  42 ++
 .../Tbt/Library/DxeTbtPolicyLib/DxeTbtPolicyLib.c  | 166 ++
 .../Library/PeiDxeSmmTbtCommonLib/TbtCommonLib.c   | 321 
 .../Tbt/Library/PeiTbtPolicyLib/PeiTbtPolicyLib.c  | 210 
 .../Private/PeiDTbtInitLib/PeiDTbtInitLib.c| 572 +
 .../BaseGpioExpanderLib/BaseGpioExpanderLib.c  | 315 
 .../Library/PeiI2cAccessLib/PeiI2cAccessLib.c  | 121 +
 12 files changed, 2036 insertions(+)
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Library/DxeTbtPolicyLib/DxeTbtPolicyLib.inf
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Library/PeiDxeSmmTbtCommonLib/TbtCommonLib.inf
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Library/PeiTbtPolicyLib/PeiTbtPolicyLib.inf
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Library/Private/PeiDTbtInitLib/PeiDTbtInitLib.inf
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Library/BaseGpioExpanderLib/BaseGpioExpanderLib.inf
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Library/PeiI2cAccessLib/PeiI2cAccessLib.inf
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Library/DxeTbtPolicyLib/DxeTbtPolicyLib.c
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Library/PeiDxeSmmTbtCommonLib/TbtCommonLib.c
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Library/PeiTbtPolicyLib/PeiTbtPolicyLib.c
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Library/Private/PeiDTbtInitLib/PeiDTbtInitLib.c
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Library/BaseGpioExpanderLib/BaseGpioExpanderLib.c
 create mode 100644 
Platform/Intel/ClevoOpenBoardPkg/Library/PeiI2cAccessLib/PeiI2cAccessLib.c

diff --git 
a/Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Library/DxeTbtPolicyLib/DxeTbtPolicyLib.inf
 
b/Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Library/DxeTbtPolicyLib/DxeTbtPolicyLib.inf
new file mode 100644
index 00..75a7473060
--- /dev/null
+++ 
b/Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Library/DxeTbtPolicyLib/DxeTbtPolicyLib.inf
@@ -0,0 +1,73 @@
+## @file
+# Component description file for Tbt functionality
+#
+# Copyright (c) 2019, Intel Corporation. All rights reserved.
+#
+# This program and the accompanying materials are licensed and made available 
under
+# the terms and conditions of the BSD License which accompanies this 
distribution.
+# The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+
+[Defines]
+INF_VERSION = 0x00010017
+BASE_NAME = DxeTbtPolicyLib
+FILE_GUID = 28ABF346-4E52-4BD3-b1FF-63BA7563C9D4
+VERSION_STRING = 1.0
+MODULE_TYPE = BASE
+LIBRARY_CLASS = DxeTbtPolicyLib
+
+
+[LibraryClasses]
+BaseMemoryLib
+UefiRuntimeServicesTableLib
+UefiBootServicesTableLib
+DebugLib
+PostCodeLib
+HobLib
+
+[Packages]
+  MdePkg/MdePkg.dec
+  MdeModulePkg/MdeModulePkg.dec
+  MinPlatformPkg/MinPlatformPkg.dec
+  ClevoOpenBoardPkg/OpenBoardPkg.dec
+  KabylakeSiliconPkg/SiPkg.dec
+
+[Pcd]
+gBoardModuleTokenSpaceGuid.PcdDTbtSecurityMode   ## CONSUMES
+gBoardModuleTokenSpaceGuid.PcdDTbtGpio5Filter## CONSUMES
+gBoardModuleTokenSpaceGuid.PcdDTbtWakeupSupport  ## CONSUMES
+gBoardModuleTokenSpaceGuid.PcdDTbtHotSMI ## CONSUMES
+gBoardModuleTokenSpaceGuid.PcdDTbtHotNotify  ## CONSUMES
+gBoardModuleTokenSpaceGuid.PcdDTbtSetClkReq  ## CONSUMES
+gBoardModuleTokenSpaceGuid.PcdDTbtAspm   ## CONSUMES
+gBoardModuleTokenSpaceGuid.PcdDTbtAcDcSwitch ## CONSUMES
+gBoardModuleTokenSpaceGuid.PcdRtd3Tbt## CONSUMES
+gBoardModuleTokenSpaceGuid.PcdRtd3TbtClkReq  ## CONSUMES
+gBoardModuleTokenSpaceGuid.PcdDTbtWin10Support   #

[edk2] [edk2-platforms/devel-MinPlatform][PATCH v3 0/6] Add initial ClevoOpenBoardPkg

[Michael Kubacki]

This series adds a new board package in Platform/Intel for Clevo
boards. This provides a board implementation for use with the
MinPlatformPkg. Currently, this is largely a copy of
KabylakeOpenBoardPkg with the name refactored. It is intended to
serve as a base for future community development.

A board directory for the N1xxWU series of Clevo boards based on
Kaby Lake-R is provided as this is the first board planned to be
enabled. The next board instance expected to be supported is the
N1xxZU series based on Whiskey Lake. This directory will be a
peer to N1xxWU in ClevoOpenBoardPkg. Both boards share common
resources in the ClevoOpenBoardPkg root directory.

To minimize intial delta from the source KabylakeOpenBoardPkg,
changes required for boot have not yet been made. Therefore,
in this current state boot functionality should not be expected.

The build instructions are similar to the other boards already
present in Platform/Intel and can be found in ReadMe.md on
devel-MinPlatform.
https://github.com/tianocore/edk2-platforms/tree/devel-MinPlatform

Michael Kubacki (6):
  ClevoOpenBoardPkg: Add package and headers
  ClevoOpenBoardPkg/N1xxWU: Add headers
  ClevoOpenBoardPkg: Add library instances
  ClevoOpenBoardPkg/N1xxWU: Add library instances
  ClevoOpenBoardPkg: Add modules
  ClevoOpenBoardPkg/N1xxWU: Add DSC and build files

 Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec  |  306 
 .../ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc  |  351 
 .../N1xxWU/OpenBoardPkgBuildOption.dsc |  155 ++
 .../N1xxWU/OpenBoardPkgConfig.dsc  |  139 ++
 .../ClevoOpenBoardPkg/N1xxWU/OpenBoardPkgPcd.dsc   |  268 +++
 .../N1xxWU/Include/Fdf/FlashMapInclude.fdf |   52 +
 .../ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.fdf  |  716 
 .../Acpi/BoardAcpiDxe/BoardAcpiDxe.inf |   75 +
 .../Features/PciHotPlug/PciHotPlug.inf |   65 +
 .../Library/DxeTbtPolicyLib/DxeTbtPolicyLib.inf|   73 +
 .../Library/PeiDxeSmmTbtCommonLib/TbtCommonLib.inf |   68 +
 .../Library/PeiTbtPolicyLib/PeiTbtPolicyLib.inf|   62 +
 .../Private/PeiDTbtInitLib/PeiDTbtInitLib.inf  |   47 +
 .../Features/Tbt/TbtInit/Dxe/TbtDxe.inf|   55 +
 .../Features/Tbt/TbtInit/Pei/PeiTbtInit.inf|   50 +
 .../Features/Tbt/TbtInit/Smm/TbtSmm.inf|   83 +
 .../BaseGpioExpanderLib/BaseGpioExpanderLib.inf|   39 +
 .../Library/PeiI2cAccessLib/PeiI2cAccessLib.inf|   42 +
 .../PeiSiliconPolicyUpdateLibFsp.inf   |  149 ++
 .../BasePlatformHookLib/BasePlatformHookLib.inf|   57 +
 .../Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf  |   53 +
 .../BoardAcpiLib/DxeMultiBoardAcpiSupportLib.inf   |   54 +
 .../Library/BoardAcpiLib/SmmBoardAcpiEnableLib.inf |   53 +
 .../BoardAcpiLib/SmmMultiBoardAcpiSupportLib.inf   |   54 +
 .../BoardInitLib/PeiBoardInitPostMemLib.inf|   59 +
 .../Library/BoardInitLib/PeiBoardInitPreMemLib.inf |  138 ++
 .../BoardInitLib/PeiMultiBoardInitPostMemLib.inf   |   61 +
 .../BoardInitLib/PeiMultiBoardInitPreMemLib.inf|  140 ++
 .../DxeSiliconPolicyUpdateLib.inf  |   55 +
 .../Features/PciHotPlug/PciHotPlug.h   |  136 ++
 .../Features/Tbt/Include/Acpi/TbtNvsAreaDef.h  |   68 +
 .../Features/Tbt/Include/Library/DxeTbtPolicyLib.h |   52 +
 .../Features/Tbt/Include/Library/PeiTbtPolicyLib.h |   47 +
 .../Features/Tbt/Include/Library/TbtCommonLib.h|  247 +++
 .../Features/Tbt/Include/Ppi/PeiTbtPolicy.h|   35 +
 .../Tbt/Include/Private/Library/PeiDTbtInitLib.h   |  114 ++
 .../Include/Private/Library/PeiTbtCommonInitLib.h  |   47 +
 .../Features/Tbt/Include/Protocol/DxeTbtPolicy.h   |  116 ++
 .../Features/Tbt/Include/Protocol/TbtNvsArea.h |   48 +
 .../Features/Tbt/Include/TbtBoardInfo.h|   28 +
 .../Tbt/Include/TbtPolicyCommonDefinition.h|   83 +
 .../Library/DxeTbtPolicyLib/DxeTbtPolicyLibrary.h  |   28 +
 .../Library/PeiTbtPolicyLib/PeiTbtPolicyLibrary.h  |   23 +
 .../Features/Tbt/TbtInit/Smm/TbtSmiHandler.h   |  185 ++
 .../Include/Acpi/GlobalNvsAreaDef.h|  122 ++
 .../Intel/ClevoOpenBoardPkg/Include/IoExpander.h   |   73 +
 .../Include/Library/GpioExpanderLib.h  |  128 ++
 .../Include/Library/I2cAccessLib.h |   39 +
 .../ClevoOpenBoardPkg/Include/PchHsioPtssTables.h  |   57 +
 .../Include/Protocol/GlobalNvsArea.h   |   53 +
 Platform/Intel/ClevoOpenBoardPkg/Include/SioRegs.h |  163 ++
 .../PeiPchPolicyUpdate.h   |   34 +
 .../PeiSaPolicyUpdate.h|   36 +
 .../ClevoOpenBoardPkg/N1xxWU/Include/N1xxWUId.h|   19 +
 .../N1xxWU/Library/BoardInitLib/PeiN1xxWUInitLib.h |   48 +
 .../DxeSiliconPolicyUpdateLib/DxeGopPolicyInit.h   |   45 +
 .../DxeSiliconPolicyUpdateLib/DxeSaPolicyInit.h|   70 +
 .../Acpi/BoardAcpiDxe/AcpiGnvsInit.c   |  101 ++
 .../Acpi/BoardAcpiDxe/BoardAcpiDxe.c   |  313 
 .../Acpi

[edk2] [edk2-platforms/devel-MinPlatform][PATCH v2 4/5] ClevoOpenBoardPkg/N1xxWU: Add initial board build files

[Michael Kubacki]

This is based on KabylakeOpenBoardPkg with the name refactored for Clevo.
This is currently a base for further development and does not boot.

Cc: Hao Wu 
Cc: Liming Gao 
Cc: Jiewen Yao 
Cc: Michael D Kinney 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kubacki 
---
 Platform/Intel/ClevoOpenBoardPkg/N1xxWU/GitEdk2Clevo.bat|  85 
+++
 Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Include/Fdf/FlashMapInclude.fdf |  52 
++
 Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc| 351 
++
 Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.fdf| 716 

 Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkgBuildOption.dsc | 155 
+
 Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkgConfig.dsc  | 139 

 Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkgPcd.dsc | 278 

 Platform/Intel/ClevoOpenBoardPkg/N1xxWU/bld.bat | 165 
+
 Platform/Intel/ClevoOpenBoardPkg/N1xxWU/cln.bat |  54 
++
 Platform/Intel/ClevoOpenBoardPkg/N1xxWU/postbuild.bat   |  45 
++
 Platform/Intel/ClevoOpenBoardPkg/N1xxWU/prebuild.bat| 220 
++
 Platform/Intel/ClevoOpenBoardPkg/N1xxWU/prep.bat|  85 
+++
 12 files changed, 2345 insertions(+)

diff --git a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/GitEdk2Clevo.bat 
b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/GitEdk2Clevo.bat
new file mode 100644
index 00..9a34a9a2d2
--- /dev/null
+++ b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/GitEdk2Clevo.bat
@@ -0,0 +1,85 @@
+@REM @file
+@REM
+@REM Copyright (c) 2019, Intel Corporation. All rights reserved.
+@REM This program and the accompanying materials
+@REM are licensed and made available under the terms and conditions of the BSD 
License
+@REM which accompanies this distribution.  The full text of the license may be 
found at
+@REM http://opensource.org/licenses/bsd-license.php
+@REM
+@REM THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+@REM WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR 
IMPLIED.
+@REM
+
+@echo off
+
+pushd ..\..\..\..\..\
+
+@REM Set WORKSPACE environment.
+set WORKSPACE=%cd%
+echo.
+echo Set WORKSPACE as: %WORKSPACE%
+echo.
+
+@REM Check whether Git has been installed and been added to system path.
+git --help >nul 2>nul
+if %ERRORLEVEL% NEQ 0 (
+  echo.
+  echo The 'git' command is not recognized.
+  echo Please make sure that Git is installed and has been added to system 
path.
+  echo.
+  goto :EOF
+)
+
+@REM Create the Conf directory under WORKSPACE
+if not exist %WORKSPACE%\Conf (
+  mkdir Conf
+)
+
+@REM Set other environments.
+@REM Basic Rule:
+@REM   Platform override Silicon override Core
+@REM   Source override Binary
+
+set 
PACKAGES_PATH=%WORKSPACE%\edk2-platforms\Platform\Intel;%WORKSPACE%\edk2-platforms\Silicon\Intel;%WORKSPACE%\edk2-non-osi\Silicon\Intel;%WORKSPACE%\FSP;%WORKSPACE%\edk2;%WORKSPACE%
+set EDK_TOOLS_BIN=%WORKSPACE%\edk2-BaseTools-win32
+
+@if not defined PYTHON_HOME (
+  @if exist C:\Python27 (
+set PYTHON_HOME=C:\Python27
+  )
+)
+
+set EDK_SETUP_OPTION=
+@rem if python is installed, disable the binary base tools.
+if defined PYTHON_HOME (
+  set EDK_TOOLS_BIN=
+  set EDK_SETUP_OPTION=--nt32
+)
+pushd %WORKSPACE%\edk2
+call edksetup.bat %EDK_SETUP_OPTION%
+popd
+pushd %WORKSPACE%
+@rem if python is installed, nmake BaseTools source and enable BaseTools 
source build
+@if defined PYTHON_HOME (
+  nmake -f %BASE_TOOLS_PATH%\Makefile
+)
+popd
+
+set openssl_path=%WORKSPACE%
+
+popd
+
+goto :EOF
+
+:Help
+echo.
+echo Usage:
+echo GitEdk2.bat [-w Workspace_Directory] (optional) [-b Branch_Name] 
(optional)
+echo.
+echo -wA absolute/relative path to be the workspace.
+echo   Default value is the current directory.
+echo.
+echo -bThe branch name of the repository. Currently, only master, udk2015,
+echo   trunk (same as master) and bp13 (same as udk2015) are supported.
+echo   Default value is master.
+echo.
diff --git 
a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Include/Fdf/FlashMapInclude.fdf 
b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Include/Fdf/FlashMapInclude.fdf
new file mode 100644
index 00..a727eb3b83
--- /dev/null
+++ b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Include/Fdf/FlashMapInclude.fdf
@@ -0,0 +1,52 @@
+## @file
+#  Flash map layout file for the Clevo N1xxWU board.
+#
+# Copyright (c) 2019, Intel Corporation. All rights reserved.
+#
+# This program and the accompanying materials are licensed and made available 
under
+# the terms and conditions of the BSD License which accompanies this 
distribution.
+# The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF

[edk2] [edk2-platforms/devel-MinPlatform][PATCH v2 3/5] ClevoOpenBoardPkg: Add initial ClevoOpenBoardPkg top-level libraries

[Michael Kubacki]

Adds top-level libraries for an initial board package for Clevo boards.
This is based on KabylakeOpenBoardPkg with the name refactored for Clevo.

This is currently a base for further development and does not boot.

Cc: Hao Wu 
Cc: Liming Gao 
Cc: Jiewen Yao 
Cc: Michael D Kinney 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kubacki 
---
 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Include/Library/DxeTbtPolicyLib.h 
|  52 ++
 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Include/Library/PeiTbtPolicyLib.h 
|  47 ++
 Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Include/Library/TbtCommonLib.h   
 | 247 +
 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Include/Private/Library/PeiDTbtInitLib.h
  | 114 
 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Include/Private/Library/PeiTbtCommonInitLib.h
 |  47 ++
 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Library/DxeTbtPolicyLib/DxeTbtPolicyLib.c
 | 166 ++
 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Library/DxeTbtPolicyLib/DxeTbtPolicyLib.inf
   |  73 +++
 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Library/DxeTbtPolicyLib/DxeTbtPolicyLibrary.h
 |  28 +
 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Library/PeiDxeSmmTbtCommonLib/TbtCommonLib.c
  | 321 +++
 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Library/PeiDxeSmmTbtCommonLib/TbtCommonLib.inf
|  69 +++
 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Library/PeiTbtPolicyLib/PeiTbtPolicyLib.c
 | 210 +++
 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Library/PeiTbtPolicyLib/PeiTbtPolicyLib.inf
   |  62 +++
 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Library/PeiTbtPolicyLib/PeiTbtPolicyLibrary.h
 |  23 +
 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Library/Private/PeiDTbtInitLib/PeiDTbtInitLib.c
   | 572 
 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Library/Private/PeiDTbtInitLib/PeiDTbtInitLib.inf
 |  48 ++
 Platform/Intel/ClevoOpenBoardPkg/Include/Library/GpioExpanderLib.h 
 | 128 +
 Platform/Intel/ClevoOpenBoardPkg/Include/Library/I2cAccessLib.h
 |  39 ++
 Platform/Intel/ClevoOpenBoardPkg/Include/Protocol/GlobalNvsArea.h  
 |  53 ++
 
Platform/Intel/ClevoOpenBoardPkg/Library/BaseGpioExpanderLib/BaseGpioExpanderLib.c
  | 315 +++
 
Platform/Intel/ClevoOpenBoardPkg/Library/BaseGpioExpanderLib/BaseGpioExpanderLib.inf
|  39 ++
 
Platform/Intel/ClevoOpenBoardPkg/Library/BasePlatformHookLib/BasePlatformHookLib.inf
|  57 ++
 Platform/Intel/ClevoOpenBoardPkg/Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf 
 |  53 ++
 
Platform/Intel/ClevoOpenBoardPkg/Library/BoardAcpiLib/DxeMultiBoardAcpiSupportLib.inf
   |  54 ++
 
Platform/Intel/ClevoOpenBoardPkg/Library/BoardAcpiLib/SmmBoardAcpiEnableLib.inf 
|  53 ++
 
Platform/Intel/ClevoOpenBoardPkg/Library/BoardAcpiLib/SmmMultiBoardAcpiSupportLib.inf
   |  54 ++
 
Platform/Intel/ClevoOpenBoardPkg/Library/BoardInitLib/PeiBoardInitPostMemLib.inf
|  59 ++
 
Platform/Intel/ClevoOpenBoardPkg/Library/BoardInitLib/PeiBoardInitPreMemLib.inf 
| 138 +
 
Platform/Intel/ClevoOpenBoardPkg/Library/BoardInitLib/PeiMultiBoardInitPostMemLib.inf
   |  61 +++
 
Platform/Intel/ClevoOpenBoardPkg/Library/BoardInitLib/PeiMultiBoardInitPreMemLib.inf
| 140 +
 Platform/Intel/ClevoOpenBoardPkg/Library/PeiI2cAccessLib/PeiI2cAccessLib.c 
 | 121 +
 Platform/Intel/ClevoOpenBoardPkg/Library/PeiI2cAccessLib/PeiI2cAccessLib.inf   
 |  42 ++
 31 files changed, 3485 insertions(+)

diff --git 
a/Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Include/Library/DxeTbtPolicyLib.h
 
b/Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Include/Library/DxeTbtPolicyLib.h
new file mode 100644
index 00..b69a1a888e
--- /dev/null
+++ 
b/Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Include/Library/DxeTbtPolicyLib.h
@@ -0,0 +1,52 @@
+/** @file
+  Prototype of the DxeTbtPolicyLib library.
+
+Copyright (c) 2019, Intel Corporation. All rights reserved.
+This program and the accompanying materials are licensed and made available 
under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+#ifndef _DXE_TBT_POLICY_LIB_H_
+#define _DXE_TBT_POLICY_LIB_H_
+
+/**
+  Install TBT Policy.
+
+  @param[in] ImageHandleImage handle of this driver.
+
+  @retval EFI_SUCCESS   The policy is installed.
+  @retval EFI_OUT_OF_RESOURCES  In

[edk2] [edk2-platforms/devel-MinPlatform][PATCH v2 1/5] ClevoOpenBoardPkg: Add initial ClevoOpenBoardPkg top-level files

[Michael Kubacki]

Adds top-level files for an initial board package for Clevo boards.
This is based on KabylakeOpenBoardPkg with the name refactored for Clevo.

This is currently a base for further development and does not boot.

Cc: Hao Wu 
Cc: Liming Gao 
Cc: Jiewen Yao 
Cc: Michael D Kinney 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kubacki 
---
 Platform/Intel/ClevoOpenBoardPkg/Contributions.txt | 218 
 Platform/Intel/ClevoOpenBoardPkg/License.txt   |  25 ++
 Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec  | 306 +
 Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dsc  | 351 
 4 files changed, 900 insertions(+)

diff --git a/Platform/Intel/ClevoOpenBoardPkg/Contributions.txt 
b/Platform/Intel/ClevoOpenBoardPkg/Contributions.txt
new file mode 100644
index 00..f87cbd73c6
--- /dev/null
+++ b/Platform/Intel/ClevoOpenBoardPkg/Contributions.txt
@@ -0,0 +1,218 @@
+
+==
+= Code Contributions =
+==
+
+To make a contribution to a TianoCore project, follow these steps.
+1. Create a change description in the format specified below to
+   use in the source control commit log.
+2. Your commit message must include your "Signed-off-by" signature,
+   and "Contributed-under" message.
+3. Your "Contributed-under" message explicitly states that the
+   contribution is made under the terms of the specified
+   contribution agreement.  Your "Contributed-under" message
+   must include the name of contribution agreement and version.
+   For example: Contributed-under: TianoCore Contribution Agreement 1.0
+   The "TianoCore Contribution Agreement" is included below in
+   this document.
+4. Submit your code to the TianoCore project using the process
+   that the project documents on its web page.  If the process is
+   not documented, then submit the code on development email list
+   for the project.
+5. It is preferred that contributions are submitted using the same
+   copyright license as the base project. When that is not possible,
+   then contributions using the following licenses can be accepted:
+   * BSD (2-clause): http://opensource.org/licenses/BSD-2-Clause
+   * BSD (3-clause): http://opensource.org/licenses/BSD-3-Clause
+   * MIT: http://opensource.org/licenses/MIT
+   * Python-2.0: http://opensource.org/licenses/Python-2.0
+   * Zlib: http://opensource.org/licenses/Zlib
+
+   Contributions of code put into the public domain can also be
+   accepted.
+
+   Contributions using other licenses might be accepted, but further
+   review will be required.
+
+=
+= Change Description / Commit Message / Patch Email =
+=
+
+Your change description should use the standard format for a
+commit message, and must include your "Signed-off-by" signature
+and the "Contributed-under" message.
+
+== Sample Change Description / Commit Message =
+
+=== Start of sample patch email message ===
+
+From: Contributor Name 
+Subject: [PATCH] CodeModule: Brief-single-line-summary
+
+Full-commit-message
+
+Contributed-under: TianoCore Contribution Agreement 1.0
+Signed-off-by: Contributor Name 
+---
+
+An extra message for the patch email which will not be considered part
+of the commit message can be added here.
+
+Patch content inline or attached
+
+=== End of sample patch email message ===
+
+=== Notes for sample patch email ===
+
+* The first line of commit message is taken from the email's subject
+  line following [PATCH]. The remaining portion of the commit message
+  is the email's content until the '---' line.
+* git format-patch is one way to create this format
+
+=== Definitions for sample patch email ===
+
+* "CodeModule" is a short idenfier for the affected code.  For
+  example MdePkg, or MdeModulePkg UsbBusDxe.
+* "Brief-single-line-summary" is a short summary of the change.
+* The entire first line should be less than ~70 characters.
+* "Full-commit-message" a verbose multiple line comment describing
+  the change.  Each line should be less than ~70 characters.
+* "Contributed-under" explicitely states that the contribution is
+  made under the terms of the contribtion agreement.  This
+  agreement is included below in this document.
+* "Signed-off-by" is the contributor's signature identifying them
+  by their real/legal name and their email address.
+
+
+= TianoCore Contribution Agreement 1.0 =
+
+
+INTEL CORPORATION ("INTEL") MAKES AVAILABLE SOFTWARE, DOCUMENTATION,
+INFORMATION AND/OR OTHER MATERIALS FOR USE IN THE TIANOCORE OPEN SOURCE
+PROJECT (COLLECTIVELY "CONTENT"). USE OF THE CONTENT IS GOVERNED BY THE
+TERMS AND CONDITIONS OF THIS AGREEMENT BETWEEN

[edk2] [edk2-platforms/devel-MinPlatform][PATCH v2 0/5] Add initial ClevoOpenBoardPkg

[Michael Kubacki]

This change adds a new board package for Clevo boards. This provides
a board implementation for use with the MinPlatformPkg. Currently, this
is largely a copy of KabyLakeOpenBoardPkg with name refactoring. It is
intended to serve as a base for future board development.

Cc: Hao Wu 
Cc: Liming Gao 
Cc: Jiewen Yao 
Cc: Michael D Kinney 

Michael Kubacki (5):
  ClevoOpenBoardPkg: Add initial ClevoOpenBoardPkg top-level files
  ClevoOpenBoardPkg: Add initial ClevoOpenBoardPkg top-level modules
  ClevoOpenBoardPkg: Add initial ClevoOpenBoardPkg top-level libraries
  ClevoOpenBoardPkg/N1xxWU: Add initial board build files
  ClevoOpenBoardPkg/N1xxWU: Add board implementation

 Platform/Intel/ClevoOpenBoardPkg/Acpi/BoardAcpiDxe/AcpiGnvsInit.c  
  |  101 ++
 Platform/Intel/ClevoOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe.c  
  |  313 
 Platform/Intel/ClevoOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe.inf
  |   75 +
 Platform/Intel/ClevoOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/ALS.ASL
  |   43 +
 Platform/Intel/ClevoOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/AMLUPD.asl 
  |   27 +
 Platform/Intel/ClevoOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/CPU.asl
  |  252 +++
 Platform/Intel/ClevoOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/DSDT.ASL   
  |  127 ++
 Platform/Intel/ClevoOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/Gpe.asl
  |  856 +
 Platform/Intel/ClevoOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/Itss.asl   
  |   39 +
 Platform/Intel/ClevoOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/LPC_DEV.ASL
  |  205 +++
 Platform/Intel/ClevoOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/LpcB.asl   
  |   94 +
 Platform/Intel/ClevoOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PCI_DRC.ASL
  |  122 ++
 Platform/Intel/ClevoOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PciTree.asl
  |  312 
 Platform/Intel/ClevoOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/Platform.asl   
  | 1135 
 Platform/Intel/ClevoOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PlatformGnvs.asl   
  |   14 +
 Platform/Intel/ClevoOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/Video.asl  
  |   33 +
 Platform/Intel/ClevoOpenBoardPkg/Acpi/BoardAcpiDxe/UpdateDsdt.c
  |  782 
 Platform/Intel/ClevoOpenBoardPkg/Contributions.txt 
  |  218 +++
 Platform/Intel/ClevoOpenBoardPkg/Features/PciHotPlug/PciHotPlug.c  
  |  358 
 Platform/Intel/ClevoOpenBoardPkg/Features/PciHotPlug/PciHotPlug.h  
  |  136 ++
 Platform/Intel/ClevoOpenBoardPkg/Features/PciHotPlug/PciHotPlug.inf
  |   66 +
 Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/AcpiTables/Rtd3SptPcieTbt.asl
  |  409 +
 Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/AcpiTables/Tbt.asl   
  | 1908 
 Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Include/Acpi/TbtNvs.asl  
  |   62 +
 Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Include/Acpi/TbtNvsAreaDef.h 
  |   68 +
 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Include/Library/DxeTbtPolicyLib.h 
 |   52 +
 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Include/Library/PeiTbtPolicyLib.h 
 |   47 +
 Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Include/Library/TbtCommonLib.h   
  |  247 +++
 Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Include/Ppi/PeiTbtPolicy.h   
  |   35 +
 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Include/Private/Library/PeiDTbtInitLib.h
   |  114 ++
 
Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Include/Private/Library/PeiTbtCommonInitLib.h
  |   47 +
 Platform/Intel/ClevoOpenBoardPkg/Features/Tbt/Include/Protocol/DxeTbtPolicy.h  
  |  116 ++
 Platform/Intel

[edk2] [PATCH v1 1/1] Maintainers.txt: Update MinPlatformPkg maintainers

[Michael Kubacki]

Cc: Hao Wu 
Cc: Liming Gao 
Cc: Chasel Chiu 
Cc: Jiewen Yao 
Cc: Michael D Kinney 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kubacki 
---
 Platform/Intel/Maintainers.txt | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/Platform/Intel/Maintainers.txt b/Platform/Intel/Maintainers.txt
index b2c51259b8..7b27459fcf 100644
--- a/Platform/Intel/Maintainers.txt
+++ b/Platform/Intel/Maintainers.txt
@@ -39,11 +39,11 @@ EDK II Packages:
 
 KabylakeOpenBoardPkg
 M: Chasel Chiu 
-M: Michael A Kubacki 
+M: Michael Kubacki 
 
 MinPlatformPkg
-M: Michael A Kubacki 
-M: Jiewen Yao 
+M: Michael Kubacki 
+R: Chasel Chiu 
 
 PurleyOpenBoardPkg
 M: Shifei A Lu 
-- 
2.16.2.windows.1

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