from:"Ming"

[edk2] [PATCH edk2-platforms v4 3/3] Hisilicon/D06: Add Setup Item "Support DPC"

2019-03-25 Thread Ming Huang

Add setup item "Support DPC" to enable or disable PCIe DPC
(Downstream Port Containment).

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Silicon/Hisilicon/Include/Library/OemConfigData.h   | 1 +
 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr  | 2 --
 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c   | 4 
 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr| 3 +++
 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfigStrings.uni | 3 ++-
 5 files changed, 10 insertions(+), 3 deletions(-)

diff --git a/Silicon/Hisilicon/Include/Library/OemConfigData.h 
b/Silicon/Hisilicon/Include/Library/OemConfigData.h
index f120e3123c83..c0097d0829f0 100644
--- a/Silicon/Hisilicon/Include/Library/OemConfigData.h
+++ b/Silicon/Hisilicon/Include/Library/OemConfigData.h
@@ -49,6 +49,7 @@ typedef struct {
   UINT8 OSWdtAction;
   /*PCIe Config*/
   UINT8 PcieSRIOVSupport;
+  UINT8 PcieDPCSupport;
   UINT8 PciePort[PCIE_MAX_TOTAL_PORTS];
   UINT8 PcieLinkSpeedPort[PCIE_MAX_TOTAL_PORTS];
   UINT8 PcieLinkDeEmphasisPort[PCIE_MAX_TOTAL_PORTS];
diff --git a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr 
b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr
index 08236704fbfe..93ccb99bdc67 100644
--- a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr
+++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr
@@ -62,11 +62,9 @@ formset
   prompt = STRING_TOKEN(STR_IBMC_CONFIG_FORM_TITLE),
   help   = STRING_TOKEN(STR_IBMC_CONFIG_FORM_HELP);
 
-suppressif TRUE;
 goto PCIE_CONFIG_FORM_ID,
   prompt  = STRING_TOKEN(STR_PCIE_CONFIG_FORM_TITLE),
   help= STRING_TOKEN(STR_PCIE_CONFIG_FORM_HELP);
-endif;
 
 goto MISC_CONFIG_FORM_ID,
   prompt  = STRING_TOKEN(STR_MISC_CONFIG_FORM_TITLE),
diff --git a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c 
b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c
index 6668103af027..be4ce8820f73 100644
--- a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c
+++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c
@@ -290,6 +290,10 @@ OemConfigUiLibConstructor (
   Configuration.OSWdtTimeout = 5;
   Configuration.OSWdtAction = 1;
   //
+  //Set the default value of the PCIe option
+  //
+  Configuration.PcieDPCSupport = 0;
+  //
   //Set the default value of the Misc option
   //
   Configuration.EnableSmmu = 1;
diff --git a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr 
b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr
index f700699b093b..c65907fe846e 100644
--- a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr
+++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr
@@ -17,6 +17,9 @@
 form formid = PCIE_CONFIG_FORM_ID,
   title   = STRING_TOKEN (STR_PCIE_CONFIG_FORM_TITLE);
 
+  oneof varid  = OEM_CONFIG_DATA.PcieDPCSupport,
+prompt   = STRING_TOKEN (STR_DPC_SUPPORT_PROMPT),
+help = STRING_TOKEN (STR_DPC_SUPPORT_HELP),
 option text = STRING_TOKEN (STR_DISABLE), value = 0, flags = 
MANUFACTURING | DEFAULT | RESET_REQUIRED;
 option text = STRING_TOKEN (STR_ENABLE),  value = 1, flags = 
RESET_REQUIRED;
   endoneof;
diff --git 
a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfigStrings.uni 
b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfigStrings.uni
index d87d30f975b8..0127ea952dee 100644
--- a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfigStrings.uni
+++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfigStrings.uni
@@ -26,7 +26,8 @@
 #string STR_PCIE_CPU_1_PROMPT   #language en-US "CPU 1 PCIE 
Configuration"
 #string STR_SRIOV_SUPPORT_PROMPT#language en-US "SRIOV"
 #string STR_SRIOV_SUPPORT_HELP  #language en-US "This option enables / 
disables the SRIOV function"
-
+#string STR_DPC_SUPPORT_PROMPT  #language en-US "Support DPC"
+#string STR_DPC_SUPPORT_HELP#language en-US "This option enables / 
disables the DPC function"
 #string STR_PCIE_PORT_PROMPT_HELP   #language en-US "Press  to 
config this port."
 #string STR_PCIE_PORT_0_NULL_PROMPT #language en-US ""
 #string STR_PCIE_PORT_0_PROMPT  #language en-US "CPU 0 Pcie - Port 0"
-- 
2.9.5

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[edk2] [PATCH edk2-platforms v4 0/3] Fix issues and improve D0x

2019-03-25 Thread Ming Huang

Main Changes since v3:
1 Break patch "Support DPC" into two seperate one;
2 Rename subject of patch "Fix access variable fail issue";

Code can also be found in github:
https://github.com/hisilicon/OpenPlatformPkg.git
branch: 1902-platforms-v4


Ming Huang (3):
  Hisilicon/D06: Add runtime attribution to OemConfig variable
  Hisilicon/D06: Drop some PCIe menus
  Hisilicon/D06: Add Setup Item "Support DPC"

 Silicon/Hisilicon/Include/Library/OemConfigData.h   |   1 +
 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr  |   4 +-
 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c   |   6 +-
 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr| 197 
+---
 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfigStrings.uni |   3 +-
 5 files changed, 12 insertions(+), 199 deletions(-)

-- 
2.9.5

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[edk2] [PATCH edk2-platforms v4 2/3] Hisilicon/D06: Drop some PCIe menus

2019-03-25 Thread Ming Huang

Drop some PCIe menus as these menus are not ready.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr | 194 

 1 file changed, 194 deletions(-)

diff --git a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr 
b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr
index 7cf7cdd29ba2..f700699b093b 100644
--- a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr
+++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr
@@ -17,203 +17,9 @@
 form formid = PCIE_CONFIG_FORM_ID,
   title   = STRING_TOKEN (STR_PCIE_CONFIG_FORM_TITLE);
 
-  goto VFR_FORMID_PCIE_SOCKET0,
-prompt  = STRING_TOKEN (STR_PCIE_CPU_0_PROMPT),
-help= STRING_TOKEN (STR_PCIE_CPU_PROMPT_HELP);
-
-  goto VFR_FORMID_PCIE_SOCKET1,
-prompt  = STRING_TOKEN (STR_PCIE_CPU_1_PROMPT),
-help= STRING_TOKEN (STR_PCIE_CPU_PROMPT_HELP);
-
-  oneof varid  = OEM_CONFIG_DATA.PcieSRIOVSupport,
-prompt   = STRING_TOKEN (STR_SRIOV_SUPPORT_PROMPT),
-help = STRING_TOKEN (STR_SRIOV_SUPPORT_HELP),
 option text = STRING_TOKEN (STR_DISABLE), value = 0, flags = 
MANUFACTURING | DEFAULT | RESET_REQUIRED;
 option text = STRING_TOKEN (STR_ENABLE),  value = 1, flags = 
RESET_REQUIRED;
   endoneof;
 
 endform;
 
-form formid = VFR_FORMID_PCIE_SOCKET0,
-  title = STRING_TOKEN(STR_PCIE_CPU_0_PROMPT);
-
-  goto VFR_FORMID_PCIE_PORT2,
-prompt  = STRING_TOKEN(STR_PCIE_PORT_2_PROMPT),
-help= STRING_TOKEN(STR_PCIE_PORT_PROMPT_HELP);
-
-  goto VFR_FORMID_PCIE_PORT4,
-prompt  = STRING_TOKEN(STR_PCIE_PORT_4_PROMPT),
-help= STRING_TOKEN(STR_PCIE_PORT_PROMPT_HELP);
-
-  goto VFR_FORMID_PCIE_PORT5,
-prompt  = STRING_TOKEN(STR_PCIE_PORT_5_PROMPT),
-help= STRING_TOKEN(STR_PCIE_PORT_PROMPT_HELP);
-
-  goto VFR_FORMID_PCIE_PORT6,
-prompt  = STRING_TOKEN(STR_PCIE_PORT_6_PROMPT),
-help= STRING_TOKEN(STR_PCIE_PORT_PROMPT_HELP);
-
-  goto VFR_FORMID_PCIE_PORT7,
-prompt  = STRING_TOKEN(STR_PCIE_PORT_7_PROMPT),
-help= STRING_TOKEN(STR_PCIE_PORT_PROMPT_HELP);
-
-endform;
-
-form formid = VFR_FORMID_PCIE_SOCKET1,
-  title = STRING_TOKEN(STR_PCIE_CPU_1_PROMPT);
-  goto VFR_FORMID_PCIE_PORT10,
-prompt  = STRING_TOKEN(STR_PCIE_PORT_10_PROMPT),
-help= STRING_TOKEN(STR_PCIE_PORT_PROMPT_HELP);
-
-  goto VFR_FORMID_PCIE_PORT12,
-prompt  = STRING_TOKEN(STR_PCIE_PORT_12_PROMPT),
-help= STRING_TOKEN(STR_PCIE_PORT_PROMPT_HELP);
-
-  goto VFR_FORMID_PCIE_PORT13,
-prompt  = STRING_TOKEN(STR_PCIE_PORT_13_PROMPT),
-help= STRING_TOKEN(STR_PCIE_PORT_PROMPT_HELP);
-endform;
-
-form formid = VFR_FORMID_PCIE_PORT0,
-  title = STRING_TOKEN(STR_PCIE_PORT_0_PROMPT);
-  #undef  INDEX
-  #define INDEX   0
-  #include "PciePortConfig.hfr"
-
-endform;
-
-form formid = VFR_FORMID_PCIE_PORT1,
-  title = STRING_TOKEN(STR_PCIE_PORT_1_PROMPT);
-
-  #undef  INDEX
-  #define INDEX   1
-  #include "PciePortConfig.hfr"
-
-endform;
-
-form formid = VFR_FORMID_PCIE_PORT2,
-  title = STRING_TOKEN(STR_PCIE_PORT_2_PROMPT);
-
-  #undef  INDEX
-  #define INDEX   2
-  #include "PciePortConfig.hfr"
-
-endform;
-
-form formid = VFR_FORMID_PCIE_PORT3,
-  title = STRING_TOKEN(STR_PCIE_PORT_3_PROMPT);
-
-  #undef  INDEX
-  #define INDEX   3
-  #include "PciePortConfig.hfr"
-
-endform;
-
-form formid = VFR_FORMID_PCIE_PORT4,
-  title = STRING_TOKEN(STR_PCIE_PORT_4_PROMPT);
-
-  #undef  INDEX
-  #define INDEX   4
-  #include "PciePortConfig.hfr"
-
-endform;
-
-form formid = VFR_FORMID_PCIE_PORT5,
-  title = STRING_TOKEN(STR_PCIE_PORT_5_PROMPT);
-
-  #undef  INDEX
-  #define INDEX   5
-  #include "PciePortConfig.hfr"
-
-endform;
-
-form formid = VFR_FORMID_PCIE_PORT6,
-  title = STRING_TOKEN(STR_PCIE_PORT_6_PROMPT);
-
-  #undef  INDEX
-  #define INDEX   6
-  #include "PciePortConfig.hfr"
-
-endform;
-
-form formid = VFR_FORMID_PCIE_PORT7,
-  title = STRING_TOKEN(STR_PCIE_PORT_7_PROMPT);
-
-  #undef  INDEX
-  #define INDEX   7
-  #include "PciePortConfig.hfr"
-
-endform;
-
-form formid = VFR_FORMID_PCIE_PORT8,
-  title = STRING_TOKEN(STR_PCIE_PORT_8_PROMPT);
-
-  #undef  INDEX
-  #define INDEX   8
-  #include "PciePortConfig.hfr"
-
-endform;
-
-form formid = VFR_FORMID_PCIE_PORT9,
-  title = STRING_TOKEN(STR_PCIE_PORT_9_PROMPT);
-
-  #undef  INDEX
-  #define INDEX   9
-  #include "PciePortConfig.hfr"
-
-endform;
-
-form formid = VFR_FORMID_PCIE_PORT10,
-  title = STRING_TOKEN(STR_PCIE_PORT_10_PROMPT);
-
-  #undef  INDEX
-  #define INDEX   10
-  #include "PciePortConfig.hfr"
-
-endform;
-
-form formid = VFR_FORMID_PCIE_PORT11,
-  title = STRING_TOKEN(STR_PCIE_PORT_11_PROMPT);
-
-  #undef  INDEX
-  #define INDEX   11
-  #include "PciePortConfig.hfr"
-
-endform;
-
-form formid = VFR_FORMID_PCIE_PORT12,
-  title = STRING_TOKEN

[edk2] [PATCH edk2-platforms v4 1/3] Hisilicon/D06: Add runtime attribution to OemConfig variable

2019-03-25 Thread Ming Huang

BmcWdtEnable is a field of OemConfigData structure, need have
runtime service attribution if use it during exit boot service

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr | 2 +-
 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c  | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr 
b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr
index 470e9ace3dcf..08236704fbfe 100644
--- a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr
+++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr
@@ -23,7 +23,7 @@ formset
   help  = STRING_TOKEN(STR_OEM_CONFIG),
   classguid = gEfiIfrFrontPageGuid,  // for MdeModule Bds.
   efivarstore OEM_CONFIG_DATA,
-attribute = EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_NON_VOLATILE,
+attribute = EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_NON_VOLATILE | 
EFI_VARIABLE_RUNTIME_ACCESS,
 name  = OemConfig,
 guid  = gOemConfigGuid;
 
diff --git a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c 
b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c
index 012d45bc0214..6668103af027 100644
--- a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c
+++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c
@@ -316,7 +316,7 @@ OemConfigUiLibConstructor (
   Status = gRT->SetVariable (
   OEM_CONFIG_NAME,
   ,
-  EFI_VARIABLE_NON_VOLATILE | 
EFI_VARIABLE_BOOTSERVICE_ACCESS,
+  EFI_VARIABLE_NON_VOLATILE | 
EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS,
   sizeof (OEM_CONFIG_DATA),
   
   );
-- 
2.9.5

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Re: [edk2] [PATCH edk2-platforms v3 13/18] Hisilicon/D06: Add Setup Item "Support DPC" and delete some PCIe menus

2019-03-21 Thread Ming Huang




On 3/21/2019 8:32 PM, Leif Lindholm wrote:
> Hi Ming,
> 
> On Wed, Mar 20, 2019 at 04:08:24PM +0800, Ming Huang wrote:
>> Add setup item "Support DPC" to enable or disable PCIe DPC
>> (Downstream Port Containment).
>>
>> The pcie menu is suppressed for original code as these menus
>> are not ready. This patch remove the suppression for pcie menu,
>> so delete these menus for now.
> 
> As the commit message shows, this patch does two unrelated things.
> Could you break this patch up into two separate ones and resubmit just
> those?

I will break this patch up into two seperate ones soon.

Thanks

> 
> I will cherry-pick this patch manually in order to have it included in
> RPF 2019.03 -rc1, but I would prefer what goes in upstream to be
> cleaner.
> 
> Best Regards,
> 
> Leif
> 
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Ming Huang 
>> ---
>>  Silicon/Hisilicon/Include/Library/OemConfigData.h   |   1 +
>>  Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr  |   2 -
>>  Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c   |   4 +
>>  Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr| 197 
>> +---
>>  Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfigStrings.uni |   3 +-
>>  5 files changed, 10 insertions(+), 197 deletions(-)
>>
>> diff --git a/Silicon/Hisilicon/Include/Library/OemConfigData.h 
>> b/Silicon/Hisilicon/Include/Library/OemConfigData.h
>> index f120e3123c83..c0097d0829f0 100644
>> --- a/Silicon/Hisilicon/Include/Library/OemConfigData.h
>> +++ b/Silicon/Hisilicon/Include/Library/OemConfigData.h
>> @@ -49,6 +49,7 @@ typedef struct {
>>UINT8 OSWdtAction;
>>/*PCIe Config*/
>>UINT8 PcieSRIOVSupport;
>> +  UINT8 PcieDPCSupport;
>>UINT8 PciePort[PCIE_MAX_TOTAL_PORTS];
>>UINT8 PcieLinkSpeedPort[PCIE_MAX_TOTAL_PORTS];
>>UINT8 PcieLinkDeEmphasisPort[PCIE_MAX_TOTAL_PORTS];
>> diff --git a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr 
>> b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr
>> index 08236704fbfe..93ccb99bdc67 100644
>> --- a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr
>> +++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr
>> @@ -62,11 +62,9 @@ formset
>>prompt = STRING_TOKEN(STR_IBMC_CONFIG_FORM_TITLE),
>>help   = STRING_TOKEN(STR_IBMC_CONFIG_FORM_HELP);
>>  
>> -suppressif TRUE;
>>  goto PCIE_CONFIG_FORM_ID,
>>prompt  = STRING_TOKEN(STR_PCIE_CONFIG_FORM_TITLE),
>>help= STRING_TOKEN(STR_PCIE_CONFIG_FORM_HELP);
>> -endif;
>>  
>>  goto MISC_CONFIG_FORM_ID,
>>prompt  = STRING_TOKEN(STR_MISC_CONFIG_FORM_TITLE),
>> diff --git a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c 
>> b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c
>> index 6668103af027..be4ce8820f73 100644
>> --- a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c
>> +++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c
>> @@ -290,6 +290,10 @@ OemConfigUiLibConstructor (
>>Configuration.OSWdtTimeout = 5;
>>Configuration.OSWdtAction = 1;
>>//
>> +  //Set the default value of the PCIe option
>> +  //
>> +  Configuration.PcieDPCSupport = 0;
>> +  //
>>//Set the default value of the Misc option
>>//
>>Configuration.EnableSmmu = 1;
>> diff --git a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr 
>> b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr
>> index 7cf7cdd29ba2..c65907fe846e 100644
>> --- a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr
>> +++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr
>> @@ -17,203 +17,12 @@
>>  form formid = PCIE_CONFIG_FORM_ID,
>>title   = STRING_TOKEN (STR_PCIE_CONFIG_FORM_TITLE);
>>  
>> -  goto VFR_FORMID_PCIE_SOCKET0,
>> -prompt  = STRING_TOKEN (STR_PCIE_CPU_0_PROMPT),
>> -help= STRING_TOKEN (STR_PCIE_CPU_PROMPT_HELP);
>> -
>> -  goto VFR_FORMID_PCIE_SOCKET1,
>> -prompt  = STRING_TOKEN (STR_PCIE_CPU_1_PROMPT),
>> -help= STRING_TOKEN (STR_PCIE_CPU_PROMPT_HELP);
>> -
>> -  oneof varid  = OEM_CONFIG_DATA.PcieSRIOVSupport,
>> -prompt   = STRING_TOKEN (STR_SRIOV_SUPPORT_PROMPT),
>> -help = STRING_TOKEN (STR_SRIOV_SUPPORT_HELP),
&

Re: [edk2] [PATCH edk2-platforms v3 05/18] Hisilicon/D06: Fix access variable fail issue

2019-03-21 Thread Ming Huang




On 3/22/2019 1:56 AM, Leif Lindholm wrote:
> Urgh, this was an unfortunate off-by-one post:
> I am deferring this patch until after Linaro's 2019.03 firmware
> release and cherry-picking it into that. There must be a better way to
> solve this.
> 
> My comment referred to "Hisilicon/D06: Drop the leading 0 (0x0 ->
> 0x)", which will be pushed with an improved subject.

I will change subject to:
Add runtime attribution to OemConfig variable
Should I change author to me to remove the "From: Jason Zhang"?

Thanks

> 
> /
> Leif
> 
> On Thu, Mar 21, 2019 at 05:52:18PM +, Leif Lindholm wrote:
>> I will update the subject line to reflect what is actually being
>> changed.
>>
>> Other than that,
>> Reviewed-by: Leif Lindholm 
>>
>>
>> On Wed, Mar 20, 2019 at 04:08:16PM +0800, Ming Huang wrote:
>>> From: Jason Zhang 
>>>
>>> BmcWdtEnable is a field of OemConfigData structure, need have
>>> runtime service attribution if use it during exit boot service
>>>
>>> Contributed-under: TianoCore Contribution Agreement 1.1
>>> Signed-off-by: Ming Huang 
>>> ---
>>>  Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr | 2 +-
>>>  Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c  | 2 +-
>>>  2 files changed, 2 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr 
>>> b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr
>>> index 470e9ace3dcf..08236704fbfe 100644
>>> --- a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr
>>> +++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr
>>> @@ -23,7 +23,7 @@ formset
>>>help  = STRING_TOKEN(STR_OEM_CONFIG),
>>>classguid = gEfiIfrFrontPageGuid,  // for MdeModule Bds.
>>>efivarstore OEM_CONFIG_DATA,
>>> -attribute = EFI_VARIABLE_BOOTSERVICE_ACCESS | 
>>> EFI_VARIABLE_NON_VOLATILE,
>>> +attribute = EFI_VARIABLE_BOOTSERVICE_ACCESS | 
>>> EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_RUNTIME_ACCESS,
>>>  name  = OemConfig,
>>>  guid  = gOemConfigGuid;
>>>  
>>> diff --git a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c 
>>> b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c
>>> index 012d45bc0214..6668103af027 100644
>>> --- a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c
>>> +++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c
>>> @@ -316,7 +316,7 @@ OemConfigUiLibConstructor (
>>>Status = gRT->SetVariable (
>>>OEM_CONFIG_NAME,
>>>,
>>> -  EFI_VARIABLE_NON_VOLATILE | 
>>> EFI_VARIABLE_BOOTSERVICE_ACCESS,
>>> +  EFI_VARIABLE_NON_VOLATILE | 
>>> EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS,
>>>sizeof (OEM_CONFIG_DATA),
>>>
>>>);
>>> -- 
>>> 2.9.5
>>>
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[edk2] [PATCH edk2-non-osi v3 8/8] Hisilicon/D06: Add Setup Item "Support DPC"

2019-03-20 Thread Ming Huang

Add setup item "Support DPC" to enable or disable PCIe DPC
(Downstream Port Containment).

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
Reviewed-by: Leif Lindholm 
---
 Platform/Hisilicon/D06/Drivers/IoInitDxe/IoInitDxe.efi | Bin 232832 -> 226784 
bytes
 1 file changed, 0 insertions(+), 0 deletions(-)

diff --git a/Platform/Hisilicon/D06/Drivers/IoInitDxe/IoInitDxe.efi 
b/Platform/Hisilicon/D06/Drivers/IoInitDxe/IoInitDxe.efi
index e32c056..4511f6b 100644
Binary files a/Platform/Hisilicon/D06/Drivers/IoInitDxe/IoInitDxe.efi and 
b/Platform/Hisilicon/D06/Drivers/IoInitDxe/IoInitDxe.efi differ
-- 
2.9.5

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[edk2] [PATCH edk2-non-osi v3 5/8] Hisilicon/D06: Support PCIe local RAS

2019-03-20 Thread Ming Huang

Add some registers configuration in PcieRasInitDxe and add PCIe
local RAS interrupt handle in trusted firmware to support PCIe
local RAS.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
Reviewed-by: Leif Lindholm 
---
 Platform/Hisilicon/D06/Drivers/PcieRasInitDxe/PcieRasInitDxe.efi | Bin 21248 
-> 22048 bytes
 Platform/Hisilicon/D06/bl1.bin   | Bin 12432 
-> 12432 bytes
 Platform/Hisilicon/D06/fip.bin   | Bin 113450 
-> 121866 bytes
 3 files changed, 0 insertions(+), 0 deletions(-)

diff --git a/Platform/Hisilicon/D06/Drivers/PcieRasInitDxe/PcieRasInitDxe.efi 
b/Platform/Hisilicon/D06/Drivers/PcieRasInitDxe/PcieRasInitDxe.efi
index 0e22237..f9ceff2 100644
Binary files a/Platform/Hisilicon/D06/Drivers/PcieRasInitDxe/PcieRasInitDxe.efi 
and b/Platform/Hisilicon/D06/Drivers/PcieRasInitDxe/PcieRasInitDxe.efi differ
diff --git a/Platform/Hisilicon/D06/bl1.bin b/Platform/Hisilicon/D06/bl1.bin
index 416535f..d0970e5 100644
Binary files a/Platform/Hisilicon/D06/bl1.bin and 
b/Platform/Hisilicon/D06/bl1.bin differ
diff --git a/Platform/Hisilicon/D06/fip.bin b/Platform/Hisilicon/D06/fip.bin
index c9b7ca0..795cfb5 100644
Binary files a/Platform/Hisilicon/D06/fip.bin and 
b/Platform/Hisilicon/D06/fip.bin differ
-- 
2.9.5

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[edk2] [PATCH edk2-non-osi v3 7/8] Hisilicon/D06: Fix numa node wrong issue

2019-03-20 Thread Ming Huang

Numa informations are acquired from HOB that build from memory
initialization module. Correct numa informations to match booting
from TA(Totem A or super cpu cluster A).

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Platform/Hisilicon/D06/MemoryInitPei/MemoryInit.efi | Bin 297696 -> 358656 
bytes
 1 file changed, 0 insertions(+), 0 deletions(-)

diff --git a/Platform/Hisilicon/D06/MemoryInitPei/MemoryInit.efi 
b/Platform/Hisilicon/D06/MemoryInitPei/MemoryInit.efi
index 5fba353..fea1475 100644
Binary files a/Platform/Hisilicon/D06/MemoryInitPei/MemoryInit.efi and 
b/Platform/Hisilicon/D06/MemoryInitPei/MemoryInit.efi differ
-- 
2.9.5

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[edk2] [PATCH edk2-non-osi v3 1/8] Hisilicon/D0x: Add some header files

2019-03-20 Thread Ming Huang

As interfaces exposed only by implementations in edk2-non-osi,
so move some header files from edk2-platforms to edk2-non-osi.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Silicon/Hisilicon/Include/Library/IpmiCmdLib.h | 110 
+++
 Silicon/Hisilicon/Include/Library/LpcLib.h | 113 

 Silicon/Hisilicon/Include/Library/OemAddressMapLib.h   |  45 
 Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h | 112 
+++
 Silicon/Hisilicon/Include/Library/SerdesLib.h  |  21 
 5 files changed, 401 insertions(+)

diff --git a/Silicon/Hisilicon/Include/Library/IpmiCmdLib.h 
b/Silicon/Hisilicon/Include/Library/IpmiCmdLib.h
new file mode 100644
index 000..b956ee6
--- /dev/null
+++ b/Silicon/Hisilicon/Include/Library/IpmiCmdLib.h
@@ -0,0 +1,110 @@
+/** @file
+*
+*  Copyright (c) 2017, Hisilicon Limited. All rights reserved.
+*  Copyright (c) 2017, Linaro Limited. All rights reserved.
+*
+*  This program and the accompanying materials
+*  are licensed and made available under the terms and conditions of the BSD 
License
+*  which accompanies this distribution.  The full text of the license may be 
found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR 
IMPLIED.
+*
+**/
+
+#ifndef _IPMI_CMD_LIB_H_
+#define _IPMI_CMD_LIB_H_
+
+#define BOOT_OPTION_BOOT_FLAG_VALID 1
+#define BOOT_OPTION_BOOT_FLAG_INVALID   0
+
+typedef enum {
+  EfiReserved,
+  EfiBiosFrb2,
+  EfiBiosPost,
+  EfiOsLoad,
+  EfiSmsOs,
+  EfiOem,
+  EfiFrbReserved1,
+  EfiFrbReserved2
+} EFI_WDT_USER_TYPE;
+
+typedef enum {
+  NoOverride = 0x0,
+  ForcePxe,
+  ForceDefaultHardDisk,
+  ForceDefaultHardDiskSafeMode,
+  ForceDefaultDiagnosticPartition,
+  ForceDefaultCD,
+  ForceSetupUtility,
+  ForceRemoteRemovableMedia,
+  ForceRemoteCD,
+  ForcePrimaryRemoteMedia,
+  ForceRemoteHardDisk = 0xB,
+  ForcePrimaryRemovableMedia = 0xF
+} BOOT_DEVICE_SELECTOR;
+
+//
+// Get System Boot Option data structure
+//
+typedef struct {
+  UINT8 ParameterVersion   :4;
+  UINT8 Reserved1  :4;
+  UINT8 ParameterSelector  :7;
+  UINT8 ParameterValid :1;
+  //
+  // Boot Flags Data 1
+  //
+  UINT8 Reserved2  :5;
+  UINT8 BiosBootType   :1;
+  UINT8 Persistent :1;
+  UINT8 BootFlagsValid :1;
+  //
+  // Boot Flags Data 2
+  //
+  UINT8 LockResetBtn   :1;
+  UINT8 ScreenBlank:1;
+  UINT8 BootDeviceSelector :4;
+  UINT8 LockKeyboard   :1;
+  UINT8 ClearCmos  :1;
+  //
+  // Boot Flags Data 3
+  //
+  UINT8 ConsoleRedirectionControl  :2;
+  UINT8 LockSleepBtn   :1;
+  UINT8 UserPasswordByPass :1;
+  UINT8 Reserved3  :1;
+  UINT8 FirmwareVerbosity  :2;
+  UINT8 LockPowerBtn   :1;
+  //
+  // Boot Flags Data 4
+  //
+  UINT8 MuxControlOverride :3;
+  UINT8 ShareModeOverride  :1;
+  UINT8 Reserved4  :4;
+  //
+  // Boot Flags Data 5
+  //
+  UINT8 DeviceInstanceSelector :5;
+  UINT8 Reserved5  :3;
+} IPMI_GET_BOOT_OPTION;
+
+EFI_STATUS
+EFIAPI
+IpmiCmdSetSysBootOptions (
+  OUT IPMI_GET_BOOT_OPTION  *BootOption
+  );
+
+EFI_STATUS
+EFIAPI
+IpmiCmdGetSysBootOptions (
+  IN IPMI_GET_BOOT_OPTION   *BootOption
+  );
+
+EFI_STATUS
+IpmiCmdStopWatchdogTimer (
+  IN EFI_WDT_USER_TYPE  UserType
+  );
+
+#endif
diff --git a/Silicon/Hisilicon/Include/Library/LpcLib.h 
b/Silicon/Hisilicon/Include/Library/LpcLib.h
new file mode 100755
index 000..236a52b
--- /dev/null
+++ b/Silicon/Hisilicon/Include/Library/LpcLib.h
@@ -0,0 +1,113 @@
+/** @file
+*
+*  Copyright (c) 2016, Hisilicon Limited. All rights reserved.
+*  Copyright (c) 2016, Linaro Limited. All rights reserved.
+*
+*  This program and the accompanying materials
+*  are licensed and made available under the terms and conditions of the BSD 
License
+*  which accompanies this distribution.  The full text of the license may be 
found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR 
IMPLIED.
+*
+**/
+
+#ifndef _LPC_LIB_H_
+#define _LPC_LIB_H_
+
+#include 
+
+#define PCIE_SUBSYS_IO_MUX  0xA017
+#define PCIE_SUBSYS_IOMG033 (PCIE_SUBSYS_IO_MUX + 0x84)
+#define PCIE_SUBSYS_IOMG035 (PCIE_SUBSYS_IO_MUX + 0x8C)
+#define PCIE_SUBSYS_IOMG036 (PCIE_SUBSYS_IO_MUX + 0x90)
+#define PCIE_SUBSYS_IOMG045 (PCIE_SUBSYS_IO_MUX + 0xB4)
+#define PCIE_SUBSYS_IOMG046 (PCIE_SUBSYS_IO_MUX + 0xB8)
+#define PCIE_SUBSYS_IOMG047 (PCIE_SUBSYS_IO_MUX + 0xBC)
+#define PCIE_SUBSYS_IOMG048 (PCIE_

[edk2] [PATCH edk2-non-osi v3 4/8] Hisilicon/D06: Update Mbigen and gic RAS register

2019-03-20 Thread Ming Huang

As chip group suggestions, update Mbigen and gic RAS configuration
flow.
Add below flow:
1 Reset Mbigen;
2 Disable Mbigen clock;
3 Deassert reset Mbigen;
4 Enable Mbigen clock;

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Platform/Hisilicon/D06/Drivers/RasInitDxe/RasInitDxe.efi | Bin 17984 -> 18720 
bytes
 1 file changed, 0 insertions(+), 0 deletions(-)

diff --git a/Platform/Hisilicon/D06/Drivers/RasInitDxe/RasInitDxe.efi 
b/Platform/Hisilicon/D06/Drivers/RasInitDxe/RasInitDxe.efi
index 19adbc9..9ea21e9 100644
Binary files a/Platform/Hisilicon/D06/Drivers/RasInitDxe/RasInitDxe.efi and 
b/Platform/Hisilicon/D06/Drivers/RasInitDxe/RasInitDxe.efi differ
-- 
2.9.5

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[edk2] [PATCH edk2-non-osi v3 6/8] Hisilicon/D06: Use new flash layout

2019-03-20 Thread Ming Huang

In new flash layout, BIOS fd change from offset 1M to 8M in 16M
spi flash.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Platform/Hisilicon/D06/CustomData.Fv | Bin 0 
-> 65536 bytes
 Platform/Hisilicon/D06/Library/OemAddressMapD06/OemAddressMapD06.lib | Bin 
61892 -> 31696 bytes
 Platform/Hisilicon/D06/Sec/FVMAIN_SEC.Fv | Bin 
1048576 -> 1048576 bytes
 3 files changed, 0 insertions(+), 0 deletions(-)

diff --git a/Platform/Hisilicon/D06/CustomData.Fv 
b/Platform/Hisilicon/D06/CustomData.Fv
new file mode 100644
index 000..22ef62b
Binary files /dev/null and b/Platform/Hisilicon/D06/CustomData.Fv differ
diff --git 
a/Platform/Hisilicon/D06/Library/OemAddressMapD06/OemAddressMapD06.lib 
b/Platform/Hisilicon/D06/Library/OemAddressMapD06/OemAddressMapD06.lib
index 7e1f6b2..851c2c3 100644
Binary files 
a/Platform/Hisilicon/D06/Library/OemAddressMapD06/OemAddressMapD06.lib and 
b/Platform/Hisilicon/D06/Library/OemAddressMapD06/OemAddressMapD06.lib differ
diff --git a/Platform/Hisilicon/D06/Sec/FVMAIN_SEC.Fv 
b/Platform/Hisilicon/D06/Sec/FVMAIN_SEC.Fv
index 247e44e..7f75bc6 100644
Binary files a/Platform/Hisilicon/D06/Sec/FVMAIN_SEC.Fv and 
b/Platform/Hisilicon/D06/Sec/FVMAIN_SEC.Fv differ
-- 
2.9.5

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[edk2] [PATCH edk2-non-osi v3 3/8] Hisilicon/D0x: Update PlatformSysCtrlLib binary

2019-03-20 Thread Ming Huang

As suggestion of community, 'AP' is a bit unfortunate to use in EDK2
context. PI specifies 'BSP' for Boot-strap Processor, as the one
executing all of the EDK2 code. It then uses 'AP' to refer to
Additional Processors, which can be assigned tasks using the
EFI_MP_SERVICES_PROTOCOL. In a TianoCore context, this should be
'BSP'. So, Rename StartupAp() to StartUpBSP.

This patch applies to D0x PlatformSysCtrlLib.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 
Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.lib
 | Bin 297590 -> 229128 bytes
 
Silicon/Hisilicon/Hi1616/Library/PlatformSysCtrlLibHi1616/PlatformSysCtrlLibHi1616.lib
 | Bin 344310 -> 275312 bytes
 
Silicon/Hisilicon/Hi1620/Library/PlatformSysCtrlLibHi1620/PlatformSysCtrlLibHi1620.lib
 | Bin 356032 -> 375916 bytes
 3 files changed, 0 insertions(+), 0 deletions(-)

diff --git 
a/Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.lib
 
b/Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.lib
index 68be770..4c63a26 100644
Binary files 
a/Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.lib
 and 
b/Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.lib
 differ
diff --git 
a/Silicon/Hisilicon/Hi1616/Library/PlatformSysCtrlLibHi1616/PlatformSysCtrlLibHi1616.lib
 
b/Silicon/Hisilicon/Hi1616/Library/PlatformSysCtrlLibHi1616/PlatformSysCtrlLibHi1616.lib
index b3cc88e..cb2c652 100644
Binary files 
a/Silicon/Hisilicon/Hi1616/Library/PlatformSysCtrlLibHi1616/PlatformSysCtrlLibHi1616.lib
 and 
b/Silicon/Hisilicon/Hi1616/Library/PlatformSysCtrlLibHi1616/PlatformSysCtrlLibHi1616.lib
 differ
diff --git 
a/Silicon/Hisilicon/Hi1620/Library/PlatformSysCtrlLibHi1620/PlatformSysCtrlLibHi1620.lib
 
b/Silicon/Hisilicon/Hi1620/Library/PlatformSysCtrlLibHi1620/PlatformSysCtrlLibHi1620.lib
index 50d453a..d643f7b 100644
Binary files 
a/Silicon/Hisilicon/Hi1620/Library/PlatformSysCtrlLibHi1620/PlatformSysCtrlLibHi1620.lib
 and 
b/Silicon/Hisilicon/Hi1620/Library/PlatformSysCtrlLibHi1620/PlatformSysCtrlLibHi1620.lib
 differ
-- 
2.9.5

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[edk2] [PATCH edk2-non-osi v3 2/8] Hisilicon/D06: Remove PCI enumeration dependency from SAS driver

2019-03-20 Thread Ming Huang

SAS controller is always existed, so accessing SAS register don't
depend on PciBusDxe (pci enumeration). Modify SAS driver remove the
dependence on pci enumeration.
This patch is done to improve boot times.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Platform/Hisilicon/D06/Drivers/Sas/SasDriverDxe.depex | Bin 216 -> 36 bytes
 Platform/Hisilicon/D06/Drivers/Sas/SasDriverDxe.efi   | Bin 221312 -> 220640 
bytes
 2 files changed, 0 insertions(+), 0 deletions(-)

diff --git a/Platform/Hisilicon/D06/Drivers/Sas/SasDriverDxe.depex 
b/Platform/Hisilicon/D06/Drivers/Sas/SasDriverDxe.depex
index 1a5bc1e..e076777 100644
Binary files a/Platform/Hisilicon/D06/Drivers/Sas/SasDriverDxe.depex and 
b/Platform/Hisilicon/D06/Drivers/Sas/SasDriverDxe.depex differ
diff --git a/Platform/Hisilicon/D06/Drivers/Sas/SasDriverDxe.efi 
b/Platform/Hisilicon/D06/Drivers/Sas/SasDriverDxe.efi
index ac6bae7..4a29e8c 100644
Binary files a/Platform/Hisilicon/D06/Drivers/Sas/SasDriverDxe.efi and 
b/Platform/Hisilicon/D06/Drivers/Sas/SasDriverDxe.efi differ
-- 
2.9.5

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[edk2] [PATCH edk2-non-osi v3 0/8] Upload D0x binary modules

2019-03-20 Thread Ming Huang

Main Changes since v2 :
1 Move "Add some header files" patch to the first of this series;

Code can also be found in github:
https://github.com/hisilicon/OpenPlatformPkg.git
branch: 1902-non-osi-v3


Ming Huang (8):
  Hisilicon/D0x: Add some header files
  Hisilicon/D06: Remove PCI enumeration dependency from SAS driver
  Hisilicon/D0x: Update PlatformSysCtrlLib binary
  Hisilicon/D06: Update Mbigen and gic RAS register
  Hisilicon/D06: Support PCIe local RAS
  Hisilicon/D06: Use new flash layout
  Hisilicon/D06: Fix numa node wrong issue
  Hisilicon/D06: Add Setup Item "Support DPC"

 Silicon/Hisilicon/Include/Library/IpmiCmdLib.h 
| 110 +++
 Silicon/Hisilicon/Include/Library/LpcLib.h 
| 113 
 Silicon/Hisilicon/Include/Library/OemAddressMapLib.h   
|  45 
 Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h 
| 112 +++
 Silicon/Hisilicon/Include/Library/SerdesLib.h  
|  21 
 Platform/Hisilicon/D06/CustomData.Fv   
| Bin 0 -> 65536 bytes
 Platform/Hisilicon/D06/Drivers/IoInitDxe/IoInitDxe.efi 
| Bin 232832 -> 226784 bytes
 Platform/Hisilicon/D06/Drivers/PcieRasInitDxe/PcieRasInitDxe.efi   
| Bin 21248 -> 22048 bytes
 Platform/Hisilicon/D06/Drivers/RasInitDxe/RasInitDxe.efi   
| Bin 17984 -> 18720 bytes
 Platform/Hisilicon/D06/Drivers/Sas/SasDriverDxe.depex  
| Bin 216 -> 36 bytes
 Platform/Hisilicon/D06/Drivers/Sas/SasDriverDxe.efi
| Bin 221312 -> 220640 bytes
 Platform/Hisilicon/D06/Library/OemAddressMapD06/OemAddressMapD06.lib   
| Bin 61892 -> 31696 bytes
 Platform/Hisilicon/D06/MemoryInitPei/MemoryInit.efi
| Bin 297696 -> 358656 bytes
 Platform/Hisilicon/D06/Sec/FVMAIN_SEC.Fv   
| Bin 1048576 -> 1048576 bytes
 Platform/Hisilicon/D06/bl1.bin 
| Bin 12432 -> 12432 bytes
 Platform/Hisilicon/D06/fip.bin 
| Bin 113450 -> 121866 bytes
 
Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.lib
 | Bin 297590 -> 229128 bytes
 
Silicon/Hisilicon/Hi1616/Library/PlatformSysCtrlLibHi1616/PlatformSysCtrlLibHi1616.lib
 | Bin 344310 -> 275312 bytes
 
Silicon/Hisilicon/Hi1620/Library/PlatformSysCtrlLibHi1620/PlatformSysCtrlLibHi1620.lib
 | Bin 356032 -> 375916 bytes
 19 files changed, 401 insertions(+)
 create mode 100644 Silicon/Hisilicon/Include/Library/IpmiCmdLib.h
 create mode 100755 Silicon/Hisilicon/Include/Library/LpcLib.h
 create mode 100644 Silicon/Hisilicon/Include/Library/OemAddressMapLib.h
 create mode 100644 Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h
 create mode 100644 Silicon/Hisilicon/Include/Library/SerdesLib.h
 create mode 100644 Platform/Hisilicon/D06/CustomData.Fv

-- 
2.9.5

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[edk2] [PATCH edk2-platforms v3 18/18] Hisilicon/D0x: Modify version to 19.02

2019-03-20 Thread Ming Huang

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
Reviewed-by: Leif Lindholm 
---
 Platform/Hisilicon/D03/D03.dsc | 4 ++--
 Platform/Hisilicon/D05/D05.dsc | 4 ++--
 Platform/Hisilicon/D06/D06.dsc | 4 ++--
 3 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
index 35b54f8c83be..07ff461277df 100644
--- a/Platform/Hisilicon/D03/D03.dsc
+++ b/Platform/Hisilicon/D03/D03.dsc
@@ -171,12 +171,12 @@ [PcdsFixedAtBuild.common]
   !ifdef $(FIRMWARE_VER)
 gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"$(FIRMWARE_VER)"
   !else
-gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Development 
build 18.08 for Hisilicon D03"
+gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Development 
build 19.02 for Hisilicon D03"
   !endif
 
   gHisiTokenSpaceGuid.PcdBiosVersionString|L"10.01.01T18"
 
-  gHisiTokenSpaceGuid.PcdBiosVersionForBmc|L"1.12"
+  gHisiTokenSpaceGuid.PcdBiosVersionForBmc|L"19.02"
 
   gHisiTokenSpaceGuid.PcdSystemProductName|L"D03"
   gHisiTokenSpaceGuid.PcdSystemVersion|L"Estuary"
diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
index 49bd5b37ea34..70b044c7e33a 100644
--- a/Platform/Hisilicon/D05/D05.dsc
+++ b/Platform/Hisilicon/D05/D05.dsc
@@ -187,12 +187,12 @@ [PcdsFixedAtBuild.common]
   !ifdef $(FIRMWARE_VER)
 gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"$(FIRMWARE_VER)"
   !else
-gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Development 
build 18.08 for Hisilicon D05"
+gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Development 
build 19.02 for Hisilicon D05"
   !endif
 
   gHisiTokenSpaceGuid.PcdBiosVersionString|L"10.01.01T18"
 
-  gHisiTokenSpaceGuid.PcdBiosVersionForBmc|L"1.12"
+  gHisiTokenSpaceGuid.PcdBiosVersionForBmc|L"19.02"
 
   gHisiTokenSpaceGuid.PcdSystemProductName|L"D05"
   gHisiTokenSpaceGuid.PcdSystemVersion|L"Estuary"
diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc
index a3a01bfb1e23..73bea728b0f6 100644
--- a/Platform/Hisilicon/D06/D06.dsc
+++ b/Platform/Hisilicon/D06/D06.dsc
@@ -156,12 +156,12 @@ [PcdsFixedAtBuild.common]
   !ifdef $(FIRMWARE_VER)
 gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"$(FIRMWARE_VER)"
   !else
-gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Development 
build 18.08 for Hisilicon D06"
+gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Development 
build 19.02 for Hisilicon D06"
   !endif
 
   gHisiTokenSpaceGuid.PcdBiosVersionString|L"10.01.01T18"
 
-  gHisiTokenSpaceGuid.PcdBiosVersionForBmc|L"0.42"
+  gHisiTokenSpaceGuid.PcdBiosVersionForBmc|L"19.02"
 
   gHisiTokenSpaceGuid.PcdSystemProductName|L"D06"
   gHisiTokenSpaceGuid.PcdSystemVersion|L"VER.A"
-- 
2.9.5

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[edk2] [PATCH edk2-platforms v3 17/18] Hisilicon/D06: Fix USB crash issue(4079)

2019-03-20 Thread Ming Huang

Last patch "Modify IORT" change revision id of node type 2 to 1,
and 4.19 later kernel will judge the revision id to get root pci
bridge DMA informations from IORT. As Hi1620 USB 2.0 don't support
64 bit DMA, but the DMA attribute get from IORT node type 2 is 64
bit. So add _DMA method in USB pci bridge 3 and pci bridge 8 to
fix usb crash when usb device is present issue.

https://bugs.linaro.org/show_bug.cgi?id=4079

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl | 46 

 1 file changed, 46 insertions(+)

diff --git a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl 
b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl
index 6dc380f27fa2..c1083dc16a2a 100644
--- a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl
+++ b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl
@@ -375,6 +375,29 @@ Device (PCI2)
 
   PCI_OSC_SUPPORT ()
 
+  Method(_DMA, 0, Serialized)
+  {
+Return (ResourceTemplate()
+{
+  QWORDMemory(
+  ResourceConsumer,
+  PosDecode,  // _DEC
+  MinFixed,   // _MIF
+  MaxFixed,   // _MAF
+  Prefetchable,   // _MEM
+  ReadWrite,  // _RW
+  0,  // _GRA
+  0x, // _MIN
+  0x, // _MAX
+  0x,// _TRA
+  0x1, // _LEN
+  ,
+  ,
+  ,
+  )
+})
+  }
+
   Method (_STA, 0x0, NotSerialized)
   {
 Return (0xf)
@@ -1077,6 +1100,29 @@ Device (PCI8)
 Return (0xf)
   }
 
+  Method(_DMA, 0, Serialized)
+  {
+Return (ResourceTemplate()
+{
+  QWORDMemory(
+  ResourceConsumer,
+  PosDecode,  // _DEC
+  MinFixed,   // _MIF
+  MaxFixed,   // _MAF
+  Prefetchable,   // _MEM
+  ReadWrite,  // _RW
+  0,  // _GRA
+  0x, // _MIN
+  0x, // _MAX
+  0x,// _TRA
+  0x1, // _LEN
+  ,
+  ,
+  ,
+  )
+})
+  }
+
   Method (_PXM, 0, NotSerialized)
   {
 Return(0x02)
-- 
2.9.5

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[edk2] [PATCH edk2-platforms v3 12/18] Hisilicon/D06: Modify for IMP self-Adapte support

2019-03-20 Thread Ming Huang

As new IMP(Cortex-M7) firmware support self-adapte, so do not
need BIOS to implement some function, remove useless funtions
and report CPU0/CPU1 Nic NCL offset to IMP.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c | 281 
 1 file changed, 54 insertions(+), 227 deletions(-)

diff --git a/Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c 
b/Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c
index aaf990216982..678c2107bdd3 100644
--- a/Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c
+++ b/Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c
@@ -21,44 +21,21 @@
 #include 
 
 #define CPU2_SFP2_100G_CARD_OFFSET   0x25
-#define CPU1_SFP1_LOCATE_OFFSET  0x16
-#define CPU1_SFP0_LOCATE_OFFSET  0x12
-#define CPU2_SFP1_LOCATE_OFFSET  0x21
-#define CPU2_SFP0_LOCATE_OFFSET  0x19
-#define CPU2_SFP2_10G_GE_CARD_OFFSET 0x25
 
-#define SFP_10G_SPEED   10
-#define SFP_25G_SPEED   25
-#define SFP_100G_SPEED  100
-#define SFP_GE_SPEED1
-
-#define SFP_GE_SPEED_VAL_VENDOR_FINISAR 0x0C
-#define SFP_GE_SPEED_VAL0x0D
-#define SFP_10G_SPEED_VAL   0x67
-#define SFP_25G_SPEED_VAL   0xFF
+#define SOCKET1_NET_PORT_100G 1
+#define SOCKET0_NET_PORT_NUM  4
+#define SOCKET1_NET_PORT_NUM  2
 
 #define CARD_PRESENT_100G   (BIT7)
-#define CARD_PRESENT_10G(BIT0)
-#define SELECT_SFP_BY_INDEX(index)  (1 << (index - 1))
-#define SPF_SPEED_OFFSET12
-
-#define SFP_DEVICE_ADDRESS 0x50
-#define CPU1_9545_I2C_ADDR 0x70
-#define CPU2_9545_I2C_ADDR 0x71
-
-#define FIBER_PRESENT 0
-#define CARD_PRESENT  1
-#define I2C_PORT_SFP  4
-#define CPU2_I2C_PORT_SFP 5
-
-#define SOCKET_0 0
-#define SOCKET_1 1
 #define EEPROM_I2C_PORT  4
 #define EEPROM_PAGE_SIZE 0x40
 #define MAC_ADDR_LEN 6
 #define I2C_OFFSET_EEPROM_ETH0   (0xc00)
 #define I2C_SLAVEADDR_EEPROM (0x52)
 
+#define SRAM_NIC_NCL1_OFFSET_ADDRESS   0xA0E87FE0
+#define SRAM_NIC_NCL2_OFFSET_ADDRESS   0xA0E87FE4
+
 #pragma pack(1)
 typedef struct {
   UINT16 Crc16;
@@ -114,204 +91,6 @@ UINT16 CrcTable16[256] = {
   0x6E17, 0x7E36, 0x4E55, 0x5E74, 0x2E93, 0x3EB2, 0x0ED1, 0x1EF0,
 };
 
-EFI_STATUS
-GetSfpSpeed (
-  UINT16 Socket,
-  UINT16 SfpNum,
-  UINT8* FiberSpeed
-  )
-{
-  EFI_STATUS  Status;
-  I2C_DEVICE  SpdDev;
-  UINT8   SfpSelect;
-  UINT8   SfpSpeed;
-  UINT32  RegAddr;
-  UINT16  I2cAddr;
-  UINT32  SfpPort;
-
-  SfpSpeed = 0x0;
-  if (Socket == SOCKET_1) {
-I2cAddr = CPU2_9545_I2C_ADDR;
-SfpPort = CPU2_I2C_PORT_SFP;
-  } else {
-I2cAddr = CPU1_9545_I2C_ADDR;
-SfpPort = I2C_PORT_SFP;
-  }
-
-  Status = I2CInit (Socket, SfpPort, Normal);
-  if (EFI_ERROR (Status)) {
-DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Socket%d Call I2CInit failed! p1=0x%x.\n",
-__FUNCTION__, __LINE__, Socket, Status));
-return Status;
-  }
-
-  SpdDev.Socket = Socket;
-  SpdDev.DeviceType = DEVICE_TYPE_SPD;
-  SpdDev.Port = SfpPort;
-  SpdDev.SlaveDeviceAddress = I2cAddr;
-  RegAddr = 0x0;
-  SfpSelect = SELECT_SFP_BY_INDEX (SfpNum);
-
-  Status = I2CWrite (, RegAddr, 1, );
-  if (EFI_ERROR (Status)) {
-DEBUG ((DEBUG_ERROR, "I2CWrite Error =%r.\n", Status));
-return Status;
-  }
-
-  SpdDev.Socket = Socket;
-  SpdDev.DeviceType = DEVICE_TYPE_SPD;
-  SpdDev.Port = SfpPort;
-  SpdDev.SlaveDeviceAddress = SFP_DEVICE_ADDRESS;
-
-  RegAddr = SPF_SPEED_OFFSET;
-  Status = I2CRead (, RegAddr, 1, );
-  if (EFI_ERROR (Status)) {
-DEBUG ((DEBUG_ERROR, "I2CRead Error =%r.\n", Status));
-return Status;
-  }
-
-  DEBUG ((DEBUG_INFO, "BR, Nominal, Nominal signalling rate, SfpSpeed:
0x%x\n",
- SfpSpeed));
-
-  if (SfpSpeed == SFP_10G_SPEED_VAL) {
-*FiberSpeed = SFP_10G_SPEED;
-  } else if (SfpSpeed == SFP_25G_SPEED_VAL) {
-*FiberSpeed = SFP_25G_SPEED;
-  } else if ((SfpSpeed == SFP_GE_SPEED_VAL) ||
- (SfpSpeed == SFP_GE_SPEED_VAL_VENDOR_FINISAR)) {
-*FiberSpeed = SFP_GE_SPEED;
-  }
-
-  return EFI_SUCCESS;
-}
-
-//Fiber1Type/Fiber2Type/Fiber3Type return: SFP_10G_SPEED, SFP_100G_SPEED, 
SFP_GE_SPEED
-UINT32
-GetCpu2FiberType (
-  UINT8* Fiber1Type,
-  UINT8* Fiber2Type,
-  UINT8* Fiber100Ge
-  )
-{
-  EFI_STATUS  Status;
-  UINT16  SfpNum1;
-  UINT8   SfpSpeed1;
-  UINT16  SfpNum2;
-  UINT8   SfpSpeed2;
-
-  SfpNum1 = 0x1;
-  SfpSpeed1 = SFP_10G_SPEED;
-  SfpNum2 = 0x2;
-  SfpSpeed2 = SFP_10G_SPEED;
-  *Fiber100Ge = 0x0;
-  *Fiber1Type = SFP_10G_SPEED;
-  *Fiber2Type = SFP_10G_SPEED;
-
-  if ((ReadCpldReg (CPU2_SFP2_100G_CARD_OFFSET) & CARD_PRESENT_100G) != 0) {
-// 100 Ge card
-*Fiber1Type = SFP_10G_SPEED;
-*Fiber2Type = SFP_10G_SPEED;
-*Fiber100Ge = SFP_100G_SPEED;
-DEBUG ((DEBUG_ERROR,"Detect Fiber SFP_100G

[edk2] [PATCH edk2-platforms v3 16/18] Hisilicon/D0x: Remove SP805 watchdog pcd

2019-03-20 Thread Ming Huang

SP805 watchdog is no used for D0x, so remove it.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
Reviewed-by: Leif Lindholm 
---
 Platform/Hisilicon/D03/D03.dsc   | 3 ---
 Platform/Hisilicon/D05/D05.dsc   | 3 ---
 Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLib.inf | 1 -
 3 files changed, 7 deletions(-)

diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
index fe443dd929ad..35b54f8c83be 100644
--- a/Platform/Hisilicon/D03/D03.dsc
+++ b/Platform/Hisilicon/D03/D03.dsc
@@ -149,9 +149,6 @@ [PcdsFixedAtBuild.common]
 
   gHisiTokenSpaceGuid.PcdPcieRootBridgeMask|0x7 # 
bit0:HB0RB0,bit1:HB0RB1,bit2:HB0RB2,bit3:HB0RB3,bit4:HB1RB0,bit5:HB1RB1,bit6:HB1RB2,bit7:HB1RB3
 
-  ## SP805 Watchdog - Motherboard Watchdog
-  gArmPlatformTokenSpaceGuid.PcdSP805WatchdogBase|0x601e
-
   ## Serial Terminal
   gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x2F8
   gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200
diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
index 0c4f21fbe056..49bd5b37ea34 100644
--- a/Platform/Hisilicon/D05/D05.dsc
+++ b/Platform/Hisilicon/D05/D05.dsc
@@ -163,9 +163,6 @@ [PcdsFixedAtBuild.common]
   gHisiTokenSpaceGuid.PcdPcieRootBridgeMask2P|0x34F4 # 
bit0:HB0RB0,bit1:HB0RB1,bit2:HB0RB2,bit3:HB0RB3,bit4:HB0RB4,bit5:HB0RB5,bit6:HB0RB6,bit7:HB0RB7
 # 
bit8:HB1RB0,bit9:HB1RB1,bit10:HB1RB2,bit11:HB1RB3,bit12:HB1RB4,bit13:HB1RB5,bit14:HB1RB6,bit14:HB1RB15
 
-  ## SP805 Watchdog - Motherboard Watchdog
-  gArmPlatformTokenSpaceGuid.PcdSP805WatchdogBase|0x601e
-
   ## Serial Terminal
   gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x602B
   gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200
diff --git 
a/Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLib.inf 
b/Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLib.inf
index 3563df6e10d1..4ce5f5fea1f3 100644
--- a/Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLib.inf
+++ b/Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLib.inf
@@ -61,5 +61,4 @@ [FixedPcd]
   gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
   gHisiTokenSpaceGuid.PcdSysControlBaseAddress
   gHisiTokenSpaceGuid.PcdPeriSubctrlAddress
-  gArmPlatformTokenSpaceGuid.PcdSP805WatchdogBase
 
-- 
2.9.5

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[edk2] [PATCH edk2-platforms v3 13/18] Hisilicon/D06: Add Setup Item "Support DPC" and delete some PCIe menus

2019-03-20 Thread Ming Huang

Add setup item "Support DPC" to enable or disable PCIe DPC
(Downstream Port Containment).

The pcie menu is suppressed for original code as these menus
are not ready. This patch remove the suppression for pcie menu,
so delete these menus for now.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Silicon/Hisilicon/Include/Library/OemConfigData.h   |   1 +
 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr  |   2 -
 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c   |   4 +
 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr| 197 
+---
 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfigStrings.uni |   3 +-
 5 files changed, 10 insertions(+), 197 deletions(-)

diff --git a/Silicon/Hisilicon/Include/Library/OemConfigData.h 
b/Silicon/Hisilicon/Include/Library/OemConfigData.h
index f120e3123c83..c0097d0829f0 100644
--- a/Silicon/Hisilicon/Include/Library/OemConfigData.h
+++ b/Silicon/Hisilicon/Include/Library/OemConfigData.h
@@ -49,6 +49,7 @@ typedef struct {
   UINT8 OSWdtAction;
   /*PCIe Config*/
   UINT8 PcieSRIOVSupport;
+  UINT8 PcieDPCSupport;
   UINT8 PciePort[PCIE_MAX_TOTAL_PORTS];
   UINT8 PcieLinkSpeedPort[PCIE_MAX_TOTAL_PORTS];
   UINT8 PcieLinkDeEmphasisPort[PCIE_MAX_TOTAL_PORTS];
diff --git a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr 
b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr
index 08236704fbfe..93ccb99bdc67 100644
--- a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr
+++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr
@@ -62,11 +62,9 @@ formset
   prompt = STRING_TOKEN(STR_IBMC_CONFIG_FORM_TITLE),
   help   = STRING_TOKEN(STR_IBMC_CONFIG_FORM_HELP);
 
-suppressif TRUE;
 goto PCIE_CONFIG_FORM_ID,
   prompt  = STRING_TOKEN(STR_PCIE_CONFIG_FORM_TITLE),
   help= STRING_TOKEN(STR_PCIE_CONFIG_FORM_HELP);
-endif;
 
 goto MISC_CONFIG_FORM_ID,
   prompt  = STRING_TOKEN(STR_MISC_CONFIG_FORM_TITLE),
diff --git a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c 
b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c
index 6668103af027..be4ce8820f73 100644
--- a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c
+++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c
@@ -290,6 +290,10 @@ OemConfigUiLibConstructor (
   Configuration.OSWdtTimeout = 5;
   Configuration.OSWdtAction = 1;
   //
+  //Set the default value of the PCIe option
+  //
+  Configuration.PcieDPCSupport = 0;
+  //
   //Set the default value of the Misc option
   //
   Configuration.EnableSmmu = 1;
diff --git a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr 
b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr
index 7cf7cdd29ba2..c65907fe846e 100644
--- a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr
+++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr
@@ -17,203 +17,12 @@
 form formid = PCIE_CONFIG_FORM_ID,
   title   = STRING_TOKEN (STR_PCIE_CONFIG_FORM_TITLE);
 
-  goto VFR_FORMID_PCIE_SOCKET0,
-prompt  = STRING_TOKEN (STR_PCIE_CPU_0_PROMPT),
-help= STRING_TOKEN (STR_PCIE_CPU_PROMPT_HELP);
-
-  goto VFR_FORMID_PCIE_SOCKET1,
-prompt  = STRING_TOKEN (STR_PCIE_CPU_1_PROMPT),
-help= STRING_TOKEN (STR_PCIE_CPU_PROMPT_HELP);
-
-  oneof varid  = OEM_CONFIG_DATA.PcieSRIOVSupport,
-prompt   = STRING_TOKEN (STR_SRIOV_SUPPORT_PROMPT),
-help = STRING_TOKEN (STR_SRIOV_SUPPORT_HELP),
+  oneof varid  = OEM_CONFIG_DATA.PcieDPCSupport,
+prompt   = STRING_TOKEN (STR_DPC_SUPPORT_PROMPT),
+help = STRING_TOKEN (STR_DPC_SUPPORT_HELP),
 option text = STRING_TOKEN (STR_DISABLE), value = 0, flags = 
MANUFACTURING | DEFAULT | RESET_REQUIRED;
 option text = STRING_TOKEN (STR_ENABLE),  value = 1, flags = 
RESET_REQUIRED;
   endoneof;
 
 endform;
 
-form formid = VFR_FORMID_PCIE_SOCKET0,
-  title = STRING_TOKEN(STR_PCIE_CPU_0_PROMPT);
-
-  goto VFR_FORMID_PCIE_PORT2,
-prompt  = STRING_TOKEN(STR_PCIE_PORT_2_PROMPT),
-help= STRING_TOKEN(STR_PCIE_PORT_PROMPT_HELP);
-
-  goto VFR_FORMID_PCIE_PORT4,
-prompt  = STRING_TOKEN(STR_PCIE_PORT_4_PROMPT),
-help= STRING_TOKEN(STR_PCIE_PORT_PROMPT_HELP);
-
-  goto VFR_FORMID_PCIE_PORT5,
-prompt  = STRING_TOKEN(STR_PCIE_PORT_5_PROMPT),
-help= STRING_TOKEN(STR_PCIE_PORT_PROMPT_HELP);
-
-  goto VFR_FORMID_PCIE_PORT6,
-prompt  = STRING_TOKEN(STR_PCIE_PORT_6_PROMPT),
-help= STRING_TOKEN(STR_PCIE_PORT_PROMPT_HELP);
-
-  goto VFR_FORMID_PCIE_PORT7,
-prompt  = STRING_TOKEN(STR_PCIE_PORT_7_PROMPT),
-help= STRING_TOKEN(STR_PCIE_PORT_PROMPT_HELP);
-
-endform;
-
-form formid = VFR_FORMID_PCIE_SOCKET1,
-  title = STRING_TOKEN(STR_PCIE_CPU_1_PROMPT);
-  goto VFR_FORMID_PCIE_PORT10,
-

[edk2] [PATCH edk2-platforms v3 11/18] Hisilicon/D06: Add PCI_OSC_SUPPORT

2019-03-20 Thread Ming Huang

Add PCI_OSC_SUPPORT for remaining host bridges to remove fail
output in kernel:
[  103.478893] acpi PNP0A08:01: _OSC failed (AE_NOT_FOUND);

Add PCI_OSC_SUPPORT_HOTPLUG to rewrite _OSC of PCI0 and PCI6.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl | 200 
+++-
 1 file changed, 106 insertions(+), 94 deletions(-)

diff --git a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl 
b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl
index 4d9d9d95be68..6dc380f27fa2 100644
--- a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl
+++ b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl
@@ -17,6 +17,90 @@
 **/
 
 //#include "ArmPlatform.h"
+
+/*
+  See ACPI 6.1 Spec, 6.2.11, PCI Firmware Spec 3.0, 4.5
+*/
+#define PCI_OSC_SUPPORT() \
+  Name(SUPP, Zero) /* PCI _OSC Support Field value */ \
+  Name(CTRL, Zero) /* PCI _OSC Control Field value */ \
+  Method(_OSC,4) { \
+If(LEqual(Arg0,ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))) { \
+  /* Create DWord-adressable fields from the Capabilities Buffer */ \
+  CreateDWordField(Arg3,0,CDW1) \
+  CreateDWordField(Arg3,4,CDW2) \
+  CreateDWordField(Arg3,8,CDW3) \
+  /* Save Capabilities DWord2 & 3 */ \
+  Store(CDW2,SUPP) \
+  Store(CDW3,CTRL) \
+  /* Only allow native hot plug control if OS supports: */ \
+  /* ASPM */ \
+  /* Clock PM */ \
+  /* MSI/MSI-X */ \
+  If(LNotEqual(And(SUPP, 0x16), 0x16)) { \
+And(CTRL,0x1E,CTRL) \
+  }\
+  \
+  /* Do not allow native PME, AER */ \
+  /* Never allow SHPC (no SHPC controller in this system)*/ \
+  And(CTRL,0x10,CTRL) \
+  If(LNotEqual(Arg1,One)) { /* Unknown revision */ \
+Or(CDW1,0x08,CDW1) \
+  } \
+  \
+  If(LNotEqual(CDW3,CTRL)) { /* Capabilities bits were masked */ \
+Or(CDW1,0x10,CDW1) \
+  } \
+  \
+  /* Update DWORD3 in the buffer */ \
+  Store(CTRL,CDW3) \
+  Return(Arg3) \
+} Else { \
+  Or(CDW1,4,CDW1) /* Unrecognized UUID */ \
+  Return(Arg3) \
+} \
+  } // End _OSC
+
+#define PCI_OSC_SUPPORT_HOTPLUG() \
+  Name(SUPP, Zero) /* PCI _OSC Support Field value */ \
+  Name(CTRL, Zero) /* PCI _OSC Control Field value */ \
+  Method(_OSC,4) { \
+If(LEqual(Arg0,ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))) { \
+  /* Create DWord-adressable fields from the Capabilities Buffer */ \
+  CreateDWordField(Arg3,0,CDW1) \
+  CreateDWordField(Arg3,4,CDW2) \
+  CreateDWordField(Arg3,8,CDW3) \
+  /* Save Capabilities DWord2 & 3 */ \
+  Store(CDW2,SUPP) \
+  Store(CDW3,CTRL) \
+  /* Only allow native hot plug control if OS supports: */ \
+  /* ASPM */ \
+  /* Clock PM */ \
+  /* MSI/MSI-X */ \
+  If(LNotEqual(And(SUPP, 0x16), 0x16)) { \
+And(CTRL,0x1E,CTRL) \
+  }\
+  \
+  /* Always allow native PME, AER (no dependencies) */ \
+  /* Never allow SHPC (no SHPC controller in this system)*/ \
+  And(CTRL,0x1D,CTRL) \
+  If(LNotEqual(Arg1,One)) { /* Unknown revision */ \
+Or(CDW1,0x08,CDW1) \
+  } \
+  \
+  If(LNotEqual(CDW3,CTRL)) { /* Capabilities bits were masked */ \
+Or(CDW1,0x10,CDW1) \
+  } \
+  \
+  /* Update DWORD3 in the buffer */ \
+  Store(CTRL,CDW3) \
+  Return(Arg3) \
+} Else { \
+  Or(CDW1,4,CDW1) /* Unrecognized UUID */ \
+  Return(Arg3) \
+} \
+  } // End _OSC
+
 Scope(_SB)
 {
   Device (PCI0)
@@ -139,53 +223,7 @@ Scope(_SB)
   Return (RBUF)
 }// Method(_CRS), this method 
return RBUF!
 
-  //
-  // OS Control Handoff
-  //
-  Name(SUPP, Zero) // PCI _OSC Support Field value
-  Name(CTRL, Zero) // PCI _OSC Control Field value
-
-  Method(_OSC,4) {
-// Check for proper UUID
-If(LEqual(Arg0,ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))) {
-  // Create DWord-adressable fields from the Capabilities Buffer
-  CreateDWordField(Arg3,0,CDW1)
-  CreateDWordField(Arg3,4,CDW2)
-  CreateDWordField(Arg3,8,CDW3)
-
-  // Save Capabilities DWord2 & 3
-  Store(CDW2,SUPP)
-  Store(CDW3,CTRL)
-
-  // Only allow native hot plug control if OS supports:
-  //  ASPM
-  //  Clock PM
-  //  MSI/MSI-X
-  If(LNotEqual(And(SUPP, 0x16), 0x16)) {
-And(CTRL,0x1E,CTRL) // Mask bit 0 (and undefined bits)
-  }
-
-  // Always allow native PME, AER (no dependencies)
-
-  // Never allow SHPC (no SHPC controller in this system)
-  And(CTRL,0x1D,CTRL)
-
-  If(LNotEqual(Arg1,One)) {  // Unknown revision
-Or(CDW1,0x08,CDW1)
-  }
-
-  If(LNotEqual(CDW3,CTRL)) {  // Capabilities bits were masked
-Or(CDW1,0x10,CDW1)
-  }
-
-  // Update DWORD3 in the buffer
-  Store(CTRL,CDW3)
-

[edk2] [PATCH edk2-platforms v3 10/18] Hisilicon/D06: Use HCCS speed with 2.6G

2019-03-20 Thread Ming Huang

Follow chip team suggestion, HCCS(Huawei Cache-Coherent System)
may be unstable while speed is 3.0G, so use 2.6G to avoid some
unstable stress issue.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c 
b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c
index c8f71ecf890a..758157525f40 100644
--- a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c
+++ b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c
@@ -222,3 +222,11 @@ UINTN OemGetCpuFreq (UINT8 Socket)
   }
 }
 
+UINTN
+OemGetHccsFreq (
+  VOID
+  )
+{
+  return HCCS_PLL_VALUE_2600;
+}
+
-- 
2.9.5

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[edk2] [PATCH edk2-platforms v3 14/18] Hisilicon/D06: Use new flash layout

2019-03-20 Thread Ming Huang

In new flash layout, BIOS fd change from offset 1M to 8M in 16M
spi flash.

Use the new CustomData.Fv which indicate the offset of fd and
which flash area can be updated for BMC.

This patch is relative with patch "Use new flash layout" in
edk2-non-osi.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Platform/Hisilicon/D06/D06.fdf | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Platform/Hisilicon/D06/D06.fdf b/Platform/Hisilicon/D06/D06.fdf
index d495ad7f264c..f72b513352fb 100644
--- a/Platform/Hisilicon/D06/D06.fdf
+++ b/Platform/Hisilicon/D06/D06.fdf
@@ -29,7 +29,7 @@ [DEFINES]
 

 [FD.D06]
 
-BaseAddress   = 0x20410|gArmTokenSpaceGuid.PcdFdBaseAddress  # The base 
address of the Firmware in NOR Flash.
+BaseAddress   = 0x20480|gArmTokenSpaceGuid.PcdFdBaseAddress  # The base 
address of the Firmware in NOR Flash.
 
 Size  = 0x0040|gArmTokenSpaceGuid.PcdFdSize # The size in 
bytes of the FLASH Device
 ErasePolarity = 1
@@ -124,7 +124,7 @@ [FD.D06]
 0x003E|0x0001
 
 0x003F|0x0001
-FILE = Platform/Hisilicon/D0x-CustomData.Fv
+FILE = Platform/Hisilicon/D06/CustomData.Fv
 
 

 #
-- 
2.9.5

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[edk2] [PATCH edk2-platforms v3 09/18] Hisilicon/D0x: Rename StartupAp() function

2019-03-20 Thread Ming Huang

As suggestion of community, 'AP' is a bit unfortunate to use in EDK2
context. PI specifies 'BSP' for Boot-strap Processor, as the one
executing all of the EDK2 code. It then uses 'AP' to refer to
Additional Processors, which can be assigned tasks using the
EFI_MP_SERVICES_PROTOCOL. In a TianoCore context, this should be 'BSP'.
So, Rename StartupAp() to StartUpBSP.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
Reviewed-by: Leif Lindholm 
---
 Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.c  | 2 +-
 Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.c | 2 +-
 Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.c  | 2 +-
 Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.c | 3 ++-
 Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.c  | 2 +-
 5 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.c 
b/Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.c
index 97cf6b8d8757..dacd9e871faf 100644
--- a/Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.c
+++ b/Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.c
@@ -83,7 +83,7 @@ void QResetAp(VOID)
 //SCCL A
 if (!PcdGet64 (PcdTrustedFirmwareEnable))
 {
-StartupAp();
+StartUpBSP ();
 }
 }
 
diff --git a/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.c 
b/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.c
index b57fdfa68e45..c8a9da73bbca 100644
--- a/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.c
+++ b/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.c
@@ -133,7 +133,7 @@ VOID CoreSelectBoot(VOID)
 {
 if (!PcdGet64 (PcdTrustedFirmwareEnable))
 {
-StartupAp ();
+StartUpBSP ();
 }
 
 return;
diff --git a/Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.c 
b/Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.c
index 76a055cbe980..b374347e5c4d 100644
--- a/Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.c
+++ b/Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.c
@@ -35,7 +35,7 @@ QResetAp (
   (VOID)WriteBackInvalidateDataCacheRange((VOID *) 
FixedPcdGet64(PcdMailBoxAddress), 8);
 
   if (!PcdGet64 (PcdTrustedFirmwareEnable)) {
-StartupAp();
+StartUpBSP ();
   }
 }
 
diff --git a/Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.c 
b/Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.c
index 4c4c944dbead..a1458da7f0a3 100644
--- a/Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.c
+++ b/Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.c
@@ -96,7 +96,7 @@ UINTN OemGetDimmSlot(UINTN Socket, UINTN Channel)
 VOID CoreSelectBoot(VOID)
 {
   if (!PcdGet64 (PcdTrustedFirmwareEnable)) {
-  StartupAp ();
+  StartUpBSP ();
   }
 
   return;
@@ -128,3 +128,4 @@ BOOLEAN OemIsNeedDisableExpanderBuffer(VOID)
 {
   return TRUE;
 }
+
diff --git a/Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.c 
b/Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.c
index 0790f7941ae7..a8261d370626 100644
--- a/Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.c
+++ b/Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.c
@@ -78,7 +78,7 @@ QResetAp (
 
   //SCCL A
   if (!PcdGet64 (PcdTrustedFirmwareEnable)) {
-StartupAp ();
+StartUpBSP ();
   }
 }
 
-- 
2.9.5

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[edk2] [PATCH edk2-platforms v3 15/18] Hisilicon/D06: Remove SECURE_BOOT_ENABLE definition

2019-03-20 Thread Ming Huang

As secure boot is not ready, remove SECURE_BOOT_ENABLE and
relative code.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
Reviewed-by: Leif Lindholm 
---
 Platform/Hisilicon/D06/D06.dsc | 12 
 Platform/Hisilicon/D06/D06.fdf | 11 ---
 2 files changed, 23 deletions(-)

diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc
index 6d581337f199..a3a01bfb1e23 100644
--- a/Platform/Hisilicon/D06/D06.dsc
+++ b/Platform/Hisilicon/D06/D06.dsc
@@ -30,7 +30,6 @@ [Defines]
   FLASH_DEFINITION   = 
Platform/Hisilicon/$(PLATFORM_NAME)/$(PLATFORM_NAME).fdf
   DEFINE NETWORK_IP6_ENABLE  = FALSE
   DEFINE HTTP_BOOT_ENABLE= FALSE
-  DEFINE SECURE_BOOT_ENABLE  = FALSE
 
 !include Silicon/Hisilicon/Hisilicon.dsc.inc
 
@@ -87,9 +86,6 @@ [LibraryClasses.common]
   LpcLib|Silicon/Hisilicon/Hi1620/Library/LpcLibHi1620/LpcLib.inf
   
SerialPortLib|ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf
   OemNicLib|Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.inf
-!if $(SECURE_BOOT_ENABLE) == TRUE
-  FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf
-!endif
   PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf
   
PciPlatformLib|Silicon/Hisilicon/Hi1620/Library/Hi1620PciPlatformLib/Hi1620PciPlatformLib.inf
 
@@ -290,15 +286,7 @@ [Components.common]
   MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
   Platform/Hisilicon/D06/Drivers/OemNicConfig2PHi1620/OemNicConfig2P.inf
 
-!if $(SECURE_BOOT_ENABLE) == TRUE
-  MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf {
-
-  
NULL|SecurityPkg/Library/DxeImageVerificationLib/DxeImageVerificationLib.inf
-  }
-  SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf
-!else
   MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
-!endif
   Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.inf
   MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf {
 
diff --git a/Platform/Hisilicon/D06/D06.fdf b/Platform/Hisilicon/D06/D06.fdf
index f72b513352fb..e402628a1b35 100644
--- a/Platform/Hisilicon/D06/D06.fdf
+++ b/Platform/Hisilicon/D06/D06.fdf
@@ -88,17 +88,10 @@ [FD.D06]
   #Blockmap[1]: End
   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
   ## This is the VARIABLE_STORE_HEADER
-!if $(SECURE_BOOT_ENABLE) == TRUE
-  #Signature: gEfiAuthenticatedVariableGuid =
-  #  { 0xaaf32c78, 0x947b, 0x439a, { 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 
0x92 }}
-  0x78, 0x2c, 0xf3, 0xaa, 0x7b, 0x94, 0x9a, 0x43,
-  0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92,
-!else
   #Signature: gEfiVariableGuid =
   #  { 0xddcf3616, 0x3275, 0x4164, { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 
0x7d }}
   0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41,
   0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d,
-!endif
   #Size: 0xe000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) 
- 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0xdFB8
   0xB8, 0xdF, 0x00, 0x00,
   #FORMATTED: 0x5A #HEALTHY: 0xFE #Reserved: UINT16 #Reserved1: UINT32
@@ -183,10 +176,6 @@ [FV.FvMain]
   INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
   INF 
MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
 
-!if $(SECURE_BOOT_ENABLE) == TRUE
-  INF 
SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf
-!endif
-
   INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf
   INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
   INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
-- 
2.9.5

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[edk2] [PATCH edk2-platforms v3 06/18] Hisilicon/D06: Drop the leading 0 (0x0 -> 0x)

2019-03-20 Thread Ming Huang

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl | 24 
++--
 1 file changed, 12 insertions(+), 12 deletions(-)

diff --git a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl 
b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl
index 27fde2e09bfe..0f2d11bb952b 100644
--- a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl
+++ b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl
@@ -759,20 +759,20 @@ Device (PCI6)
 // adding RPx INTx configure deponds on hardware board topology,
 // if UEFI enables RPx, RPy, RPz... related INTx configure
 // should be added
-Package () {0x04,0,0,640}, // INT_A
-Package () {0x04,1,0,641}, // INT_B
-Package () {0x04,2,0,642}, // INT_C
-Package () {0x04,3,0,643}, // INT_D
+Package () {0x4,0,0,640}, // INT_A
+Package () {0x4,1,0,641}, // INT_B
+Package () {0x4,2,0,642}, // INT_C
+Package () {0x4,3,0,643}, // INT_D
 
-Package () {0x08,0,0,640}, // INT_A
-Package () {0x08,1,0,641}, // INT_B
-Package () {0x08,2,0,642}, // INT_C
-Package () {0x08,3,0,643}, // INT_D
+Package () {0x8,0,0,640}, // INT_A
+Package () {0x8,1,0,641}, // INT_B
+Package () {0x8,2,0,642}, // INT_C
+Package () {0x8,3,0,643}, // INT_D
 
-Package () {0x0C,0,0,640}, // INT_A
-Package () {0x0C,1,0,641}, // INT_B
-Package () {0x0C,2,0,642}, // INT_C
-Package () {0x0C,3,0,643}, // INT_D
+Package () {0xC,0,0,640}, // INT_A
+Package () {0xC,1,0,641}, // INT_B
+Package () {0xC,2,0,642}, // INT_C
+Package () {0xC,3,0,643}, // INT_D
 
 Package () {0x10,0,0,640}, // INT_A
 Package () {0x10,1,0,641}, // INT_B
-- 
2.9.5

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[edk2] [PATCH edk2-platforms v3 08/18] Hisilicon/D06: Add OemGetCpuFreq to encapsulate difference

2019-03-20 Thread Ming Huang

From: xingjiang tang 

Implementation OemGetCpuFreq() to get cpu frequency from cpld to
encapsulate project difference, for some projects don't support
get cpu frequency by this way.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Platform/Hisilicon/D06/Include/Library/CpldD06.h |  4 
 Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c | 16 

 2 files changed, 20 insertions(+)

diff --git a/Platform/Hisilicon/D06/Include/Library/CpldD06.h 
b/Platform/Hisilicon/D06/Include/Library/CpldD06.h
index ec9b49f4e70d..8eb333de529c 100644
--- a/Platform/Hisilicon/D06/Include/Library/CpldD06.h
+++ b/Platform/Hisilicon/D06/Include/Library/CpldD06.h
@@ -36,4 +36,8 @@
 #define CPLD_X8_X8_X8_BOARD_ID0x92
 #define CPLD_X16_X8_BOARD_ID  0x93
 
+#define CPLD_CLOCK_FLAG  0xFD
+#define CPLD_BOM_VER_FLAG0x0B
+#define CPLD_BOARD_REVISION_4TH   0x4
+
 #endif /* __CPLDD06_H__ */
diff --git a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c 
b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c
index c5cb77696031..c8f71ecf890a 100644
--- a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c
+++ b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c
@@ -206,3 +206,19 @@ OemIsNeedDisableExpanderBuffer (
 {
   return TRUE;
 }
+
+UINTN OemGetCpuFreq (UINT8 Socket)
+{
+  UINT8 BoardRevision;
+
+  BoardRevision = MmioRead8 (CPLD_BASE_ADDRESS + CPLD_BOM_VER_FLAG);
+
+  // Board revision 4 and higher run at 2.5GHz
+  // Earlier revisions run at 2GHz
+  if (BoardRevision >= CPLD_BOARD_REVISION_4TH) {
+return 25;
+  } else {
+return 20;
+  }
+}
+
-- 
2.9.5

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[edk2] [PATCH edk2-platforms v3 03/18] Hisilicon/D0x: Add DriverHealthManagerDxe

2019-03-20 Thread Ming Huang

DriverHealthManagerDxe Collect driver health form of third party
drivers to repair no healthy card.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
Reviewed-by: Leif Lindholm 
---
 Platform/Hisilicon/D03/D03.dsc | 1 +
 Platform/Hisilicon/D05/D05.dsc | 1 +
 Platform/Hisilicon/D06/D06.dsc | 1 +
 Platform/Hisilicon/D03/D03.fdf | 1 +
 Platform/Hisilicon/D05/D05.fdf | 1 +
 Platform/Hisilicon/D06/D06.fdf | 1 +
 6 files changed, 6 insertions(+)

diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
index 3f59be22ec8e..fe443dd929ad 100644
--- a/Platform/Hisilicon/D03/D03.dsc
+++ b/Platform/Hisilicon/D03/D03.dsc
@@ -492,6 +492,7 @@ [Components.common]
 
   MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
   MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
+  MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf
   MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
   SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf {
 
diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
index 25db1c38d287..0c4f21fbe056 100644
--- a/Platform/Hisilicon/D05/D05.dsc
+++ b/Platform/Hisilicon/D05/D05.dsc
@@ -638,6 +638,7 @@ [Components.common]
   MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
   MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
   MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
+  MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf
   MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
 
   SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf {
diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc
index cbbd99e4a659..6d581337f199 100644
--- a/Platform/Hisilicon/D06/D06.dsc
+++ b/Platform/Hisilicon/D06/D06.dsc
@@ -435,6 +435,7 @@ [Components.common]
   
Silicon/Hisilicon/Hi1620/Drivers/Pl011DebugSerialPortInitDxe/Pl011DebugSerialPortInitDxe.inf
   MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
   MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
+  MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf
   MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
   SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf {
 
diff --git a/Platform/Hisilicon/D03/D03.fdf b/Platform/Hisilicon/D03/D03.fdf
index f453f9e46321..3f07b2e57778 100644
--- a/Platform/Hisilicon/D03/D03.fdf
+++ b/Platform/Hisilicon/D03/D03.fdf
@@ -295,6 +295,7 @@ [FV.FvMain]
   INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
   INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
   INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
+  INF MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf
   INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
 
 [FV.FVMAIN_COMPACT]
diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf
index 85dd791564a4..9632aea4b00e 100644
--- a/Platform/Hisilicon/D05/D05.fdf
+++ b/Platform/Hisilicon/D05/D05.fdf
@@ -314,6 +314,7 @@ [FV.FvMain]
   INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
   INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
   INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
+  INF MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf
   INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
 
 [FV.FVMAIN_COMPACT]
diff --git a/Platform/Hisilicon/D06/D06.fdf b/Platform/Hisilicon/D06/D06.fdf
index fda29ab322e9..a937660a09e2 100644
--- a/Platform/Hisilicon/D06/D06.fdf
+++ b/Platform/Hisilicon/D06/D06.fdf
@@ -319,6 +319,7 @@ [FV.FvMain]
   INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
   INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
   INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
+  INF MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf
   INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
 
 [FV.FVMAIN_COMPACT]
-- 
2.9.5

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[edk2] [PATCH edk2-platforms v3 02/18] Hisilicon/D0x: Delete some header files

2019-03-20 Thread Ming Huang

As some interfaces exposed only by implementations in edk2-non-osi,
so delete corresponding header files and modify code to make build.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.inf  
|   1 +
 Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.inf 
|   2 +-
 Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.inf  
|   1 +
 Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.inf 
|   1 +
 Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.inf  
|   1 +
 Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.inf 
|   1 +
 Silicon/Hisilicon/Drivers/Smbios/MemorySubClassDxe/MemorySubClassDxe.inf   
|   1 +
 Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf 
|   1 +
 Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf   
|   2 +-
 Silicon/Hisilicon/Drivers/VirtualEhciPciIo/VirtualEhciPciIo.inf
|   1 +
 Silicon/Hisilicon/Hi1610/Drivers/IoInitDxe/IoInitDxe.inf   
|   1 +
 Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf
|   1 +
 Silicon/Hisilicon/Library/I2CLib/I2CLib.inf
|   1 +
 Silicon/Hisilicon/Library/I2CLib/I2CLibRuntime.inf 
|   1 +
 Silicon/Hisilicon/Hi1610/Include/Library/SerdesLib.h   
|  22 
 Silicon/Hisilicon/Hi1616/Include/Library/SerdesLib.h   
|  22 
 Silicon/Hisilicon/Include/Library/IpmiCmdLib.h 
| 110 ---
 Silicon/Hisilicon/Include/Library/LpcLib.h 
| 113 
 Silicon/Hisilicon/Include/Library/OemAddressMapLib.h   
|  45 
 Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h 
| 112 ---
 20 files changed, 14 insertions(+), 426 deletions(-)

diff --git a/Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.inf 
b/Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.inf
index c65cf7b6dd9f..90e40ae2b393 100644
--- a/Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.inf
+++ b/Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.inf
@@ -30,6 +30,7 @@ [Packages]
   MdeModulePkg/MdeModulePkg.dec
 
   ArmPkg/ArmPkg.dec
+  Silicon/Hisilicon/HisiliconNonOsi.dec
   Silicon/Hisilicon/HisiPkg.dec
 
 [LibraryClasses]
diff --git a/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.inf 
b/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.inf
index 0fa7fdf80fa8..c0195b2fa9cf 100644
--- a/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.inf
+++ b/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.inf
@@ -30,7 +30,7 @@ [Packages]
   MdePkg/MdePkg.dec
   MdeModulePkg/MdeModulePkg.dec
   ArmPkg/ArmPkg.dec
-
+  Silicon/Hisilicon/HisiliconNonOsi.dec
   Silicon/Hisilicon/HisiPkg.dec
 
 [LibraryClasses]
diff --git a/Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.inf 
b/Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.inf
index 0f6b68d4c88d..e82c9204d5d6 100644
--- a/Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.inf
+++ b/Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.inf
@@ -29,6 +29,7 @@ [Packages]
   ArmPkg/ArmPkg.dec
   MdePkg/MdePkg.dec
   MdeModulePkg/MdeModulePkg.dec
+  Silicon/Hisilicon/HisiliconNonOsi.dec
   Silicon/Hisilicon/HisiPkg.dec
 
 [LibraryClasses]
diff --git a/Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.inf 
b/Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.inf
index 022c3e940a31..7ec577530610 100644
--- a/Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.inf
+++ b/Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.inf
@@ -30,6 +30,7 @@ [Packages]
   ArmPkg/ArmPkg.dec
   MdeModulePkg/MdeModulePkg.dec
   MdePkg/MdePkg.dec
+  Silicon/Hisilicon/HisiliconNonOsi.dec
   Silicon/Hisilicon/HisiPkg.dec
 
 [LibraryClasses]
diff --git a/Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.inf 
b/Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.inf
index 8296ee02de4e..715a4efadde8 100644
--- a/Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.inf
+++ b/Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.inf
@@ -29,6 +29,7 @@ [Packages]
   ArmPkg/ArmPkg.dec
   MdeModulePkg/MdeModulePkg.dec
   MdePkg/MdePkg.dec
+  Silicon/Hisilicon/HisiliconNonOsi.dec
   Silicon/Hisilicon/HisiPkg.dec
 
 [LibraryClasses]
diff --git a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.inf 
b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.inf
index 75c5054bbfd1..9bc6eb549c41 100644
--- a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.inf
+++ b/Platform/Hisilicon/D06/Library

[edk2] [PATCH edk2-platforms v3 04/18] Hisilicon/D06: Optimize SAS driver for reducing boot time

2019-03-20 Thread Ming Huang

SAS controller is always existed, so accessing SAS register don't
depend on PciBusDxe (pci enumeration).
Move the SAS module early in D06.fdf for dispatching SAS driver
early. This can avoid wait in BDS normally and reduce boot time.

This change is only valid after the update to SasDriverDxe in
edk2-non-osi has been applied.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Platform/Hisilicon/D06/D06.fdf | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Platform/Hisilicon/D06/D06.fdf b/Platform/Hisilicon/D06/D06.fdf
index a937660a09e2..d495ad7f264c 100644
--- a/Platform/Hisilicon/D06/D06.fdf
+++ b/Platform/Hisilicon/D06/D06.fdf
@@ -165,6 +165,7 @@ [FV.FvMain]
   INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
 
   INF Platform/Hisilicon/D06/Drivers/IoInitDxe/IoInitDxe.inf
+  INF Platform/Hisilicon/D06/Drivers/Sas/SasDxeDriver.inf
   #
   # PI DXE Drivers producing Architectural Protocols (EFI Services)
   #
@@ -296,7 +297,6 @@ [FV.FvMain]
   #
   INF Platform/Hisilicon/D06/Drivers/Sm750Dxe/UefiSmi.inf
   INF MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf
-  INF Platform/Hisilicon/D06/Drivers/Sas/SasDxeDriver.inf
   INF MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf
   INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
   INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
-- 
2.9.5

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[edk2] [PATCH edk2-platforms v3 05/18] Hisilicon/D06: Fix access variable fail issue

2019-03-20 Thread Ming Huang

From: Jason Zhang 

BmcWdtEnable is a field of OemConfigData structure, need have
runtime service attribution if use it during exit boot service

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr | 2 +-
 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c  | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr 
b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr
index 470e9ace3dcf..08236704fbfe 100644
--- a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr
+++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr
@@ -23,7 +23,7 @@ formset
   help  = STRING_TOKEN(STR_OEM_CONFIG),
   classguid = gEfiIfrFrontPageGuid,  // for MdeModule Bds.
   efivarstore OEM_CONFIG_DATA,
-attribute = EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_NON_VOLATILE,
+attribute = EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_NON_VOLATILE | 
EFI_VARIABLE_RUNTIME_ACCESS,
 name  = OemConfig,
 guid  = gOemConfigGuid;
 
diff --git a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c 
b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c
index 012d45bc0214..6668103af027 100644
--- a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c
+++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c
@@ -316,7 +316,7 @@ OemConfigUiLibConstructor (
   Status = gRT->SetVariable (
   OEM_CONFIG_NAME,
   ,
-  EFI_VARIABLE_NON_VOLATILE | 
EFI_VARIABLE_BOOTSERVICE_ACCESS,
+  EFI_VARIABLE_NON_VOLATILE | 
EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS,
   sizeof (OEM_CONFIG_DATA),
   
   );
-- 
2.9.5

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[edk2] [PATCH edk2-platforms v3 01/18] Hisilicon/D0x: Remove and tidy some codes about SerdesLib

2019-03-20 Thread Ming Huang

As some definitions are about OemMiscLib, so move them from
SerdesLib.h to OemMiscLib.h and drop some useless function
definitions. After doing this, some unnecessary references
can be removed for D03/D05.

SerdesLib is useless for SmbiosMiscDxe and D06, so remove it and
delete SerdesLib.h for D06.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Platform/Hisilicon/D06/D06.dsc 
   |   2 -
 Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf   
   |   2 +-
 Silicon/Hisilicon/Hi1610/Include/Library/SerdesLib.h   
   | 109 
 Silicon/Hisilicon/Hi1616/Include/Library/SerdesLib.h   
   |  64 
 Silicon/Hisilicon/Hi1620/Include/Library/SerdesLib.h   
   |  85 ---
 Silicon/Hisilicon/Include/Library/OemMiscLib.h 
   |  75 ++
 Platform/Hisilicon/D03/Library/OemMiscLib2P/BoardFeature2PHi1610.c 
   |   1 -
 Platform/Hisilicon/D05/Library/OemMiscLibD05/BoardFeatureD05.c 
   |   1 -
 Platform/Hisilicon/D06/Library/OemMiscLibD06/BoardFeatureD06.c 
   |   1 -
 Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c   
   |   1 -
 
Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type09/MiscSystemSlotDesignationFunction.c
 |   2 +-
 11 files changed, 77 insertions(+), 266 deletions(-)

diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc
index 396bd03c9d24..cbbd99e4a659 100644
--- a/Platform/Hisilicon/D06/D06.dsc
+++ b/Platform/Hisilicon/D06/D06.dsc
@@ -64,8 +64,6 @@ [LibraryClasses.common]
 
   CpldIoLib|Silicon/Hisilicon/Library/CpldIoLib/CpldIoLib.inf
 
-  SerdesLib|Silicon/Hisilicon/Hi1620/Library/Hi1620Serdes/Hi1620SerdesLib.inf
-
   TimeBaseLib|EmbeddedPkg/Library/TimeBaseLib/TimeBaseLib.inf
   
RealTimeClockLib|Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf
   OemMiscLib|Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.inf
diff --git a/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf 
b/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf
index 61cead7779b9..669e6a2d52cc 100644
--- a/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf
+++ b/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf
@@ -69,6 +69,7 @@ [LibraryClasses]
   BaseMemoryLib
   BaseLib
   DebugLib
+  OemMiscLib
   UefiBootServicesTableLib
   UefiRuntimeServicesTableLib
   UefiDriverEntryPoint
@@ -77,7 +78,6 @@ [LibraryClasses]
 
   IpmiCmdLib
 
-  SerdesLib
 
 [Protocols]
   gEfiSmbiosProtocolGuid   # PROTOCOL ALWAYS_CONSUMED
diff --git a/Silicon/Hisilicon/Hi1610/Include/Library/SerdesLib.h 
b/Silicon/Hisilicon/Hi1610/Include/Library/SerdesLib.h
index 077dd5edc847..b493dd9ac090 100755
--- a/Silicon/Hisilicon/Hi1610/Include/Library/SerdesLib.h
+++ b/Silicon/Hisilicon/Hi1610/Include/Library/SerdesLib.h
@@ -16,116 +16,7 @@
 #ifndef _SERDES_LIB_H_
 #define _SERDES_LIB_H_
 
-typedef enum {
-  EmHilink0Hccs1X8 = 0,
-  EmHilink0Pcie1X8 = 2,
-  EmHilink0Pcie1X4Pcie2X4 = 3,
-  EmHilink0Sas2X8 = 4,
-  EmHilink0Hccs1X8Width16,
-  EmHilink0Hccs1X8Width32,
-} HILINK0_MODE_TYPE;
-
-typedef enum {
-  EmHilink1Sas2X1 = 0,
-  EmHilink1Hccs0X8 = 1,
-  EmHilink1Pcie0X8 = 2,
-  EmHilink1Hccs0X8Width16,
-  EmHilink1Hccs0X8Width32,
-} HILINK1_MODE_TYPE;
-
-typedef enum {
-  EmHilink2Pcie2X8 = 0,
-  EmHilink2Sas0X8 = 2,
-} HILINK2_MODE_TYPE;
-
-typedef enum {
-  EmHilink5Pcie3X4 = 0,
-  EmHilink5Pcie2X2Pcie3X2 = 1,
-  EmHilink5Sas1X4 = 2,
-} HILINK5_MODE_TYPE;
-
-typedef enum {
-  Em32coreEvbBoard = 0,
-  Em16coreEvbBoard = 1,
-  EmV2R1CO5Borad = 2,
-  EmOtherBorad
-} BOARD_TYPE;
-
-
-typedef struct {
-  HILINK0_MODE_TYPE Hilink0Mode;
-  HILINK1_MODE_TYPE Hilink1Mode;
-  HILINK2_MODE_TYPE Hilink2Mode;
-  UINT32 Hilink3Mode;
-  UINT32 Hilink4Mode;
-  HILINK5_MODE_TYPE Hilink5Mode;
-  UINT32 Hilink6Mode;
-  UINT32 UseSsc;
-} SERDES_PARAM;
-
-
-#define SERDES_INVALID_MACRO_ID  0x
-#define SERDES_INVALID_LANE_NUM  0x
-#define SERDES_INVALID_RATE_MODE  0x
-
-typedef struct {
-  UINT32 MacroId;
-  UINT32 DsNum;
-  UINT32 DsCfg;
-} SERDES_POLARITY_INVERT;
-
-EFI_STATUS OemGetSerdesParam (SERDES_PARAM *ParamA, SERDES_PARAM *ParamB, 
UINT32 SocketId);
-extern SERDES_POLARITY_INVERT gSerdesPolarityTxDesc[];
-extern SERDES_POLARITY_INVERT gSerdesPolarityRxDesc[];
-UINT32 GetEthType(UINT8 EthChannel);
-
 EFI_STATUS
 EfiSerdesInitWrap (VOID);
 
-void SRE_SerdesEnableCTLEDFE(UINT32 macro, UINT32 lane, UINT32 ulDsCfg);
-
-//EYE test
-UINT32 serdes_eye_test(UINT32 uwMacroId, UINT32 uwDsNum, UINT32 eyemode, 
UINT32 scanwindowvalue, UINT32 uwRateData);
-
-UINT32 Serdes_ReadBert(UINT32   ulMacroId , UINT32   ulDsNum

[edk2] [PATCH edk2-platforms v3 07/18] Hisilicon/D06: Add more PCIe port INT-x support

2019-03-20 Thread Ming Huang

Since NVMe riser width is 6*X4, need add the related
port's INT-x support to match OS driver.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl | 37 
+++-
 1 file changed, 36 insertions(+), 1 deletion(-)

diff --git a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl 
b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl
index 0f2d11bb952b..4d9d9d95be68 100644
--- a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl
+++ b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl
@@ -41,11 +41,21 @@ Scope(_SB)
   // adding RPx INTx configure deponds on hardware board topology,
   // if UEFI enables RPx, RPy, RPz... related INTx configure
   // should be added
+  Package () {0x2,0,0,640}, // INT_A
+  Package () {0x2,1,0,641}, // INT_B
+  Package () {0x2,2,0,642}, // INT_C
+  Package () {0x2,3,0,643}, // INT_D
+
   Package () {0x4,0,0,640}, // INT_A
   Package () {0x4,1,0,641}, // INT_B
   Package () {0x4,2,0,642}, // INT_C
   Package () {0x4,3,0,643}, // INT_D
 
+  Package () {0x6,0,0,640}, // INT_A
+  Package () {0x6,1,0,641}, // INT_B
+  Package () {0x6,2,0,642}, // INT_C
+  Package () {0x6,3,0,643}, // INT_D
+
   Package () {0x8,0,0,640}, // INT_A
   Package () {0x8,1,0,641}, // INT_B
   Package () {0x8,2,0,642}, // INT_C
@@ -56,6 +66,11 @@ Scope(_SB)
   Package () {0xC,2,0,642}, // INT_C
   Package () {0xC,3,0,643}, // INT_D
 
+  Package () {0xE,0,0,640}, // INT_A
+  Package () {0xE,1,0,641}, // INT_B
+  Package () {0xE,2,0,642}, // INT_C
+  Package () {0xE,3,0,643}, // INT_D
+
   Package () {0x10,0,0,640}, // INT_A
   Package () {0x10,1,0,641}, // INT_B
   Package () {0x10,2,0,642}, // INT_C
@@ -759,11 +774,21 @@ Device (PCI6)
 // adding RPx INTx configure deponds on hardware board topology,
 // if UEFI enables RPx, RPy, RPz... related INTx configure
 // should be added
+Package () {0x2,0,0,640}, // INT_A
+Package () {0x2,1,0,641}, // INT_B
+Package () {0x2,2,0,642}, // INT_C
+Package () {0x2,3,0,643}, // INT_D
+
 Package () {0x4,0,0,640}, // INT_A
 Package () {0x4,1,0,641}, // INT_B
 Package () {0x4,2,0,642}, // INT_C
 Package () {0x4,3,0,643}, // INT_D
 
+Package () {0x6,0,0,640}, // INT_A
+Package () {0x6,1,0,641}, // INT_B
+Package () {0x6,2,0,642}, // INT_C
+Package () {0x6,3,0,643}, // INT_D
+
 Package () {0x8,0,0,640}, // INT_A
 Package () {0x8,1,0,641}, // INT_B
 Package () {0x8,2,0,642}, // INT_C
@@ -774,11 +799,21 @@ Device (PCI6)
 Package () {0xC,2,0,642}, // INT_C
 Package () {0xC,3,0,643}, // INT_D
 
+Package () {0xE,0,0,640}, // INT_A
+Package () {0xE,1,0,641}, // INT_B
+Package () {0xE,2,0,642}, // INT_C
+Package () {0xE,3,0,643}, // INT_D
+
 Package () {0x10,0,0,640}, // INT_A
 Package () {0x10,1,0,641}, // INT_B
 Package () {0x10,2,0,642}, // INT_C
 Package () {0x10,3,0,643}, // INT_D
-  })
+
+Package () {0x12,0,0,640}, // INT_A
+Package () {0x12,1,0,641}, // INT_B
+Package () {0x12,2,0,642}, // INT_C
+Package () {0x12,3,0,643}, // INT_D
+})
 
   Method (_CRS, 0, Serialized) {   // Root complex resources, _CRS: 
current resource setting
 Name (RBUF, ResourceTemplate () {  // Name: 19.6.87, ResourceTemplate: 
19.6.111,
-- 
2.9.5

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[edk2] [PATCH edk2-platforms v3 00/18] Fix issues and improve D0x

2019-03-20 Thread Ming Huang

Main Changes since v2 :
1 Move tidy and delete header file patch to the first of the series.

Code can also be found in github:
https://github.com/hisilicon/OpenPlatformPkg.git
branch: 1902-platforms-v3


Jason Zhang (1):
  Hisilicon/D06: Fix access variable fail issue

Ming Huang (16):
  Hisilicon/D0x: Remove and tidy some codes about SerdesLib
  Hisilicon/D0x: Delete some header files
  Hisilicon/D0x: Add DriverHealthManagerDxe
  Hisilicon/D06: Optimize SAS driver for reducing boot time
  Hisilicon/D06: Drop the leading 0 (0x0 -> 0x)
  Hisilicon/D06: Add more PCIe port INT-x support
  Hisilicon/D0x: Rename StartupAp() function
  Hisilicon/D06: Use HCCS speed with 2.6G
  Hisilicon/D06: Add PCI_OSC_SUPPORT
  Hisilicon/D06: Modify for IMP self-Adapte support
  Hisilicon/D06: Add Setup Item "Support DPC" and delete some PCIe menus
  Hisilicon/D06: Use new flash layout
  Hisilicon/D06: Remove SECURE_BOOT_ENABLE definition
  Hisilicon/D0x: Remove SP805 watchdog pcd
  Hisilicon/D06: Fix USB crash issue(4079)
  Hisilicon/D0x: Modify version to 19.02

xingjiang tang (1):
  Hisilicon/D06: Add OemGetCpuFreq to encapsulate difference

 Platform/Hisilicon/D03/D03.dsc 
   |   8 +-
 Platform/Hisilicon/D05/D05.dsc 
   |   8 +-
 Platform/Hisilicon/D06/D06.dsc 
   |  19 +-
 Platform/Hisilicon/D03/D03.fdf 
   |   1 +
 Platform/Hisilicon/D05/D05.fdf 
   |   1 +
 Platform/Hisilicon/D06/D06.fdf 
   |  18 +-
 Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.inf  
   |   1 +
 Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.inf 
   |   2 +-
 Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.inf  
   |   1 +
 Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.inf 
   |   1 +
 Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.inf  
   |   1 +
 Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.inf 
   |   1 +
 Silicon/Hisilicon/Drivers/Smbios/MemorySubClassDxe/MemorySubClassDxe.inf   
   |   1 +
 Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf 
   |   1 +
 Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf   
   |   4 +-
 Silicon/Hisilicon/Drivers/VirtualEhciPciIo/VirtualEhciPciIo.inf
   |   1 +
 Silicon/Hisilicon/Hi1610/Drivers/IoInitDxe/IoInitDxe.inf   
   |   1 +
 Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLib.inf   
   |   1 -
 Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf
   |   1 +
 Silicon/Hisilicon/Library/I2CLib/I2CLib.inf
   |   1 +
 Silicon/Hisilicon/Library/I2CLib/I2CLibRuntime.inf 
   |   1 +
 Platform/Hisilicon/D06/Include/Library/CpldD06.h   
   |   4 +
 Silicon/Hisilicon/Hi1610/Include/Library/SerdesLib.h   
   | 131 -
 Silicon/Hisilicon/Hi1616/Include/Library/SerdesLib.h   
   |  86 --
 Silicon/Hisilicon/Hi1620/Include/Library/SerdesLib.h   
   |  85 --
 Silicon/Hisilicon/Include/Library/IpmiCmdLib.h 
   | 110 ---
 Silicon/Hisilicon/Include/Library/LpcLib.h 
   | 113 ---
 Silicon/Hisilicon/Include/Library/OemAddressMapLib.h   
   |  45 ---
 Silicon/Hisilicon/Include/Library/OemConfigData.h  
   |   1 +
 Silicon/Hisilicon/Include/Library/OemMiscLib.h 
   |  75 +
 Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h 
   | 112 ---
 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr 
   |   4 +-
 Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.c
   |   2 +-
 Platform/Hisilicon/D03/Library/OemMiscLib2P/BoardFeature2PHi1610.c 
   |   1 -
 Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.c   
   |   2 +-
 Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.c
   |   2 +-
 Platform/Hisilicon/D05/Library/OemMiscLibD05/BoardFeatureD05.c 
   |   1 -
 Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.c

[edk2] [Patch MdeModulePkg/Library v1 0/1] Fix exception issue while UsbMass block io uninstalled

2019-03-19 Thread Ming Huang

The Bugzilla tracker for this:
https://bugzilla.tianocore.org/show_bug.cgi?id=1631

Ming Huang (1):
  MdeModulePkg/UefiBootManangerLib: Fix exception issue

 MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c | 3 +++
 1 file changed, 3 insertions(+)

-- 
2.9.5

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[edk2] [Patch MdeModulePkg/Library v1 1/1] MdeModulePkg/UefiBootManangerLib: Fix exception issue

2019-03-19 Thread Ming Huang

The system environment: virtual-CDROM(USB interface) via BMC, insert a
iso file to CDROM, like ubuntu-18.04.1-server-arm64.iso, change CDROM
to first boot option.
With release version bios, disconnecting CDROM when boot to
"1 seconds left, Press Esc or F2 to enter Setup"
then system will get a exception.

The root cause is the EFI_BLOCK_IO_PROTOCOL for UsbMass will be uninstalled
in this situation after print some transfer error. The status will be
invalid parameter. This line will get a exception for BlockIo not point
to right address:
AllocatePool (BlockIo->Media->BlockSize)
So, here need to judge the status after ASSERT_EFI_ERROR.

The Bugzilla tracker for this:
https://bugzilla.tianocore.org/show_bug.cgi?id=1631

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c 
b/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c
index 4ce83ce22d61..0535cd7335b4 100644
--- a/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c
+++ b/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c
@@ -1069,6 +1069,9 @@ BmExpandMediaDevicePath (
   //
   Status = gBS->HandleProtocol (Handle, , (VOID **) 
);
   ASSERT_EFI_ERROR (Status);
+  if (EFI_ERROR (Status)) {
+return NULL;
+  }
   Buffer = AllocatePool (BlockIo->Media->BlockSize);
   if (Buffer != NULL) {
 BlockIo->ReadBlocks (
-- 
2.9.5

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Re: [edk2] [MdeModulePkg/Library v1 1/1] MdeModulePkg/UefiBootManangerLib: Fix exception issue

2019-03-19 Thread Ming Huang




On 3/19/2019 1:56 PM, Wu, Hao A wrote:
>> -Original Message-
>> From: Ming Huang [mailto:ming.hu...@linaro.org]
>> Sent: Tuesday, March 19, 2019 12:14 PM
>> To: Wu, Hao A; Leif Lindholm
>> Cc: linaro-u...@lists.linaro.org; edk2-devel@lists.01.org; Zeng, Star; Dong,
>> Eric; Ni, Ray; dann.fraz...@canonical.com; ard.biesheu...@linaro.org; Kinney,
>> Michael D; Gao, Liming; wanghuiqi...@huawei.com;
>> huangmin...@huawei.com; zhangjinso...@huawei.com;
>> huangda...@hisilicon.com; wai...@126.com; Wang, Jian J
>> Subject: Re: [MdeModulePkg/Library v1 1/1]
>> MdeModulePkg/UefiBootManangerLib: Fix exception issue
>>
>>
>>
>> On 3/19/2019 10:25 AM, Wu, Hao A wrote:
>>>> -Original Message-
>>>> From: Leif Lindholm [mailto:leif.lindh...@linaro.org]
>>>> Sent: Monday, March 18, 2019 8:43 PM
>>>> To: Ming Huang
>>>> Cc: linaro-u...@lists.linaro.org; edk2-devel@lists.01.org; Zeng, Star; 
>>>> Dong,
>>>> Eric; Ni, Ray; dann.fraz...@canonical.com; ard.biesheu...@linaro.org;
>> Kinney,
>>>> Michael D; Gao, Liming; wanghuiqi...@huawei.com;
>>>> huangmin...@huawei.com; zhangjinso...@huawei.com;
>>>> huangda...@hisilicon.com; wai...@126.com; Wang, Jian J; Wu, Hao A;
>> Ni,
>>>> Ray
>>>> Subject: Re: [MdeModulePkg/Library v1 1/1]
>>>> MdeModulePkg/UefiBootManangerLib: Fix exception issue
>>>>
>>>> +MdeModulePkg maintainers (you added MdePkg maintainers to cc)
>>>>
>>>> This looks like an improvement to me.
>>>>
>>>> Am I correct in guessing this behaviour refers to some specific corner
>>>> case of a USB CDROM emulated from a BMC?
>>>>
>>>> On Mon, Feb 25, 2019 at 05:10:52PM +0800, Ming Huang wrote:
>>>>> The system environment: virtual-CDROM(USB interface) via BMC, insert
>> a
>>>>> iso file to CDROM, like ubuntu-18.04.1-server-arm64.iso, change CDROM
>>>>> to first boot option.
>>>>> With release version bios, disconnecting CDROM when boot to
>>>>> "1 seconds left, Press Esc or F2 to enter Setup"
>>>>> then system will get a exception.
>>>>>
>>>>> The root cause is the EFI_BLOCK_IO_PROTOCOL for UsbMass will be
>>>> uninstalled
>>>>> in this situation after print some transfer error. The status will be
>>>>> invalid parameter. This line will get a exception for BlockIo not point
>>>
>>> Do you mean 'EFI_INVALID_PARAMETER' is returned from:
>>>   Status = gBS->HandleProtocol (Handle, , (VOID
>> **) );
>>
>> Yes.
>>
>>>
>>> If so, my guess is that 'Handle' is NULL at this point. An improvement can
>>> be adding a previous check for 'Status' after the ASSERT at:
>>>
>>>   Status = gBS->LocateDevicePath (,
>> , );
>>>   ASSERT_EFI_ERROR (Status);
>>
>> As my debug output, this 'Status' is seccuss and Handle is not NULL, but
>> gBS->ConnectController return:Not Found
>>
>> Debug output:
>> [BmExpandMediaDevicePath]:[1056L] Handle=3E3F3D18 BlockIo=3B2757B6
>> Media=AFAF6C617470AFAF Status=Success
>> EhcExecTransfer: transfer failed with 40
>> EhcBulkTransfer: error - Device Error, transfer - 40
>> .
>> [UsbOnHubInterrupt]:[632L] SignalEvent (HubIf->HubNotify)
>> UsbBotExecCommand: UsbBotSendCommand (Device Error)
>> UsbBootExecCmd: Device Error to Exec 0x0 Cmd (Result = 1)
>> EhcExecTransfer: transfer failed with 40
>> ...
>> [USBMassDriverBindingStop]:[1010L] Uninstall USB block io, free:
>> 3E44F218(F0)
>> [BmExpandMediaDevicePath]:[1064L] Connect Not Found
>> [BmExpandMediaDevicePath]:[1076L] Handle=3E3F3D18 BlockIo=3B2757B6
>> Media=AFAF6C617470AFAF Status=Invalid Parameter
> 
> Thanks for the debug information, I got it now.
> 
> The call to the gBS->ConnectController() leads to protocols being
> uninstalled from 'Handle' and removing 'Handle' from the database. Then
> within the call to gBS->HandleProtocol(), CoreValidateHandle() returns
> EFI_INVALID_PARAMETER since the handle cannot be found.
> 
> I am good with this patch, please help to address Leif's previous comment
> to keep the ASSERT.

I will add ASSERT back in v2.

> 
> Also, I have filed a Bugzilla tracker for this:
> https://bugzilla.tianocore.org/show_bug.cgi?id=1631
> 
> Could you help to add the reference to the above BZ in the commit log
> message? Thanks.

Sure, add it in v2.

Thanks

> 
>

Re: [edk2] [MdeModulePkg/Library v1 1/1] MdeModulePkg/UefiBootManangerLib: Fix exception issue

2019-03-18 Thread Ming Huang




On 3/19/2019 10:25 AM, Wu, Hao A wrote:
>> -Original Message-
>> From: Leif Lindholm [mailto:leif.lindh...@linaro.org]
>> Sent: Monday, March 18, 2019 8:43 PM
>> To: Ming Huang
>> Cc: linaro-u...@lists.linaro.org; edk2-devel@lists.01.org; Zeng, Star; Dong,
>> Eric; Ni, Ray; dann.fraz...@canonical.com; ard.biesheu...@linaro.org; Kinney,
>> Michael D; Gao, Liming; wanghuiqi...@huawei.com;
>> huangmin...@huawei.com; zhangjinso...@huawei.com;
>> huangda...@hisilicon.com; wai...@126.com; Wang, Jian J; Wu, Hao A; Ni,
>> Ray
>> Subject: Re: [MdeModulePkg/Library v1 1/1]
>> MdeModulePkg/UefiBootManangerLib: Fix exception issue
>>
>> +MdeModulePkg maintainers (you added MdePkg maintainers to cc)
>>
>> This looks like an improvement to me.
>>
>> Am I correct in guessing this behaviour refers to some specific corner
>> case of a USB CDROM emulated from a BMC?
>>
>> On Mon, Feb 25, 2019 at 05:10:52PM +0800, Ming Huang wrote:
>>> The system environment: virtual-CDROM(USB interface) via BMC, insert a
>>> iso file to CDROM, like ubuntu-18.04.1-server-arm64.iso, change CDROM
>>> to first boot option.
>>> With release version bios, disconnecting CDROM when boot to
>>> "1 seconds left, Press Esc or F2 to enter Setup"
>>> then system will get a exception.
>>>
>>> The root cause is the EFI_BLOCK_IO_PROTOCOL for UsbMass will be
>> uninstalled
>>> in this situation after print some transfer error. The status will be
>>> invalid parameter. This line will get a exception for BlockIo not point
> 
> Do you mean 'EFI_INVALID_PARAMETER' is returned from:
>   Status = gBS->HandleProtocol (Handle, , (VOID **) 
> );

Yes.

> 
> If so, my guess is that 'Handle' is NULL at this point. An improvement can
> be adding a previous check for 'Status' after the ASSERT at: 
> 
>   Status = gBS->LocateDevicePath (, , 
> );
>   ASSERT_EFI_ERROR (Status);

As my debug output, this 'Status' is seccuss and Handle is not NULL, but
gBS->ConnectController return:Not Found

Debug output:
[BmExpandMediaDevicePath]:[1056L] Handle=3E3F3D18 BlockIo=3B2757B6 
Media=AFAF6C617470AFAF Status=Success
EhcExecTransfer: transfer failed with 40
EhcBulkTransfer: error - Device Error, transfer - 40
.
[UsbOnHubInterrupt]:[632L] SignalEvent (HubIf->HubNotify)
UsbBotExecCommand: UsbBotSendCommand (Device Error)
UsbBootExecCmd: Device Error to Exec 0x0 Cmd (Result = 1)
EhcExecTransfer: transfer failed with 40
...
[USBMassDriverBindingStop]:[1010L] Uninstall USB block io, free: 3E44F218(F0)
[BmExpandMediaDevicePath]:[1064L] Connect Not Found
[BmExpandMediaDevicePath]:[1076L] Handle=3E3F3D18 BlockIo=3B2757B6 
Media=AFAF6C617470AFAF Status=Invalid Parameter

Thanks

> 
> And leave:
> 
>   Status = gBS->HandleProtocol (Handle, , (VOID **) 
> );
>   ASSERT_EFI_ERROR (Status);
> 
> unchanged.



> 
> Best Regards,
> Hao Wu
> 
>>> to right address:
>>> AllocatePool (BlockIo->Media->BlockSize)
>>> So, here need to judge the status not using ASSERT_EFI_ERROR.
>>>
>>> Contributed-under: TianoCore Contribution Agreement 1.1
>>> Signed-off-by: Ming Huang 
>>> ---
>>>  MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c | 4 +++-
>>>  1 file changed, 3 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c
>> b/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c
>>> index d5957db610d9..c2f1c651b02f 100644
>>> --- a/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c
>>> +++ b/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c
>>> @@ -1068,7 +1068,9 @@ BmExpandMediaDevicePath (
>>>// Block IO read/write will success.
>>>//
>>>Status = gBS->HandleProtocol (Handle, , (VOID
>> **) );
>>> -  ASSERT_EFI_ERROR (Status);
>>> +  if (EFI_ERROR (Status)) {
>>
>> It would still be worth including an ASSERT here, to let DEBUG builds
>> report on point of failure rather than several steps up the chain.
>>
>> /
>> Leif
>>
>>> +return NULL;
>>> +  }
>>>Buffer = AllocatePool (BlockIo->Media->BlockSize);
>>>if (Buffer != NULL) {
>>>  BlockIo->ReadBlocks (
>>> --
>>> 2.9.5
>>>
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Re: [edk2] [MdeModulePkg/Library v1 1/1] MdeModulePkg/UefiBootManangerLib: Fix exception issue

2019-03-18 Thread Ming Huang




On 3/18/2019 8:42 PM, Leif Lindholm wrote:
> +MdeModulePkg maintainers (you added MdePkg maintainers to cc)
> 
> This looks like an improvement to me.
> 
> Am I correct in guessing this behaviour refers to some specific corner
> case of a USB CDROM emulated from a BMC?

Yes, I found this issue with a USB CDROM emulated from a BMC.
I guess have the same symptom with physical USB CDROM.

Thanks

> 
> On Mon, Feb 25, 2019 at 05:10:52PM +0800, Ming Huang wrote:
>> The system environment: virtual-CDROM(USB interface) via BMC, insert a
>> iso file to CDROM, like ubuntu-18.04.1-server-arm64.iso, change CDROM
>> to first boot option.
>> With release version bios, disconnecting CDROM when boot to
>> "1 seconds left, Press Esc or F2 to enter Setup"
>> then system will get a exception.
>>
>> The root cause is the EFI_BLOCK_IO_PROTOCOL for UsbMass will be uninstalled
>> in this situation after print some transfer error. The status will be
>> invalid parameter. This line will get a exception for BlockIo not point
>> to right address:
>> AllocatePool (BlockIo->Media->BlockSize)
>> So, here need to judge the status not using ASSERT_EFI_ERROR.
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Ming Huang 
>> ---
>>  MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c | 4 +++-
>>  1 file changed, 3 insertions(+), 1 deletion(-)
>>
>> diff --git a/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c 
>> b/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c
>> index d5957db610d9..c2f1c651b02f 100644
>> --- a/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c
>> +++ b/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c
>> @@ -1068,7 +1068,9 @@ BmExpandMediaDevicePath (
>>// Block IO read/write will success.
>>//
>>Status = gBS->HandleProtocol (Handle, , (VOID **) 
>> );
>> -  ASSERT_EFI_ERROR (Status);
>> +  if (EFI_ERROR (Status)) {
> 
> It would still be worth including an ASSERT here, to let DEBUG builds
> report on point of failure rather than several steps up the chain.
> 
> /
> Leif
> 
>> +return NULL;
>> +  }
>>Buffer = AllocatePool (BlockIo->Media->BlockSize);
>>if (Buffer != NULL) {
>>  BlockIo->ReadBlocks (
>> -- 
>> 2.9.5
>>
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[edk2] [MdeModulePkg/Library v1 0/1] Fix exception issue while UsbMass block io uninstalled

2019-02-25 Thread Ming Huang

Another exception issue while UsbMass block io uninstalled when boot to grub:
The system environment: virtual-CDROM(USB interface) via BMC, insert a
iso file to virtual-CDROM, like ubuntu-18.04.1-server-arm64.iso, change
virtaul-CDROM to first boot option.

Disconnecting virtual-CDROM when boot to grub menu
"Install Ubuntu Server"
then select "Install Ubuntu Server", system will also get exception.

The root cause is the EFI_BLOCK_IO_PROTOCOL for USBMass will be uninstalled
in this situation after print some transfer error(see blow), but grub will
still use the block io which had initialized by grub_efidisk_init() in 
efidisk.c.
When run m->io_align in grub_efidisk_open ():
  if (m->io_align & (m->io_align - 1))
grub will get exception for the EFI_BLOCK_IO_PROTOCOL had uninstalled and
the memory had set to 0xAF by PcdDebugClearMemoryValue.

This exception look like the matching problem grub and uefi. Is it need to
do something in uefi side or grub side?

The open source grub grub_efidisk_open function chunk:
  m = d->block_io->media;
  /* FIXME: Probably it is better to store the block size in the disk,
 and total sectors should be replaced with total blocks.  */
  grub_dprintf ("efidisk",
"m = %p, last block = %llx, block size = %x, io align = %x\n",
m, (unsigned long long) m->last_block, m->block_size,
m->io_align);

  /* Ensure required buffer alignment is a power of two (or is zero). */
  if (m->io_align & (m->io_align - 1))

USB transfer error log:
UsbBootExecCmd: Device Error to Exec 0x0 Cmd (Result = 1)
EhcExecTransfer: transfer failed with 40
EhcBulkTransfer: error - Device Error, transfer - 40
UsbBotExecCommand: UsbBotSendCommand (Device Error)
UsbBootRequestSense: (Device Error) CmdResult=0x1
UsbBootDetectMedia: UsbBootIsUnitReady (Device Error)
---

Ming Huang (1):
  MdeModulePkg/UefiBootManangerLib: Fix exception issue

 MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

-- 
2.9.5

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[edk2] [MdeModulePkg/Library v1 1/1] MdeModulePkg/UefiBootManangerLib: Fix exception issue

2019-02-25 Thread Ming Huang

The system environment: virtual-CDROM(USB interface) via BMC, insert a
iso file to CDROM, like ubuntu-18.04.1-server-arm64.iso, change CDROM
to first boot option.
With release version bios, disconnecting CDROM when boot to
"1 seconds left, Press Esc or F2 to enter Setup"
then system will get a exception.

The root cause is the EFI_BLOCK_IO_PROTOCOL for UsbMass will be uninstalled
in this situation after print some transfer error. The status will be
invalid parameter. This line will get a exception for BlockIo not point
to right address:
AllocatePool (BlockIo->Media->BlockSize)
So, here need to judge the status not using ASSERT_EFI_ERROR.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c 
b/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c
index d5957db610d9..c2f1c651b02f 100644
--- a/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c
+++ b/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c
@@ -1068,7 +1068,9 @@ BmExpandMediaDevicePath (
   // Block IO read/write will success.
   //
   Status = gBS->HandleProtocol (Handle, , (VOID **) 
);
-  ASSERT_EFI_ERROR (Status);
+  if (EFI_ERROR (Status)) {
+return NULL;
+  }
   Buffer = AllocatePool (BlockIo->Media->BlockSize);
   if (Buffer != NULL) {
 BlockIo->ReadBlocks (
-- 
2.9.5

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Re: [edk2] [PATCH edk2-platforms v2 17/18] Hisilicon/D0x: Delete some header files

2019-02-20 Thread Ming Huang




On 2/21/2019 1:24 AM, Leif Lindholm wrote:
> Hi Ming,
> 
> Thank you for this rework.
> 
> However, can you move it first in the series, so that it's obvious
> this series contains no changes to these headers (because they have
> all happened in edk2-non-osi)?

Ok. Actually the patch "Rename StartupAp() function" modify function
name in PlatformSysCtrlLib.h, so this change need to move to edk2-non-osi.

Thanks

> 
> Regards,
> 
> Leif
> 
> On Wed, Feb 20, 2019 at 03:28:36PM +0800, Ming Huang wrote:
>> As some interfaces exposed only by implementations in edk2-non-osi,
>> so delete corresponding header files and modify code to make build.
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Ming Huang 
>> ---
>>  Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.inf   
>>|   1 +
>>  Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.inf  
>>|   2 +-
>>  Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.inf   
>>|   1 +
>>  Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.inf  
>>|   1 +
>>  Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.inf   
>>|   1 +
>>  Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.inf  
>>|   1 +
>>  Silicon/Hisilicon/Drivers/Smbios/MemorySubClassDxe/MemorySubClassDxe.inf
>>|   1 +
>>  
>> Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf
>>  |   1 +
>>  Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf
>>|   2 +-
>>  Silicon/Hisilicon/Drivers/VirtualEhciPciIo/VirtualEhciPciIo.inf 
>>|   1 +
>>  Silicon/Hisilicon/Hi1610/Drivers/IoInitDxe/IoInitDxe.inf
>>|   1 +
>>  Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf 
>>|   1 +
>>  Silicon/Hisilicon/Library/I2CLib/I2CLib.inf 
>>|   1 +
>>  Silicon/Hisilicon/Library/I2CLib/I2CLibRuntime.inf  
>>|   1 +
>>  Silicon/Hisilicon/Hi1610/Include/Library/SerdesLib.h
>>|  22 
>>  Silicon/Hisilicon/Hi1616/Include/Library/SerdesLib.h
>>|  22 
>>  Silicon/Hisilicon/Include/Library/IpmiCmdLib.h  
>>| 110 ---
>>  Silicon/Hisilicon/Include/Library/LpcLib.h  
>>| 113 
>>  Silicon/Hisilicon/Include/Library/OemAddressMapLib.h
>>|  45 
>>  Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h  
>>| 112 ---
>>  20 files changed, 14 insertions(+), 426 deletions(-)
>>
>> diff --git a/Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.inf 
>> b/Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.inf
>> index c65cf7b6dd9f..90e40ae2b393 100644
>> --- a/Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.inf
>> +++ b/Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.inf
>> @@ -30,6 +30,7 @@ [Packages]
>>MdeModulePkg/MdeModulePkg.dec
>>  
>>ArmPkg/ArmPkg.dec
>> +  Silicon/Hisilicon/HisiliconNonOsi.dec
>>Silicon/Hisilicon/HisiPkg.dec
>>  
>>  [LibraryClasses]
>> diff --git 
>> a/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.inf 
>> b/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.inf
>> index 0fa7fdf80fa8..c0195b2fa9cf 100644
>> --- a/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.inf
>> +++ b/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.inf
>> @@ -30,7 +30,7 @@ [Packages]
>>MdePkg/MdePkg.dec
>>MdeModulePkg/MdeModulePkg.dec
>>ArmPkg/ArmPkg.dec
>> -
>> +  Silicon/Hisilicon/HisiliconNonOsi.dec
>>Silicon/Hisilicon/HisiPkg.dec
>>  
>>  [LibraryClasses]
>> diff --git a/Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.inf 
>> b/Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.inf
>> index 0f6b68d4c88d..e82c9204d5d6 100644
>> --- a/Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.inf
>> +++ b/Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.inf
>> @@ -29,6 +29,7 @@ [Packages]
>>ArmPkg/ArmPkg.dec
>>MdePkg/MdePkg.dec
>>MdeModulePkg/MdeModulePkg.dec
>> +  Silicon/Hisilicon/HisiliconNonOsi.dec
>>Silicon/H

[edk2] [PATCH edk2-platforms v2 16/18] Hisilicon/D0x: Remove and tidy some codes about SerdesLib

2019-02-19 Thread Ming Huang

As some definitions are about OemMiscLib, so move them from
SerdesLib.h to OemMiscLib.h and drop some useless function
definitions. After doing this, some unnecessary references
can be removed for D03/D05.

SerdesLib is useless for SmbiosMiscDxe and D06, so remove it and
delete SerdesLib.h for D06.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Platform/Hisilicon/D06/D06.dsc 
   |   2 -
 Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf   
   |   2 +-
 Silicon/Hisilicon/Hi1610/Include/Library/SerdesLib.h   
   | 109 
 Silicon/Hisilicon/Hi1616/Include/Library/SerdesLib.h   
   |  64 
 Silicon/Hisilicon/Hi1620/Include/Library/SerdesLib.h   
   |  85 ---
 Silicon/Hisilicon/Include/Library/OemMiscLib.h 
   |  63 +++
 Platform/Hisilicon/D03/Library/OemMiscLib2P/BoardFeature2PHi1610.c 
   |   1 -
 Platform/Hisilicon/D05/Library/OemMiscLibD05/BoardFeatureD05.c 
   |   1 -
 Platform/Hisilicon/D06/Library/OemMiscLibD06/BoardFeatureD06.c 
   |   1 -
 Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c   
   |   1 -
 
Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type09/MiscSystemSlotDesignationFunction.c
 |   2 +-
 11 files changed, 65 insertions(+), 266 deletions(-)

diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc
index d762230768e9..a3a01bfb1e23 100644
--- a/Platform/Hisilicon/D06/D06.dsc
+++ b/Platform/Hisilicon/D06/D06.dsc
@@ -63,8 +63,6 @@ [LibraryClasses.common]
 
   CpldIoLib|Silicon/Hisilicon/Library/CpldIoLib/CpldIoLib.inf
 
-  SerdesLib|Silicon/Hisilicon/Hi1620/Library/Hi1620Serdes/Hi1620SerdesLib.inf
-
   TimeBaseLib|EmbeddedPkg/Library/TimeBaseLib/TimeBaseLib.inf
   
RealTimeClockLib|Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf
   OemMiscLib|Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.inf
diff --git a/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf 
b/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf
index 61cead7779b9..669e6a2d52cc 100644
--- a/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf
+++ b/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf
@@ -69,6 +69,7 @@ [LibraryClasses]
   BaseMemoryLib
   BaseLib
   DebugLib
+  OemMiscLib
   UefiBootServicesTableLib
   UefiRuntimeServicesTableLib
   UefiDriverEntryPoint
@@ -77,7 +78,6 @@ [LibraryClasses]
 
   IpmiCmdLib
 
-  SerdesLib
 
 [Protocols]
   gEfiSmbiosProtocolGuid   # PROTOCOL ALWAYS_CONSUMED
diff --git a/Silicon/Hisilicon/Hi1610/Include/Library/SerdesLib.h 
b/Silicon/Hisilicon/Hi1610/Include/Library/SerdesLib.h
index 077dd5edc847..b493dd9ac090 100755
--- a/Silicon/Hisilicon/Hi1610/Include/Library/SerdesLib.h
+++ b/Silicon/Hisilicon/Hi1610/Include/Library/SerdesLib.h
@@ -16,116 +16,7 @@
 #ifndef _SERDES_LIB_H_
 #define _SERDES_LIB_H_
 
-typedef enum {
-  EmHilink0Hccs1X8 = 0,
-  EmHilink0Pcie1X8 = 2,
-  EmHilink0Pcie1X4Pcie2X4 = 3,
-  EmHilink0Sas2X8 = 4,
-  EmHilink0Hccs1X8Width16,
-  EmHilink0Hccs1X8Width32,
-} HILINK0_MODE_TYPE;
-
-typedef enum {
-  EmHilink1Sas2X1 = 0,
-  EmHilink1Hccs0X8 = 1,
-  EmHilink1Pcie0X8 = 2,
-  EmHilink1Hccs0X8Width16,
-  EmHilink1Hccs0X8Width32,
-} HILINK1_MODE_TYPE;
-
-typedef enum {
-  EmHilink2Pcie2X8 = 0,
-  EmHilink2Sas0X8 = 2,
-} HILINK2_MODE_TYPE;
-
-typedef enum {
-  EmHilink5Pcie3X4 = 0,
-  EmHilink5Pcie2X2Pcie3X2 = 1,
-  EmHilink5Sas1X4 = 2,
-} HILINK5_MODE_TYPE;
-
-typedef enum {
-  Em32coreEvbBoard = 0,
-  Em16coreEvbBoard = 1,
-  EmV2R1CO5Borad = 2,
-  EmOtherBorad
-} BOARD_TYPE;
-
-
-typedef struct {
-  HILINK0_MODE_TYPE Hilink0Mode;
-  HILINK1_MODE_TYPE Hilink1Mode;
-  HILINK2_MODE_TYPE Hilink2Mode;
-  UINT32 Hilink3Mode;
-  UINT32 Hilink4Mode;
-  HILINK5_MODE_TYPE Hilink5Mode;
-  UINT32 Hilink6Mode;
-  UINT32 UseSsc;
-} SERDES_PARAM;
-
-
-#define SERDES_INVALID_MACRO_ID  0x
-#define SERDES_INVALID_LANE_NUM  0x
-#define SERDES_INVALID_RATE_MODE  0x
-
-typedef struct {
-  UINT32 MacroId;
-  UINT32 DsNum;
-  UINT32 DsCfg;
-} SERDES_POLARITY_INVERT;
-
-EFI_STATUS OemGetSerdesParam (SERDES_PARAM *ParamA, SERDES_PARAM *ParamB, 
UINT32 SocketId);
-extern SERDES_POLARITY_INVERT gSerdesPolarityTxDesc[];
-extern SERDES_POLARITY_INVERT gSerdesPolarityRxDesc[];
-UINT32 GetEthType(UINT8 EthChannel);
-
 EFI_STATUS
 EfiSerdesInitWrap (VOID);
 
-void SRE_SerdesEnableCTLEDFE(UINT32 macro, UINT32 lane, UINT32 ulDsCfg);
-
-//EYE test
-UINT32 serdes_eye_test(UINT32 uwMacroId, UINT32 uwDsNum, UINT32 eyemode, 
UINT32 scanwindowvalue, UINT32 uwRateData);
-
-UINT32 Serdes_ReadBert(UINT32   ulMacroId , UINT32   ulDsNum

[edk2] [PATCH edk2-platforms v2 10/18] Hisilicon/D06: Modify for IMP self-Adapte support

2019-02-19 Thread Ming Huang

As new IMP(Cortex-M7) firmware support self-adapte, so do not
need BIOS to implement some function, remove useless funtions
and report CPU0/CPU1 Nic NCL offset to IMP.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c | 281 
 1 file changed, 54 insertions(+), 227 deletions(-)

diff --git a/Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c 
b/Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c
index aaf990216982..678c2107bdd3 100644
--- a/Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c
+++ b/Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c
@@ -21,44 +21,21 @@
 #include 
 
 #define CPU2_SFP2_100G_CARD_OFFSET   0x25
-#define CPU1_SFP1_LOCATE_OFFSET  0x16
-#define CPU1_SFP0_LOCATE_OFFSET  0x12
-#define CPU2_SFP1_LOCATE_OFFSET  0x21
-#define CPU2_SFP0_LOCATE_OFFSET  0x19
-#define CPU2_SFP2_10G_GE_CARD_OFFSET 0x25
 
-#define SFP_10G_SPEED   10
-#define SFP_25G_SPEED   25
-#define SFP_100G_SPEED  100
-#define SFP_GE_SPEED1
-
-#define SFP_GE_SPEED_VAL_VENDOR_FINISAR 0x0C
-#define SFP_GE_SPEED_VAL0x0D
-#define SFP_10G_SPEED_VAL   0x67
-#define SFP_25G_SPEED_VAL   0xFF
+#define SOCKET1_NET_PORT_100G 1
+#define SOCKET0_NET_PORT_NUM  4
+#define SOCKET1_NET_PORT_NUM  2
 
 #define CARD_PRESENT_100G   (BIT7)
-#define CARD_PRESENT_10G(BIT0)
-#define SELECT_SFP_BY_INDEX(index)  (1 << (index - 1))
-#define SPF_SPEED_OFFSET12
-
-#define SFP_DEVICE_ADDRESS 0x50
-#define CPU1_9545_I2C_ADDR 0x70
-#define CPU2_9545_I2C_ADDR 0x71
-
-#define FIBER_PRESENT 0
-#define CARD_PRESENT  1
-#define I2C_PORT_SFP  4
-#define CPU2_I2C_PORT_SFP 5
-
-#define SOCKET_0 0
-#define SOCKET_1 1
 #define EEPROM_I2C_PORT  4
 #define EEPROM_PAGE_SIZE 0x40
 #define MAC_ADDR_LEN 6
 #define I2C_OFFSET_EEPROM_ETH0   (0xc00)
 #define I2C_SLAVEADDR_EEPROM (0x52)
 
+#define SRAM_NIC_NCL1_OFFSET_ADDRESS   0xA0E87FE0
+#define SRAM_NIC_NCL2_OFFSET_ADDRESS   0xA0E87FE4
+
 #pragma pack(1)
 typedef struct {
   UINT16 Crc16;
@@ -114,204 +91,6 @@ UINT16 CrcTable16[256] = {
   0x6E17, 0x7E36, 0x4E55, 0x5E74, 0x2E93, 0x3EB2, 0x0ED1, 0x1EF0,
 };
 
-EFI_STATUS
-GetSfpSpeed (
-  UINT16 Socket,
-  UINT16 SfpNum,
-  UINT8* FiberSpeed
-  )
-{
-  EFI_STATUS  Status;
-  I2C_DEVICE  SpdDev;
-  UINT8   SfpSelect;
-  UINT8   SfpSpeed;
-  UINT32  RegAddr;
-  UINT16  I2cAddr;
-  UINT32  SfpPort;
-
-  SfpSpeed = 0x0;
-  if (Socket == SOCKET_1) {
-I2cAddr = CPU2_9545_I2C_ADDR;
-SfpPort = CPU2_I2C_PORT_SFP;
-  } else {
-I2cAddr = CPU1_9545_I2C_ADDR;
-SfpPort = I2C_PORT_SFP;
-  }
-
-  Status = I2CInit (Socket, SfpPort, Normal);
-  if (EFI_ERROR (Status)) {
-DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Socket%d Call I2CInit failed! p1=0x%x.\n",
-__FUNCTION__, __LINE__, Socket, Status));
-return Status;
-  }
-
-  SpdDev.Socket = Socket;
-  SpdDev.DeviceType = DEVICE_TYPE_SPD;
-  SpdDev.Port = SfpPort;
-  SpdDev.SlaveDeviceAddress = I2cAddr;
-  RegAddr = 0x0;
-  SfpSelect = SELECT_SFP_BY_INDEX (SfpNum);
-
-  Status = I2CWrite (, RegAddr, 1, );
-  if (EFI_ERROR (Status)) {
-DEBUG ((DEBUG_ERROR, "I2CWrite Error =%r.\n", Status));
-return Status;
-  }
-
-  SpdDev.Socket = Socket;
-  SpdDev.DeviceType = DEVICE_TYPE_SPD;
-  SpdDev.Port = SfpPort;
-  SpdDev.SlaveDeviceAddress = SFP_DEVICE_ADDRESS;
-
-  RegAddr = SPF_SPEED_OFFSET;
-  Status = I2CRead (, RegAddr, 1, );
-  if (EFI_ERROR (Status)) {
-DEBUG ((DEBUG_ERROR, "I2CRead Error =%r.\n", Status));
-return Status;
-  }
-
-  DEBUG ((DEBUG_INFO, "BR, Nominal, Nominal signalling rate, SfpSpeed:
0x%x\n",
- SfpSpeed));
-
-  if (SfpSpeed == SFP_10G_SPEED_VAL) {
-*FiberSpeed = SFP_10G_SPEED;
-  } else if (SfpSpeed == SFP_25G_SPEED_VAL) {
-*FiberSpeed = SFP_25G_SPEED;
-  } else if ((SfpSpeed == SFP_GE_SPEED_VAL) ||
- (SfpSpeed == SFP_GE_SPEED_VAL_VENDOR_FINISAR)) {
-*FiberSpeed = SFP_GE_SPEED;
-  }
-
-  return EFI_SUCCESS;
-}
-
-//Fiber1Type/Fiber2Type/Fiber3Type return: SFP_10G_SPEED, SFP_100G_SPEED, 
SFP_GE_SPEED
-UINT32
-GetCpu2FiberType (
-  UINT8* Fiber1Type,
-  UINT8* Fiber2Type,
-  UINT8* Fiber100Ge
-  )
-{
-  EFI_STATUS  Status;
-  UINT16  SfpNum1;
-  UINT8   SfpSpeed1;
-  UINT16  SfpNum2;
-  UINT8   SfpSpeed2;
-
-  SfpNum1 = 0x1;
-  SfpSpeed1 = SFP_10G_SPEED;
-  SfpNum2 = 0x2;
-  SfpSpeed2 = SFP_10G_SPEED;
-  *Fiber100Ge = 0x0;
-  *Fiber1Type = SFP_10G_SPEED;
-  *Fiber2Type = SFP_10G_SPEED;
-
-  if ((ReadCpldReg (CPU2_SFP2_100G_CARD_OFFSET) & CARD_PRESENT_100G) != 0) {
-// 100 Ge card
-*Fiber1Type = SFP_10G_SPEED;
-*Fiber2Type = SFP_10G_SPEED;
-*Fiber100Ge = SFP_100G_SPEED;
-DEBUG ((DEBUG_ERROR,"Detect Fiber SFP_100G

[edk2] [PATCH edk2-platforms v2 12/18] Hisilicon/D06: Use new flash layout

2019-02-19 Thread Ming Huang

In new flash layout, BIOS fd change from offset 1M to 8M in 16M
spi flash.

Use the new CustomData.Fv which indicate the offset of fd and
which flash area can be updated for BMC.

This patch is relative with patch "Use new flash layout" in
edk2-non-osi.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Platform/Hisilicon/D06/D06.fdf | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Platform/Hisilicon/D06/D06.fdf b/Platform/Hisilicon/D06/D06.fdf
index d495ad7f264c..f72b513352fb 100644
--- a/Platform/Hisilicon/D06/D06.fdf
+++ b/Platform/Hisilicon/D06/D06.fdf
@@ -29,7 +29,7 @@ [DEFINES]
 

 [FD.D06]
 
-BaseAddress   = 0x20410|gArmTokenSpaceGuid.PcdFdBaseAddress  # The base 
address of the Firmware in NOR Flash.
+BaseAddress   = 0x20480|gArmTokenSpaceGuid.PcdFdBaseAddress  # The base 
address of the Firmware in NOR Flash.
 
 Size  = 0x0040|gArmTokenSpaceGuid.PcdFdSize # The size in 
bytes of the FLASH Device
 ErasePolarity = 1
@@ -124,7 +124,7 @@ [FD.D06]
 0x003E|0x0001
 
 0x003F|0x0001
-FILE = Platform/Hisilicon/D0x-CustomData.Fv
+FILE = Platform/Hisilicon/D06/CustomData.Fv
 
 

 #
-- 
2.9.5

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[edk2] [PATCH edk2-platforms v2 17/18] Hisilicon/D0x: Delete some header files

2019-02-19 Thread Ming Huang

As some interfaces exposed only by implementations in edk2-non-osi,
so delete corresponding header files and modify code to make build.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.inf  
|   1 +
 Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.inf 
|   2 +-
 Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.inf  
|   1 +
 Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.inf 
|   1 +
 Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.inf  
|   1 +
 Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.inf 
|   1 +
 Silicon/Hisilicon/Drivers/Smbios/MemorySubClassDxe/MemorySubClassDxe.inf   
|   1 +
 Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf 
|   1 +
 Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf   
|   2 +-
 Silicon/Hisilicon/Drivers/VirtualEhciPciIo/VirtualEhciPciIo.inf
|   1 +
 Silicon/Hisilicon/Hi1610/Drivers/IoInitDxe/IoInitDxe.inf   
|   1 +
 Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf
|   1 +
 Silicon/Hisilicon/Library/I2CLib/I2CLib.inf
|   1 +
 Silicon/Hisilicon/Library/I2CLib/I2CLibRuntime.inf 
|   1 +
 Silicon/Hisilicon/Hi1610/Include/Library/SerdesLib.h   
|  22 
 Silicon/Hisilicon/Hi1616/Include/Library/SerdesLib.h   
|  22 
 Silicon/Hisilicon/Include/Library/IpmiCmdLib.h 
| 110 ---
 Silicon/Hisilicon/Include/Library/LpcLib.h 
| 113 
 Silicon/Hisilicon/Include/Library/OemAddressMapLib.h   
|  45 
 Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h 
| 112 ---
 20 files changed, 14 insertions(+), 426 deletions(-)

diff --git a/Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.inf 
b/Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.inf
index c65cf7b6dd9f..90e40ae2b393 100644
--- a/Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.inf
+++ b/Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.inf
@@ -30,6 +30,7 @@ [Packages]
   MdeModulePkg/MdeModulePkg.dec
 
   ArmPkg/ArmPkg.dec
+  Silicon/Hisilicon/HisiliconNonOsi.dec
   Silicon/Hisilicon/HisiPkg.dec
 
 [LibraryClasses]
diff --git a/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.inf 
b/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.inf
index 0fa7fdf80fa8..c0195b2fa9cf 100644
--- a/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.inf
+++ b/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.inf
@@ -30,7 +30,7 @@ [Packages]
   MdePkg/MdePkg.dec
   MdeModulePkg/MdeModulePkg.dec
   ArmPkg/ArmPkg.dec
-
+  Silicon/Hisilicon/HisiliconNonOsi.dec
   Silicon/Hisilicon/HisiPkg.dec
 
 [LibraryClasses]
diff --git a/Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.inf 
b/Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.inf
index 0f6b68d4c88d..e82c9204d5d6 100644
--- a/Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.inf
+++ b/Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.inf
@@ -29,6 +29,7 @@ [Packages]
   ArmPkg/ArmPkg.dec
   MdePkg/MdePkg.dec
   MdeModulePkg/MdeModulePkg.dec
+  Silicon/Hisilicon/HisiliconNonOsi.dec
   Silicon/Hisilicon/HisiPkg.dec
 
 [LibraryClasses]
diff --git a/Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.inf 
b/Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.inf
index 022c3e940a31..7ec577530610 100644
--- a/Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.inf
+++ b/Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.inf
@@ -30,6 +30,7 @@ [Packages]
   ArmPkg/ArmPkg.dec
   MdeModulePkg/MdeModulePkg.dec
   MdePkg/MdePkg.dec
+  Silicon/Hisilicon/HisiliconNonOsi.dec
   Silicon/Hisilicon/HisiPkg.dec
 
 [LibraryClasses]
diff --git a/Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.inf 
b/Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.inf
index 8296ee02de4e..715a4efadde8 100644
--- a/Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.inf
+++ b/Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.inf
@@ -29,6 +29,7 @@ [Packages]
   ArmPkg/ArmPkg.dec
   MdeModulePkg/MdeModulePkg.dec
   MdePkg/MdePkg.dec
+  Silicon/Hisilicon/HisiliconNonOsi.dec
   Silicon/Hisilicon/HisiPkg.dec
 
 [LibraryClasses]
diff --git a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.inf 
b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.inf
index 75c5054bbfd1..9bc6eb549c41 100644
--- a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.inf
+++ b/Platform/Hisilicon/D06/Library

[edk2] [PATCH edk2-platforms v2 18/18] Hisilicon/D0x: Modify version to 19.02

2019-02-19 Thread Ming Huang

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
Reviewed-by: Leif Lindholm 
---
 Platform/Hisilicon/D03/D03.dsc | 4 ++--
 Platform/Hisilicon/D05/D05.dsc | 4 ++--
 Platform/Hisilicon/D06/D06.dsc | 4 ++--
 3 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
index 35b54f8c83be..07ff461277df 100644
--- a/Platform/Hisilicon/D03/D03.dsc
+++ b/Platform/Hisilicon/D03/D03.dsc
@@ -171,12 +171,12 @@ [PcdsFixedAtBuild.common]
   !ifdef $(FIRMWARE_VER)
 gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"$(FIRMWARE_VER)"
   !else
-gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Development 
build 18.08 for Hisilicon D03"
+gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Development 
build 19.02 for Hisilicon D03"
   !endif
 
   gHisiTokenSpaceGuid.PcdBiosVersionString|L"10.01.01T18"
 
-  gHisiTokenSpaceGuid.PcdBiosVersionForBmc|L"1.12"
+  gHisiTokenSpaceGuid.PcdBiosVersionForBmc|L"19.02"
 
   gHisiTokenSpaceGuid.PcdSystemProductName|L"D03"
   gHisiTokenSpaceGuid.PcdSystemVersion|L"Estuary"
diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
index 49bd5b37ea34..70b044c7e33a 100644
--- a/Platform/Hisilicon/D05/D05.dsc
+++ b/Platform/Hisilicon/D05/D05.dsc
@@ -187,12 +187,12 @@ [PcdsFixedAtBuild.common]
   !ifdef $(FIRMWARE_VER)
 gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"$(FIRMWARE_VER)"
   !else
-gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Development 
build 18.08 for Hisilicon D05"
+gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Development 
build 19.02 for Hisilicon D05"
   !endif
 
   gHisiTokenSpaceGuid.PcdBiosVersionString|L"10.01.01T18"
 
-  gHisiTokenSpaceGuid.PcdBiosVersionForBmc|L"1.12"
+  gHisiTokenSpaceGuid.PcdBiosVersionForBmc|L"19.02"
 
   gHisiTokenSpaceGuid.PcdSystemProductName|L"D05"
   gHisiTokenSpaceGuid.PcdSystemVersion|L"Estuary"
diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc
index a3a01bfb1e23..73bea728b0f6 100644
--- a/Platform/Hisilicon/D06/D06.dsc
+++ b/Platform/Hisilicon/D06/D06.dsc
@@ -156,12 +156,12 @@ [PcdsFixedAtBuild.common]
   !ifdef $(FIRMWARE_VER)
 gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"$(FIRMWARE_VER)"
   !else
-gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Development 
build 18.08 for Hisilicon D06"
+gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Development 
build 19.02 for Hisilicon D06"
   !endif
 
   gHisiTokenSpaceGuid.PcdBiosVersionString|L"10.01.01T18"
 
-  gHisiTokenSpaceGuid.PcdBiosVersionForBmc|L"0.42"
+  gHisiTokenSpaceGuid.PcdBiosVersionForBmc|L"19.02"
 
   gHisiTokenSpaceGuid.PcdSystemProductName|L"D06"
   gHisiTokenSpaceGuid.PcdSystemVersion|L"VER.A"
-- 
2.9.5

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[edk2] [PATCH edk2-platforms v2 13/18] Hisilicon/D06: Remove SECURE_BOOT_ENABLE definition

2019-02-19 Thread Ming Huang

As secure boot is not ready, remove SECURE_BOOT_ENABLE and
relative code.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
Reviewed-by: Leif Lindholm 
---
 Platform/Hisilicon/D06/D06.dsc | 12 
 Platform/Hisilicon/D06/D06.fdf | 11 ---
 2 files changed, 23 deletions(-)

diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc
index 3856578e74be..d762230768e9 100644
--- a/Platform/Hisilicon/D06/D06.dsc
+++ b/Platform/Hisilicon/D06/D06.dsc
@@ -30,7 +30,6 @@ [Defines]
   FLASH_DEFINITION   = 
Platform/Hisilicon/$(PLATFORM_NAME)/$(PLATFORM_NAME).fdf
   DEFINE NETWORK_IP6_ENABLE  = FALSE
   DEFINE HTTP_BOOT_ENABLE= FALSE
-  DEFINE SECURE_BOOT_ENABLE  = FALSE
 
 !include Silicon/Hisilicon/Hisilicon.dsc.inc
 
@@ -89,9 +88,6 @@ [LibraryClasses.common]
   LpcLib|Silicon/Hisilicon/Hi1620/Library/LpcLibHi1620/LpcLib.inf
   
SerialPortLib|ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf
   OemNicLib|Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.inf
-!if $(SECURE_BOOT_ENABLE) == TRUE
-  FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf
-!endif
   PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf
   
PciPlatformLib|Silicon/Hisilicon/Hi1620/Library/Hi1620PciPlatformLib/Hi1620PciPlatformLib.inf
 
@@ -292,15 +288,7 @@ [Components.common]
   MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
   Platform/Hisilicon/D06/Drivers/OemNicConfig2PHi1620/OemNicConfig2P.inf
 
-!if $(SECURE_BOOT_ENABLE) == TRUE
-  MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf {
-
-  
NULL|SecurityPkg/Library/DxeImageVerificationLib/DxeImageVerificationLib.inf
-  }
-  SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf
-!else
   MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
-!endif
   Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.inf
   MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf {
 
diff --git a/Platform/Hisilicon/D06/D06.fdf b/Platform/Hisilicon/D06/D06.fdf
index f72b513352fb..e402628a1b35 100644
--- a/Platform/Hisilicon/D06/D06.fdf
+++ b/Platform/Hisilicon/D06/D06.fdf
@@ -88,17 +88,10 @@ [FD.D06]
   #Blockmap[1]: End
   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
   ## This is the VARIABLE_STORE_HEADER
-!if $(SECURE_BOOT_ENABLE) == TRUE
-  #Signature: gEfiAuthenticatedVariableGuid =
-  #  { 0xaaf32c78, 0x947b, 0x439a, { 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 
0x92 }}
-  0x78, 0x2c, 0xf3, 0xaa, 0x7b, 0x94, 0x9a, 0x43,
-  0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92,
-!else
   #Signature: gEfiVariableGuid =
   #  { 0xddcf3616, 0x3275, 0x4164, { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 
0x7d }}
   0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41,
   0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d,
-!endif
   #Size: 0xe000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) 
- 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0xdFB8
   0xB8, 0xdF, 0x00, 0x00,
   #FORMATTED: 0x5A #HEALTHY: 0xFE #Reserved: UINT16 #Reserved1: UINT32
@@ -183,10 +176,6 @@ [FV.FvMain]
   INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
   INF 
MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
 
-!if $(SECURE_BOOT_ENABLE) == TRUE
-  INF 
SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf
-!endif
-
   INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf
   INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
   INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
-- 
2.9.5

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[edk2] [PATCH edk2-platforms v2 15/18] Hisilicon/D06: Fix USB crash issue(4079)

2019-02-19 Thread Ming Huang

Last patch "Modify IORT" change revision id of node type 2 to 1,
and 4.19 later kernel will judge the revision id to get root pci
bridge DMA informations from IORT. As Hi1620 USB 2.0 don't support
64 bit DMA, but the DMA attribute get from IORT node type 2 is 64
bit. So add _DMA method in USB pci bridge 3 and pci bridge 8 to
fix usb crash when usb device is present issue.

https://bugs.linaro.org/show_bug.cgi?id=4079

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl | 46 

 1 file changed, 46 insertions(+)

diff --git a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl 
b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl
index 6dc380f27fa2..c1083dc16a2a 100644
--- a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl
+++ b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl
@@ -375,6 +375,29 @@ Device (PCI2)
 
   PCI_OSC_SUPPORT ()
 
+  Method(_DMA, 0, Serialized)
+  {
+Return (ResourceTemplate()
+{
+  QWORDMemory(
+  ResourceConsumer,
+  PosDecode,  // _DEC
+  MinFixed,   // _MIF
+  MaxFixed,   // _MAF
+  Prefetchable,   // _MEM
+  ReadWrite,  // _RW
+  0,  // _GRA
+  0x, // _MIN
+  0x, // _MAX
+  0x,// _TRA
+  0x1, // _LEN
+  ,
+  ,
+  ,
+  )
+})
+  }
+
   Method (_STA, 0x0, NotSerialized)
   {
 Return (0xf)
@@ -1077,6 +1100,29 @@ Device (PCI8)
 Return (0xf)
   }
 
+  Method(_DMA, 0, Serialized)
+  {
+Return (ResourceTemplate()
+{
+  QWORDMemory(
+  ResourceConsumer,
+  PosDecode,  // _DEC
+  MinFixed,   // _MIF
+  MaxFixed,   // _MAF
+  Prefetchable,   // _MEM
+  ReadWrite,  // _RW
+  0,  // _GRA
+  0x, // _MIN
+  0x, // _MAX
+  0x,// _TRA
+  0x1, // _LEN
+  ,
+  ,
+  ,
+  )
+})
+  }
+
   Method (_PXM, 0, NotSerialized)
   {
 Return(0x02)
-- 
2.9.5

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[edk2] [PATCH edk2-platforms v2 14/18] Hisilicon/D0x: Remove SP805 watchdog pcd

2019-02-19 Thread Ming Huang

SP805 watchdog is no used for D0x, so remove it.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
Reviewed-by: Leif Lindholm 
---
 Platform/Hisilicon/D03/D03.dsc   | 3 ---
 Platform/Hisilicon/D05/D05.dsc   | 3 ---
 Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLib.inf | 1 -
 3 files changed, 7 deletions(-)

diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
index fe443dd929ad..35b54f8c83be 100644
--- a/Platform/Hisilicon/D03/D03.dsc
+++ b/Platform/Hisilicon/D03/D03.dsc
@@ -149,9 +149,6 @@ [PcdsFixedAtBuild.common]
 
   gHisiTokenSpaceGuid.PcdPcieRootBridgeMask|0x7 # 
bit0:HB0RB0,bit1:HB0RB1,bit2:HB0RB2,bit3:HB0RB3,bit4:HB1RB0,bit5:HB1RB1,bit6:HB1RB2,bit7:HB1RB3
 
-  ## SP805 Watchdog - Motherboard Watchdog
-  gArmPlatformTokenSpaceGuid.PcdSP805WatchdogBase|0x601e
-
   ## Serial Terminal
   gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x2F8
   gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200
diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
index 0c4f21fbe056..49bd5b37ea34 100644
--- a/Platform/Hisilicon/D05/D05.dsc
+++ b/Platform/Hisilicon/D05/D05.dsc
@@ -163,9 +163,6 @@ [PcdsFixedAtBuild.common]
   gHisiTokenSpaceGuid.PcdPcieRootBridgeMask2P|0x34F4 # 
bit0:HB0RB0,bit1:HB0RB1,bit2:HB0RB2,bit3:HB0RB3,bit4:HB0RB4,bit5:HB0RB5,bit6:HB0RB6,bit7:HB0RB7
 # 
bit8:HB1RB0,bit9:HB1RB1,bit10:HB1RB2,bit11:HB1RB3,bit12:HB1RB4,bit13:HB1RB5,bit14:HB1RB6,bit14:HB1RB15
 
-  ## SP805 Watchdog - Motherboard Watchdog
-  gArmPlatformTokenSpaceGuid.PcdSP805WatchdogBase|0x601e
-
   ## Serial Terminal
   gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x602B
   gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200
diff --git 
a/Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLib.inf 
b/Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLib.inf
index 3563df6e10d1..4ce5f5fea1f3 100644
--- a/Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLib.inf
+++ b/Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLib.inf
@@ -61,5 +61,4 @@ [FixedPcd]
   gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
   gHisiTokenSpaceGuid.PcdSysControlBaseAddress
   gHisiTokenSpaceGuid.PcdPeriSubctrlAddress
-  gArmPlatformTokenSpaceGuid.PcdSP805WatchdogBase
 
-- 
2.9.5

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[edk2] [PATCH edk2-platforms v2 06/18] Hisilicon/D06: Add OemGetCpuFreq to encapsulate difference

2019-02-19 Thread Ming Huang

From: xingjiang tang 

Implementation OemGetCpuFreq() to get cpu frequency from cpld to
encapsulate project difference, for some projects don't support
get cpu frequency by this way.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Platform/Hisilicon/D06/Include/Library/CpldD06.h |  4 
 Silicon/Hisilicon/Include/Library/OemMiscLib.h   |  2 ++
 Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c | 16 

 3 files changed, 22 insertions(+)

diff --git a/Platform/Hisilicon/D06/Include/Library/CpldD06.h 
b/Platform/Hisilicon/D06/Include/Library/CpldD06.h
index ec9b49f4e70d..8eb333de529c 100644
--- a/Platform/Hisilicon/D06/Include/Library/CpldD06.h
+++ b/Platform/Hisilicon/D06/Include/Library/CpldD06.h
@@ -36,4 +36,8 @@
 #define CPLD_X8_X8_X8_BOARD_ID0x92
 #define CPLD_X16_X8_BOARD_ID  0x93
 
+#define CPLD_CLOCK_FLAG  0xFD
+#define CPLD_BOM_VER_FLAG0x0B
+#define CPLD_BOARD_REVISION_4TH   0x4
+
 #endif /* __CPLDD06_H__ */
diff --git a/Silicon/Hisilicon/Include/Library/OemMiscLib.h 
b/Silicon/Hisilicon/Include/Library/OemMiscLib.h
index 86ea6a1b3deb..dfac87d635d9 100644
--- a/Silicon/Hisilicon/Include/Library/OemMiscLib.h
+++ b/Silicon/Hisilicon/Include/Library/OemMiscLib.h
@@ -53,4 +53,6 @@ BOOLEAN OemIsNeedDisableExpanderBuffer(VOID);
 
 extern EFI_STRING_ID gDimmToDevLocator[MAX_SOCKET][MAX_CHANNEL][MAX_DIMM];
 EFI_HII_HANDLE EFIAPI OemGetPackages ();
+UINTN OemGetCpuFreq (UINT8 Socket);
+
 #endif
diff --git a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c 
b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c
index 2a9db46d1ff9..624fa33d2e14 100644
--- a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c
+++ b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c
@@ -207,3 +207,19 @@ OemIsNeedDisableExpanderBuffer (
 {
   return TRUE;
 }
+
+UINTN OemGetCpuFreq (UINT8 Socket)
+{
+  UINT8 BoardRevision;
+
+  BoardRevision = MmioRead8 (CPLD_BASE_ADDRESS + CPLD_BOM_VER_FLAG);
+
+  // Board revision 4 and higher run at 2.5GHz
+  // Earlier revisions run at 2GHz
+  if (BoardRevision >= CPLD_BOARD_REVISION_4TH) {
+return 25;
+  } else {
+return 20;
+  }
+}
+
-- 
2.9.5

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[edk2] [PATCH edk2-platforms v2 11/18] Hisilicon/D06: Add Setup Item "Support DPC" and delete some PCIe menus

2019-02-19 Thread Ming Huang

Add setup item "Support DPC" to enable or disable PCIe DPC
(Downstream Port Containment).

The pcie menu is suppressed for original code as these menus
are not ready. This patch remove the suppression for pcie menu,
so delete these menus for now.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Silicon/Hisilicon/Include/Library/OemConfigData.h   |   1 +
 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr  |   2 -
 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c   |   4 +
 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr| 197 
+---
 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfigStrings.uni |   3 +-
 5 files changed, 10 insertions(+), 197 deletions(-)

diff --git a/Silicon/Hisilicon/Include/Library/OemConfigData.h 
b/Silicon/Hisilicon/Include/Library/OemConfigData.h
index f120e3123c83..c0097d0829f0 100644
--- a/Silicon/Hisilicon/Include/Library/OemConfigData.h
+++ b/Silicon/Hisilicon/Include/Library/OemConfigData.h
@@ -49,6 +49,7 @@ typedef struct {
   UINT8 OSWdtAction;
   /*PCIe Config*/
   UINT8 PcieSRIOVSupport;
+  UINT8 PcieDPCSupport;
   UINT8 PciePort[PCIE_MAX_TOTAL_PORTS];
   UINT8 PcieLinkSpeedPort[PCIE_MAX_TOTAL_PORTS];
   UINT8 PcieLinkDeEmphasisPort[PCIE_MAX_TOTAL_PORTS];
diff --git a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr 
b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr
index 08236704fbfe..93ccb99bdc67 100644
--- a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr
+++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr
@@ -62,11 +62,9 @@ formset
   prompt = STRING_TOKEN(STR_IBMC_CONFIG_FORM_TITLE),
   help   = STRING_TOKEN(STR_IBMC_CONFIG_FORM_HELP);
 
-suppressif TRUE;
 goto PCIE_CONFIG_FORM_ID,
   prompt  = STRING_TOKEN(STR_PCIE_CONFIG_FORM_TITLE),
   help= STRING_TOKEN(STR_PCIE_CONFIG_FORM_HELP);
-endif;
 
 goto MISC_CONFIG_FORM_ID,
   prompt  = STRING_TOKEN(STR_MISC_CONFIG_FORM_TITLE),
diff --git a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c 
b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c
index 6668103af027..be4ce8820f73 100644
--- a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c
+++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c
@@ -290,6 +290,10 @@ OemConfigUiLibConstructor (
   Configuration.OSWdtTimeout = 5;
   Configuration.OSWdtAction = 1;
   //
+  //Set the default value of the PCIe option
+  //
+  Configuration.PcieDPCSupport = 0;
+  //
   //Set the default value of the Misc option
   //
   Configuration.EnableSmmu = 1;
diff --git a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr 
b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr
index 7cf7cdd29ba2..c65907fe846e 100644
--- a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr
+++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr
@@ -17,203 +17,12 @@
 form formid = PCIE_CONFIG_FORM_ID,
   title   = STRING_TOKEN (STR_PCIE_CONFIG_FORM_TITLE);
 
-  goto VFR_FORMID_PCIE_SOCKET0,
-prompt  = STRING_TOKEN (STR_PCIE_CPU_0_PROMPT),
-help= STRING_TOKEN (STR_PCIE_CPU_PROMPT_HELP);
-
-  goto VFR_FORMID_PCIE_SOCKET1,
-prompt  = STRING_TOKEN (STR_PCIE_CPU_1_PROMPT),
-help= STRING_TOKEN (STR_PCIE_CPU_PROMPT_HELP);
-
-  oneof varid  = OEM_CONFIG_DATA.PcieSRIOVSupport,
-prompt   = STRING_TOKEN (STR_SRIOV_SUPPORT_PROMPT),
-help = STRING_TOKEN (STR_SRIOV_SUPPORT_HELP),
+  oneof varid  = OEM_CONFIG_DATA.PcieDPCSupport,
+prompt   = STRING_TOKEN (STR_DPC_SUPPORT_PROMPT),
+help = STRING_TOKEN (STR_DPC_SUPPORT_HELP),
 option text = STRING_TOKEN (STR_DISABLE), value = 0, flags = 
MANUFACTURING | DEFAULT | RESET_REQUIRED;
 option text = STRING_TOKEN (STR_ENABLE),  value = 1, flags = 
RESET_REQUIRED;
   endoneof;
 
 endform;
 
-form formid = VFR_FORMID_PCIE_SOCKET0,
-  title = STRING_TOKEN(STR_PCIE_CPU_0_PROMPT);
-
-  goto VFR_FORMID_PCIE_PORT2,
-prompt  = STRING_TOKEN(STR_PCIE_PORT_2_PROMPT),
-help= STRING_TOKEN(STR_PCIE_PORT_PROMPT_HELP);
-
-  goto VFR_FORMID_PCIE_PORT4,
-prompt  = STRING_TOKEN(STR_PCIE_PORT_4_PROMPT),
-help= STRING_TOKEN(STR_PCIE_PORT_PROMPT_HELP);
-
-  goto VFR_FORMID_PCIE_PORT5,
-prompt  = STRING_TOKEN(STR_PCIE_PORT_5_PROMPT),
-help= STRING_TOKEN(STR_PCIE_PORT_PROMPT_HELP);
-
-  goto VFR_FORMID_PCIE_PORT6,
-prompt  = STRING_TOKEN(STR_PCIE_PORT_6_PROMPT),
-help= STRING_TOKEN(STR_PCIE_PORT_PROMPT_HELP);
-
-  goto VFR_FORMID_PCIE_PORT7,
-prompt  = STRING_TOKEN(STR_PCIE_PORT_7_PROMPT),
-help= STRING_TOKEN(STR_PCIE_PORT_PROMPT_HELP);
-
-endform;
-
-form formid = VFR_FORMID_PCIE_SOCKET1,
-  title = STRING_TOKEN(STR_PCIE_CPU_1_PROMPT);
-  goto VFR_FORMID_PCIE_PORT10,
-

[edk2] [PATCH edk2-platforms v2 09/18] Hisilicon/D06: Add PCI_OSC_SUPPORT

2019-02-19 Thread Ming Huang

Add PCI_OSC_SUPPORT for remaining host bridges to remove fail
output in kernel:
[  103.478893] acpi PNP0A08:01: _OSC failed (AE_NOT_FOUND);

Add PCI_OSC_SUPPORT_HOTPLUG to rewrite _OSC of PCI0 and PCI6.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl | 200 
+++-
 1 file changed, 106 insertions(+), 94 deletions(-)

diff --git a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl 
b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl
index 4d9d9d95be68..6dc380f27fa2 100644
--- a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl
+++ b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl
@@ -17,6 +17,90 @@
 **/
 
 //#include "ArmPlatform.h"
+
+/*
+  See ACPI 6.1 Spec, 6.2.11, PCI Firmware Spec 3.0, 4.5
+*/
+#define PCI_OSC_SUPPORT() \
+  Name(SUPP, Zero) /* PCI _OSC Support Field value */ \
+  Name(CTRL, Zero) /* PCI _OSC Control Field value */ \
+  Method(_OSC,4) { \
+If(LEqual(Arg0,ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))) { \
+  /* Create DWord-adressable fields from the Capabilities Buffer */ \
+  CreateDWordField(Arg3,0,CDW1) \
+  CreateDWordField(Arg3,4,CDW2) \
+  CreateDWordField(Arg3,8,CDW3) \
+  /* Save Capabilities DWord2 & 3 */ \
+  Store(CDW2,SUPP) \
+  Store(CDW3,CTRL) \
+  /* Only allow native hot plug control if OS supports: */ \
+  /* ASPM */ \
+  /* Clock PM */ \
+  /* MSI/MSI-X */ \
+  If(LNotEqual(And(SUPP, 0x16), 0x16)) { \
+And(CTRL,0x1E,CTRL) \
+  }\
+  \
+  /* Do not allow native PME, AER */ \
+  /* Never allow SHPC (no SHPC controller in this system)*/ \
+  And(CTRL,0x10,CTRL) \
+  If(LNotEqual(Arg1,One)) { /* Unknown revision */ \
+Or(CDW1,0x08,CDW1) \
+  } \
+  \
+  If(LNotEqual(CDW3,CTRL)) { /* Capabilities bits were masked */ \
+Or(CDW1,0x10,CDW1) \
+  } \
+  \
+  /* Update DWORD3 in the buffer */ \
+  Store(CTRL,CDW3) \
+  Return(Arg3) \
+} Else { \
+  Or(CDW1,4,CDW1) /* Unrecognized UUID */ \
+  Return(Arg3) \
+} \
+  } // End _OSC
+
+#define PCI_OSC_SUPPORT_HOTPLUG() \
+  Name(SUPP, Zero) /* PCI _OSC Support Field value */ \
+  Name(CTRL, Zero) /* PCI _OSC Control Field value */ \
+  Method(_OSC,4) { \
+If(LEqual(Arg0,ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))) { \
+  /* Create DWord-adressable fields from the Capabilities Buffer */ \
+  CreateDWordField(Arg3,0,CDW1) \
+  CreateDWordField(Arg3,4,CDW2) \
+  CreateDWordField(Arg3,8,CDW3) \
+  /* Save Capabilities DWord2 & 3 */ \
+  Store(CDW2,SUPP) \
+  Store(CDW3,CTRL) \
+  /* Only allow native hot plug control if OS supports: */ \
+  /* ASPM */ \
+  /* Clock PM */ \
+  /* MSI/MSI-X */ \
+  If(LNotEqual(And(SUPP, 0x16), 0x16)) { \
+And(CTRL,0x1E,CTRL) \
+  }\
+  \
+  /* Always allow native PME, AER (no dependencies) */ \
+  /* Never allow SHPC (no SHPC controller in this system)*/ \
+  And(CTRL,0x1D,CTRL) \
+  If(LNotEqual(Arg1,One)) { /* Unknown revision */ \
+Or(CDW1,0x08,CDW1) \
+  } \
+  \
+  If(LNotEqual(CDW3,CTRL)) { /* Capabilities bits were masked */ \
+Or(CDW1,0x10,CDW1) \
+  } \
+  \
+  /* Update DWORD3 in the buffer */ \
+  Store(CTRL,CDW3) \
+  Return(Arg3) \
+} Else { \
+  Or(CDW1,4,CDW1) /* Unrecognized UUID */ \
+  Return(Arg3) \
+} \
+  } // End _OSC
+
 Scope(_SB)
 {
   Device (PCI0)
@@ -139,53 +223,7 @@ Scope(_SB)
   Return (RBUF)
 }// Method(_CRS), this method 
return RBUF!
 
-  //
-  // OS Control Handoff
-  //
-  Name(SUPP, Zero) // PCI _OSC Support Field value
-  Name(CTRL, Zero) // PCI _OSC Control Field value
-
-  Method(_OSC,4) {
-// Check for proper UUID
-If(LEqual(Arg0,ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))) {
-  // Create DWord-adressable fields from the Capabilities Buffer
-  CreateDWordField(Arg3,0,CDW1)
-  CreateDWordField(Arg3,4,CDW2)
-  CreateDWordField(Arg3,8,CDW3)
-
-  // Save Capabilities DWord2 & 3
-  Store(CDW2,SUPP)
-  Store(CDW3,CTRL)
-
-  // Only allow native hot plug control if OS supports:
-  //  ASPM
-  //  Clock PM
-  //  MSI/MSI-X
-  If(LNotEqual(And(SUPP, 0x16), 0x16)) {
-And(CTRL,0x1E,CTRL) // Mask bit 0 (and undefined bits)
-  }
-
-  // Always allow native PME, AER (no dependencies)
-
-  // Never allow SHPC (no SHPC controller in this system)
-  And(CTRL,0x1D,CTRL)
-
-  If(LNotEqual(Arg1,One)) {  // Unknown revision
-Or(CDW1,0x08,CDW1)
-  }
-
-  If(LNotEqual(CDW3,CTRL)) {  // Capabilities bits were masked
-Or(CDW1,0x10,CDW1)
-  }
-
-  // Update DWORD3 in the buffer
-  Store(CTRL,CDW3)
-

[edk2] [PATCH edk2-platforms v2 07/18] Hisilicon/D0x: Rename StartupAp() function

2019-02-19 Thread Ming Huang

As suggestion of community, 'AP' is a bit unfortunate to use in EDK2
context. PI specifies 'BSP' for Boot-strap Processor, as the one
executing all of the EDK2 code. It then uses 'AP' to refer to
Additional Processors, which can be assigned tasks using the
EFI_MP_SERVICES_PROTOCOL. In a TianoCore context, this should be 'BSP'.
So, Rename StartupAp() to StartUpBSP.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
Reviewed-by: Leif Lindholm 
---
 Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h   | 2 +-
 Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.c  | 2 +-
 Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.c | 2 +-
 Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.c  | 2 +-
 Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.c | 3 ++-
 Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.c  | 2 +-
 6 files changed, 7 insertions(+), 6 deletions(-)

diff --git a/Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h 
b/Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h
index a232e52ed719..712b77c44fc8 100644
--- a/Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h
+++ b/Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h
@@ -76,7 +76,7 @@ VOID MN_CONFIG (VOID);
 VOID SmmuConfigForOS (VOID);
 VOID SmmuConfigForBios (VOID);
 
-VOID StartupAp (VOID);
+VOID StartUpBSP (VOID);
 
 VOID LlcCleanInvalidate (VOID);
 
diff --git a/Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.c 
b/Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.c
index 97cf6b8d8757..dacd9e871faf 100644
--- a/Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.c
+++ b/Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.c
@@ -83,7 +83,7 @@ void QResetAp(VOID)
 //SCCL A
 if (!PcdGet64 (PcdTrustedFirmwareEnable))
 {
-StartupAp();
+StartUpBSP ();
 }
 }
 
diff --git a/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.c 
b/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.c
index b57fdfa68e45..c8a9da73bbca 100644
--- a/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.c
+++ b/Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.c
@@ -133,7 +133,7 @@ VOID CoreSelectBoot(VOID)
 {
 if (!PcdGet64 (PcdTrustedFirmwareEnable))
 {
-StartupAp ();
+StartUpBSP ();
 }
 
 return;
diff --git a/Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.c 
b/Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.c
index 76a055cbe980..b374347e5c4d 100644
--- a/Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.c
+++ b/Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.c
@@ -35,7 +35,7 @@ QResetAp (
   (VOID)WriteBackInvalidateDataCacheRange((VOID *) 
FixedPcdGet64(PcdMailBoxAddress), 8);
 
   if (!PcdGet64 (PcdTrustedFirmwareEnable)) {
-StartupAp();
+StartUpBSP ();
   }
 }
 
diff --git a/Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.c 
b/Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.c
index 4c4c944dbead..a1458da7f0a3 100644
--- a/Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.c
+++ b/Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.c
@@ -96,7 +96,7 @@ UINTN OemGetDimmSlot(UINTN Socket, UINTN Channel)
 VOID CoreSelectBoot(VOID)
 {
   if (!PcdGet64 (PcdTrustedFirmwareEnable)) {
-  StartupAp ();
+  StartUpBSP ();
   }
 
   return;
@@ -128,3 +128,4 @@ BOOLEAN OemIsNeedDisableExpanderBuffer(VOID)
 {
   return TRUE;
 }
+
diff --git a/Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.c 
b/Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.c
index 0790f7941ae7..a8261d370626 100644
--- a/Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.c
+++ b/Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.c
@@ -78,7 +78,7 @@ QResetAp (
 
   //SCCL A
   if (!PcdGet64 (PcdTrustedFirmwareEnable)) {
-StartupAp ();
+StartUpBSP ();
   }
 }
 
-- 
2.9.5

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[edk2] [PATCH edk2-platforms v2 05/18] Hisilicon/D06: Add more PCIe port INT-x support

2019-02-19 Thread Ming Huang

Since NVMe riser width is 6*X4, need add the related
port's INT-x support to match OS driver.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl | 37 
+++-
 1 file changed, 36 insertions(+), 1 deletion(-)

diff --git a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl 
b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl
index 0f2d11bb952b..4d9d9d95be68 100644
--- a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl
+++ b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl
@@ -41,11 +41,21 @@ Scope(_SB)
   // adding RPx INTx configure deponds on hardware board topology,
   // if UEFI enables RPx, RPy, RPz... related INTx configure
   // should be added
+  Package () {0x2,0,0,640}, // INT_A
+  Package () {0x2,1,0,641}, // INT_B
+  Package () {0x2,2,0,642}, // INT_C
+  Package () {0x2,3,0,643}, // INT_D
+
   Package () {0x4,0,0,640}, // INT_A
   Package () {0x4,1,0,641}, // INT_B
   Package () {0x4,2,0,642}, // INT_C
   Package () {0x4,3,0,643}, // INT_D
 
+  Package () {0x6,0,0,640}, // INT_A
+  Package () {0x6,1,0,641}, // INT_B
+  Package () {0x6,2,0,642}, // INT_C
+  Package () {0x6,3,0,643}, // INT_D
+
   Package () {0x8,0,0,640}, // INT_A
   Package () {0x8,1,0,641}, // INT_B
   Package () {0x8,2,0,642}, // INT_C
@@ -56,6 +66,11 @@ Scope(_SB)
   Package () {0xC,2,0,642}, // INT_C
   Package () {0xC,3,0,643}, // INT_D
 
+  Package () {0xE,0,0,640}, // INT_A
+  Package () {0xE,1,0,641}, // INT_B
+  Package () {0xE,2,0,642}, // INT_C
+  Package () {0xE,3,0,643}, // INT_D
+
   Package () {0x10,0,0,640}, // INT_A
   Package () {0x10,1,0,641}, // INT_B
   Package () {0x10,2,0,642}, // INT_C
@@ -759,11 +774,21 @@ Device (PCI6)
 // adding RPx INTx configure deponds on hardware board topology,
 // if UEFI enables RPx, RPy, RPz... related INTx configure
 // should be added
+Package () {0x2,0,0,640}, // INT_A
+Package () {0x2,1,0,641}, // INT_B
+Package () {0x2,2,0,642}, // INT_C
+Package () {0x2,3,0,643}, // INT_D
+
 Package () {0x4,0,0,640}, // INT_A
 Package () {0x4,1,0,641}, // INT_B
 Package () {0x4,2,0,642}, // INT_C
 Package () {0x4,3,0,643}, // INT_D
 
+Package () {0x6,0,0,640}, // INT_A
+Package () {0x6,1,0,641}, // INT_B
+Package () {0x6,2,0,642}, // INT_C
+Package () {0x6,3,0,643}, // INT_D
+
 Package () {0x8,0,0,640}, // INT_A
 Package () {0x8,1,0,641}, // INT_B
 Package () {0x8,2,0,642}, // INT_C
@@ -774,11 +799,21 @@ Device (PCI6)
 Package () {0xC,2,0,642}, // INT_C
 Package () {0xC,3,0,643}, // INT_D
 
+Package () {0xE,0,0,640}, // INT_A
+Package () {0xE,1,0,641}, // INT_B
+Package () {0xE,2,0,642}, // INT_C
+Package () {0xE,3,0,643}, // INT_D
+
 Package () {0x10,0,0,640}, // INT_A
 Package () {0x10,1,0,641}, // INT_B
 Package () {0x10,2,0,642}, // INT_C
 Package () {0x10,3,0,643}, // INT_D
-  })
+
+Package () {0x12,0,0,640}, // INT_A
+Package () {0x12,1,0,641}, // INT_B
+Package () {0x12,2,0,642}, // INT_C
+Package () {0x12,3,0,643}, // INT_D
+})
 
   Method (_CRS, 0, Serialized) {   // Root complex resources, _CRS: 
current resource setting
 Name (RBUF, ResourceTemplate () {  // Name: 19.6.87, ResourceTemplate: 
19.6.111,
-- 
2.9.5

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[edk2] [PATCH edk2-platforms v2 04/18] Hisilicon/D06: Drop the leading 0 (0x0 -> 0x)

2019-02-19 Thread Ming Huang

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl | 24 
++--
 1 file changed, 12 insertions(+), 12 deletions(-)

diff --git a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl 
b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl
index 27fde2e09bfe..0f2d11bb952b 100644
--- a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl
+++ b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl
@@ -759,20 +759,20 @@ Device (PCI6)
 // adding RPx INTx configure deponds on hardware board topology,
 // if UEFI enables RPx, RPy, RPz... related INTx configure
 // should be added
-Package () {0x04,0,0,640}, // INT_A
-Package () {0x04,1,0,641}, // INT_B
-Package () {0x04,2,0,642}, // INT_C
-Package () {0x04,3,0,643}, // INT_D
+Package () {0x4,0,0,640}, // INT_A
+Package () {0x4,1,0,641}, // INT_B
+Package () {0x4,2,0,642}, // INT_C
+Package () {0x4,3,0,643}, // INT_D
 
-Package () {0x08,0,0,640}, // INT_A
-Package () {0x08,1,0,641}, // INT_B
-Package () {0x08,2,0,642}, // INT_C
-Package () {0x08,3,0,643}, // INT_D
+Package () {0x8,0,0,640}, // INT_A
+Package () {0x8,1,0,641}, // INT_B
+Package () {0x8,2,0,642}, // INT_C
+Package () {0x8,3,0,643}, // INT_D
 
-Package () {0x0C,0,0,640}, // INT_A
-Package () {0x0C,1,0,641}, // INT_B
-Package () {0x0C,2,0,642}, // INT_C
-Package () {0x0C,3,0,643}, // INT_D
+Package () {0xC,0,0,640}, // INT_A
+Package () {0xC,1,0,641}, // INT_B
+Package () {0xC,2,0,642}, // INT_C
+Package () {0xC,3,0,643}, // INT_D
 
 Package () {0x10,0,0,640}, // INT_A
 Package () {0x10,1,0,641}, // INT_B
-- 
2.9.5

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[edk2] [PATCH edk2-platforms v2 08/18] Hisilicon/D06: Use HCCS speed with 2.6G

2019-02-19 Thread Ming Huang

Follow chip team suggestion, HCCS(Huawei Cache-Coherent System)
may be unstable while speed is 3.0G, so use 2.6G to avoid some
unstable stress issue.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Silicon/Hisilicon/Include/Library/OemMiscLib.h   | 10 ++
 Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c |  8 
 2 files changed, 18 insertions(+)

diff --git a/Silicon/Hisilicon/Include/Library/OemMiscLib.h 
b/Silicon/Hisilicon/Include/Library/OemMiscLib.h
index dfac87d635d9..ea95fe38d75c 100644
--- a/Silicon/Hisilicon/Include/Library/OemMiscLib.h
+++ b/Silicon/Hisilicon/Include/Library/OemMiscLib.h
@@ -22,6 +22,11 @@
 #include 
 #include 
 
+#define HCCS_PLL_VALUE_2600  0x52240681
+#define HCCS_PLL_VALUE_2800  0x52240701
+#define HCCS_PLL_VALUE_3000  0x52240781
+
+
 #define PCIEDEVICE_REPORT_MAX  8
 #define MAX_PROCESSOR_SOCKETS  MAX_SOCKET
 #define MAX_MEMORY_CHANNELSMAX_CHANNEL
@@ -55,4 +60,9 @@ extern EFI_STRING_ID 
gDimmToDevLocator[MAX_SOCKET][MAX_CHANNEL][MAX_DIMM];
 EFI_HII_HANDLE EFIAPI OemGetPackages ();
 UINTN OemGetCpuFreq (UINT8 Socket);
 
+UINTN
+OemGetHccsFreq (
+  VOID
+  );
+
 #endif
diff --git a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c 
b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c
index 624fa33d2e14..914387de7d63 100644
--- a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c
+++ b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c
@@ -223,3 +223,11 @@ UINTN OemGetCpuFreq (UINT8 Socket)
   }
 }
 
+UINTN
+OemGetHccsFreq (
+  VOID
+  )
+{
+  return HCCS_PLL_VALUE_2600;
+}
+
-- 
2.9.5

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[edk2] [PATCH edk2-platforms v2 02/18] Hisilicon/D06: Optimize SAS driver for reducing boot time

2019-02-19 Thread Ming Huang

SAS controller is always existed, so accessing SAS register don't
depend on PciBusDxe (pci enumeration).
Move the SAS module early in D06.fdf for dispatching SAS driver
early. This can avoid wait in BDS normally and reduce boot time.

This change is only valid after the update to SasDriverDxe in
edk2-non-osi has been applied.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Platform/Hisilicon/D06/D06.fdf | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Platform/Hisilicon/D06/D06.fdf b/Platform/Hisilicon/D06/D06.fdf
index a937660a09e2..d495ad7f264c 100644
--- a/Platform/Hisilicon/D06/D06.fdf
+++ b/Platform/Hisilicon/D06/D06.fdf
@@ -165,6 +165,7 @@ [FV.FvMain]
   INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
 
   INF Platform/Hisilicon/D06/Drivers/IoInitDxe/IoInitDxe.inf
+  INF Platform/Hisilicon/D06/Drivers/Sas/SasDxeDriver.inf
   #
   # PI DXE Drivers producing Architectural Protocols (EFI Services)
   #
@@ -296,7 +297,6 @@ [FV.FvMain]
   #
   INF Platform/Hisilicon/D06/Drivers/Sm750Dxe/UefiSmi.inf
   INF MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf
-  INF Platform/Hisilicon/D06/Drivers/Sas/SasDxeDriver.inf
   INF MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf
   INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
   INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
-- 
2.9.5

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[edk2] [PATCH edk2-platforms v2 00/18] Fix issues and improve D0x

2019-02-19 Thread Ming Huang

Main Changes since v1 :
1 Submit separate patch to drop the leading 0 for Hi1620Pci.asl;
2 Add Fix USB crash issue patch;
3 Modify some code style issues;
4 Drop "Use CalculateCrc16 in BaseLib" patch;
5 Refactor "Remove SerdesLib" patch;
6 Add patch for move some header files to edk2-non-osi/;

Code can also be found in github:
https://github.com/hisilicon/OpenPlatformPkg.git
branch: 1902-platforms-v2


Jason Zhang (1):
  Hisilicon/D06: Fix access variable fail issue

Ming Huang (16):
  Hisilicon/D0x: Add DriverHealthManagerDxe
  Hisilicon/D06: Optimize SAS driver for reducing boot time
  Hisilicon/D06: Drop the leading 0 (0x0 -> 0x)
  Hisilicon/D06: Add more PCIe port INT-x support
  Hisilicon/D0x: Rename StartupAp() function
  Hisilicon/D06: Use HCCS speed with 2.6G
  Hisilicon/D06: Add PCI_OSC_SUPPORT
  Hisilicon/D06: Modify for IMP self-Adapte support
  Hisilicon/D06: Add Setup Item "Support DPC" and delete some PCIe menus
  Hisilicon/D06: Use new flash layout
  Hisilicon/D06: Remove SECURE_BOOT_ENABLE definition
  Hisilicon/D0x: Remove SP805 watchdog pcd
  Hisilicon/D06: Fix USB crash issue(4079)
  Hisilicon/D0x: Remove and tidy some codes about SerdesLib
  Hisilicon/D0x: Delete some header files
  Hisilicon/D0x: Modify version to 19.02

xingjiang tang (1):
  Hisilicon/D06: Add OemGetCpuFreq to encapsulate difference

 Platform/Hisilicon/D03/D03.dsc 
   |   8 +-
 Platform/Hisilicon/D05/D05.dsc 
   |   8 +-
 Platform/Hisilicon/D06/D06.dsc 
   |  19 +-
 Platform/Hisilicon/D03/D03.fdf 
   |   1 +
 Platform/Hisilicon/D05/D05.fdf 
   |   1 +
 Platform/Hisilicon/D06/D06.fdf 
   |  18 +-
 Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.inf  
   |   1 +
 Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.inf 
   |   2 +-
 Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.inf  
   |   1 +
 Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.inf 
   |   1 +
 Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.inf  
   |   1 +
 Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.inf 
   |   1 +
 Silicon/Hisilicon/Drivers/Smbios/MemorySubClassDxe/MemorySubClassDxe.inf   
   |   1 +
 Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf 
   |   1 +
 Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf   
   |   4 +-
 Silicon/Hisilicon/Drivers/VirtualEhciPciIo/VirtualEhciPciIo.inf
   |   1 +
 Silicon/Hisilicon/Hi1610/Drivers/IoInitDxe/IoInitDxe.inf   
   |   1 +
 Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLib.inf   
   |   1 -
 Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf
   |   1 +
 Silicon/Hisilicon/Library/I2CLib/I2CLib.inf
   |   1 +
 Silicon/Hisilicon/Library/I2CLib/I2CLibRuntime.inf 
   |   1 +
 Platform/Hisilicon/D06/Include/Library/CpldD06.h   
   |   4 +
 Silicon/Hisilicon/Hi1610/Include/Library/SerdesLib.h   
   | 131 -
 Silicon/Hisilicon/Hi1616/Include/Library/SerdesLib.h   
   |  86 --
 Silicon/Hisilicon/Hi1620/Include/Library/SerdesLib.h   
   |  85 --
 Silicon/Hisilicon/Include/Library/IpmiCmdLib.h 
   | 110 ---
 Silicon/Hisilicon/Include/Library/LpcLib.h 
   | 113 ---
 Silicon/Hisilicon/Include/Library/OemAddressMapLib.h   
   |  45 ---
 Silicon/Hisilicon/Include/Library/OemConfigData.h  
   |   1 +
 Silicon/Hisilicon/Include/Library/OemMiscLib.h 
   |  75 +
 Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h 
   | 112 ---
 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr 
   |   4 +-
 Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.c
   |   2 +-
 Platform/Hisilicon/D03/Library/OemMiscLib2P/BoardFeature2PHi1610.c 
   |   1 -
 Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.c   
   |   2 +-
 Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.c

[edk2] [PATCH edk2-platforms v2 01/18] Hisilicon/D0x: Add DriverHealthManagerDxe

2019-02-19 Thread Ming Huang

DriverHealthManagerDxe Collect driver health form of third party
drivers to repair no healthy card.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
Reviewed-by: Leif Lindholm 
---
 Platform/Hisilicon/D03/D03.dsc | 1 +
 Platform/Hisilicon/D05/D05.dsc | 1 +
 Platform/Hisilicon/D06/D06.dsc | 1 +
 Platform/Hisilicon/D03/D03.fdf | 1 +
 Platform/Hisilicon/D05/D05.fdf | 1 +
 Platform/Hisilicon/D06/D06.fdf | 1 +
 6 files changed, 6 insertions(+)

diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
index 3f59be22ec8e..fe443dd929ad 100644
--- a/Platform/Hisilicon/D03/D03.dsc
+++ b/Platform/Hisilicon/D03/D03.dsc
@@ -492,6 +492,7 @@ [Components.common]
 
   MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
   MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
+  MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf
   MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
   SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf {
 
diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
index 25db1c38d287..0c4f21fbe056 100644
--- a/Platform/Hisilicon/D05/D05.dsc
+++ b/Platform/Hisilicon/D05/D05.dsc
@@ -638,6 +638,7 @@ [Components.common]
   MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
   MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
   MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
+  MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf
   MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
 
   SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf {
diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc
index 396bd03c9d24..3856578e74be 100644
--- a/Platform/Hisilicon/D06/D06.dsc
+++ b/Platform/Hisilicon/D06/D06.dsc
@@ -437,6 +437,7 @@ [Components.common]
   
Silicon/Hisilicon/Hi1620/Drivers/Pl011DebugSerialPortInitDxe/Pl011DebugSerialPortInitDxe.inf
   MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
   MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
+  MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf
   MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
   SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf {
 
diff --git a/Platform/Hisilicon/D03/D03.fdf b/Platform/Hisilicon/D03/D03.fdf
index f453f9e46321..3f07b2e57778 100644
--- a/Platform/Hisilicon/D03/D03.fdf
+++ b/Platform/Hisilicon/D03/D03.fdf
@@ -295,6 +295,7 @@ [FV.FvMain]
   INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
   INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
   INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
+  INF MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf
   INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
 
 [FV.FVMAIN_COMPACT]
diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf
index 85dd791564a4..9632aea4b00e 100644
--- a/Platform/Hisilicon/D05/D05.fdf
+++ b/Platform/Hisilicon/D05/D05.fdf
@@ -314,6 +314,7 @@ [FV.FvMain]
   INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
   INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
   INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
+  INF MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf
   INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
 
 [FV.FVMAIN_COMPACT]
diff --git a/Platform/Hisilicon/D06/D06.fdf b/Platform/Hisilicon/D06/D06.fdf
index fda29ab322e9..a937660a09e2 100644
--- a/Platform/Hisilicon/D06/D06.fdf
+++ b/Platform/Hisilicon/D06/D06.fdf
@@ -319,6 +319,7 @@ [FV.FvMain]
   INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
   INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
   INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
+  INF MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf
   INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
 
 [FV.FVMAIN_COMPACT]
-- 
2.9.5

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[edk2] [PATCH edk2-non-osi v2 7/8] Hisilicon/D06: Add Setup Item "Support DPC"

2019-02-19 Thread Ming Huang

Add setup item "Support DPC" to enable or disable PCIe DPC
(Downstream Port Containment).

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
Reviewed-by: Leif Lindholm 
---
 Platform/Hisilicon/D06/Drivers/IoInitDxe/IoInitDxe.efi | Bin 232832 -> 226784 
bytes
 1 file changed, 0 insertions(+), 0 deletions(-)

diff --git a/Platform/Hisilicon/D06/Drivers/IoInitDxe/IoInitDxe.efi 
b/Platform/Hisilicon/D06/Drivers/IoInitDxe/IoInitDxe.efi
index e32c056..4511f6b 100644
Binary files a/Platform/Hisilicon/D06/Drivers/IoInitDxe/IoInitDxe.efi and 
b/Platform/Hisilicon/D06/Drivers/IoInitDxe/IoInitDxe.efi differ
-- 
2.9.5

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[edk2] [PATCH edk2-non-osi v2 8/8] Hisilicon/D0x: Add some header files

2019-02-19 Thread Ming Huang

As interfaces exposed only by implementations in edk2-non-osi,
so move some header files from edk2-platforms to edk2-non-osi.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Silicon/Hisilicon/Include/Library/IpmiCmdLib.h | 110 
+++
 Silicon/Hisilicon/Include/Library/LpcLib.h | 113 

 Silicon/Hisilicon/Include/Library/OemAddressMapLib.h   |  45 
 Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h | 112 
+++
 Silicon/Hisilicon/Include/Library/SerdesLib.h  |  21 
 5 files changed, 401 insertions(+)

diff --git a/Silicon/Hisilicon/Include/Library/IpmiCmdLib.h 
b/Silicon/Hisilicon/Include/Library/IpmiCmdLib.h
new file mode 100644
index 000..b956ee6
--- /dev/null
+++ b/Silicon/Hisilicon/Include/Library/IpmiCmdLib.h
@@ -0,0 +1,110 @@
+/** @file
+*
+*  Copyright (c) 2017, Hisilicon Limited. All rights reserved.
+*  Copyright (c) 2017, Linaro Limited. All rights reserved.
+*
+*  This program and the accompanying materials
+*  are licensed and made available under the terms and conditions of the BSD 
License
+*  which accompanies this distribution.  The full text of the license may be 
found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR 
IMPLIED.
+*
+**/
+
+#ifndef _IPMI_CMD_LIB_H_
+#define _IPMI_CMD_LIB_H_
+
+#define BOOT_OPTION_BOOT_FLAG_VALID 1
+#define BOOT_OPTION_BOOT_FLAG_INVALID   0
+
+typedef enum {
+  EfiReserved,
+  EfiBiosFrb2,
+  EfiBiosPost,
+  EfiOsLoad,
+  EfiSmsOs,
+  EfiOem,
+  EfiFrbReserved1,
+  EfiFrbReserved2
+} EFI_WDT_USER_TYPE;
+
+typedef enum {
+  NoOverride = 0x0,
+  ForcePxe,
+  ForceDefaultHardDisk,
+  ForceDefaultHardDiskSafeMode,
+  ForceDefaultDiagnosticPartition,
+  ForceDefaultCD,
+  ForceSetupUtility,
+  ForceRemoteRemovableMedia,
+  ForceRemoteCD,
+  ForcePrimaryRemoteMedia,
+  ForceRemoteHardDisk = 0xB,
+  ForcePrimaryRemovableMedia = 0xF
+} BOOT_DEVICE_SELECTOR;
+
+//
+// Get System Boot Option data structure
+//
+typedef struct {
+  UINT8 ParameterVersion   :4;
+  UINT8 Reserved1  :4;
+  UINT8 ParameterSelector  :7;
+  UINT8 ParameterValid :1;
+  //
+  // Boot Flags Data 1
+  //
+  UINT8 Reserved2  :5;
+  UINT8 BiosBootType   :1;
+  UINT8 Persistent :1;
+  UINT8 BootFlagsValid :1;
+  //
+  // Boot Flags Data 2
+  //
+  UINT8 LockResetBtn   :1;
+  UINT8 ScreenBlank:1;
+  UINT8 BootDeviceSelector :4;
+  UINT8 LockKeyboard   :1;
+  UINT8 ClearCmos  :1;
+  //
+  // Boot Flags Data 3
+  //
+  UINT8 ConsoleRedirectionControl  :2;
+  UINT8 LockSleepBtn   :1;
+  UINT8 UserPasswordByPass :1;
+  UINT8 Reserved3  :1;
+  UINT8 FirmwareVerbosity  :2;
+  UINT8 LockPowerBtn   :1;
+  //
+  // Boot Flags Data 4
+  //
+  UINT8 MuxControlOverride :3;
+  UINT8 ShareModeOverride  :1;
+  UINT8 Reserved4  :4;
+  //
+  // Boot Flags Data 5
+  //
+  UINT8 DeviceInstanceSelector :5;
+  UINT8 Reserved5  :3;
+} IPMI_GET_BOOT_OPTION;
+
+EFI_STATUS
+EFIAPI
+IpmiCmdSetSysBootOptions (
+  OUT IPMI_GET_BOOT_OPTION  *BootOption
+  );
+
+EFI_STATUS
+EFIAPI
+IpmiCmdGetSysBootOptions (
+  IN IPMI_GET_BOOT_OPTION   *BootOption
+  );
+
+EFI_STATUS
+IpmiCmdStopWatchdogTimer (
+  IN EFI_WDT_USER_TYPE  UserType
+  );
+
+#endif
diff --git a/Silicon/Hisilicon/Include/Library/LpcLib.h 
b/Silicon/Hisilicon/Include/Library/LpcLib.h
new file mode 100755
index 000..236a52b
--- /dev/null
+++ b/Silicon/Hisilicon/Include/Library/LpcLib.h
@@ -0,0 +1,113 @@
+/** @file
+*
+*  Copyright (c) 2016, Hisilicon Limited. All rights reserved.
+*  Copyright (c) 2016, Linaro Limited. All rights reserved.
+*
+*  This program and the accompanying materials
+*  are licensed and made available under the terms and conditions of the BSD 
License
+*  which accompanies this distribution.  The full text of the license may be 
found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR 
IMPLIED.
+*
+**/
+
+#ifndef _LPC_LIB_H_
+#define _LPC_LIB_H_
+
+#include 
+
+#define PCIE_SUBSYS_IO_MUX  0xA017
+#define PCIE_SUBSYS_IOMG033 (PCIE_SUBSYS_IO_MUX + 0x84)
+#define PCIE_SUBSYS_IOMG035 (PCIE_SUBSYS_IO_MUX + 0x8C)
+#define PCIE_SUBSYS_IOMG036 (PCIE_SUBSYS_IO_MUX + 0x90)
+#define PCIE_SUBSYS_IOMG045 (PCIE_SUBSYS_IO_MUX + 0xB4)
+#define PCIE_SUBSYS_IOMG046 (PCIE_SUBSYS_IO_MUX + 0xB8)
+#define PCIE_SUBSYS_IOMG047 (PCIE_SUBSYS_IO_MUX + 0xBC)
+#define PCIE_SUBSYS_IOMG048 (PCIE_

[edk2] [PATCH edk2-non-osi v2 6/8] Hisilicon/D06: Fix numa node wrong issue

2019-02-19 Thread Ming Huang

Numa informations are acquired from HOB that build from memory
initialization module. Correct numa informations to match booting
from TA(Totem A or super cpu cluster A).

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Platform/Hisilicon/D06/MemoryInitPei/MemoryInit.efi | Bin 297696 -> 358656 
bytes
 1 file changed, 0 insertions(+), 0 deletions(-)

diff --git a/Platform/Hisilicon/D06/MemoryInitPei/MemoryInit.efi 
b/Platform/Hisilicon/D06/MemoryInitPei/MemoryInit.efi
index 5fba353..fea1475 100644
Binary files a/Platform/Hisilicon/D06/MemoryInitPei/MemoryInit.efi and 
b/Platform/Hisilicon/D06/MemoryInitPei/MemoryInit.efi differ
-- 
2.9.5

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[edk2] [PATCH edk2-non-osi v2 0/8] Upload D0x binary modules

2019-02-19 Thread Ming Huang

Main Changes since v1 :
1 Add some header files to edk2-non-osi;

Code can also be found in github:
https://github.com/hisilicon/OpenPlatformPkg.git
branch: 1902-non-osi-v2


Ming Huang (8):
  Hisilicon/D06: Remove PCI enumeration dependency from SAS driver
  Hisilicon/D0x: Update PlatformSysCtrlLib binary
  Hisilicon/D06: Update Mbigen and gic RAS register
  Hisilicon/D06: Support PCIe local RAS
  Hisilicon/D06: Use new flash layout
  Hisilicon/D06: Fix numa node wrong issue
  Hisilicon/D06: Add Setup Item "Support DPC"
  Hisilicon/D0x: Add some header files

 Silicon/Hisilicon/Include/Library/IpmiCmdLib.h 
| 110 +++
 Silicon/Hisilicon/Include/Library/LpcLib.h 
| 113 
 Silicon/Hisilicon/Include/Library/OemAddressMapLib.h   
|  45 
 Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h 
| 112 +++
 Silicon/Hisilicon/Include/Library/SerdesLib.h  
|  21 
 Platform/Hisilicon/D06/CustomData.Fv   
| Bin 0 -> 65536 bytes
 Platform/Hisilicon/D06/Drivers/IoInitDxe/IoInitDxe.efi 
| Bin 232832 -> 226784 bytes
 Platform/Hisilicon/D06/Drivers/PcieRasInitDxe/PcieRasInitDxe.efi   
| Bin 21248 -> 22048 bytes
 Platform/Hisilicon/D06/Drivers/RasInitDxe/RasInitDxe.efi   
| Bin 17984 -> 18720 bytes
 Platform/Hisilicon/D06/Drivers/Sas/SasDriverDxe.depex  
| Bin 216 -> 36 bytes
 Platform/Hisilicon/D06/Drivers/Sas/SasDriverDxe.efi
| Bin 221312 -> 220640 bytes
 Platform/Hisilicon/D06/Library/OemAddressMapD06/OemAddressMapD06.lib   
| Bin 61892 -> 31696 bytes
 Platform/Hisilicon/D06/MemoryInitPei/MemoryInit.efi
| Bin 297696 -> 358656 bytes
 Platform/Hisilicon/D06/Sec/FVMAIN_SEC.Fv   
| Bin 1048576 -> 1048576 bytes
 Platform/Hisilicon/D06/bl1.bin 
| Bin 12432 -> 12432 bytes
 Platform/Hisilicon/D06/fip.bin 
| Bin 113450 -> 121866 bytes
 
Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.lib
 | Bin 297590 -> 229128 bytes
 
Silicon/Hisilicon/Hi1616/Library/PlatformSysCtrlLibHi1616/PlatformSysCtrlLibHi1616.lib
 | Bin 344310 -> 275312 bytes
 
Silicon/Hisilicon/Hi1620/Library/PlatformSysCtrlLibHi1620/PlatformSysCtrlLibHi1620.lib
 | Bin 356032 -> 375916 bytes
 19 files changed, 401 insertions(+)
 create mode 100644 Silicon/Hisilicon/Include/Library/IpmiCmdLib.h
 create mode 100755 Silicon/Hisilicon/Include/Library/LpcLib.h
 create mode 100644 Silicon/Hisilicon/Include/Library/OemAddressMapLib.h
 create mode 100644 Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h
 create mode 100644 Silicon/Hisilicon/Include/Library/SerdesLib.h
 create mode 100644 Platform/Hisilicon/D06/CustomData.Fv

-- 
2.9.5

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[edk2] [PATCH edk2-non-osi v2 3/8] Hisilicon/D06: Update Mbigen and gic RAS register

2019-02-19 Thread Ming Huang

As chip group suggestions, update Mbigen and gic RAS configuration
flow.
Add below flow:
1 Reset Mbigen;
2 Disable Mbigen clock;
3 Deassert reset Mbigen;
4 Enable Mbigen clock;

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Platform/Hisilicon/D06/Drivers/RasInitDxe/RasInitDxe.efi | Bin 17984 -> 18720 
bytes
 1 file changed, 0 insertions(+), 0 deletions(-)

diff --git a/Platform/Hisilicon/D06/Drivers/RasInitDxe/RasInitDxe.efi 
b/Platform/Hisilicon/D06/Drivers/RasInitDxe/RasInitDxe.efi
index 19adbc9..9ea21e9 100644
Binary files a/Platform/Hisilicon/D06/Drivers/RasInitDxe/RasInitDxe.efi and 
b/Platform/Hisilicon/D06/Drivers/RasInitDxe/RasInitDxe.efi differ
-- 
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[edk2] [PATCH edk2-non-osi v2 5/8] Hisilicon/D06: Use new flash layout

2019-02-19 Thread Ming Huang

In new flash layout, BIOS fd change from offset 1M to 8M in 16M
spi flash.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Platform/Hisilicon/D06/CustomData.Fv | Bin 0 
-> 65536 bytes
 Platform/Hisilicon/D06/Library/OemAddressMapD06/OemAddressMapD06.lib | Bin 
61892 -> 31696 bytes
 Platform/Hisilicon/D06/Sec/FVMAIN_SEC.Fv | Bin 
1048576 -> 1048576 bytes
 3 files changed, 0 insertions(+), 0 deletions(-)

diff --git a/Platform/Hisilicon/D06/CustomData.Fv 
b/Platform/Hisilicon/D06/CustomData.Fv
new file mode 100644
index 000..22ef62b
Binary files /dev/null and b/Platform/Hisilicon/D06/CustomData.Fv differ
diff --git 
a/Platform/Hisilicon/D06/Library/OemAddressMapD06/OemAddressMapD06.lib 
b/Platform/Hisilicon/D06/Library/OemAddressMapD06/OemAddressMapD06.lib
index 7e1f6b2..851c2c3 100644
Binary files 
a/Platform/Hisilicon/D06/Library/OemAddressMapD06/OemAddressMapD06.lib and 
b/Platform/Hisilicon/D06/Library/OemAddressMapD06/OemAddressMapD06.lib differ
diff --git a/Platform/Hisilicon/D06/Sec/FVMAIN_SEC.Fv 
b/Platform/Hisilicon/D06/Sec/FVMAIN_SEC.Fv
index 247e44e..7f75bc6 100644
Binary files a/Platform/Hisilicon/D06/Sec/FVMAIN_SEC.Fv and 
b/Platform/Hisilicon/D06/Sec/FVMAIN_SEC.Fv differ
-- 
2.9.5

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[edk2] [PATCH edk2-non-osi v2 4/8] Hisilicon/D06: Support PCIe local RAS

2019-02-19 Thread Ming Huang

Add some registers configuration in PcieRasInitDxe and add PCIe
local RAS interrupt handle in trusted firmware to support PCIe
local RAS.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
Reviewed-by: Leif Lindholm 
---
 Platform/Hisilicon/D06/Drivers/PcieRasInitDxe/PcieRasInitDxe.efi | Bin 21248 
-> 22048 bytes
 Platform/Hisilicon/D06/bl1.bin   | Bin 12432 
-> 12432 bytes
 Platform/Hisilicon/D06/fip.bin   | Bin 113450 
-> 121866 bytes
 3 files changed, 0 insertions(+), 0 deletions(-)

diff --git a/Platform/Hisilicon/D06/Drivers/PcieRasInitDxe/PcieRasInitDxe.efi 
b/Platform/Hisilicon/D06/Drivers/PcieRasInitDxe/PcieRasInitDxe.efi
index 0e22237..f9ceff2 100644
Binary files a/Platform/Hisilicon/D06/Drivers/PcieRasInitDxe/PcieRasInitDxe.efi 
and b/Platform/Hisilicon/D06/Drivers/PcieRasInitDxe/PcieRasInitDxe.efi differ
diff --git a/Platform/Hisilicon/D06/bl1.bin b/Platform/Hisilicon/D06/bl1.bin
index 416535f..d0970e5 100644
Binary files a/Platform/Hisilicon/D06/bl1.bin and 
b/Platform/Hisilicon/D06/bl1.bin differ
diff --git a/Platform/Hisilicon/D06/fip.bin b/Platform/Hisilicon/D06/fip.bin
index c9b7ca0..795cfb5 100644
Binary files a/Platform/Hisilicon/D06/fip.bin and 
b/Platform/Hisilicon/D06/fip.bin differ
-- 
2.9.5

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[edk2] [PATCH edk2-non-osi v2 2/8] Hisilicon/D0x: Update PlatformSysCtrlLib binary

2019-02-19 Thread Ming Huang

As suggestion of community, 'AP' is a bit unfortunate to use in EDK2
context. PI specifies 'BSP' for Boot-strap Processor, as the one
executing all of the EDK2 code. It then uses 'AP' to refer to
Additional Processors, which can be assigned tasks using the
EFI_MP_SERVICES_PROTOCOL. In a TianoCore context, this should be
'BSP'. So, Rename StartupAp() to StartUpBSP.

This patch applies to D0x PlatformSysCtrlLib.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 
Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.lib
 | Bin 297590 -> 229128 bytes
 
Silicon/Hisilicon/Hi1616/Library/PlatformSysCtrlLibHi1616/PlatformSysCtrlLibHi1616.lib
 | Bin 344310 -> 275312 bytes
 
Silicon/Hisilicon/Hi1620/Library/PlatformSysCtrlLibHi1620/PlatformSysCtrlLibHi1620.lib
 | Bin 356032 -> 375916 bytes
 3 files changed, 0 insertions(+), 0 deletions(-)

diff --git 
a/Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.lib
 
b/Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.lib
index 68be770..4c63a26 100644
Binary files 
a/Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.lib
 and 
b/Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.lib
 differ
diff --git 
a/Silicon/Hisilicon/Hi1616/Library/PlatformSysCtrlLibHi1616/PlatformSysCtrlLibHi1616.lib
 
b/Silicon/Hisilicon/Hi1616/Library/PlatformSysCtrlLibHi1616/PlatformSysCtrlLibHi1616.lib
index b3cc88e..cb2c652 100644
Binary files 
a/Silicon/Hisilicon/Hi1616/Library/PlatformSysCtrlLibHi1616/PlatformSysCtrlLibHi1616.lib
 and 
b/Silicon/Hisilicon/Hi1616/Library/PlatformSysCtrlLibHi1616/PlatformSysCtrlLibHi1616.lib
 differ
diff --git 
a/Silicon/Hisilicon/Hi1620/Library/PlatformSysCtrlLibHi1620/PlatformSysCtrlLibHi1620.lib
 
b/Silicon/Hisilicon/Hi1620/Library/PlatformSysCtrlLibHi1620/PlatformSysCtrlLibHi1620.lib
index 50d453a..d643f7b 100644
Binary files 
a/Silicon/Hisilicon/Hi1620/Library/PlatformSysCtrlLibHi1620/PlatformSysCtrlLibHi1620.lib
 and 
b/Silicon/Hisilicon/Hi1620/Library/PlatformSysCtrlLibHi1620/PlatformSysCtrlLibHi1620.lib
 differ
-- 
2.9.5

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[edk2] [PATCH edk2-non-osi v2 1/8] Hisilicon/D06: Remove PCI enumeration dependency from SAS driver

2019-02-19 Thread Ming Huang

SAS controller is always existed, so accessing SAS register don't
depend on PciBusDxe (pci enumeration). Modify SAS driver remove the
dependence on pci enumeration.
This patch is done to improve boot times.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Platform/Hisilicon/D06/Drivers/Sas/SasDriverDxe.depex | Bin 216 -> 36 bytes
 Platform/Hisilicon/D06/Drivers/Sas/SasDriverDxe.efi   | Bin 221312 -> 220640 
bytes
 2 files changed, 0 insertions(+), 0 deletions(-)

diff --git a/Platform/Hisilicon/D06/Drivers/Sas/SasDriverDxe.depex 
b/Platform/Hisilicon/D06/Drivers/Sas/SasDriverDxe.depex
index 1a5bc1e..e076777 100644
Binary files a/Platform/Hisilicon/D06/Drivers/Sas/SasDriverDxe.depex and 
b/Platform/Hisilicon/D06/Drivers/Sas/SasDriverDxe.depex differ
diff --git a/Platform/Hisilicon/D06/Drivers/Sas/SasDriverDxe.efi 
b/Platform/Hisilicon/D06/Drivers/Sas/SasDriverDxe.efi
index ac6bae7..4a29e8c 100644
Binary files a/Platform/Hisilicon/D06/Drivers/Sas/SasDriverDxe.efi and 
b/Platform/Hisilicon/D06/Drivers/Sas/SasDriverDxe.efi differ
-- 
2.9.5

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Re: [edk2] [PATCH edk2-platforms v1 00/16] Fix issues and improve D0x

2019-02-15 Thread Ming Huang

Hi Leif,

Please have a look for several outstanding patches.

Thanks

On 2/1/2019 9:34 PM, Ming Huang wrote:
> Main Changes :
> 1 Use new flash layout;
> 2 Modify for M7 self-Adapte support;
> 3 Add PCI_OSC_SUPPORT for ACPI/DSDT;
> 4 Change HCCS speed from 30G to 26G;
> 5 Rename StartupAp() function;
> 6 Fix access variable fail issue;
> 7 Optimize SAS driver for reducing boot time;
> 8 Add DriverHealthManagerDxe;
> 9 Remove useless code;
> 
> Code can also be found in github:
> https://github.com/hisilicon/OpenPlatformPkg.git
> branch: 1902-platforms-v1
> 
> 
> Jason Zhang (2):
>   Hisilicon/D06: Fix access variable fail issue
>   Hisilicon/D06: Add more PCIe port INT-x support
> 
> Ming Huang (13):
>   Hisilicon/D0x: Remove SerdesLib
>   Hisilicon/D0x: Add DriverHealthManagerDxe
>   Hisilicon/D06: Optimize SAS driver for reducing boot time
>   Hisilicon/D0x: Rename StartupAp() function
>   Hisilicon/D06: Change HCCS speed from 30G to 26G
>   Hisilicon/D06: Add PCI_OSC_SUPPORT
>   Hisilicon/D06: Modify for M7 self-Adapte support
>   Hisilicon/D06: Add Setup Item "Support DPC"
>   Hisilicon/D06: Use new flash layout
>   Hisilicon/D06: Remove SECURE_BOOT_ENABLE definition
>   Hisilicon/D0x: Remove SP805 watchdog pcd
>   Hisilicon/D06: Use CalculateCrc16 in BaseLib
>   Hisilicon/D0x: Modify version to 19.02
> 
> xingjiang tang (1):
>   Hisilicon/D06: Add OemGetCpuFreq to encapsulate difference
> 
>  Platform/Hisilicon/D03/D03.dsc   |   8 +-
>  Platform/Hisilicon/D05/D05.dsc   |   8 +-
>  Platform/Hisilicon/D06/D06.dsc   |  19 +-
>  Platform/Hisilicon/D03/D03.fdf   |   1 +
>  Platform/Hisilicon/D05/D05.fdf   |   1 +
>  Platform/Hisilicon/D06/D06.fdf   |  18 +-
>  Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf |   1 -
>  Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLib.inf |   1 -
>  Platform/Hisilicon/D06/Include/Library/CpldD06.h |   4 +
>  Silicon/Hisilicon/Include/Library/OemConfigData.h|   1 +
>  Silicon/Hisilicon/Include/Library/OemMiscLib.h   |  12 +
>  Silicon/Hisilicon/Include/Library/PlatformSysCtrlLib.h   |   2 +-
>  Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr   |   4 +-
>  Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.c  |   2 +-
>  Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.c |   2 +-
>  Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.c  |   2 +-
>  Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.c |   3 +-
>  Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.c  |   2 +-
>  Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c |  24 ++
>  Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c | 341 
> +++-
>  Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c|   6 +-
>  Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl | 129 
> +++-
>  Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr | 197 
> +--
>  Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfigStrings.uni  |   3 +-
>  24 files changed, 238 insertions(+), 553 deletions(-)
> 
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Re: [edk2] [PATCH edk2-platforms v1 01/16] Hisilicon/D0x: Remove SerdesLib

2019-02-14 Thread Ming Huang




On 2/13/2019 5:42 PM, Leif Lindholm wrote:
> On Wed, Feb 13, 2019 at 02:36:11PM +0800, Ming Huang wrote:
>>> Should it not then also delete #include  from
>>> Platform/Hisilicon/D06/Library/OemMiscLibD06/BoardFeatureD06.c,
>>> Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c and
>>> Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type09/MiscSystemSlotDesignationFunction.c
>>> ?
>>>
>>> Meanwhile,
>>> Platform/Hisilicon/D03/Library/OemMiscLib2P/BoardFeature2PHi1610.c
>>> and
>>> Platform/Hisilicon/D05/Library/OemMiscLibD05/BoardFeatureD05.c
>>> both include this header, but
>>> Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.inf
>>> and 
>>> Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.inf
>>> do not declare the dependency.
>>
>> OemMiscLibD06.c can remove the SerdesLib.h. As using the definitions in
>> SerdesLib.h, other .c files can not remove the header file.
> 
> If they are using definitions from the library header, but not the
> library itself, there is something suspicious about the code
> structuring.
> 
> But in the meantime, if they are referencing library header files,
> they need to list those libraryclasses in their .inf.
> 
>>> Can you investigate and submit an updated patch addressing all of the
>>> unnecessary references?
>>
>> This may takes a lot of time, as Hi1620(D06) is our important project,
>> maybe we should focus on D06.
> 
> Feel free to submit deletions for all and any platforms you are
> unwilling to maintain.

Maybe there are no enough time to investigate this. Is ok to do this for 19.06?
When should I send the v2 out?

Thanks

> 
> Best Regards,
> 
> Leif
> 
> 
>> Thanks
>>
>>>
>>> Best Regards,
>>>
>>> Leif
>>>
>>>> Contributed-under: TianoCore Contribution Agreement 1.1
>>>> Signed-off-by: Ming Huang 
>>>> ---
>>>>  Platform/Hisilicon/D06/D06.dsc   | 2 --
>>>>  Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf | 1 -
>>>>  2 files changed, 3 deletions(-)
>>>>
>>>> diff --git a/Platform/Hisilicon/D06/D06.dsc 
>>>> b/Platform/Hisilicon/D06/D06.dsc
>>>> index 396bd03c9d24..cbbd99e4a659 100644
>>>> --- a/Platform/Hisilicon/D06/D06.dsc
>>>> +++ b/Platform/Hisilicon/D06/D06.dsc
>>>> @@ -64,8 +64,6 @@ [LibraryClasses.common]
>>>>  
>>>>CpldIoLib|Silicon/Hisilicon/Library/CpldIoLib/CpldIoLib.inf
>>>>  
>>>> -  
>>>> SerdesLib|Silicon/Hisilicon/Hi1620/Library/Hi1620Serdes/Hi1620SerdesLib.inf
>>>> -
>>>>TimeBaseLib|EmbeddedPkg/Library/TimeBaseLib/TimeBaseLib.inf
>>>>
>>>> RealTimeClockLib|Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf
>>>>
>>>> OemMiscLib|Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.inf
>>>> diff --git 
>>>> a/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf 
>>>> b/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf
>>>> index 61cead7779b9..8e5c56fa41fd 100644
>>>> --- a/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf
>>>> +++ b/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf
>>>> @@ -77,7 +77,6 @@ [LibraryClasses]
>>>>  
>>>>IpmiCmdLib
>>>>  
>>>> -  SerdesLib
>>>>  
>>>>  [Protocols]
>>>>gEfiSmbiosProtocolGuid   # PROTOCOL ALWAYS_CONSUMED
>>>> -- 
>>>> 2.9.5
>>>>
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Re: [edk2] [PATCH edk2-non-osi v1 5/7] Hisilicon/D06: Use new flash layout

2019-02-13 Thread Ming Huang




On 2/12/2019 11:26 PM, Leif Lindholm wrote:
> On Fri, Feb 01, 2019 at 10:25:05PM +0800, Ming Huang wrote:
>> In new flash layout, BIOS fd change from offset 1M to 8M in 16M
>> spi flash.
> 
> I think I covered all of the layout questions in the corresponding
> edk2-platforms patch.
> 
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Ming Huang 
>> ---
>>  Platform/Hisilicon/D06/CustomData.Fv | Bin 
>> 0 -> 65536 bytes
>>  Platform/Hisilicon/D06/Library/OemAddressMapD06/OemAddressMapD06.lib | Bin 
>> 61892 -> 31696 bytes
> 
> But can you explain why the size of this lib is _halved_?

This library had delete some useless functions and global variables.

Thanks

> 
> /
> Leif
> 
>>  Platform/Hisilicon/D06/Sec/FVMAIN_SEC.Fv | Bin 
>> 1048576 -> 1048576 bytes
>>  3 files changed, 0 insertions(+), 0 deletions(-)
>>
>> diff --git a/Platform/Hisilicon/D06/CustomData.Fv 
>> b/Platform/Hisilicon/D06/CustomData.Fv
>> new file mode 100644
>> index 000..22ef62b
>> Binary files /dev/null and b/Platform/Hisilicon/D06/CustomData.Fv differ
>> diff --git 
>> a/Platform/Hisilicon/D06/Library/OemAddressMapD06/OemAddressMapD06.lib 
>> b/Platform/Hisilicon/D06/Library/OemAddressMapD06/OemAddressMapD06.lib
>> index 7e1f6b2..851c2c3 100644
>> Binary files 
>> a/Platform/Hisilicon/D06/Library/OemAddressMapD06/OemAddressMapD06.lib and 
>> b/Platform/Hisilicon/D06/Library/OemAddressMapD06/OemAddressMapD06.lib differ
>> diff --git a/Platform/Hisilicon/D06/Sec/FVMAIN_SEC.Fv 
>> b/Platform/Hisilicon/D06/Sec/FVMAIN_SEC.Fv
>> index 247e44e..7f75bc6 100644
>> Binary files a/Platform/Hisilicon/D06/Sec/FVMAIN_SEC.Fv and 
>> b/Platform/Hisilicon/D06/Sec/FVMAIN_SEC.Fv differ
>> -- 
>> 2.9.5
>>
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Re: [edk2] [PATCH edk2-platforms v1 01/16] Hisilicon/D0x: Remove SerdesLib

2019-02-13 Thread Ming Huang




On 2/13/2019 5:42 PM, Leif Lindholm wrote:
> On Wed, Feb 13, 2019 at 02:36:11PM +0800, Ming Huang wrote:
>>> Should it not then also delete #include  from
>>> Platform/Hisilicon/D06/Library/OemMiscLibD06/BoardFeatureD06.c,
>>> Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c and
>>> Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type09/MiscSystemSlotDesignationFunction.c
>>> ?
>>>
>>> Meanwhile,
>>> Platform/Hisilicon/D03/Library/OemMiscLib2P/BoardFeature2PHi1610.c
>>> and
>>> Platform/Hisilicon/D05/Library/OemMiscLibD05/BoardFeatureD05.c
>>> both include this header, but
>>> Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.inf
>>> and 
>>> Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.inf
>>> do not declare the dependency.
>>
>> OemMiscLibD06.c can remove the SerdesLib.h. As using the definitions in
>> SerdesLib.h, other .c files can not remove the header file.
> 
> If they are using definitions from the library header, but not the
> library itself, there is something suspicious about the code
> structuring.

Yes, there are maybe some unreasonable design in code structuring
for history reason.

> 
> But in the meantime, if they are referencing library header files,
> they need to list those libraryclasses in their .inf.

Do you mean add SerdesLib back to SmbiosMiscDxe.inf? If yes, maybe this
patch should be droped.

Thanks

> 
>>> Can you investigate and submit an updated patch addressing all of the
>>> unnecessary references?
>>
>> This may takes a lot of time, as Hi1620(D06) is our important project,
>> maybe we should focus on D06.
> 
> Feel free to submit deletions for all and any platforms you are
> unwilling to maintain.
> 
> Best Regards,
> 
> Leif
> 
> 
>> Thanks
>>
>>>
>>> Best Regards,
>>>
>>> Leif
>>>
>>>> Contributed-under: TianoCore Contribution Agreement 1.1
>>>> Signed-off-by: Ming Huang 
>>>> ---
>>>>  Platform/Hisilicon/D06/D06.dsc   | 2 --
>>>>  Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf | 1 -
>>>>  2 files changed, 3 deletions(-)
>>>>
>>>> diff --git a/Platform/Hisilicon/D06/D06.dsc 
>>>> b/Platform/Hisilicon/D06/D06.dsc
>>>> index 396bd03c9d24..cbbd99e4a659 100644
>>>> --- a/Platform/Hisilicon/D06/D06.dsc
>>>> +++ b/Platform/Hisilicon/D06/D06.dsc
>>>> @@ -64,8 +64,6 @@ [LibraryClasses.common]
>>>>  
>>>>CpldIoLib|Silicon/Hisilicon/Library/CpldIoLib/CpldIoLib.inf
>>>>  
>>>> -  
>>>> SerdesLib|Silicon/Hisilicon/Hi1620/Library/Hi1620Serdes/Hi1620SerdesLib.inf
>>>> -
>>>>TimeBaseLib|EmbeddedPkg/Library/TimeBaseLib/TimeBaseLib.inf
>>>>
>>>> RealTimeClockLib|Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf
>>>>
>>>> OemMiscLib|Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.inf
>>>> diff --git 
>>>> a/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf 
>>>> b/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf
>>>> index 61cead7779b9..8e5c56fa41fd 100644
>>>> --- a/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf
>>>> +++ b/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf
>>>> @@ -77,7 +77,6 @@ [LibraryClasses]
>>>>  
>>>>IpmiCmdLib
>>>>  
>>>> -  SerdesLib
>>>>  
>>>>  [Protocols]
>>>>gEfiSmbiosProtocolGuid   # PROTOCOL ALWAYS_CONSUMED
>>>> -- 
>>>> 2.9.5
>>>>
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Re: [edk2] [PATCH edk2-platforms v1 01/16] Hisilicon/D0x: Remove SerdesLib

2019-02-12 Thread Ming Huang




On 2/11/2019 11:05 PM, Leif Lindholm wrote:
> On Fri, Feb 01, 2019 at 09:34:21PM +0800, Ming Huang wrote:
>> SerdesLib is useless for SmbiosMiscDxe and D06, so remove it.
> 
> Should it not then also delete #include  from
> Platform/Hisilicon/D06/Library/OemMiscLibD06/BoardFeatureD06.c,
> Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c and
> Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type09/MiscSystemSlotDesignationFunction.c
> ?
> 
> Meanwhile,
> Platform/Hisilicon/D03/Library/OemMiscLib2P/BoardFeature2PHi1610.c
> and
> Platform/Hisilicon/D05/Library/OemMiscLibD05/BoardFeatureD05.c
> both include this header, but
> Platform/Hisilicon/D03/Library/OemMiscLib2P/OemMiscLib2PHi1610.inf
> and 
> Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.inf
> do not declare the dependency.

OemMiscLibD06.c can remove the SerdesLib.h. As using the definitions in
SerdesLib.h, other .c files can not remove the header file.

> 
> Can you investigate and submit an updated patch addressing all of the
> unnecessary references?

This may takes a lot of time, as Hi1620(D06) is our important project,
maybe we should focus on D06.

Thanks

> 
> Best Regards,
> 
> Leif
> 
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Ming Huang 
>> ---
>>  Platform/Hisilicon/D06/D06.dsc   | 2 --
>>  Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf | 1 -
>>  2 files changed, 3 deletions(-)
>>
>> diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc
>> index 396bd03c9d24..cbbd99e4a659 100644
>> --- a/Platform/Hisilicon/D06/D06.dsc
>> +++ b/Platform/Hisilicon/D06/D06.dsc
>> @@ -64,8 +64,6 @@ [LibraryClasses.common]
>>  
>>CpldIoLib|Silicon/Hisilicon/Library/CpldIoLib/CpldIoLib.inf
>>  
>> -  
>> SerdesLib|Silicon/Hisilicon/Hi1620/Library/Hi1620Serdes/Hi1620SerdesLib.inf
>> -
>>TimeBaseLib|EmbeddedPkg/Library/TimeBaseLib/TimeBaseLib.inf
>>
>> RealTimeClockLib|Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf
>>OemMiscLib|Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.inf
>> diff --git 
>> a/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf 
>> b/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf
>> index 61cead7779b9..8e5c56fa41fd 100644
>> --- a/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf
>> +++ b/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf
>> @@ -77,7 +77,6 @@ [LibraryClasses]
>>  
>>IpmiCmdLib
>>  
>> -  SerdesLib
>>  
>>  [Protocols]
>>gEfiSmbiosProtocolGuid   # PROTOCOL ALWAYS_CONSUMED
>> -- 
>> 2.9.5
>>
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Re: [edk2] [PATCH edk2-platforms v1 03/16] Hisilicon/D06: Optimize SAS driver for reducing boot time

2019-02-12 Thread Ming Huang




On 2/12/2019 11:12 PM, Leif Lindholm wrote:
> On Fri, Feb 01, 2019 at 09:34:23PM +0800, Ming Huang wrote:
>> SAS controller is always existed, so accessing SAS register don't
>> depend on PciBusDxe (pci enumeration).
>> Move the SAS module early in D06.fdf for dispatching SAS driver
>> early. This can avoid wait in BDS normally and reduce boot time.
>>
>> This patch is relative with SasDriverDxe in edk2-non-osi.
> 
> I think you are saying that this change is only valid after the
> update to SasDriverDxe in edk2-non-osi has been applied?
> Or does it mean that it only improves performance after that
> edk2-non-osi patch has been applied?

This change is only valid after the update to SasDriverDxe in
edk2-non-osi has been applied.

Thanks

> 
> Please be more explicit in the commit message.
> 
> Other than that. I'm OK with this patch.
> 
> /
> Leif
> 
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Ming Huang 
>> ---
>>  Platform/Hisilicon/D06/D06.fdf | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/Platform/Hisilicon/D06/D06.fdf b/Platform/Hisilicon/D06/D06.fdf
>> index a937660a09e2..d495ad7f264c 100644
>> --- a/Platform/Hisilicon/D06/D06.fdf
>> +++ b/Platform/Hisilicon/D06/D06.fdf
>> @@ -165,6 +165,7 @@ [FV.FvMain]
>>INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
>>  
>>INF Platform/Hisilicon/D06/Drivers/IoInitDxe/IoInitDxe.inf
>> +  INF Platform/Hisilicon/D06/Drivers/Sas/SasDxeDriver.inf
>>#
>># PI DXE Drivers producing Architectural Protocols (EFI Services)
>>#
>> @@ -296,7 +297,6 @@ [FV.FvMain]
>>#
>>INF Platform/Hisilicon/D06/Drivers/Sm750Dxe/UefiSmi.inf
>>INF MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf
>> -  INF Platform/Hisilicon/D06/Drivers/Sas/SasDxeDriver.inf
>>INF MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf
>>INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
>>INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
>> -- 
>> 2.9.5
>>
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Re: [edk2] [PATCH edk2-platforms v1 15/16] Hisilicon/D06: Use CalculateCrc16 in BaseLib

2019-02-12 Thread Ming Huang




On 2/12/2019 4:52 AM, Leif Lindholm wrote:
> On Fri, Feb 01, 2019 at 10:29:06PM +0800, Ming Huang wrote:
>> This patch is relative with "Add new API CalculateCrc16()" in edk2.
> 
> The commit message should describe what the patch does.
> I don't mind keeping the above line in, but we also need the
> description.
> 
> Obviously, this patch depends on the corresponding one going into
> edk2, which is has not yet.

As edk2 patch is has not yet, I will drop this patch.

Thanks

> 
> /
> Leif
> 
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Ming Huang 
>> ---
>>  Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c | 69 
>> ++--
>>  1 file changed, 5 insertions(+), 64 deletions(-)
>>
>> diff --git a/Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c 
>> b/Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c
>> index 9bf274e1b991..3ba4f305fb8e 100644
>> --- a/Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c
>> +++ b/Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c
>> @@ -14,6 +14,7 @@
>>  **/
>>  
>>  #include 
>> +#include 
>>  #include 
>>  #include 
>>  #include 
>> @@ -56,66 +57,6 @@ ETH_PRODUCT_DESC gEthPdtDesc[ETH_MAX_PORT] =
>>  {FALSE,  ETH_INVALID, ETH_INVALID, ETH_INVALID, ETH_INVALID}
>>  };
>>  
>> -UINT16 CrcTable16[256] = {
>> -  0x, 0x1021, 0x2042, 0x3063, 0x4084, 0x50A5, 0x60C6, 0x70E7,
>> -  0x8108, 0x9129, 0xA14A, 0xB16B, 0xC18C, 0xD1AD, 0xE1CE, 0xF1EF,
>> -  0x1231, 0x0210, 0x3273, 0x2252, 0x52B5, 0x4294, 0x72F7, 0x62D6,
>> -  0x9339, 0x8318, 0xB37B, 0xA35A, 0xD3BD, 0xC39C, 0xF3FF, 0xE3DE,
>> -  0x2462, 0x3443, 0x0420, 0x1401, 0x64E6, 0x74C7, 0x44A4, 0x5485,
>> -  0xA56A, 0xB54B, 0x8528, 0x9509, 0xE5EE, 0xF5CF, 0xC5AC, 0xD58D,
>> -  0x3653, 0x2672, 0x1611, 0x0630, 0x76D7, 0x66F6, 0x5695, 0x46B4,
>> -  0xB75B, 0xA77A, 0x9719, 0x8738, 0xF7DF, 0xE7FE, 0xD79D, 0xC7BC,
>> -  0x48C4, 0x58E5, 0x6886, 0x78A7, 0x0840, 0x1861, 0x2802, 0x3823,
>> -  0xC9CC, 0xD9ED, 0xE98E, 0xF9AF, 0x8948, 0x9969, 0xA90A, 0xB92B,
>> -  0x5AF5, 0x4AD4, 0x7AB7, 0x6A96, 0x1A71, 0x0A50, 0x3A33, 0x2A12,
>> -  0xDBFD, 0xCBDC, 0xFBBF, 0xEB9E, 0x9B79, 0x8B58, 0xBB3B, 0xAB1A,
>> -  0x6CA6, 0x7C87, 0x4CE4, 0x5CC5, 0x2C22, 0x3C03, 0x0C60, 0x1C41,
>> -  0xEDAE, 0xFD8F, 0xCDEC, 0xDDCD, 0xAD2A, 0xBD0B, 0x8D68, 0x9D49,
>> -  0x7E97, 0x6EB6, 0x5ED5, 0x4EF4, 0x3E13, 0x2E32, 0x1E51, 0x0E70,
>> -  0xFF9F, 0xEFBE, 0xDFDD, 0xCFFC, 0xBF1B, 0xAF3A, 0x9F59, 0x8F78,
>> -  0x9188, 0x81A9, 0xB1CA, 0xA1EB, 0xD10C, 0xC12D, 0xF14E, 0xE16F,
>> -  0x1080, 0x00A1, 0x30C2, 0x20E3, 0x5004, 0x4025, 0x7046, 0x6067,
>> -  0x83B9, 0x9398, 0xA3FB, 0xB3DA, 0xC33D, 0xD31C, 0xE37F, 0xF35E,
>> -  0x02B1, 0x1290, 0x22F3, 0x32D2, 0x4235, 0x5214, 0x6277, 0x7256,
>> -  0xB5EA, 0xA5CB, 0x95A8, 0x8589, 0xF56E, 0xE54F, 0xD52C, 0xC50D,
>> -  0x34E2, 0x24C3, 0x14A0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
>> -  0xA7DB, 0xB7FA, 0x8799, 0x97B8, 0xE75F, 0xF77E, 0xC71D, 0xD73C,
>> -  0x26D3, 0x36F2, 0x0691, 0x16B0, 0x6657, 0x7676, 0x4615, 0x5634,
>> -  0xD94C, 0xC96D, 0xF90E, 0xE92F, 0x99C8, 0x89E9, 0xB98A, 0xA9AB,
>> -  0x5844, 0x4865, 0x7806, 0x6827, 0x18C0, 0x08E1, 0x3882, 0x28A3,
>> -  0xCB7D, 0xDB5C, 0xEB3F, 0xFB1E, 0x8BF9, 0x9BD8, 0xABBB, 0xBB9A,
>> -  0x4A75, 0x5A54, 0x6A37, 0x7A16, 0x0AF1, 0x1AD0, 0x2AB3, 0x3A92,
>> -  0xFD2E, 0xED0F, 0xDD6C, 0xCD4D, 0xBDAA, 0xAD8B, 0x9DE8, 0x8DC9,
>> -  0x7C26, 0x6C07, 0x5C64, 0x4C45, 0x3CA2, 0x2C83, 0x1CE0, 0x0CC1,
>> -  0xEF1F, 0xFF3E, 0xCF5D, 0xDF7C, 0xAF9B, 0xBFBA, 0x8FD9, 0x9FF8,
>> -  0x6E17, 0x7E36, 0x4E55, 0x5E74, 0x2E93, 0x3EB2, 0x0ED1, 0x1EF0,
>> -};
>> -
>> -UINT16 MakeCrcCheckSum (
>> -  UINT8 *Buffer,
>> -  UINT32 Length
>> -  )
>> -{
>> -  UINT16 StartCRC = 0;
>> -
>> -  if (Length > SIZE_512KB) {
>> -return 0;
>> -  }
>> -
>> -  if (Buffer == NULL) {
>> -return 0;
>> -  }
>> -
>> -  while (Length) {
>> -StartCRC = CrcTable16 [((UINT8) ((StartCRC >> 8) & 0xff)) ^ 
>> *(Buffer++)] ^
>> -   ((UINT16) (StartCRC << 8));
>> -Length--;
>> -  }
>> -
>> -  return StartCRC;
>> -}
>> -
>> -
>>  EFI_STATUS
>>  OemGetMacE2prom(
>>IN  UINT32 Port,
>> @@ -170,8 +111,8 @@ OemGetMacE2prom(
>>  return Status;
>>}
>>  
>> -  Crc16 = MakeCrcCheckSum (
>> -(UINT8 *)&(MacDesc.MacLen),
>> +  Crc16 = CalculateCrc16 (
>> +&(MacDesc.MacLen),
>>  sizeof (MacDesc.MacLen) + sizeof (MacDesc.Mac)
>>  );
>>if ((Crc16 != MacDesc.Crc16) || (Crc16 == 0)) {
>> @@ -207,8 +148,8 @@ OemSetMacE2prom (
>>  MacDesc.Mac[I] = Addr[I];
>>}
>>  
>> -  MacDesc.Crc16 = MakeCrcCheckSum (
>> -(UINT8 *)&(MacDesc.MacLen),
>> +  MacDesc.Crc16 = CalculateCrc16 (
>> +&(MacDesc.MacLen),
>>  sizeof (MacDesc.MacLen) + MAC_ADDR_LEN
>>  );
>>  
>> -- 
>> 2.9.5
>>
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Re: [edk2] [PATCH edk2-platforms v1 12/16] Hisilicon/D06: Use new flash layout

2019-02-12 Thread Ming Huang




On 2/11/2019 10:54 PM, Leif Lindholm wrote:
> On Fri, Feb 01, 2019 at 09:34:32PM +0800, Ming Huang wrote:
>> In new flash layout, BIOS fd change from offset 1M to 8M in 16M
>> spi flash.
> 
> This bit
> 
>> Use the new CustomData.Fv which indicate the offset
>> of fd and which flash area can be updated for BMC.
> 
> is of critical importance. Should be its own paragraph.
> 
> How does this change affect variable storage? Will the server maintain
> state after a firmware upgrade, or will the operator need to rescue it
> manually via the BMC?

As the address of variable is change, need to update via the BMC for 19.02.

Thanks

> 
> /
> Leif
> 
>>
>> This patch is relative with patch "Use new flash layout" in
>> edk2-non-osi.
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Ming Huang 
>> ---
>>  Platform/Hisilicon/D06/D06.fdf | 4 ++--
>>  1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/Platform/Hisilicon/D06/D06.fdf b/Platform/Hisilicon/D06/D06.fdf
>> index d495ad7f264c..f72b513352fb 100644
>> --- a/Platform/Hisilicon/D06/D06.fdf
>> +++ b/Platform/Hisilicon/D06/D06.fdf
>> @@ -29,7 +29,7 @@ [DEFINES]
>>  
>> 
>>  [FD.D06]
>>  
>> -BaseAddress   = 0x20410|gArmTokenSpaceGuid.PcdFdBaseAddress  # The base 
>> address of the Firmware in NOR Flash.
>> +BaseAddress   = 0x20480|gArmTokenSpaceGuid.PcdFdBaseAddress  # The base 
>> address of the Firmware in NOR Flash.
>>  
>>  Size  = 0x0040|gArmTokenSpaceGuid.PcdFdSize # The size 
>> in bytes of the FLASH Device
>>  ErasePolarity = 1
>> @@ -124,7 +124,7 @@ [FD.D06]
>>  0x003E|0x0001
>>  
>>  0x003F|0x0001
>> -FILE = Platform/Hisilicon/D0x-CustomData.Fv
>> +FILE = Platform/Hisilicon/D06/CustomData.Fv
>>  
>>  
>> 
>>  #
>> -- 
>> 2.9.5
>>
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Re: [edk2] [PATCH edk2-platforms v1 10/16] Hisilicon/D06: Modify for M7 self-Adapte support

2019-02-12 Thread Ming Huang




On 2/12/2019 11:46 PM, Leif Lindholm wrote:
> On Tue, Feb 12, 2019 at 11:14:43PM +0800, Ming Huang wrote:
>>
>>
>> On 2/12/2019 3:28 AM, Leif Lindholm wrote:
>>> On Fri, Feb 01, 2019 at 09:34:30PM +0800, Ming Huang wrote:
>>>> As new M7(Cortex-M7) firmware support self-adapte, so do not
>>>> need BIOS to implement some function, remove useless funtions
>>>> and report CPU0/CPU1 Nic NCL offset to M7.
>>>
>>> I don't really care that some other device in the system is a
>>> Cortex-A7. What is its function? Is it an SCP, an MCP, ?
>>> Please describe its function rather than its implementation.
>>
>> M7 is used for HNS(Hisilicon network system), cpu access the network
>> component via M7.
> 
> Sure. But does customer documentation documentation refer to it as
> "M7"?

I check documentation just now, Integrated Management Processor(IMP) is used,
so, I will change commit titil and message M7 to IMP.

> 
>>>
>>> What are the external dependencies?
>>> Is this addressed by one of the patches for edk2-non-osi?
>>
>> This is depend on M7 firmware which will include in hpm file.
> 
> So we don't get it when using Capsule Update?

Yes.

> 
> What would be the implication of installing system firmware with the
> below change on a system that had not had the corresponding M7
> firmware update?

The HNS will not worked.

Thanks

> 
> /
> Leif
> 
>>>
>>> More style issues below.
>>>
>>>>
>>>> Contributed-under: TianoCore Contribution Agreement 1.1
>>>> Signed-off-by: Ming Huang 
>>>> ---
>>>>  Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c | 272 
>>>> 
>>>>  1 file changed, 45 insertions(+), 227 deletions(-)
>>>>
>>>> diff --git a/Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c 
>>>> b/Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c
>>>> index aaf990216982..9bf274e1b991 100644
>>>> --- a/Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c
>>>> +++ b/Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c
>>>> @@ -21,44 +21,21 @@
>>>>  #include 
>>>>  
>>>>  #define CPU2_SFP2_100G_CARD_OFFSET   0x25
>>>> -#define CPU1_SFP1_LOCATE_OFFSET  0x16
>>>> -#define CPU1_SFP0_LOCATE_OFFSET  0x12
>>>> -#define CPU2_SFP1_LOCATE_OFFSET  0x21
>>>> -#define CPU2_SFP0_LOCATE_OFFSET  0x19
>>>> -#define CPU2_SFP2_10G_GE_CARD_OFFSET 0x25
>>>>  
>>>> -#define SFP_10G_SPEED   10
>>>> -#define SFP_25G_SPEED   25
>>>> -#define SFP_100G_SPEED  100
>>>> -#define SFP_GE_SPEED1
>>>> -
>>>> -#define SFP_GE_SPEED_VAL_VENDOR_FINISAR 0x0C
>>>> -#define SFP_GE_SPEED_VAL0x0D
>>>> -#define SFP_10G_SPEED_VAL   0x67
>>>> -#define SFP_25G_SPEED_VAL   0xFF
>>>> +#define SOCKET1_NET_PORT_100G 1
>>>> +#define SOCKET0_NET_PORT_NUM  4
>>>> +#define SOCKET1_NET_PORT_NUM  2
>>>>  
>>>>  #define CARD_PRESENT_100G   (BIT7)
>>>> -#define CARD_PRESENT_10G(BIT0)
>>>> -#define SELECT_SFP_BY_INDEX(index)  (1 << (index - 1))
>>>> -#define SPF_SPEED_OFFSET12
>>>> -
>>>> -#define SFP_DEVICE_ADDRESS 0x50
>>>> -#define CPU1_9545_I2C_ADDR 0x70
>>>> -#define CPU2_9545_I2C_ADDR 0x71
>>>> -
>>>> -#define FIBER_PRESENT 0
>>>> -#define CARD_PRESENT  1
>>>> -#define I2C_PORT_SFP  4
>>>> -#define CPU2_I2C_PORT_SFP 5
>>>> -
>>>> -#define SOCKET_0 0
>>>> -#define SOCKET_1 1
>>>>  #define EEPROM_I2C_PORT  4
>>>>  #define EEPROM_PAGE_SIZE 0x40
>>>>  #define MAC_ADDR_LEN 6
>>>>  #define I2C_OFFSET_EEPROM_ETH0   (0xc00)
>>>>  #define I2C_SLAVEADDR_EEPROM (0x52)
>>>>  
>>>> +#define SRAM_NIC_NCL1_OFFSET_FLAG   0xA0E87FE0
>>>> +#define SRAM_NIC_NCL2_OFFSET_FLAG   0xA0E87FE4
>>>
>>> Is this just a hard-coded address in SRAM? Where is it specified?
>>> I don't think "_FLAG" is the correct name for this #define - this is
>>> the actual offset value. So _OFFSET_ADDRESS would be more descriptive.
>>
>> Yes, M7 firmware will read this two sram ad

Re: [edk2] [PATCH edk2-platforms v1 09/16] Hisilicon/D06: Add PCI_OSC_SUPPORT

2019-02-12 Thread Ming Huang




On 2/12/2019 2:51 AM, Leif Lindholm wrote:
> On Fri, Feb 01, 2019 at 09:34:29PM +0800, Ming Huang wrote:
>> Add PCI_OSC_SUPPORT for remaining host bridges to remove fail
>> output in kernel:
>> [  103.478893] acpi PNP0A08:01: _OSC failed (AE_NOT_FOUND);
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Ming Huang 
>> ---
>>  Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl | 64 
>> 
>>  1 file changed, 64 insertions(+)
>>
>> diff --git a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl 
>> b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl
>> index 4d9d9d95be68..86d8728b82f2 100644
>> --- a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl
>> +++ b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl
>> @@ -17,6 +17,50 @@
>>  **/
>>  
>>  //#include "ArmPlatform.h"
>> +
>> +/*
>> +  See ACPI 6.1 Spec, 6.2.11, PCI Firmware Spec 3.0, 4.5
>> +*/
>> +#define PCI_OSC_SUPPORT() \
> 
> PCI0 and PCI6 already have _OSC entries.
> This macro ends up being used for 1-5 and 7-B.
> So calling it PCI_OSC_SUPPORT seems somewhat misleading.
> 
> Then again, there is a lot of similarities between this macro and the
> existing entries. Could the same macro be used for 0 and 6? Or could
> the macro be split up into multiple parts and reused?

When I make this patch, I try to rewrite PCI0/6 with the same macro, but
the macro don't support parameter. For spliting up multiple parts, if modify
something in future, the parts need to split up to smaller parts. So, if
need to rewrite PCI0/6 with macro, is it applicable to add another macro
PCI_OSC_SUPPORT_HOTPLUG?

Thanks

> 
> /
> Leif
> 
>> +  Name(SUPP, Zero) /* PCI _OSC Support Field value */ \
>> +  Name(CTRL, Zero) /* PCI _OSC Control Field value */ \
>> +  Method(_OSC,4) { \
>> +If(LEqual(Arg0,ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))) { \
>> +  /* Create DWord-adressable fields from the Capabilities Buffer */ \
>> +  CreateDWordField(Arg3,0,CDW1) \
>> +  CreateDWordField(Arg3,4,CDW2) \
>> +  CreateDWordField(Arg3,8,CDW3) \
>> +  /* Save Capabilities DWord2 & 3 */ \
>> +  Store(CDW2,SUPP) \
>> +  Store(CDW3,CTRL) \
>> +  /* Only allow native hot plug control if OS supports: */ \
>> +  /* ASPM */ \
>> +  /* Clock PM */ \
>> +  /* MSI/MSI-X */ \
>> +  If(LNotEqual(And(SUPP, 0x16), 0x16)) { \
>> +And(CTRL,0x1E,CTRL) \
>> +  }\
>> +  \
>> +  /* Do not allow native PME, AER */ \
>> +  /* Never allow SHPC (no SHPC controller in this system)*/ \
>> +  And(CTRL,0x10,CTRL) \
>> +  If(LNotEqual(Arg1,One)) { /* Unknown revision */ \
>> +Or(CDW1,0x08,CDW1) \
>> +  } \
>> +  \
>> +  If(LNotEqual(CDW3,CTRL)) { /* Capabilities bits were masked */ \
>> +Or(CDW1,0x10,CDW1) \
>> +  } \
>> +  \
>> +  /* Update DWORD3 in the buffer */ \
>> +  Store(CTRL,CDW3) \
>> +  Return(Arg3) \
>> +} Else { \
>> +  Or(CDW1,4,CDW1) /* Unrecognized UUID */ \
>> +  Return(Arg3) \
>> +} \
>> +  } // End _OSC
>> +
>>  Scope(_SB)
>>  {
>>Device (PCI0)
>> @@ -270,6 +314,8 @@ Device (PCI1)
>>  Return (RBUF)
>>} // Method(_CRS), this method 
>> return RBUF!
>>  
>> +  PCI_OSC_SUPPORT ()
>> +
>>Method (_STA, 0x0, NotSerialized)
>>{
>>  Return (0xf)
>> @@ -333,6 +379,8 @@ Device (PCI2)
>>  Return (RBUF)
>>} // Method(_CRS), this method 
>> return RBUF!
>>  
>> +  PCI_OSC_SUPPORT ()
>> +
>>Method (_STA, 0x0, NotSerialized)
>>{
>>  Return (0xf)
>> @@ -382,6 +430,8 @@ Device (PCI3)
>>  Return (RBUF)
>>} // Method(_CRS), this method 
>> return RBUF!
>>  
>> +  PCI_OSC_SUPPORT ()
>> +
>>Method (_STA, 0x0, NotSerialized)
>>{
>>  Return (0xf)
>> @@ -431,6 +481,8 @@ Device (PCI4)
>>  Return (RBUF)
>>} // Method(_CRS), this method 
>> return RBUF!
>>  
>> +  PCI_OSC_SUPPORT ()
>> +
>>Method (_STA, 0x0, NotSerialized)
>>{
>>  Return (0x0F)
>> @@ -505,6 +557,8 @@ Device (PCI5)
>>  Return (RBUF)
>>}

Re: [edk2] [PATCH edk2-platforms v1 06/16] Hisilicon/D06: Add OemGetCpuFreq to encapsulate difference

2019-02-12 Thread Ming Huang




On 2/12/2019 1:15 AM, Leif Lindholm wrote:
> On Fri, Feb 01, 2019 at 09:34:26PM +0800, Ming Huang wrote:
>> From: xingjiang tang 
>>
>> Implementation OemGetCpuFreq() to get cpu frequency from cpld to
>> encapsulate project difference, for some projects don't support
>> get cpu frequency by this way.
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Ming Huang 
>> ---
>>  Platform/Hisilicon/D06/Include/Library/CpldD06.h |  4 
>>  Silicon/Hisilicon/Include/Library/OemMiscLib.h   |  2 ++
>>  Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c | 16 
>> 
>>  3 files changed, 22 insertions(+)
>>
>> diff --git a/Platform/Hisilicon/D06/Include/Library/CpldD06.h 
>> b/Platform/Hisilicon/D06/Include/Library/CpldD06.h
>> index ec9b49f4e70d..4d07a8ab3741 100644
>> --- a/Platform/Hisilicon/D06/Include/Library/CpldD06.h
>> +++ b/Platform/Hisilicon/D06/Include/Library/CpldD06.h
>> @@ -36,4 +36,8 @@
>>  #define CPLD_X8_X8_X8_BOARD_ID0x92
>>  #define CPLD_X16_X8_BOARD_ID  0x93
>>  
>> +#define CPLD_CLOCK_FLAG  0xFD
>> +#define CPLD_BOM_VER_FLAG0x0B
>> +#define BRD_VER_4TH  0x4
> 
> What is BRD_VER_4TH? Please write out full words.
> Also, this macro needs a CPLD_ prefix.

BRD_VER_4TH: BOARD_REVISION_4TH
Modify in v2.

> 
>> +
>>  #endif /* __CPLDD06_H__ */
>> diff --git a/Silicon/Hisilicon/Include/Library/OemMiscLib.h 
>> b/Silicon/Hisilicon/Include/Library/OemMiscLib.h
>> index 86ea6a1b3deb..dfac87d635d9 100644
>> --- a/Silicon/Hisilicon/Include/Library/OemMiscLib.h
>> +++ b/Silicon/Hisilicon/Include/Library/OemMiscLib.h
>> @@ -53,4 +53,6 @@ BOOLEAN OemIsNeedDisableExpanderBuffer(VOID);
>>  
>>  extern EFI_STRING_ID gDimmToDevLocator[MAX_SOCKET][MAX_CHANNEL][MAX_DIMM];
>>  EFI_HII_HANDLE EFIAPI OemGetPackages ();
>> +UINTN OemGetCpuFreq (UINT8 Socket);
>> +
>>  #endif
>> diff --git a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c 
>> b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c
>> index 2a9db46d1ff9..8f2ac308c7b9 100644
>> --- a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c
>> +++ b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c
>> @@ -207,3 +207,19 @@ OemIsNeedDisableExpanderBuffer (
>>  {
>>return TRUE;
>>  }
>> +
>> +UINTN OemGetCpuFreq (UINT8 Socket)
>> +{
>> +  UINT8 BrdVerData;
> 
> Write out full words.
> 
>> +
>> +  BrdVerData = MmioRead8(CPLD_BASE_ADDRESS + CPLD_BOM_VER_FLAG);
> 
> Space before (.
> 
>> +
>> +  if (BrdVerData >= BRD_VER_4TH){  //2.5G
> 
> What is the comment saying? The number below?
> The number below is also saying the number below.
> A useful comment would be
> "// Board revision 4 and higher run at 2.5GHz
>  // Earlier revisions run at 2GHz"
> 
> At that point you don't even need the #define.
> And not really the temporary variable either.
> 
>> +return 25;
>> +  }
>> +  else
>> +  {
> 
> } else {

Modify in v2.

Thanks

> 
> /
> Leif
> 
>> + return 20;
>> +  }
>> +}
>> +
>> -- 
>> 2.9.5
>>
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Re: [edk2] [PATCH edk2-platforms v1 04/16] Hisilicon/D06: Fix access variable fail issue

2019-02-12 Thread Ming Huang




On 2/12/2019 11:17 PM, Leif Lindholm wrote:
> On Fri, Feb 01, 2019 at 09:34:24PM +0800, Ming Huang wrote:
>> From: Jason Zhang 
>>
>> BmcWdtEnable is a field of OemConfigData structure, need have
>> runtime service attribution if use it during exit boot service
> 
> This sounds like a very shady thing to do.
> Which module is seeing issues, and what issues are it seeing, during
> ExitBootServices?

Yes,WatchDog module read the OemConfigData.BmcWdtEnable during ExitBootServices
and will get fail log before boot kernel:

Get Variable failed. Status Not Found
[0.00] Booting Linux on physical CPU 0x01 [0x480fd010]

Thanks.

> 
> /
> Leif
> 
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Ming Huang 
>> ---
>>  Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr | 2 +-
>>  Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c  | 2 +-
>>  2 files changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr 
>> b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr
>> index 470e9ace3dcf..08236704fbfe 100644
>> --- a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr
>> +++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr
>> @@ -23,7 +23,7 @@ formset
>>help  = STRING_TOKEN(STR_OEM_CONFIG),
>>classguid = gEfiIfrFrontPageGuid,  // for MdeModule Bds.
>>efivarstore OEM_CONFIG_DATA,
>> -attribute = EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_NON_VOLATILE,
>> +attribute = EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_NON_VOLATILE 
>> | EFI_VARIABLE_RUNTIME_ACCESS,
>>  name  = OemConfig,
>>  guid  = gOemConfigGuid;
>>  
>> diff --git a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c 
>> b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c
>> index 012d45bc0214..6668103af027 100644
>> --- a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c
>> +++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c
>> @@ -316,7 +316,7 @@ OemConfigUiLibConstructor (
>>Status = gRT->SetVariable (
>>OEM_CONFIG_NAME,
>>,
>> -  EFI_VARIABLE_NON_VOLATILE | 
>> EFI_VARIABLE_BOOTSERVICE_ACCESS,
>> +  EFI_VARIABLE_NON_VOLATILE | 
>> EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS,
>>sizeof (OEM_CONFIG_DATA),
>>
>>);
>> -- 
>> 2.9.5
>>
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Re: [edk2] [PATCH edk2-non-osi v1 1/7] Hisilicon/D06: Optimize SAS driver for reducing boot time

2019-02-12 Thread Ming Huang




On 2/12/2019 11:20 PM, Leif Lindholm wrote:
> Change the subject line to:
> Hisilicon/D06: remove PCI enumeration dependency from SAS driver
> 
> On Fri, Feb 01, 2019 at 10:25:01PM +0800, Ming Huang wrote:
>> SAS controller is always existed, so accessing SAS register don't
>> depend on PciBusDxe (pci enumeration). Modify SAS driver remove the
>> dependence on pci enumeration.
> 
> And mention here that this is done to improve boot times.
> 
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Ming Huang 
>> ---
>>  Platform/Hisilicon/D06/Drivers/Sas/SasDriverDxe.depex | Bin 216 -> 36 bytes
> 
> What are the remaining depexes?
> Do we have the opportunity to get rid of this .depex?

SAS driver is depended on IoInitDxe, IoInitDxe use the variable server, so add
variable dependence to let SAS driver run after IoInitDxe.

> 
> /
> Leif
> 
>>  Platform/Hisilicon/D06/Drivers/Sas/SasDriverDxe.efi   | Bin 221312 -> 
>> 220640 bytes
>>  2 files changed, 0 insertions(+), 0 deletions(-)
>>
>> diff --git a/Platform/Hisilicon/D06/Drivers/Sas/SasDriverDxe.depex 
>> b/Platform/Hisilicon/D06/Drivers/Sas/SasDriverDxe.depex
>> index 1a5bc1e..e076777 100644
>> Binary files a/Platform/Hisilicon/D06/Drivers/Sas/SasDriverDxe.depex and 
>> b/Platform/Hisilicon/D06/Drivers/Sas/SasDriverDxe.depex differ
>> diff --git a/Platform/Hisilicon/D06/Drivers/Sas/SasDriverDxe.efi 
>> b/Platform/Hisilicon/D06/Drivers/Sas/SasDriverDxe.efi
>> index ac6bae7..4a29e8c 100644
>> Binary files a/Platform/Hisilicon/D06/Drivers/Sas/SasDriverDxe.efi and 
>> b/Platform/Hisilicon/D06/Drivers/Sas/SasDriverDxe.efi differ
>> -- 
>> 2.9.5
>>
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Re: [edk2] [PATCH edk2-platforms v1 11/16] Hisilicon/D06: Add Setup Item "Support DPC"

2019-02-12 Thread Ming Huang




On 2/12/2019 3:46 AM, Leif Lindholm wrote:
> On Fri, Feb 01, 2019 at 09:34:31PM +0800, Ming Huang wrote:
>> Add setup item "Support DPC" to enable or disable PCIe DPC
>> (Downstream Port Containment).
> 
> This patch also seems to disable the SRIOV configuration and delete a
> lot of ports. Can you explain how this is related?

The pcie menu is suppressed for original code as these menus are not ready,
this patch remove the suppression for pcie menu, so delete these menus for now.

Thanks.

> 
> /
> Leif
> 
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Ming Huang 
>> ---
>>  Silicon/Hisilicon/Include/Library/OemConfigData.h   |   1 +
>>  Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr  |   2 -
>>  Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c   |   4 +
>>  Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr| 197 
>> +---
>>  Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfigStrings.uni |   3 +-
>>  5 files changed, 10 insertions(+), 197 deletions(-)
>>
>> diff --git a/Silicon/Hisilicon/Include/Library/OemConfigData.h 
>> b/Silicon/Hisilicon/Include/Library/OemConfigData.h
>> index f120e3123c83..c0097d0829f0 100644
>> --- a/Silicon/Hisilicon/Include/Library/OemConfigData.h
>> +++ b/Silicon/Hisilicon/Include/Library/OemConfigData.h
>> @@ -49,6 +49,7 @@ typedef struct {
>>UINT8 OSWdtAction;
>>/*PCIe Config*/
>>UINT8 PcieSRIOVSupport;
>> +  UINT8 PcieDPCSupport;
>>UINT8 PciePort[PCIE_MAX_TOTAL_PORTS];
>>UINT8 PcieLinkSpeedPort[PCIE_MAX_TOTAL_PORTS];
>>UINT8 PcieLinkDeEmphasisPort[PCIE_MAX_TOTAL_PORTS];
>> diff --git a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr 
>> b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr
>> index 08236704fbfe..93ccb99bdc67 100644
>> --- a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr
>> +++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr
>> @@ -62,11 +62,9 @@ formset
>>prompt = STRING_TOKEN(STR_IBMC_CONFIG_FORM_TITLE),
>>help   = STRING_TOKEN(STR_IBMC_CONFIG_FORM_HELP);
>>  
>> -suppressif TRUE;
>>  goto PCIE_CONFIG_FORM_ID,
>>prompt  = STRING_TOKEN(STR_PCIE_CONFIG_FORM_TITLE),
>>help= STRING_TOKEN(STR_PCIE_CONFIG_FORM_HELP);
>> -endif;
>>  
>>  goto MISC_CONFIG_FORM_ID,
>>prompt  = STRING_TOKEN(STR_MISC_CONFIG_FORM_TITLE),
>> diff --git a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c 
>> b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c
>> index 6668103af027..be4ce8820f73 100644
>> --- a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c
>> +++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c
>> @@ -290,6 +290,10 @@ OemConfigUiLibConstructor (
>>Configuration.OSWdtTimeout = 5;
>>Configuration.OSWdtAction = 1;
>>//
>> +  //Set the default value of the PCIe option
>> +  //
>> +  Configuration.PcieDPCSupport = 0;
>> +  //
>>//Set the default value of the Misc option
>>//
>>Configuration.EnableSmmu = 1;
>> diff --git a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr 
>> b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr
>> index 7cf7cdd29ba2..c65907fe846e 100644
>> --- a/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr
>> +++ b/Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr
>> @@ -17,203 +17,12 @@
>>  form formid = PCIE_CONFIG_FORM_ID,
>>title   = STRING_TOKEN (STR_PCIE_CONFIG_FORM_TITLE);
>>  
>> -  goto VFR_FORMID_PCIE_SOCKET0,
>> -prompt  = STRING_TOKEN (STR_PCIE_CPU_0_PROMPT),
>> -help= STRING_TOKEN (STR_PCIE_CPU_PROMPT_HELP);
>> -
>> -  goto VFR_FORMID_PCIE_SOCKET1,
>> -prompt  = STRING_TOKEN (STR_PCIE_CPU_1_PROMPT),
>> -help= STRING_TOKEN (STR_PCIE_CPU_PROMPT_HELP);
>> -
>> -  oneof varid  = OEM_CONFIG_DATA.PcieSRIOVSupport,
>> -prompt   = STRING_TOKEN (STR_SRIOV_SUPPORT_PROMPT),
>> -help = STRING_TOKEN (STR_SRIOV_SUPPORT_HELP),
>> +  oneof varid  = OEM_CONFIG_DATA.PcieDPCSupport,
>> +prompt   = STRING_TOKEN (STR_DPC_SUPPORT_PROMPT),
>> +help = STRING_TOKEN (STR_DPC_SUPPORT_HELP),
>>  option text = STRING_TOKEN (STR_DISABLE), value = 0, flags = 
>> MANUFACTURING | DEFAULT | RESET_REQ

Re: [edk2] [PATCH edk2-platforms v1 10/16] Hisilicon/D06: Modify for M7 self-Adapte support

2019-02-12 Thread Ming Huang




On 2/12/2019 3:28 AM, Leif Lindholm wrote:
> On Fri, Feb 01, 2019 at 09:34:30PM +0800, Ming Huang wrote:
>> As new M7(Cortex-M7) firmware support self-adapte, so do not
>> need BIOS to implement some function, remove useless funtions
>> and report CPU0/CPU1 Nic NCL offset to M7.
> 
> I don't really care that some other device in the system is a
> Cortex-A7. What is its function? Is it an SCP, an MCP, ?
> Please describe its function rather than its implementation.

M7 is used for HNS(Hisilicon network system), cpu access the network
component via M7.

> 
> What are the external dependencies?
> Is this addressed by one of the patches for edk2-non-osi?

This is depend on M7 firmware which will include in hpm file.

> 
> More style issues below.
> 
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Ming Huang 
>> ---
>>  Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c | 272 
>> 
>>  1 file changed, 45 insertions(+), 227 deletions(-)
>>
>> diff --git a/Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c 
>> b/Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c
>> index aaf990216982..9bf274e1b991 100644
>> --- a/Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c
>> +++ b/Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c
>> @@ -21,44 +21,21 @@
>>  #include 
>>  
>>  #define CPU2_SFP2_100G_CARD_OFFSET   0x25
>> -#define CPU1_SFP1_LOCATE_OFFSET  0x16
>> -#define CPU1_SFP0_LOCATE_OFFSET  0x12
>> -#define CPU2_SFP1_LOCATE_OFFSET  0x21
>> -#define CPU2_SFP0_LOCATE_OFFSET  0x19
>> -#define CPU2_SFP2_10G_GE_CARD_OFFSET 0x25
>>  
>> -#define SFP_10G_SPEED   10
>> -#define SFP_25G_SPEED   25
>> -#define SFP_100G_SPEED  100
>> -#define SFP_GE_SPEED1
>> -
>> -#define SFP_GE_SPEED_VAL_VENDOR_FINISAR 0x0C
>> -#define SFP_GE_SPEED_VAL0x0D
>> -#define SFP_10G_SPEED_VAL   0x67
>> -#define SFP_25G_SPEED_VAL   0xFF
>> +#define SOCKET1_NET_PORT_100G 1
>> +#define SOCKET0_NET_PORT_NUM  4
>> +#define SOCKET1_NET_PORT_NUM  2
>>  
>>  #define CARD_PRESENT_100G   (BIT7)
>> -#define CARD_PRESENT_10G(BIT0)
>> -#define SELECT_SFP_BY_INDEX(index)  (1 << (index - 1))
>> -#define SPF_SPEED_OFFSET12
>> -
>> -#define SFP_DEVICE_ADDRESS 0x50
>> -#define CPU1_9545_I2C_ADDR 0x70
>> -#define CPU2_9545_I2C_ADDR 0x71
>> -
>> -#define FIBER_PRESENT 0
>> -#define CARD_PRESENT  1
>> -#define I2C_PORT_SFP  4
>> -#define CPU2_I2C_PORT_SFP 5
>> -
>> -#define SOCKET_0 0
>> -#define SOCKET_1 1
>>  #define EEPROM_I2C_PORT  4
>>  #define EEPROM_PAGE_SIZE 0x40
>>  #define MAC_ADDR_LEN 6
>>  #define I2C_OFFSET_EEPROM_ETH0   (0xc00)
>>  #define I2C_SLAVEADDR_EEPROM (0x52)
>>  
>> +#define SRAM_NIC_NCL1_OFFSET_FLAG   0xA0E87FE0
>> +#define SRAM_NIC_NCL2_OFFSET_FLAG   0xA0E87FE4
> 
> Is this just a hard-coded address in SRAM? Where is it specified?
> I don't think "_FLAG" is the correct name for this #define - this is
> the actual offset value. So _OFFSET_ADDRESS would be more descriptive.

Yes, M7 firmware will read this two sram addresses.

> 
>> +
>>  #pragma pack(1)
>>  typedef struct {
>>UINT16 Crc16;
>> @@ -114,204 +91,6 @@ UINT16 CrcTable16[256] = {
>>0x6E17, 0x7E36, 0x4E55, 0x5E74, 0x2E93, 0x3EB2, 0x0ED1, 0x1EF0,
>>  };
>>  
>> -EFI_STATUS
>> -GetSfpSpeed (
>> -  UINT16 Socket,
>> -  UINT16 SfpNum,
>> -  UINT8* FiberSpeed
>> -  )
>> -{
>> -  EFI_STATUS  Status;
>> -  I2C_DEVICE  SpdDev;
>> -  UINT8   SfpSelect;
>> -  UINT8   SfpSpeed;
>> -  UINT32  RegAddr;
>> -  UINT16  I2cAddr;
>> -  UINT32  SfpPort;
>> -
>> -  SfpSpeed = 0x0;
>> -  if (Socket == SOCKET_1) {
>> -I2cAddr = CPU2_9545_I2C_ADDR;
>> -SfpPort = CPU2_I2C_PORT_SFP;
>> -  } else {
>> -I2cAddr = CPU1_9545_I2C_ADDR;
>> -SfpPort = I2C_PORT_SFP;
>> -  }
>> -
>> -  Status = I2CInit (Socket, SfpPort, Normal);
>> -  if (EFI_ERROR (Status)) {
>> -DEBUG ((DEBUG_ERROR, "[%a]:[%dL] Socket%d Call I2CInit failed! 
>> p1=0x%x.\n",
>> -__FUNCTION__, __LINE__, Socket, Status));
>> -return Status;
>> -  }
>> -
>> -  SpdDev.Socket = Socket;
>> -  SpdDev.DeviceType = DEVICE_TYPE_SPD;
>>

Re: [edk2] [PATCH edk2-platforms v1 08/16] Hisilicon/D06: Change HCCS speed from 30G to 26G

2019-02-12 Thread Ming Huang




On 2/12/2019 2:36 AM, Leif Lindholm wrote:
> On Fri, Feb 01, 2019 at 09:34:28PM +0800, Ming Huang wrote:
>> Follow chip team suggestion to change HCCS(Huawei Cache-Coherent
>> System) speed from 30G to 26G, this modification can avoid some
>> unstable stress issue.
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Ming Huang 
>> ---
>>  Silicon/Hisilicon/Include/Library/OemMiscLib.h   | 10 ++
>>  Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c |  8 
>>  2 files changed, 18 insertions(+)
>>
>> diff --git a/Silicon/Hisilicon/Include/Library/OemMiscLib.h 
>> b/Silicon/Hisilicon/Include/Library/OemMiscLib.h
>> index dfac87d635d9..3c0cd0319122 100644
>> --- a/Silicon/Hisilicon/Include/Library/OemMiscLib.h
>> +++ b/Silicon/Hisilicon/Include/Library/OemMiscLib.h
>> @@ -22,6 +22,11 @@
>>  #include 
>>  #include 
>>  
>> +#define HCCS_PLL_VALUE_3000  0x52240781
>> +#define HCCS_PLL_VALUE_2600  0x52240681
>> +#define HCCS_PLL_VALUE_2800  0x52240701
> 
> Could these be described by a proper macro instead of just values?
> A cursory glance suggests that an increase of 0x80 in the lower half
> means 200MHz.
> 
> If not, please sort them by frequency, ascending.

As the macros have use in other files, I prefer sort them by frequency.

> 
>> +
>> +
>>  #define PCIEDEVICE_REPORT_MAX  8
>>  #define MAX_PROCESSOR_SOCKETS  MAX_SOCKET
>>  #define MAX_MEMORY_CHANNELSMAX_CHANNEL
>> @@ -55,4 +60,9 @@ extern EFI_STRING_ID 
>> gDimmToDevLocator[MAX_SOCKET][MAX_CHANNEL][MAX_DIMM];
>>  EFI_HII_HANDLE EFIAPI OemGetPackages ();
>>  UINTN OemGetCpuFreq (UINT8 Socket);
>>  
>> +UINTN
>> +OemGetHccsFreq (
>> +  VOID
>> +  );
>> +
>>  #endif
>> diff --git a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c 
>> b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c
>> index 8f2ac308c7b9..83e53cfeb5dd 100644
>> --- a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c
>> +++ b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c
>> @@ -223,3 +223,11 @@ UINTN OemGetCpuFreq (UINT8 Socket)
>>}
>>  }
>>  
>> +UINTN
>> +OemGetHccsFreq (
> 
> The commit message describes this patch as changing the frequency.
> The actual code simply returns a value.
> The name of the function returning this value suggests the value is a
> frequency>
>> +  VOID
>> +  )
>> +{
>> +  return HCCS_PLL_VALUE_2600;
> 
> But the constant returned is named suggesting a PLL configuration
> value. And the frequency suggested by the name is many orders of
> magnitude below that described by the commit message.

Yes, the macros and function name are not very matched.
I plan to modify the commit title and message:
Hisilicon/D06: Use HCCS speed with 2.6G

Follow chip team suggestion, HCCS(Huawei Cache-Coherent System)
may be unstable while speed is 3.0G, so use 2.6G to avoid some
unstable stress issue.

Thanks.

> 
> /
> Leif
> 
>> +}
>> +
>> -- 
>> 2.9.5
>>
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Re: [edk2] [PATCH edk2-platforms v1 05/16] Hisilicon/D06: Add more PCIe port INT-x support

2019-02-12 Thread Ming Huang




On 2/12/2019 1:05 AM, Leif Lindholm wrote:
> On Fri, Feb 01, 2019 at 09:34:25PM +0800, Ming Huang wrote:
>> From: Jason Zhang 
>>
>> Since NVMe riser width is 6*X4, need add the related
>> port's INT-x support to match OS driver.
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Ming Huang 
>> ---
>>  Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl | 65 
>> +++-
>>  1 file changed, 50 insertions(+), 15 deletions(-)
>>
>> diff --git a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl 
>> b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl
>> index 27fde2e09bfe..4d9d9d95be68 100644
>> --- a/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl
>> +++ b/Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl
>> @@ -41,11 +41,21 @@ Scope(_SB)
>>// adding RPx INTx configure deponds on hardware board topology,
>>// if UEFI enables RPx, RPy, RPz... related INTx configure
>>// should be added
>> +  Package () {0x2,0,0,640}, // INT_A
>> +  Package () {0x2,1,0,641}, // INT_B
>> +  Package () {0x2,2,0,642}, // INT_C
>> +  Package () {0x2,3,0,643}, // INT_D
>> +
>>Package () {0x4,0,0,640}, // INT_A
>>Package () {0x4,1,0,641}, // INT_B
>>Package () {0x4,2,0,642}, // INT_C
>>Package () {0x4,3,0,643}, // INT_D
>>  
>> +  Package () {0x6,0,0,640}, // INT_A
>> +  Package () {0x6,1,0,641}, // INT_B
>> +  Package () {0x6,2,0,642}, // INT_C
>> +  Package () {0x6,3,0,643}, // INT_D
>> +
>>Package () {0x8,0,0,640}, // INT_A
>>Package () {0x8,1,0,641}, // INT_B
>>Package () {0x8,2,0,642}, // INT_C
>> @@ -56,6 +66,11 @@ Scope(_SB)
>>Package () {0xC,2,0,642}, // INT_C
>>Package () {0xC,3,0,643}, // INT_D
>>  
>> +  Package () {0xE,0,0,640}, // INT_A
>> +  Package () {0xE,1,0,641}, // INT_B
>> +  Package () {0xE,2,0,642}, // INT_C
>> +  Package () {0xE,3,0,643}, // INT_D
>> +
>>Package () {0x10,0,0,640}, // INT_A
>>Package () {0x10,1,0,641}, // INT_B
>>Package () {0x10,2,0,642}, // INT_C
>> @@ -759,26 +774,46 @@ Device (PCI6)
>>  // adding RPx INTx configure deponds on hardware board topology,
>>  // if UEFI enables RPx, RPy, RPz... related INTx configure
>>  // should be added
>> -Package () {0x04,0,0,640}, // INT_A
>> -Package () {0x04,1,0,641}, // INT_B
>> -Package () {0x04,2,0,642}, // INT_C
>> -Package () {0x04,3,0,643}, // INT_D
>> -
>> -Package () {0x08,0,0,640}, // INT_A
>> -Package () {0x08,1,0,641}, // INT_B
>> -Package () {0x08,2,0,642}, // INT_C
>> -Package () {0x08,3,0,643}, // INT_D
>> -
>> -Package () {0x0C,0,0,640}, // INT_A
>> -Package () {0x0C,1,0,641}, // INT_B
>> -Package () {0x0C,2,0,642}, // INT_C
>> -Package () {0x0C,3,0,643}, // INT_D
> 
> Please don't include the non-functional change of dropping the leading
> 0 (0x0 -> 0x) here together with the functional change of adding new
> entries. Please submit as a separate patch.

Ok, do it in v2.

> 
> /
> Leif
> 
>> +Package () {0x2,0,0,640}, // INT_A
>> +Package () {0x2,1,0,641}, // INT_B
>> +Package () {0x2,2,0,642}, // INT_C
>> +Package () {0x2,3,0,643}, // INT_D
>> +
>> +Package () {0x4,0,0,640}, // INT_A
>> +Package () {0x4,1,0,641}, // INT_B
>> +Package () {0x4,2,0,642}, // INT_C
>> +Package () {0x4,3,0,643}, // INT_D
>> +
>> +Package () {0x6,0,0,640}, // INT_A
>> +Package () {0x6,1,0,641}, // INT_B
>> +Package () {0x6,2,0,642}, // INT_C
>> +Package () {0x6,3,0,643}, // INT_D
>> +
>> +Package () {0x8,0,0,640}, // INT_A
>> +Package () {0x8,1,0,641}, // INT_B
>> +Package () {0x8,2,0,642}, // INT_C
>> +Package () {0x8

Re: [edk2] [PATCH edk2-non-osi v1 2/7] Hisilicon/D0x: Rename StartupAp() function

2019-02-12 Thread Ming Huang




On 2/12/2019 8:17 PM, Leif Lindholm wrote:
> On Tue, Feb 12, 2019 at 08:07:52PM +0800, Ming Huang wrote:
>>>> For D06 library, we use the same source code to support all Hi1620 
>>>> projects,
>>>> include product projects,so there are some modify for this, like support
>>>> 3 sockets, 4 sockets and remove some useless functions.
>>>
>>> So please reword the subject line of this commit to explain it is an
>>> overall update of PlatformSysCtrlLib - including which bits are dropped.
>>>
>>> And I think this makes a good argument for moving the header files for
>>> binary-only libraries from edk2-platforms to edk2-non-osi.
>>> If you do that in a separate patch before this one, you won't need to
>>> include as much detail in the commit message as you will otherwise.
>>
>> Do youe mean move PlatformSysCtrlLib.h, OemAddressMapLib.h and LpcLib.h to 
>> edk2-non-osi?
> 
> Yes.
> 
> Any interfaces exposed _only_ by implementations in edk2-non-osi.
> If there are any interfaces _also_ exposed by implementations in
> edk2-platforms, then I would prefer for them to remain in
> edk2-platforms.
> 
> Ideally, this would also include (the multiple) SerdesLib.h,
> IpmiCmdLib.h, and possibly others.

Ok, I will do that in v2.

Thanks

> 
> Regards,
> 
> Leif
> 
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Re: [edk2] [PATCH edk2-non-osi v1 6/7] Hisilicon/D06: Fix numa node wrong issue

2019-02-12 Thread Ming Huang




On 2/11/2019 10:48 PM, Leif Lindholm wrote:
> *bangs head on desk*
> 
> That question I just asked as a reply to
> ("Silicon/Hisilicon/D06: Set TA as Node 0 for TA boot")
> was meant to be a comment on this patch.
> 
> So - was this change one that was meant to happen together with
> edk2-platforms "Silicon/Hisilicon/D06: Set TA as Node 0 for TA boot"?

Yes, it is better to happen together with that patch.

> 
> What is the user visible behaviour that this change addresses?

Numa info of kernel boot is different:
Use old MemoryInit.efi:
[0.00] ACPI: SRAT: Node 1 PXM 0 [mem 0x208000-0x23]
[0.00] ACPI: SRAT: Node 1 PXM 0 [mem 0x-0x7fff]
[0.00] ACPI: SRAT: Node 3 PXM 2 [mem 0xa20-0xa23]
Use new MemoryInit.efi:
[0.00] ACPI: SRAT: Node 1 PXM 1 [mem 0x208000-0x23]
[0.00] ACPI: SRAT: Node 1 PXM 1 [mem 0x-0x7fff]
[0.00] ACPI: SRAT: Node 3 PXM 3 [mem 0xa20-0xa23]o

Thanks.

> 
> /
>     Leif
> 
> On Fri, Feb 01, 2019 at 10:25:06PM +0800, Ming Huang wrote:
>> Numa informations are acquired from HOB that build from memory
>> initialization module. Correct numa informations to match booting
>> from TA(Totem A or super cpu cluster A).
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Ming Huang 
>> ---
>>  Platform/Hisilicon/D06/MemoryInitPei/MemoryInit.efi | Bin 297696 -> 358656 
>> bytes
>>  1 file changed, 0 insertions(+), 0 deletions(-)
>>
>> diff --git a/Platform/Hisilicon/D06/MemoryInitPei/MemoryInit.efi 
>> b/Platform/Hisilicon/D06/MemoryInitPei/MemoryInit.efi
>> index 5fba353..fea1475 100644
>> Binary files a/Platform/Hisilicon/D06/MemoryInitPei/MemoryInit.efi and 
>> b/Platform/Hisilicon/D06/MemoryInitPei/MemoryInit.efi differ
>> -- 
>> 2.9.5
>>
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Re: [edk2] [PATCH edk2-non-osi v1 2/7] Hisilicon/D0x: Rename StartupAp() function

2019-02-12 Thread Ming Huang




On 2/12/2019 6:44 PM, Leif Lindholm wrote:
> On Tue, Feb 12, 2019 at 04:05:50PM +0800, Ming Huang wrote:
>> On 2/12/2019 5:36 AM, Leif Lindholm wrote:
>>> On Fri, Feb 01, 2019 at 10:25:02PM +0800, Ming Huang wrote:
>>>> As suggestion of community, 'AP' is a bit unfortunate to use in EDK2
>>>> context. PI specifies 'BSP' for Boot-strap Processor, as the one
>>>> executing all of the EDK2 code. It then uses 'AP' to refer to
>>>> Additional Processors, which can be assigned tasks using the
>>>> EFI_MP_SERVICES_PROTOCOL. In a TianoCore context, this should be
>>>> 'BSP'. So, Rename StartupAp() to StartUpBSP.
>>>
>>> Please add a comment somewhere that this applies to D0x
>>> PlatformSysCtrlLib.
>>
>> ok
>>
>>>> Contributed-under: TianoCore Contribution Agreement 1.1
>>>> Signed-off-by: Ming Huang 
>>>> ---
>>>>  
>>>> Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.lib
>>>>  | Bin 297590 -> 229128 bytes
>>>>  
>>>> Silicon/Hisilicon/Hi1616/Library/PlatformSysCtrlLibHi1616/PlatformSysCtrlLibHi1616.lib
>>>>  | Bin 344310 -> 275312 bytes
>>>>  
>>>> Silicon/Hisilicon/Hi1620/Library/PlatformSysCtrlLibHi1620/PlatformSysCtrlLibHi1620.lib
>>>>  | Bin 356032 -> 375916 bytes
>>>>  3 files changed, 0 insertions(+), 0 deletions(-)
>>>
>>> These are substantial changes in image size from only changing the
>>> name of a function. So I'll have a little look around.
>>>
>>> 1610 version appears to have switched from building with GCC49_RELEASE
>>> to GCC48_RELEASE.
>>> 1616 and 1620 versions seem to have used GCC48_RELEASE all along.
>>>
>>> I definitely see additional renamed functions in these libraries too.
>>>
>>> Please have an inventory and determine what may be affecting image sizes.
>>>
>>> Also, I *beg* you - please upgrade from "GNU C 4.8.3 20131202 (prerelease)".
>>
>> We have plan to upgrage gcc to 7.3, but our build server is share for all ARM
>> project, so need discuss with other project groups, it may be not enough time
>> for 19.02.
> 
> Oh, we're too late in the game to change for this release.
> But you are using ancient toolchains with poor code generation and
> quite likely known bugs.
> And this has been the state for quite some time.
> If that can change for 19.06, that's good enough.

Ok, I will upgrade gcc from 4.8 for 19.06.

> 
>> For D05/D03 libraries, just remove 2 functions from OemMiscLib which used
>> by PlatformSysCtrlLib. Does edk2 version effect the libraries size?
>> old edk2 base on: 2017-0904
>> now edk2 base on: 2018-0801
> 
> Well, changing edk2 version will mean that command line options to
> compiler and linker may change. So certainly some change can be seen.
> But when the changes are this big, I suspect something else has been
> going on.

I also think it is strange for big size change.

> 
>> For D06 library, we use the same source code to support all Hi1620 projects,
>> include product projects,so there are some modify for this, like support
>> 3 sockets, 4 sockets and remove some useless functions.
> 
> So please reword the subject line of this commit to explain it is an
> overall update of PlatformSysCtrlLib - including which bits are dropped.
> 
> And I think this makes a good argument for moving the header files for
> binary-only libraries from edk2-platforms to edk2-non-osi.
> If you do that in a separate patch before this one, you won't need to
> include as much detail in the commit message as you will otherwise.

Do youe mean move PlatformSysCtrlLib.h, OemAddressMapLib.h and LpcLib.h to 
edk2-non-osi?

> 
> Regards,
> 
> Leif
> 
>> Thanks.
>>
>>>
>>> /
>>> Leif
>>>
>>>>
>>>> diff --git 
>>>> a/Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.lib
>>>>  
>>>> b/Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.lib
>>>> index 68be770..4c63a26 100644
>>>> Binary files 
>>>> a/Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.lib
>>>>  and 
>>>> b/Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.lib
>>>>  differ
>>>> diff --git 
>>>> a/Silicon/Hisilicon/Hi1616/Library/PlatformSysCtrlLibHi1616/PlatformSysCtrlLibHi1616.lib
&g

Re: [edk2] [PATCH edk2-non-osi v1 3/7] Hisilicon/D06: Update Mbigen and gic RAS register

2019-02-12 Thread Ming Huang




On 2/12/2019 5:38 AM, Leif Lindholm wrote:
> On Fri, Feb 01, 2019 at 10:25:03PM +0800, Ming Huang wrote:
>> As chip group suggestions, update Mbigen and gic RAS configuration
>> flow.
> 
> Update how?

Add below flow:
1 Reset Mbigen;
2 Disable Mbigen clock;
3 Deassert reset Mbigen;
4 Enable Mbigen clock;

Thanks.

> 
> /
> Leif
> 
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Ming Huang 
>> ---
>>  Platform/Hisilicon/D06/Drivers/RasInitDxe/RasInitDxe.efi | Bin 17984 -> 
>> 18720 bytes
>>  1 file changed, 0 insertions(+), 0 deletions(-)
>>
>> diff --git a/Platform/Hisilicon/D06/Drivers/RasInitDxe/RasInitDxe.efi 
>> b/Platform/Hisilicon/D06/Drivers/RasInitDxe/RasInitDxe.efi
>> index 19adbc9..9ea21e9 100644
>> Binary files a/Platform/Hisilicon/D06/Drivers/RasInitDxe/RasInitDxe.efi and 
>> b/Platform/Hisilicon/D06/Drivers/RasInitDxe/RasInitDxe.efi differ
>> -- 
>> 2.9.5
>>
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Re: [edk2] [PATCH edk2-non-osi v1 2/7] Hisilicon/D0x: Rename StartupAp() function

2019-02-12 Thread Ming Huang




On 2/12/2019 5:36 AM, Leif Lindholm wrote:
> On Fri, Feb 01, 2019 at 10:25:02PM +0800, Ming Huang wrote:
>> As suggestion of community, 'AP' is a bit unfortunate to use in EDK2
>> context. PI specifies 'BSP' for Boot-strap Processor, as the one
>> executing all of the EDK2 code. It then uses 'AP' to refer to
>> Additional Processors, which can be assigned tasks using the
>> EFI_MP_SERVICES_PROTOCOL. In a TianoCore context, this should be
>> 'BSP'. So, Rename StartupAp() to StartUpBSP.
> 
> Please add a comment somewhere that this applies to D0x
> PlatformSysCtrlLib.

ok

> 
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Ming Huang 
>> ---
>>  
>> Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.lib
>>  | Bin 297590 -> 229128 bytes
>>  
>> Silicon/Hisilicon/Hi1616/Library/PlatformSysCtrlLibHi1616/PlatformSysCtrlLibHi1616.lib
>>  | Bin 344310 -> 275312 bytes
>>  
>> Silicon/Hisilicon/Hi1620/Library/PlatformSysCtrlLibHi1620/PlatformSysCtrlLibHi1620.lib
>>  | Bin 356032 -> 375916 bytes
>>  3 files changed, 0 insertions(+), 0 deletions(-)
> 
> These are substantial changes in image size from only changing the
> name of a function. So I'll have a little look around.
> 
> 1610 version appears to have switched from building with GCC49_RELEASE
> to GCC48_RELEASE.
> 1616 and 1620 versions seem to have used GCC48_RELEASE all along.
> 
> I definitely see additional renamed functions in these libraries too.
> 
> Please have an inventory and determine what may be affecting image sizes.
> 
> Also, I *beg* you - please upgrade from "GNU C 4.8.3 20131202 (prerelease)".

We have plan to upgrage gcc to 7.3, but our build server is share for all ARM
project, so need discuss with other project groups, it may be not enough time
for 19.02.

For D05/D03 libraries, just remove 2 functions from OemMiscLib which used
by PlatformSysCtrlLib. Does edk2 version effect the libraries size?
old edk2 base on: 2017-0904
now edk2 base on: 2018-0801

For D06 library, we use the same source code to support all Hi1620 projects,
include product projects,so there are some modify for this, like support
3 sockets, 4 sockets and remove some useless functions.

Thanks.

> 
> /
> Leif
> 
>>
>> diff --git 
>> a/Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.lib
>>  
>> b/Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.lib
>> index 68be770..4c63a26 100644
>> Binary files 
>> a/Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.lib
>>  and 
>> b/Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.lib
>>  differ
>> diff --git 
>> a/Silicon/Hisilicon/Hi1616/Library/PlatformSysCtrlLibHi1616/PlatformSysCtrlLibHi1616.lib
>>  
>> b/Silicon/Hisilicon/Hi1616/Library/PlatformSysCtrlLibHi1616/PlatformSysCtrlLibHi1616.lib
>> index b3cc88e..cb2c652 100644
>> Binary files 
>> a/Silicon/Hisilicon/Hi1616/Library/PlatformSysCtrlLibHi1616/PlatformSysCtrlLibHi1616.lib
>>  and 
>> b/Silicon/Hisilicon/Hi1616/Library/PlatformSysCtrlLibHi1616/PlatformSysCtrlLibHi1616.lib
>>  differ
>> diff --git 
>> a/Silicon/Hisilicon/Hi1620/Library/PlatformSysCtrlLibHi1620/PlatformSysCtrlLibHi1620.lib
>>  
>> b/Silicon/Hisilicon/Hi1620/Library/PlatformSysCtrlLibHi1620/PlatformSysCtrlLibHi1620.lib
>> index 50d453a..d643f7b 100644
>> Binary files 
>> a/Silicon/Hisilicon/Hi1620/Library/PlatformSysCtrlLibHi1620/PlatformSysCtrlLibHi1620.lib
>>  and 
>> b/Silicon/Hisilicon/Hi1620/Library/PlatformSysCtrlLibHi1620/PlatformSysCtrlLibHi1620.lib
>>  differ
>> -- 
>> 2.9.5
>>
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Re: [edk2] [MdePkg/BaseLib v1 1/1] MdePkg BaseLib: Add new API CalculateCrc16()

2019-02-11 Thread Ming Huang

Liming,
  Agree with you. There are no other usages now.

Thanks

On 2/11/2019 10:15 PM, Gao, Liming wrote:
> Ming:
>   So, there is no common CRC16 algorithm in edk2. I suggest to collect all 
> CRC16 request in the firmware code, then discussion how to add 
> CalculateCrc16() API in BaseLib. There may be more than one CalculateCrc16() 
> API with the different postfix for the different algorithm. Besides eeprom 
> and DebugAgent, are there other usages?
> 
> Thanks
> Liming
>> -----Original Message-
>> From: Ming Huang [mailto:ming.hu...@linaro.org]
>> Sent: Saturday, February 2, 2019 7:12 PM
>> To: Gao, Liming ; Ni, Ray ; 
>> linaro-u...@lists.linaro.org; edk2-devel@lists.01.org; Kinney,
>> Michael D 
>> Cc: huangmin...@huawei.com; Dong, Eric ; 
>> zhangjinso...@huawei.com; wanghuiqi...@huawei.com;
>> wai...@126.com; Zeng, Star ; huangda...@hisilicon.com
>> Subject: Re: [edk2] [MdePkg/BaseLib v1 1/1] MdePkg BaseLib: Add new API 
>> CalculateCrc16()
>>
>>
>>
>> On 2/1/2019 8:25 PM, Gao, Liming wrote:
>>> Ming:
>>>   What's usage model of new Crc16()? Can they use the same algorithm in 
>>> DebugAgent?
>>
>> It is used in check MAC read from eeprom. I think they cann't use the 
>> algorithm in
>> DebugAgent.
>>
>> Thanks.
>>
>>>
>>> Thanks
>>> Liming
>>>> -Original Message-
>>>> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of 
>>>> Ming Huang
>>>> Sent: Friday, February 1, 2019 3:12 PM
>>>> To: Ni, Ray ; linaro-u...@lists.linaro.org; 
>>>> edk2-devel@lists.01.org; Kinney, Michael D ;
>>>> Gao, Liming 
>>>> Cc: huangmin...@huawei.com; Dong, Eric ; 
>>>> zhangjinso...@huawei.com; wanghuiqi...@huawei.com;
>>>> wai...@126.com; Zeng, Star ; huangda...@hisilicon.com
>>>> Subject: Re: [edk2] [MdePkg/BaseLib v1 1/1] MdePkg BaseLib: Add new API 
>>>> CalculateCrc16()
>>>>
>>>>
>>>>
>>>> On 2/1/2019 2:37 PM, Ni, Ray wrote:
>>>>> There is an CRC16 calculation implementation in
>>>>> SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/DebugAgent.c
>>>>>
>>>>> Does your implementation generate the same CRC16 as above one?
>>>>
>>>> It is not the same with above one.
>>>>
>>>>>
>>>>>> -Original Message-
>>>>>> From: edk2-devel  On Behalf Of Ming
>>>>>> Huang
>>>>>> Sent: Friday, February 1, 2019 2:02 PM
>>>>>> To: linaro-u...@lists.linaro.org; edk2-devel@lists.01.org; Kinney, 
>>>>>> Michael D
>>>>>> ; Gao, Liming 
>>>>>> Cc: huangmin...@huawei.com; Dong, Eric ;
>>>>>> zhangjinso...@huawei.com; Zeng, Star ;
>>>>>> wai...@126.com; wanghuiqi...@huawei.com; huangda...@hisilicon.com
>>>>>> Subject: [edk2] [MdePkg/BaseLib v1 1/1] MdePkg BaseLib: Add new API
>>>>>> CalculateCrc16()
>>>>>>
>>>>>> CalculateCrc16() bases on the initialized mCrcTable. When 
>>>>>> CalculateCrc16() is
>>>>>> used, mCrcTable16 will take 512Bytes size in the image. When
>>>>>> CalculateCrc16() is not used, mCrcTable16 will not be built in the 
>>>>>> image, and
>>>>>> no size impact.
>>>>>>
>>>>>> Contributed-under: TianoCore Contribution Agreement 1.1
>>>>>> Signed-off-by: Ming Huang 
>>>>>> ---
>>>>>>  MdePkg/Include/Library/BaseLib.h  | 20 ++
>>>>>> MdePkg/Library/BaseLib/CheckSum.c | 73 
>>>>>>  2 files changed, 93 insertions(+)
>>>>>>
>>>>>> diff --git a/MdePkg/Include/Library/BaseLib.h
>>>>>> b/MdePkg/Include/Library/BaseLib.h
>>>>>> index 1eb842384ee2..956b971e5c69 100644
>>>>>> --- a/MdePkg/Include/Library/BaseLib.h
>>>>>> +++ b/MdePkg/Include/Library/BaseLib.h
>>>>>> @@ -4855,6 +4855,26 @@ CalculateCrc32(
>>>>>>IN  UINTNLength
>>>>>>);
>>>>>>
>>>>>> +/**
>>>>>> +  Computes and returns a 16-bit CRC for a data buffer.
>>>>>> +  CRC16 value bases on CCITT.
>>>>>> +
>>>>>> +  If Buffer is NULL, then ASSERT

Re: [edk2] [MdePkg/BaseLib v1 1/1] MdePkg BaseLib: Add new API CalculateCrc16()

2019-02-02 Thread Ming Huang




On 2/1/2019 8:25 PM, Gao, Liming wrote:
> Ming:
>   What's usage model of new Crc16()? Can they use the same algorithm in 
> DebugAgent?

It is used in check MAC read from eeprom. I think they cann't use the algorithm 
in
DebugAgent.

Thanks.

> 
> Thanks
> Liming
>> -Original Message-
>> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Ming 
>> Huang
>> Sent: Friday, February 1, 2019 3:12 PM
>> To: Ni, Ray ; linaro-u...@lists.linaro.org; 
>> edk2-devel@lists.01.org; Kinney, Michael D ;
>> Gao, Liming 
>> Cc: huangmin...@huawei.com; Dong, Eric ; 
>> zhangjinso...@huawei.com; wanghuiqi...@huawei.com;
>> wai...@126.com; Zeng, Star ; huangda...@hisilicon.com
>> Subject: Re: [edk2] [MdePkg/BaseLib v1 1/1] MdePkg BaseLib: Add new API 
>> CalculateCrc16()
>>
>>
>>
>> On 2/1/2019 2:37 PM, Ni, Ray wrote:
>>> There is an CRC16 calculation implementation in
>>> SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/DebugAgent.c
>>>
>>> Does your implementation generate the same CRC16 as above one?
>>
>> It is not the same with above one.
>>
>>>
>>>> -Original Message-
>>>> From: edk2-devel  On Behalf Of Ming
>>>> Huang
>>>> Sent: Friday, February 1, 2019 2:02 PM
>>>> To: linaro-u...@lists.linaro.org; edk2-devel@lists.01.org; Kinney, Michael 
>>>> D
>>>> ; Gao, Liming 
>>>> Cc: huangmin...@huawei.com; Dong, Eric ;
>>>> zhangjinso...@huawei.com; Zeng, Star ;
>>>> wai...@126.com; wanghuiqi...@huawei.com; huangda...@hisilicon.com
>>>> Subject: [edk2] [MdePkg/BaseLib v1 1/1] MdePkg BaseLib: Add new API
>>>> CalculateCrc16()
>>>>
>>>> CalculateCrc16() bases on the initialized mCrcTable. When CalculateCrc16() 
>>>> is
>>>> used, mCrcTable16 will take 512Bytes size in the image. When
>>>> CalculateCrc16() is not used, mCrcTable16 will not be built in the image, 
>>>> and
>>>> no size impact.
>>>>
>>>> Contributed-under: TianoCore Contribution Agreement 1.1
>>>> Signed-off-by: Ming Huang 
>>>> ---
>>>>  MdePkg/Include/Library/BaseLib.h  | 20 ++
>>>> MdePkg/Library/BaseLib/CheckSum.c | 73 
>>>>  2 files changed, 93 insertions(+)
>>>>
>>>> diff --git a/MdePkg/Include/Library/BaseLib.h
>>>> b/MdePkg/Include/Library/BaseLib.h
>>>> index 1eb842384ee2..956b971e5c69 100644
>>>> --- a/MdePkg/Include/Library/BaseLib.h
>>>> +++ b/MdePkg/Include/Library/BaseLib.h
>>>> @@ -4855,6 +4855,26 @@ CalculateCrc32(
>>>>IN  UINTNLength
>>>>);
>>>>
>>>> +/**
>>>> +  Computes and returns a 16-bit CRC for a data buffer.
>>>> +  CRC16 value bases on CCITT.
>>>> +
>>>> +  If Buffer is NULL, then ASSERT().
>>>> +  If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
>>>> +
>>>> +  @param[in]  Buffer   A pointer to the buffer on which the 16-bit 
>>>> CRC is to
>>>> be computed.
>>>> +  @param[in]  Length  The number of bytes in the buffer Data.
>>>> +
>>>> +  @retval Crc16The 16-bit CRC was computed for the data 
>>>> buffer.
>>>> +
>>>> +**/
>>>> +UINT16
>>>> +EFIAPI
>>>> +CalculateCrc16(
>>>> +  IN  VOID *Buffer,
>>>> +  IN  UINTNLength
>>>> +  );
>>>> +
>>>>  //
>>>>  // Base Library CPU Functions
>>>>  //
>>>> diff --git a/MdePkg/Library/BaseLib/CheckSum.c
>>>> b/MdePkg/Library/BaseLib/CheckSum.c
>>>> index 03d49afc5e6c..4e27aebe44bc 100644
>>>> --- a/MdePkg/Library/BaseLib/CheckSum.c
>>>> +++ b/MdePkg/Library/BaseLib/CheckSum.c
>>>> @@ -630,3 +630,76 @@ CalculateCrc32(
>>>>
>>>>return Crc ^ 0x;
>>>>  }
>>>> +
>>>> +GLOBAL_REMOVE_IF_UNREFERENCED CONST UINT16  mCrcTable16[256] =
>>>> {
>>>> +  0x, 0x1021, 0x2042, 0x3063, 0x4084, 0x50A5, 0x60C6, 0x70E7,
>>>> +  0x8108, 0x9129, 0xA14A, 0xB16B, 0xC18C, 0xD1AD, 0xE1CE, 0xF1EF,
>>>> +  0x1231, 0x0210, 0x3273, 0x2252, 0x52B5, 0x4294, 0x72F7, 0x62D6,
>>>> +  0x9339, 0x8318, 0xB37B, 0xA35A, 0xD3BD, 0xC39C, 0xF3FF, 0xE3D

Re: [edk2] [MdePkg/BaseLib v1 1/1] MdePkg BaseLib: Add new API CalculateCrc16()

2019-02-02 Thread Ming Huang




On 2/1/2019 5:56 PM, Ard Biesheuvel wrote:
> On Fri, 1 Feb 2019 at 08:11, Ming Huang  wrote:
>>
>>
>>
>> On 2/1/2019 2:37 PM, Ni, Ray wrote:
>>> There is an CRC16 calculation implementation in
>>> SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/DebugAgent.c
>>>
>>> Does your implementation generate the same CRC16 as above one?
>>
>> It is not the same with above one.
>>
> 
> So which polynomial is your CRC-16 implementation based on, and why
> does it belong in BaseLib, i.e., what is the relevance for other
> BaseLib users for this particular flavour of CRC

I don't know which polynomial is base on, this CRC16 value bases on CCITT,
I don't familiar with CRC algorithm. This move CRC16 to core patch is
suggested by Leif.

Thanks.

> 
> Thanks,
> Ard.
> 
> 
>>>
>>>> -Original Message-
>>>> From: edk2-devel  On Behalf Of Ming
>>>> Huang
>>>> Sent: Friday, February 1, 2019 2:02 PM
>>>> To: linaro-u...@lists.linaro.org; edk2-devel@lists.01.org; Kinney, Michael 
>>>> D
>>>> ; Gao, Liming 
>>>> Cc: huangmin...@huawei.com; Dong, Eric ;
>>>> zhangjinso...@huawei.com; Zeng, Star ;
>>>> wai...@126.com; wanghuiqi...@huawei.com; huangda...@hisilicon.com
>>>> Subject: [edk2] [MdePkg/BaseLib v1 1/1] MdePkg BaseLib: Add new API
>>>> CalculateCrc16()
>>>>
>>>> CalculateCrc16() bases on the initialized mCrcTable. When CalculateCrc16() 
>>>> is
>>>> used, mCrcTable16 will take 512Bytes size in the image. When
>>>> CalculateCrc16() is not used, mCrcTable16 will not be built in the image, 
>>>> and
>>>> no size impact.
>>>>
>>>> Contributed-under: TianoCore Contribution Agreement 1.1
>>>> Signed-off-by: Ming Huang 
>>>> ---
>>>>  MdePkg/Include/Library/BaseLib.h  | 20 ++
>>>> MdePkg/Library/BaseLib/CheckSum.c | 73 
>>>>  2 files changed, 93 insertions(+)
>>>>
>>>> diff --git a/MdePkg/Include/Library/BaseLib.h
>>>> b/MdePkg/Include/Library/BaseLib.h
>>>> index 1eb842384ee2..956b971e5c69 100644
>>>> --- a/MdePkg/Include/Library/BaseLib.h
>>>> +++ b/MdePkg/Include/Library/BaseLib.h
>>>> @@ -4855,6 +4855,26 @@ CalculateCrc32(
>>>>IN  UINTNLength
>>>>);
>>>>
>>>> +/**
>>>> +  Computes and returns a 16-bit CRC for a data buffer.
>>>> +  CRC16 value bases on CCITT.
>>>> +
>>>> +  If Buffer is NULL, then ASSERT().
>>>> +  If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
>>>> +
>>>> +  @param[in]  Buffer   A pointer to the buffer on which the 16-bit 
>>>> CRC is to
>>>> be computed.
>>>> +  @param[in]  Length  The number of bytes in the buffer Data.
>>>> +
>>>> +  @retval Crc16The 16-bit CRC was computed for the data 
>>>> buffer.
>>>> +
>>>> +**/
>>>> +UINT16
>>>> +EFIAPI
>>>> +CalculateCrc16(
>>>> +  IN  VOID *Buffer,
>>>> +  IN  UINTNLength
>>>> +  );
>>>> +
>>>>  //
>>>>  // Base Library CPU Functions
>>>>  //
>>>> diff --git a/MdePkg/Library/BaseLib/CheckSum.c
>>>> b/MdePkg/Library/BaseLib/CheckSum.c
>>>> index 03d49afc5e6c..4e27aebe44bc 100644
>>>> --- a/MdePkg/Library/BaseLib/CheckSum.c
>>>> +++ b/MdePkg/Library/BaseLib/CheckSum.c
>>>> @@ -630,3 +630,76 @@ CalculateCrc32(
>>>>
>>>>return Crc ^ 0x;
>>>>  }
>>>> +
>>>> +GLOBAL_REMOVE_IF_UNREFERENCED CONST UINT16  mCrcTable16[256] =
>>>> {
>>>> +  0x, 0x1021, 0x2042, 0x3063, 0x4084, 0x50A5, 0x60C6, 0x70E7,
>>>> +  0x8108, 0x9129, 0xA14A, 0xB16B, 0xC18C, 0xD1AD, 0xE1CE, 0xF1EF,
>>>> +  0x1231, 0x0210, 0x3273, 0x2252, 0x52B5, 0x4294, 0x72F7, 0x62D6,
>>>> +  0x9339, 0x8318, 0xB37B, 0xA35A, 0xD3BD, 0xC39C, 0xF3FF, 0xE3DE,
>>>> +  0x2462, 0x3443, 0x0420, 0x1401, 0x64E6, 0x74C7, 0x44A4, 0x5485,
>>>> +  0xA56A, 0xB54B, 0x8528, 0x9509, 0xE5EE, 0xF5CF, 0xC5AC, 0xD58D,
>>>> +  0x3653, 0x2672, 0x1611, 0x0630, 0x76D7, 0x66F6, 0x5695, 0x46B4,
>>>> +  0xB75B, 0xA77A, 0x9719, 0x8738, 0xF7DF, 0xE7FE, 0xD79D, 0xC7BC,
>>>> +  0x48C

[edk2] [PATCH edk2-platforms v1 15/16] Hisilicon/D06: Use CalculateCrc16 in BaseLib

2019-02-01 Thread Ming Huang

This patch is relative with "Add new API CalculateCrc16()" in edk2.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c | 69 ++--
 1 file changed, 5 insertions(+), 64 deletions(-)

diff --git a/Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c 
b/Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c
index 9bf274e1b991..3ba4f305fb8e 100644
--- a/Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c
+++ b/Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c
@@ -14,6 +14,7 @@
 **/
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -56,66 +57,6 @@ ETH_PRODUCT_DESC gEthPdtDesc[ETH_MAX_PORT] =
 {FALSE,  ETH_INVALID, ETH_INVALID, ETH_INVALID, ETH_INVALID}
 };
 
-UINT16 CrcTable16[256] = {
-  0x, 0x1021, 0x2042, 0x3063, 0x4084, 0x50A5, 0x60C6, 0x70E7,
-  0x8108, 0x9129, 0xA14A, 0xB16B, 0xC18C, 0xD1AD, 0xE1CE, 0xF1EF,
-  0x1231, 0x0210, 0x3273, 0x2252, 0x52B5, 0x4294, 0x72F7, 0x62D6,
-  0x9339, 0x8318, 0xB37B, 0xA35A, 0xD3BD, 0xC39C, 0xF3FF, 0xE3DE,
-  0x2462, 0x3443, 0x0420, 0x1401, 0x64E6, 0x74C7, 0x44A4, 0x5485,
-  0xA56A, 0xB54B, 0x8528, 0x9509, 0xE5EE, 0xF5CF, 0xC5AC, 0xD58D,
-  0x3653, 0x2672, 0x1611, 0x0630, 0x76D7, 0x66F6, 0x5695, 0x46B4,
-  0xB75B, 0xA77A, 0x9719, 0x8738, 0xF7DF, 0xE7FE, 0xD79D, 0xC7BC,
-  0x48C4, 0x58E5, 0x6886, 0x78A7, 0x0840, 0x1861, 0x2802, 0x3823,
-  0xC9CC, 0xD9ED, 0xE98E, 0xF9AF, 0x8948, 0x9969, 0xA90A, 0xB92B,
-  0x5AF5, 0x4AD4, 0x7AB7, 0x6A96, 0x1A71, 0x0A50, 0x3A33, 0x2A12,
-  0xDBFD, 0xCBDC, 0xFBBF, 0xEB9E, 0x9B79, 0x8B58, 0xBB3B, 0xAB1A,
-  0x6CA6, 0x7C87, 0x4CE4, 0x5CC5, 0x2C22, 0x3C03, 0x0C60, 0x1C41,
-  0xEDAE, 0xFD8F, 0xCDEC, 0xDDCD, 0xAD2A, 0xBD0B, 0x8D68, 0x9D49,
-  0x7E97, 0x6EB6, 0x5ED5, 0x4EF4, 0x3E13, 0x2E32, 0x1E51, 0x0E70,
-  0xFF9F, 0xEFBE, 0xDFDD, 0xCFFC, 0xBF1B, 0xAF3A, 0x9F59, 0x8F78,
-  0x9188, 0x81A9, 0xB1CA, 0xA1EB, 0xD10C, 0xC12D, 0xF14E, 0xE16F,
-  0x1080, 0x00A1, 0x30C2, 0x20E3, 0x5004, 0x4025, 0x7046, 0x6067,
-  0x83B9, 0x9398, 0xA3FB, 0xB3DA, 0xC33D, 0xD31C, 0xE37F, 0xF35E,
-  0x02B1, 0x1290, 0x22F3, 0x32D2, 0x4235, 0x5214, 0x6277, 0x7256,
-  0xB5EA, 0xA5CB, 0x95A8, 0x8589, 0xF56E, 0xE54F, 0xD52C, 0xC50D,
-  0x34E2, 0x24C3, 0x14A0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
-  0xA7DB, 0xB7FA, 0x8799, 0x97B8, 0xE75F, 0xF77E, 0xC71D, 0xD73C,
-  0x26D3, 0x36F2, 0x0691, 0x16B0, 0x6657, 0x7676, 0x4615, 0x5634,
-  0xD94C, 0xC96D, 0xF90E, 0xE92F, 0x99C8, 0x89E9, 0xB98A, 0xA9AB,
-  0x5844, 0x4865, 0x7806, 0x6827, 0x18C0, 0x08E1, 0x3882, 0x28A3,
-  0xCB7D, 0xDB5C, 0xEB3F, 0xFB1E, 0x8BF9, 0x9BD8, 0xABBB, 0xBB9A,
-  0x4A75, 0x5A54, 0x6A37, 0x7A16, 0x0AF1, 0x1AD0, 0x2AB3, 0x3A92,
-  0xFD2E, 0xED0F, 0xDD6C, 0xCD4D, 0xBDAA, 0xAD8B, 0x9DE8, 0x8DC9,
-  0x7C26, 0x6C07, 0x5C64, 0x4C45, 0x3CA2, 0x2C83, 0x1CE0, 0x0CC1,
-  0xEF1F, 0xFF3E, 0xCF5D, 0xDF7C, 0xAF9B, 0xBFBA, 0x8FD9, 0x9FF8,
-  0x6E17, 0x7E36, 0x4E55, 0x5E74, 0x2E93, 0x3EB2, 0x0ED1, 0x1EF0,
-};
-
-UINT16 MakeCrcCheckSum (
-  UINT8 *Buffer,
-  UINT32 Length
-  )
-{
-  UINT16 StartCRC = 0;
-
-  if (Length > SIZE_512KB) {
-return 0;
-  }
-
-  if (Buffer == NULL) {
-return 0;
-  }
-
-  while (Length) {
-StartCRC = CrcTable16 [((UINT8) ((StartCRC >> 8) & 0xff)) ^ *(Buffer++)] ^
-   ((UINT16) (StartCRC << 8));
-Length--;
-  }
-
-  return StartCRC;
-}
-
-
 EFI_STATUS
 OemGetMacE2prom(
   IN  UINT32 Port,
@@ -170,8 +111,8 @@ OemGetMacE2prom(
 return Status;
   }
 
-  Crc16 = MakeCrcCheckSum (
-(UINT8 *)&(MacDesc.MacLen),
+  Crc16 = CalculateCrc16 (
+&(MacDesc.MacLen),
 sizeof (MacDesc.MacLen) + sizeof (MacDesc.Mac)
 );
   if ((Crc16 != MacDesc.Crc16) || (Crc16 == 0)) {
@@ -207,8 +148,8 @@ OemSetMacE2prom (
 MacDesc.Mac[I] = Addr[I];
   }
 
-  MacDesc.Crc16 = MakeCrcCheckSum (
-(UINT8 *)&(MacDesc.MacLen),
+  MacDesc.Crc16 = CalculateCrc16 (
+&(MacDesc.MacLen),
 sizeof (MacDesc.MacLen) + MAC_ADDR_LEN
 );
 
-- 
2.9.5

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[edk2] [PATCH edk2-platforms v1 16/16] Hisilicon/D0x: Modify version to 19.02

2019-02-01 Thread Ming Huang

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Platform/Hisilicon/D03/D03.dsc | 4 ++--
 Platform/Hisilicon/D05/D05.dsc | 4 ++--
 Platform/Hisilicon/D06/D06.dsc | 4 ++--
 3 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
index 35b54f8c83be..07ff461277df 100644
--- a/Platform/Hisilicon/D03/D03.dsc
+++ b/Platform/Hisilicon/D03/D03.dsc
@@ -171,12 +171,12 @@ [PcdsFixedAtBuild.common]
   !ifdef $(FIRMWARE_VER)
 gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"$(FIRMWARE_VER)"
   !else
-gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Development 
build 18.08 for Hisilicon D03"
+gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Development 
build 19.02 for Hisilicon D03"
   !endif
 
   gHisiTokenSpaceGuid.PcdBiosVersionString|L"10.01.01T18"
 
-  gHisiTokenSpaceGuid.PcdBiosVersionForBmc|L"1.12"
+  gHisiTokenSpaceGuid.PcdBiosVersionForBmc|L"19.02"
 
   gHisiTokenSpaceGuid.PcdSystemProductName|L"D03"
   gHisiTokenSpaceGuid.PcdSystemVersion|L"Estuary"
diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
index 49bd5b37ea34..70b044c7e33a 100644
--- a/Platform/Hisilicon/D05/D05.dsc
+++ b/Platform/Hisilicon/D05/D05.dsc
@@ -187,12 +187,12 @@ [PcdsFixedAtBuild.common]
   !ifdef $(FIRMWARE_VER)
 gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"$(FIRMWARE_VER)"
   !else
-gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Development 
build 18.08 for Hisilicon D05"
+gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Development 
build 19.02 for Hisilicon D05"
   !endif
 
   gHisiTokenSpaceGuid.PcdBiosVersionString|L"10.01.01T18"
 
-  gHisiTokenSpaceGuid.PcdBiosVersionForBmc|L"1.12"
+  gHisiTokenSpaceGuid.PcdBiosVersionForBmc|L"19.02"
 
   gHisiTokenSpaceGuid.PcdSystemProductName|L"D05"
   gHisiTokenSpaceGuid.PcdSystemVersion|L"Estuary"
diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc
index a3a01bfb1e23..73bea728b0f6 100644
--- a/Platform/Hisilicon/D06/D06.dsc
+++ b/Platform/Hisilicon/D06/D06.dsc
@@ -156,12 +156,12 @@ [PcdsFixedAtBuild.common]
   !ifdef $(FIRMWARE_VER)
 gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"$(FIRMWARE_VER)"
   !else
-gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Development 
build 18.08 for Hisilicon D06"
+gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Development 
build 19.02 for Hisilicon D06"
   !endif
 
   gHisiTokenSpaceGuid.PcdBiosVersionString|L"10.01.01T18"
 
-  gHisiTokenSpaceGuid.PcdBiosVersionForBmc|L"0.42"
+  gHisiTokenSpaceGuid.PcdBiosVersionForBmc|L"19.02"
 
   gHisiTokenSpaceGuid.PcdSystemProductName|L"D06"
   gHisiTokenSpaceGuid.PcdSystemVersion|L"VER.A"
-- 
2.9.5

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[edk2] [PATCH edk2-non-osi v1 7/7] Hisilicon/D06: Add Setup Item "Support DPC"

2019-02-01 Thread Ming Huang

Add setup item "Support DPC" to enable or disable PCIe DPC
(Downstream Port Containment).

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Platform/Hisilicon/D06/Drivers/IoInitDxe/IoInitDxe.efi | Bin 232832 -> 226784 
bytes
 1 file changed, 0 insertions(+), 0 deletions(-)

diff --git a/Platform/Hisilicon/D06/Drivers/IoInitDxe/IoInitDxe.efi 
b/Platform/Hisilicon/D06/Drivers/IoInitDxe/IoInitDxe.efi
index e32c056..4511f6b 100644
Binary files a/Platform/Hisilicon/D06/Drivers/IoInitDxe/IoInitDxe.efi and 
b/Platform/Hisilicon/D06/Drivers/IoInitDxe/IoInitDxe.efi differ
-- 
2.9.5

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[edk2] [PATCH edk2-non-osi v1 2/7] Hisilicon/D0x: Rename StartupAp() function

2019-02-01 Thread Ming Huang

As suggestion of community, 'AP' is a bit unfortunate to use in EDK2
context. PI specifies 'BSP' for Boot-strap Processor, as the one
executing all of the EDK2 code. It then uses 'AP' to refer to
Additional Processors, which can be assigned tasks using the
EFI_MP_SERVICES_PROTOCOL. In a TianoCore context, this should be
'BSP'. So, Rename StartupAp() to StartUpBSP.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 
Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.lib
 | Bin 297590 -> 229128 bytes
 
Silicon/Hisilicon/Hi1616/Library/PlatformSysCtrlLibHi1616/PlatformSysCtrlLibHi1616.lib
 | Bin 344310 -> 275312 bytes
 
Silicon/Hisilicon/Hi1620/Library/PlatformSysCtrlLibHi1620/PlatformSysCtrlLibHi1620.lib
 | Bin 356032 -> 375916 bytes
 3 files changed, 0 insertions(+), 0 deletions(-)

diff --git 
a/Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.lib
 
b/Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.lib
index 68be770..4c63a26 100644
Binary files 
a/Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.lib
 and 
b/Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.lib
 differ
diff --git 
a/Silicon/Hisilicon/Hi1616/Library/PlatformSysCtrlLibHi1616/PlatformSysCtrlLibHi1616.lib
 
b/Silicon/Hisilicon/Hi1616/Library/PlatformSysCtrlLibHi1616/PlatformSysCtrlLibHi1616.lib
index b3cc88e..cb2c652 100644
Binary files 
a/Silicon/Hisilicon/Hi1616/Library/PlatformSysCtrlLibHi1616/PlatformSysCtrlLibHi1616.lib
 and 
b/Silicon/Hisilicon/Hi1616/Library/PlatformSysCtrlLibHi1616/PlatformSysCtrlLibHi1616.lib
 differ
diff --git 
a/Silicon/Hisilicon/Hi1620/Library/PlatformSysCtrlLibHi1620/PlatformSysCtrlLibHi1620.lib
 
b/Silicon/Hisilicon/Hi1620/Library/PlatformSysCtrlLibHi1620/PlatformSysCtrlLibHi1620.lib
index 50d453a..d643f7b 100644
Binary files 
a/Silicon/Hisilicon/Hi1620/Library/PlatformSysCtrlLibHi1620/PlatformSysCtrlLibHi1620.lib
 and 
b/Silicon/Hisilicon/Hi1620/Library/PlatformSysCtrlLibHi1620/PlatformSysCtrlLibHi1620.lib
 differ
-- 
2.9.5

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[edk2] [PATCH edk2-non-osi v1 3/7] Hisilicon/D06: Update Mbigen and gic RAS register

2019-02-01 Thread Ming Huang

As chip group suggestions, update Mbigen and gic RAS configuration
flow.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Platform/Hisilicon/D06/Drivers/RasInitDxe/RasInitDxe.efi | Bin 17984 -> 18720 
bytes
 1 file changed, 0 insertions(+), 0 deletions(-)

diff --git a/Platform/Hisilicon/D06/Drivers/RasInitDxe/RasInitDxe.efi 
b/Platform/Hisilicon/D06/Drivers/RasInitDxe/RasInitDxe.efi
index 19adbc9..9ea21e9 100644
Binary files a/Platform/Hisilicon/D06/Drivers/RasInitDxe/RasInitDxe.efi and 
b/Platform/Hisilicon/D06/Drivers/RasInitDxe/RasInitDxe.efi differ
-- 
2.9.5

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[edk2] [PATCH edk2-non-osi v1 6/7] Hisilicon/D06: Fix numa node wrong issue

2019-02-01 Thread Ming Huang

Numa informations are acquired from HOB that build from memory
initialization module. Correct numa informations to match booting
from TA(Totem A or super cpu cluster A).

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang 
---
 Platform/Hisilicon/D06/MemoryInitPei/MemoryInit.efi | Bin 297696 -> 358656 
bytes
 1 file changed, 0 insertions(+), 0 deletions(-)

diff --git a/Platform/Hisilicon/D06/MemoryInitPei/MemoryInit.efi 
b/Platform/Hisilicon/D06/MemoryInitPei/MemoryInit.efi
index 5fba353..fea1475 100644
Binary files a/Platform/Hisilicon/D06/MemoryInitPei/MemoryInit.efi and 
b/Platform/Hisilicon/D06/MemoryInitPei/MemoryInit.efi differ
-- 
2.9.5

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