Re: [edk2] [PATCH] UefiCpuPkg/LocalApicLib: Exclude second SendIpi sequence on AMD processors.
Reviewed-by: Eric Dong and pushed the patch with the
change suggested by Laszlo.
Thanks,
Eric
-Original Message-
From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Laszlo
Ersek
Sent: Friday, June 15, 2018 12:36 AM
To: Leo Duran ; edk2-devel@lists.01.org
Cc: Justen, Jordan L ; Jeff Fan
; Gao, Liming
Subject: Re: [edk2] [PATCH] UefiCpuPkg/LocalApicLib: Exclude second SendIpi
sequence on AMD processors.
On 06/13/18 22:11, Leo Duran wrote:
> On AMD processors the second SendIpi in the SendInitSipiSipi and
> SendInitSipiSipiAllExcludingSelf routines is not required, and may
> cause undesired side-effects during MP initialization.
>
> This patch leverages the StandardSignatureIsAuthenticAMD check to
> exclude the second SendIpi and its associated MicroSecondDelay (200).
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Leo Duran
> Cc: Jordan Justen
> Cc: Jeff Fan
> Cc: Liming Gao
> ---
> UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c | 12
> UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c | 12
>
> 2 files changed, 16 insertions(+), 8 deletions(-)
>
> diff --git a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
> b/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
> index b0b7e32..6e80536 100644
> --- a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
> +++ b/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
> @@ -554,8 +554,10 @@ SendInitSipiSipi (
>IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_STARTUP;
>IcrLow.Bits.Level = 1;
>SendIpi (IcrLow.Uint32, ApicId);
> - MicroSecondDelay (200);
> - SendIpi (IcrLow.Uint32, ApicId);
> + if (!StandardSignatureIsAuthenticAMD()) {
> +MicroSecondDelay (200);
> +SendIpi (IcrLow.Uint32, ApicId);
> + }
> }
>
> /**
> @@ -588,8 +590,10 @@ SendInitSipiSipiAllExcludingSelf (
>IcrLow.Bits.Level = 1;
>IcrLow.Bits.DestinationShorthand =
> LOCAL_APIC_DESTINATION_SHORTHAND_ALL_EXCLUDING_SELF;
>SendIpi (IcrLow.Uint32, 0);
> - MicroSecondDelay (200);
> - SendIpi (IcrLow.Uint32, 0);
> + if (!StandardSignatureIsAuthenticAMD()) {
> +MicroSecondDelay (200);
> +SendIpi (IcrLow.Uint32, 0);
> + }
> }
>
> /**
> diff --git
> a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
> b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
> index 1f4dcf7..5d82836 100644
> --- a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
> +++ b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
> @@ -649,8 +649,10 @@ SendInitSipiSipi (
>IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_STARTUP;
>IcrLow.Bits.Level = 1;
>SendIpi (IcrLow.Uint32, ApicId);
> - MicroSecondDelay (200);
> - SendIpi (IcrLow.Uint32, ApicId);
> + if (!StandardSignatureIsAuthenticAMD()) {
> +MicroSecondDelay (200);
> +SendIpi (IcrLow.Uint32, ApicId);
> + }
> }
>
> /**
> @@ -683,8 +685,10 @@ SendInitSipiSipiAllExcludingSelf (
>IcrLow.Bits.Level = 1;
>IcrLow.Bits.DestinationShorthand =
> LOCAL_APIC_DESTINATION_SHORTHAND_ALL_EXCLUDING_SELF;
>SendIpi (IcrLow.Uint32, 0);
> - MicroSecondDelay (200);
> - SendIpi (IcrLow.Uint32, 0);
> + if (!StandardSignatureIsAuthenticAMD()) {
> +MicroSecondDelay (200);
> +SendIpi (IcrLow.Uint32, 0);
> + }
> }
>
> /**
>
Given all the feedback (thanks all for that!), I'm fine with the patch.
Reviewed-by: Laszlo Ersek
I'm only a reviewer for UefiCpuPkg, not a maintainer, so I can't go ahead and
commit the patch just yet. Anyway, I do suggest a small coding style
improvement (which we can do ourselves before we push the patch):
there should be a space character between "StandardSignatureIsAuthenticAMD" and
"()".
Thanks
Laszlo
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Re: [edk2] [PATCH] UefiCpuPkg/LocalApicLib: Exclude second SendIpi sequence on AMD processors.
On 06/13/18 22:11, Leo Duran wrote:
> On AMD processors the second SendIpi in the SendInitSipiSipi and
> SendInitSipiSipiAllExcludingSelf routines is not required, and may cause
> undesired side-effects during MP initialization.
>
> This patch leverages the StandardSignatureIsAuthenticAMD check to exclude
> the second SendIpi and its associated MicroSecondDelay (200).
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Leo Duran
> Cc: Jordan Justen
> Cc: Jeff Fan
> Cc: Liming Gao
> ---
> UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c | 12
> UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c | 12
> 2 files changed, 16 insertions(+), 8 deletions(-)
>
> diff --git a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
> b/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
> index b0b7e32..6e80536 100644
> --- a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
> +++ b/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
> @@ -554,8 +554,10 @@ SendInitSipiSipi (
>IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_STARTUP;
>IcrLow.Bits.Level = 1;
>SendIpi (IcrLow.Uint32, ApicId);
> - MicroSecondDelay (200);
> - SendIpi (IcrLow.Uint32, ApicId);
> + if (!StandardSignatureIsAuthenticAMD()) {
> +MicroSecondDelay (200);
> +SendIpi (IcrLow.Uint32, ApicId);
> + }
> }
>
> /**
> @@ -588,8 +590,10 @@ SendInitSipiSipiAllExcludingSelf (
>IcrLow.Bits.Level = 1;
>IcrLow.Bits.DestinationShorthand =
> LOCAL_APIC_DESTINATION_SHORTHAND_ALL_EXCLUDING_SELF;
>SendIpi (IcrLow.Uint32, 0);
> - MicroSecondDelay (200);
> - SendIpi (IcrLow.Uint32, 0);
> + if (!StandardSignatureIsAuthenticAMD()) {
> +MicroSecondDelay (200);
> +SendIpi (IcrLow.Uint32, 0);
> + }
> }
>
> /**
> diff --git a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
> b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
> index 1f4dcf7..5d82836 100644
> --- a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
> +++ b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
> @@ -649,8 +649,10 @@ SendInitSipiSipi (
>IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_STARTUP;
>IcrLow.Bits.Level = 1;
>SendIpi (IcrLow.Uint32, ApicId);
> - MicroSecondDelay (200);
> - SendIpi (IcrLow.Uint32, ApicId);
> + if (!StandardSignatureIsAuthenticAMD()) {
> +MicroSecondDelay (200);
> +SendIpi (IcrLow.Uint32, ApicId);
> + }
> }
>
> /**
> @@ -683,8 +685,10 @@ SendInitSipiSipiAllExcludingSelf (
>IcrLow.Bits.Level = 1;
>IcrLow.Bits.DestinationShorthand =
> LOCAL_APIC_DESTINATION_SHORTHAND_ALL_EXCLUDING_SELF;
>SendIpi (IcrLow.Uint32, 0);
> - MicroSecondDelay (200);
> - SendIpi (IcrLow.Uint32, 0);
> + if (!StandardSignatureIsAuthenticAMD()) {
> +MicroSecondDelay (200);
> +SendIpi (IcrLow.Uint32, 0);
> + }
> }
>
> /**
>
Given all the feedback (thanks all for that!), I'm fine with the patch.
Reviewed-by: Laszlo Ersek
I'm only a reviewer for UefiCpuPkg, not a maintainer, so I can't go
ahead and commit the patch just yet. Anyway, I do suggest a small coding
style improvement (which we can do ourselves before we push the patch):
there should be a space character between
"StandardSignatureIsAuthenticAMD" and "()".
Thanks
Laszlo
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Re: [edk2] [PATCH] UefiCpuPkg/LocalApicLib: Exclude second SendIpi sequence on AMD processors.
On 06/14/2018 10:00 AM, Laszlo Ersek wrote: On 06/14/18 16:52, Andrew Fish wrote: On Jun 14, 2018, at 7:08 AM, Duran, Leo wrote: -Original Message- From: Laszlo Ersek mailto:ler...@redhat.com>> Sent: Wednesday, June 13, 2018 3:50 PM To: Duran, Leo mailto:leo.du...@amd.com>>; edk2-devel@lists.01.org <mailto:edk2-devel@lists.01.org> Cc: Jordan Justen mailto:jordan.l.jus...@intel.com>>; Jeff Fan mailto:jeff@intel.com>>; Liming Gao mailto:liming@intel.com>>; Singh, Brijesh mailto:brijesh.si...@amd.com>>; Paolo Bonzini mailto:pbonz...@redhat.com>>; Igor Mammedov mailto:imamm...@redhat.com>> Subject: Re: [edk2] [PATCH] UefiCpuPkg/LocalApicLib: Exclude second SendIpi sequence on AMD processors. Hello Leo, On 06/13/18 22:11, Leo Duran wrote: On AMD processors the second SendIpi in the SendInitSipiSipi and SendInitSipiSipiAllExcludingSelf routines is not required, and may cause undesired side-effects during MP initialization. This patch leverages the StandardSignatureIsAuthenticAMD check to exclude the second SendIpi and its associated MicroSecondDelay (200). QEMU and KVM emulate some AMD processors too; of particular interest is the recent EPYC addition, I believe (for SME/SEV, minimally). Did you check whether the StandardSignatureIsAuthenticAMD() check applies to those QEMU VCPU models, and if so, whether omitting the second Startup IPI interferes with *V*CPU startup in OVMF guests? (In multiprocessing modules, such as CpuMpPei, CpuDxe, and PiSmmCpuDxeSmm.) Adding Brijesh, Paolo and Igor. Thanks! Laszlo Hi Lazlo, My understanding is that hypervisors simply ignore the second SIPI, so a single (or double) SIPI should be fine. In any event, I'm checking with Brijesh on your specific question. My understanding is the 2nd SIPI was for an Intel processor bug in the mid 1990's and it has not been required since. People are just scared to change it since all the Operating Systems have been historically validated against INT SIPI SIPI. One of my co-works removed our extra SIPI, not knowing the history, and everything worked. Well we booted a little faster without the extra SIPI. If people still have the compatibility concern can we make the 2nd SIPI configurable via a PCD. But given the StandardSignatureIsAuthenticAMD() data point we should default the 2nd SIPI to off and move the world forward? What do folks think? Given that I asked Brijesh to comment too, I'd like to see his feedback as well (or Leo to forward Brijesh's findings); then I'm OK with removing the second SIPI. I did a quick test with and without SEV enabled, QEMU seems to be working fine. As Leo pointed out that the second SIPI is not required on AMD processor. -Brijesh ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
Re: [edk2] [PATCH] UefiCpuPkg/LocalApicLib: Exclude second SendIpi sequence on AMD processors.
On 06/14/18 16:52, Andrew Fish wrote: > > >> On Jun 14, 2018, at 7:08 AM, Duran, Leo wrote: >> >> >> >>> -Original Message- >>> From: Laszlo Ersek mailto:ler...@redhat.com>> >>> Sent: Wednesday, June 13, 2018 3:50 PM >>> To: Duran, Leo mailto:leo.du...@amd.com>>; >>> edk2-devel@lists.01.org <mailto:edk2-devel@lists.01.org> >>> Cc: Jordan Justen >> <mailto:jordan.l.jus...@intel.com>>; Jeff Fan >>> mailto:jeff@intel.com>>; Liming Gao >>> mailto:liming@intel.com>>; Singh, Brijesh >>> mailto:brijesh.si...@amd.com>>; Paolo Bonzini >>> mailto:pbonz...@redhat.com>>; Igor >>> Mammedov mailto:imamm...@redhat.com>> >>> Subject: Re: [edk2] [PATCH] UefiCpuPkg/LocalApicLib: Exclude second >>> SendIpi sequence on AMD processors. >>> >>> Hello Leo, >>> >>> On 06/13/18 22:11, Leo Duran wrote: >>>> On AMD processors the second SendIpi in the SendInitSipiSipi and >>>> SendInitSipiSipiAllExcludingSelf routines is not required, and may >>>> cause undesired side-effects during MP initialization. >>>> >>>> This patch leverages the StandardSignatureIsAuthenticAMD check to >>>> exclude the second SendIpi and its associated MicroSecondDelay (200). >>> >>> QEMU and KVM emulate some AMD processors too; of particular interest is >>> the recent EPYC addition, I believe (for SME/SEV, minimally). >>> >>> Did you check whether the StandardSignatureIsAuthenticAMD() check >>> applies to those QEMU VCPU models, and if so, whether omitting the second >>> Startup IPI interferes with *V*CPU startup in OVMF guests? (In >>> multiprocessing modules, such as CpuMpPei, CpuDxe, and >>> PiSmmCpuDxeSmm.) >>> >>> Adding Brijesh, Paolo and Igor. >>> >>> Thanks! >>> Laszlo >> >> Hi Lazlo, >> >> My understanding is that hypervisors simply ignore the second SIPI, so a >> single (or double) SIPI should be fine. >> In any event, I'm checking with Brijesh on your specific question. >> > > My understanding is the 2nd SIPI was for an Intel processor bug in the mid > 1990's and it has not been required since. People are just scared to change > it since all the Operating Systems have been historically validated against > INT SIPI SIPI. > > One of my co-works removed our extra SIPI, not knowing the history, and > everything worked. Well we booted a little faster without the extra SIPI. > > If people still have the compatibility concern can we make the 2nd SIPI > configurable via a PCD. But given the StandardSignatureIsAuthenticAMD() data > point we should default the 2nd SIPI to off and move the world forward? What > do folks think? Given that I asked Brijesh to comment too, I'd like to see his feedback as well (or Leo to forward Brijesh's findings); then I'm OK with removing the second SIPI. Thanks Laszlo ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
Re: [edk2] [PATCH] UefiCpuPkg/LocalApicLib: Exclude second SendIpi sequence on AMD processors.
> On Jun 14, 2018, at 7:08 AM, Duran, Leo wrote:
>
>
>
>> -Original Message-
>> From: Laszlo Ersek mailto:ler...@redhat.com>>
>> Sent: Wednesday, June 13, 2018 3:50 PM
>> To: Duran, Leo mailto:leo.du...@amd.com>>;
>> edk2-devel@lists.01.org <mailto:edk2-devel@lists.01.org>
>> Cc: Jordan Justen > <mailto:jordan.l.jus...@intel.com>>; Jeff Fan
>> mailto:jeff@intel.com>>; Liming Gao
>> mailto:liming@intel.com>>; Singh, Brijesh
>> mailto:brijesh.si...@amd.com>>; Paolo Bonzini
>> mailto:pbonz...@redhat.com>>; Igor
>> Mammedov mailto:imamm...@redhat.com>>
>> Subject: Re: [edk2] [PATCH] UefiCpuPkg/LocalApicLib: Exclude second
>> SendIpi sequence on AMD processors.
>>
>> Hello Leo,
>>
>> On 06/13/18 22:11, Leo Duran wrote:
>>> On AMD processors the second SendIpi in the SendInitSipiSipi and
>>> SendInitSipiSipiAllExcludingSelf routines is not required, and may
>>> cause undesired side-effects during MP initialization.
>>>
>>> This patch leverages the StandardSignatureIsAuthenticAMD check to
>>> exclude the second SendIpi and its associated MicroSecondDelay (200).
>>
>> QEMU and KVM emulate some AMD processors too; of particular interest is
>> the recent EPYC addition, I believe (for SME/SEV, minimally).
>>
>> Did you check whether the StandardSignatureIsAuthenticAMD() check
>> applies to those QEMU VCPU models, and if so, whether omitting the second
>> Startup IPI interferes with *V*CPU startup in OVMF guests? (In
>> multiprocessing modules, such as CpuMpPei, CpuDxe, and
>> PiSmmCpuDxeSmm.)
>>
>> Adding Brijesh, Paolo and Igor.
>>
>> Thanks!
>> Laszlo
>
> Hi Lazlo,
>
> My understanding is that hypervisors simply ignore the second SIPI, so a
> single (or double) SIPI should be fine.
> In any event, I'm checking with Brijesh on your specific question.
>
My understanding is the 2nd SIPI was for an Intel processor bug in the mid
1990's and it has not been required since. People are just scared to change it
since all the Operating Systems have been historically validated against INT
SIPI SIPI.
One of my co-works removed our extra SIPI, not knowing the history, and
everything worked. Well we booted a little faster without the extra SIPI.
If people still have the compatibility concern can we make the 2nd SIPI
configurable via a PCD. But given the StandardSignatureIsAuthenticAMD() data
point we should default the 2nd SIPI to off and move the world forward? What do
folks think?
Thanks,
Andrew Fish
PS If I'm remembering correctly Mark Doran (of UEFI Fame) help lead the MP Spec
back in the 1990s that 1st documented the INIT SIPI SIPI so we could get some
more history from him if needed.
> Leo.
>
>>
>>>
>>> Contributed-under: TianoCore Contribution Agreement 1.1
>>> Signed-off-by: Leo Duran
>>> Cc: Jordan Justen
>>> Cc: Jeff Fan
>>> Cc: Liming Gao
>>> ---
>>> UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c | 12
>>> UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c | 12
>>>
>>> 2 files changed, 16 insertions(+), 8 deletions(-)
>>>
>>> diff --git a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
>>> b/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
>>> index b0b7e32..6e80536 100644
>>> --- a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
>>> +++ b/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
>>> @@ -554,8 +554,10 @@ SendInitSipiSipi (
>>> IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_STARTUP;
>>> IcrLow.Bits.Level = 1;
>>> SendIpi (IcrLow.Uint32, ApicId);
>>> - MicroSecondDelay (200);
>>> - SendIpi (IcrLow.Uint32, ApicId);
>>> + if (!StandardSignatureIsAuthenticAMD()) {
>>> +MicroSecondDelay (200);
>>> +SendIpi (IcrLow.Uint32, ApicId);
>>> + }
>>> }
>>>
>>> /**
>>> @@ -588,8 +590,10 @@ SendInitSipiSipiAllExcludingSelf (
>>> IcrLow.Bits.Level = 1;
>>> IcrLow.Bits.DestinationShorthand =
>> LOCAL_APIC_DESTINATION_SHORTHAND_ALL_EXCLUDING_SELF;
>>> SendIpi (IcrLow.Uint32, 0);
>>> - MicroSecondDelay (200);
>>> - SendIpi (IcrLow.Uint32, 0);
>>> + if (!StandardSignatureIsAuthenticAMD()) {
>>> +MicroSecondDelay (200);
>>> +SendIpi (IcrLow.Uint32, 0);
>>> + }
>>> }
>>>
>>> /**
>>> diff --git
>>> a/UefiCpuPkg/Library/BaseXApicX
Re: [edk2] [PATCH] UefiCpuPkg/LocalApicLib: Exclude second SendIpi sequence on AMD processors.
> -Original Message-
> From: Laszlo Ersek
> Sent: Wednesday, June 13, 2018 3:50 PM
> To: Duran, Leo ; edk2-devel@lists.01.org
> Cc: Jordan Justen ; Jeff Fan
> ; Liming Gao ; Singh, Brijesh
> ; Paolo Bonzini ; Igor
> Mammedov
> Subject: Re: [edk2] [PATCH] UefiCpuPkg/LocalApicLib: Exclude second
> SendIpi sequence on AMD processors.
>
> Hello Leo,
>
> On 06/13/18 22:11, Leo Duran wrote:
> > On AMD processors the second SendIpi in the SendInitSipiSipi and
> > SendInitSipiSipiAllExcludingSelf routines is not required, and may
> > cause undesired side-effects during MP initialization.
> >
> > This patch leverages the StandardSignatureIsAuthenticAMD check to
> > exclude the second SendIpi and its associated MicroSecondDelay (200).
>
> QEMU and KVM emulate some AMD processors too; of particular interest is
> the recent EPYC addition, I believe (for SME/SEV, minimally).
>
> Did you check whether the StandardSignatureIsAuthenticAMD() check
> applies to those QEMU VCPU models, and if so, whether omitting the second
> Startup IPI interferes with *V*CPU startup in OVMF guests? (In
> multiprocessing modules, such as CpuMpPei, CpuDxe, and
> PiSmmCpuDxeSmm.)
>
> Adding Brijesh, Paolo and Igor.
>
> Thanks!
> Laszlo
Hi Lazlo,
My understanding is that hypervisors simply ignore the second SIPI, so a single
(or double) SIPI should be fine.
In any event, I'm checking with Brijesh on your specific question.
Leo.
>
> >
> > Contributed-under: TianoCore Contribution Agreement 1.1
> > Signed-off-by: Leo Duran
> > Cc: Jordan Justen
> > Cc: Jeff Fan
> > Cc: Liming Gao
> > ---
> > UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c | 12
> >
> > UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c | 12
> >
> > 2 files changed, 16 insertions(+), 8 deletions(-)
> >
> > diff --git a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
> > b/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
> > index b0b7e32..6e80536 100644
> > --- a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
> > +++ b/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
> > @@ -554,8 +554,10 @@ SendInitSipiSipi (
> >IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_STARTUP;
> >IcrLow.Bits.Level = 1;
> >SendIpi (IcrLow.Uint32, ApicId);
> > - MicroSecondDelay (200);
> > - SendIpi (IcrLow.Uint32, ApicId);
> > + if (!StandardSignatureIsAuthenticAMD()) {
> > +MicroSecondDelay (200);
> > +SendIpi (IcrLow.Uint32, ApicId);
> > + }
> > }
> >
> > /**
> > @@ -588,8 +590,10 @@ SendInitSipiSipiAllExcludingSelf (
> >IcrLow.Bits.Level = 1;
> >IcrLow.Bits.DestinationShorthand =
> LOCAL_APIC_DESTINATION_SHORTHAND_ALL_EXCLUDING_SELF;
> >SendIpi (IcrLow.Uint32, 0);
> > - MicroSecondDelay (200);
> > - SendIpi (IcrLow.Uint32, 0);
> > + if (!StandardSignatureIsAuthenticAMD()) {
> > +MicroSecondDelay (200);
> > +SendIpi (IcrLow.Uint32, 0);
> > + }
> > }
> >
> > /**
> > diff --git
> > a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
> > b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
> > index 1f4dcf7..5d82836 100644
> > --- a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
> > +++ b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
> > @@ -649,8 +649,10 @@ SendInitSipiSipi (
> >IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_STARTUP;
> >IcrLow.Bits.Level = 1;
> >SendIpi (IcrLow.Uint32, ApicId);
> > - MicroSecondDelay (200);
> > - SendIpi (IcrLow.Uint32, ApicId);
> > + if (!StandardSignatureIsAuthenticAMD()) {
> > +MicroSecondDelay (200);
> > +SendIpi (IcrLow.Uint32, ApicId);
> > + }
> > }
> >
> > /**
> > @@ -683,8 +685,10 @@ SendInitSipiSipiAllExcludingSelf (
> >IcrLow.Bits.Level = 1;
> >IcrLow.Bits.DestinationShorthand =
> LOCAL_APIC_DESTINATION_SHORTHAND_ALL_EXCLUDING_SELF;
> >SendIpi (IcrLow.Uint32, 0);
> > - MicroSecondDelay (200);
> > - SendIpi (IcrLow.Uint32, 0);
> > + if (!StandardSignatureIsAuthenticAMD()) {
> > +MicroSecondDelay (200);
> > +SendIpi (IcrLow.Uint32, 0);
> > + }
> > }
> >
> > /**
> >
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Re: [edk2] [PATCH] UefiCpuPkg/LocalApicLib: Exclude second SendIpi sequence on AMD processors.
On 14/06/2018 07:39, Ni, Ruiyu wrote: > > > Thanks/Ray > >> -Original Message- >> From: edk2-devel On Behalf Of Paolo >> Bonzini >> Sent: Thursday, June 14, 2018 4:52 AM >> To: Laszlo Ersek ; Leo Duran ; >> edk2-devel@lists.01.org >> Cc: Justen, Jordan L ; Brijesh Singh >> ; Jeff Fan ; Gao, Liming >> >> Subject: Re: [edk2] [PATCH] UefiCpuPkg/LocalApicLib: Exclude second >> SendIpi sequence on AMD processors. >> >> On 13/06/2018 22:49, Laszlo Ersek wrote: >>> Hello Leo, >>> >>> On 06/13/18 22:11, Leo Duran wrote: >>>> On AMD processors the second SendIpi in the SendInitSipiSipi and >>>> SendInitSipiSipiAllExcludingSelf routines is not required, and may >>>> cause undesired side-effects during MP initialization. >>>> >>>> This patch leverages the StandardSignatureIsAuthenticAMD check to >>>> exclude the second SendIpi and its associated MicroSecondDelay (200). >>> >>> QEMU and KVM emulate some AMD processors too; of particular interest >>> is the recent EPYC addition, I believe (for SME/SEV, minimally). >>> >>> Did you check whether the StandardSignatureIsAuthenticAMD() check >>> applies to those QEMU VCPU models, and if so, whether omitting the >>> second Startup IPI interferes with *V*CPU startup in OVMF guests? (In >>> multiprocessing modules, such as CpuMpPei, CpuDxe, and >>> PiSmmCpuDxeSmm.) >>> >>> Adding Brijesh, Paolo and Igor. >> >> Actually I would be surprised if any recent processor needs the >> INIT-SIPI-SIPI >> (though I'm not sure what undesired side effects it might trigger). > > Why the recent processors don't need INIT-SIPI-SIPI? > I thought it is the only way to wake up processors when it's halted (HLT). INIT-SIPI should be enough. The second SIPI is just in case the first one was missed. Paolo ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
Re: [edk2] [PATCH] UefiCpuPkg/LocalApicLib: Exclude second SendIpi sequence on AMD processors.
Thanks/Ray > -Original Message- > From: edk2-devel On Behalf Of Paolo > Bonzini > Sent: Thursday, June 14, 2018 4:52 AM > To: Laszlo Ersek ; Leo Duran ; > edk2-devel@lists.01.org > Cc: Justen, Jordan L ; Brijesh Singh > ; Jeff Fan ; Gao, Liming > > Subject: Re: [edk2] [PATCH] UefiCpuPkg/LocalApicLib: Exclude second > SendIpi sequence on AMD processors. > > On 13/06/2018 22:49, Laszlo Ersek wrote: > > Hello Leo, > > > > On 06/13/18 22:11, Leo Duran wrote: > >> On AMD processors the second SendIpi in the SendInitSipiSipi and > >> SendInitSipiSipiAllExcludingSelf routines is not required, and may > >> cause undesired side-effects during MP initialization. > >> > >> This patch leverages the StandardSignatureIsAuthenticAMD check to > >> exclude the second SendIpi and its associated MicroSecondDelay (200). > > > > QEMU and KVM emulate some AMD processors too; of particular interest > > is the recent EPYC addition, I believe (for SME/SEV, minimally). > > > > Did you check whether the StandardSignatureIsAuthenticAMD() check > > applies to those QEMU VCPU models, and if so, whether omitting the > > second Startup IPI interferes with *V*CPU startup in OVMF guests? (In > > multiprocessing modules, such as CpuMpPei, CpuDxe, and > > PiSmmCpuDxeSmm.) > > > > Adding Brijesh, Paolo and Igor. > > Actually I would be surprised if any recent processor needs the INIT-SIPI-SIPI > (though I'm not sure what undesired side effects it might trigger). Why the recent processors don't need INIT-SIPI-SIPI? I thought it is the only way to wake up processors when it's halted (HLT). > > Paolo > ___ > edk2-devel mailing list > edk2-devel@lists.01.org > https://lists.01.org/mailman/listinfo/edk2-devel ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
Re: [edk2] [PATCH] UefiCpuPkg/LocalApicLib: Exclude second SendIpi sequence on AMD processors.
On 13/06/2018 22:49, Laszlo Ersek wrote: > Hello Leo, > > On 06/13/18 22:11, Leo Duran wrote: >> On AMD processors the second SendIpi in the SendInitSipiSipi and >> SendInitSipiSipiAllExcludingSelf routines is not required, and may cause >> undesired side-effects during MP initialization. >> >> This patch leverages the StandardSignatureIsAuthenticAMD check to exclude >> the second SendIpi and its associated MicroSecondDelay (200). > > QEMU and KVM emulate some AMD processors too; of particular interest is > the recent EPYC addition, I believe (for SME/SEV, minimally). > > Did you check whether the StandardSignatureIsAuthenticAMD() check > applies to those QEMU VCPU models, and if so, whether omitting the > second Startup IPI interferes with *V*CPU startup in OVMF guests? (In > multiprocessing modules, such as CpuMpPei, CpuDxe, and PiSmmCpuDxeSmm.) > > Adding Brijesh, Paolo and Igor. Actually I would be surprised if any recent processor needs the INIT-SIPI-SIPI (though I'm not sure what undesired side effects it might trigger). Paolo ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
Re: [edk2] [PATCH] UefiCpuPkg/LocalApicLib: Exclude second SendIpi sequence on AMD processors.
Hello Leo,
On 06/13/18 22:11, Leo Duran wrote:
> On AMD processors the second SendIpi in the SendInitSipiSipi and
> SendInitSipiSipiAllExcludingSelf routines is not required, and may cause
> undesired side-effects during MP initialization.
>
> This patch leverages the StandardSignatureIsAuthenticAMD check to exclude
> the second SendIpi and its associated MicroSecondDelay (200).
QEMU and KVM emulate some AMD processors too; of particular interest is
the recent EPYC addition, I believe (for SME/SEV, minimally).
Did you check whether the StandardSignatureIsAuthenticAMD() check
applies to those QEMU VCPU models, and if so, whether omitting the
second Startup IPI interferes with *V*CPU startup in OVMF guests? (In
multiprocessing modules, such as CpuMpPei, CpuDxe, and PiSmmCpuDxeSmm.)
Adding Brijesh, Paolo and Igor.
Thanks!
Laszlo
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Leo Duran
> Cc: Jordan Justen
> Cc: Jeff Fan
> Cc: Liming Gao
> ---
> UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c | 12
> UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c | 12
> 2 files changed, 16 insertions(+), 8 deletions(-)
>
> diff --git a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
> b/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
> index b0b7e32..6e80536 100644
> --- a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
> +++ b/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
> @@ -554,8 +554,10 @@ SendInitSipiSipi (
>IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_STARTUP;
>IcrLow.Bits.Level = 1;
>SendIpi (IcrLow.Uint32, ApicId);
> - MicroSecondDelay (200);
> - SendIpi (IcrLow.Uint32, ApicId);
> + if (!StandardSignatureIsAuthenticAMD()) {
> +MicroSecondDelay (200);
> +SendIpi (IcrLow.Uint32, ApicId);
> + }
> }
>
> /**
> @@ -588,8 +590,10 @@ SendInitSipiSipiAllExcludingSelf (
>IcrLow.Bits.Level = 1;
>IcrLow.Bits.DestinationShorthand =
> LOCAL_APIC_DESTINATION_SHORTHAND_ALL_EXCLUDING_SELF;
>SendIpi (IcrLow.Uint32, 0);
> - MicroSecondDelay (200);
> - SendIpi (IcrLow.Uint32, 0);
> + if (!StandardSignatureIsAuthenticAMD()) {
> +MicroSecondDelay (200);
> +SendIpi (IcrLow.Uint32, 0);
> + }
> }
>
> /**
> diff --git a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
> b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
> index 1f4dcf7..5d82836 100644
> --- a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
> +++ b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
> @@ -649,8 +649,10 @@ SendInitSipiSipi (
>IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_STARTUP;
>IcrLow.Bits.Level = 1;
>SendIpi (IcrLow.Uint32, ApicId);
> - MicroSecondDelay (200);
> - SendIpi (IcrLow.Uint32, ApicId);
> + if (!StandardSignatureIsAuthenticAMD()) {
> +MicroSecondDelay (200);
> +SendIpi (IcrLow.Uint32, ApicId);
> + }
> }
>
> /**
> @@ -683,8 +685,10 @@ SendInitSipiSipiAllExcludingSelf (
>IcrLow.Bits.Level = 1;
>IcrLow.Bits.DestinationShorthand =
> LOCAL_APIC_DESTINATION_SHORTHAND_ALL_EXCLUDING_SELF;
>SendIpi (IcrLow.Uint32, 0);
> - MicroSecondDelay (200);
> - SendIpi (IcrLow.Uint32, 0);
> + if (!StandardSignatureIsAuthenticAMD()) {
> +MicroSecondDelay (200);
> +SendIpi (IcrLow.Uint32, 0);
> + }
> }
>
> /**
>
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[edk2] [PATCH] UefiCpuPkg/LocalApicLib: Exclude second SendIpi sequence on AMD processors.
On AMD processors the second SendIpi in the SendInitSipiSipi and
SendInitSipiSipiAllExcludingSelf routines is not required, and may cause
undesired side-effects during MP initialization.
This patch leverages the StandardSignatureIsAuthenticAMD check to exclude
the second SendIpi and its associated MicroSecondDelay (200).
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Leo Duran
Cc: Jordan Justen
Cc: Jeff Fan
Cc: Liming Gao
---
UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c | 12
UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c | 12
2 files changed, 16 insertions(+), 8 deletions(-)
diff --git a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
b/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
index b0b7e32..6e80536 100644
--- a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
+++ b/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
@@ -554,8 +554,10 @@ SendInitSipiSipi (
IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_STARTUP;
IcrLow.Bits.Level = 1;
SendIpi (IcrLow.Uint32, ApicId);
- MicroSecondDelay (200);
- SendIpi (IcrLow.Uint32, ApicId);
+ if (!StandardSignatureIsAuthenticAMD()) {
+MicroSecondDelay (200);
+SendIpi (IcrLow.Uint32, ApicId);
+ }
}
/**
@@ -588,8 +590,10 @@ SendInitSipiSipiAllExcludingSelf (
IcrLow.Bits.Level = 1;
IcrLow.Bits.DestinationShorthand =
LOCAL_APIC_DESTINATION_SHORTHAND_ALL_EXCLUDING_SELF;
SendIpi (IcrLow.Uint32, 0);
- MicroSecondDelay (200);
- SendIpi (IcrLow.Uint32, 0);
+ if (!StandardSignatureIsAuthenticAMD()) {
+MicroSecondDelay (200);
+SendIpi (IcrLow.Uint32, 0);
+ }
}
/**
diff --git a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
index 1f4dcf7..5d82836 100644
--- a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
+++ b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
@@ -649,8 +649,10 @@ SendInitSipiSipi (
IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_STARTUP;
IcrLow.Bits.Level = 1;
SendIpi (IcrLow.Uint32, ApicId);
- MicroSecondDelay (200);
- SendIpi (IcrLow.Uint32, ApicId);
+ if (!StandardSignatureIsAuthenticAMD()) {
+MicroSecondDelay (200);
+SendIpi (IcrLow.Uint32, ApicId);
+ }
}
/**
@@ -683,8 +685,10 @@ SendInitSipiSipiAllExcludingSelf (
IcrLow.Bits.Level = 1;
IcrLow.Bits.DestinationShorthand =
LOCAL_APIC_DESTINATION_SHORTHAND_ALL_EXCLUDING_SELF;
SendIpi (IcrLow.Uint32, 0);
- MicroSecondDelay (200);
- SendIpi (IcrLow.Uint32, 0);
+ if (!StandardSignatureIsAuthenticAMD()) {
+MicroSecondDelay (200);
+SendIpi (IcrLow.Uint32, 0);
+ }
}
/**
--
2.7.4
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