Re: [edk2] [PATCH V2 1/2] MdePkg SmBios.h: Add SMBIOS 3.2.0 definitions
I have no other comments. Reviewed-by: Liming Gao
>-Original Message-
>From: Zeng, Star
>Sent: Monday, August 27, 2018 9:07 AM
>To: Bi, Dandan ; edk2-devel@lists.01.org
>Cc: Gao, Liming ; Kinney, Michael D
>; Zeng, Star
>Subject: RE: [PATCH V2 1/2] MdePkg SmBios.h: Add SMBIOS 3.2.0 definitions
>
>Agree and thanks.
>
>Star
>-Original Message-
>From: Bi, Dandan
>Sent: Monday, August 27, 2018 9:00 AM
>To: Zeng, Star ; edk2-devel@lists.01.org
>Cc: Gao, Liming ; Kinney, Michael D
>
>Subject: RE: [PATCH V2 1/2] MdePkg SmBios.h: Add SMBIOS 3.2.0 definitions
>
>Hi Star,
>
>One minor comment:
>How about update
>+ UINT8 MemoryTechnology; ///<
>MEMORY_DEVICE_TECHNOLOGY
>To
>+ UINT8 MemoryTechnology; ///< The
>enumeration value
>from MEMORY_DEVICE_TECHNOLOGY.
>In order to keep consistent with current comments style.
>
>With this update, Reviewed-by: Dandan Bi
>
>
>Thanks,
>Dandan
>
>-Original Message-
>From: Zeng, Star
>Sent: Thursday, August 23, 2018 11:36 AM
>To: edk2-devel@lists.01.org
>Cc: Zeng, Star ; Gao, Liming ; Bi,
>Dandan ; Kinney, Michael D
>
>Subject: [PATCH V2 1/2] MdePkg SmBios.h: Add SMBIOS 3.2.0 definitions
>
>REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1099
>
>Add SMBIOS 3.2.0 definitions according to
>www.dmtf.org/sites/default/files/standards/documents/DSP0134_3.2.0.pdf.
>
>Processor Information (Type 4):
>- SMBIOSCR00163: add socket LGA2066
>- SMBIOSCR00173: add Intel Core i9
>- SMBIOSCR00176: add new processor sockets Port Connector Information
>(Type 8):
>- SMBIOSCR00168: add USB Type-C
>System Slots (Type 9):
>- SMBIOSCR00164: add "unavailable" to current usage field
>- SMBIOSCR00167: add support for PCIe bifurcation Memory Device (Type 17):
>- SMBIOSCR00162: add support for NVDIMMs
>- SMBIOSCR00166: extend support for NVDIMMs and add support for logical
>memory type
>- SMBIOSCR00172: rename "Configured Memory Clock Speed" to "Configured
>Memory Speed"
>- SMBIOSCR00174: add new memory technology value (Intel Persistent
>Memory, 3D XPoint) IPMI Device Information (Type 38):
>- SMBIOSCR00171: add SSIF
>Management Controller Host Interface (Type 42)
>- SMBIOSCR00175: fix structure data parsing issue
>
>V2: Add missing update to MISC_PORT_TYPE and SMBIOS_TABLE_TYPE9.
>
>Cc: Liming Gao
>Cc: Dandan Bi
>Cc: Michael D Kinney
>Contributed-under: TianoCore Contribution Agreement 1.1
>Signed-off-by: Star Zeng
>---
> MdePkg/Include/IndustryStandard/SmBios.h | 155
>---
> 1 file changed, 120 insertions(+), 35 deletions(-)
>
>diff --git a/MdePkg/Include/IndustryStandard/SmBios.h
>b/MdePkg/Include/IndustryStandard/SmBios.h
>index 5d0442873dfc..61e2f9421f97 100644
>--- a/MdePkg/Include/IndustryStandard/SmBios.h
>+++ b/MdePkg/Include/IndustryStandard/SmBios.h
>@@ -1,5 +1,5 @@
> /** @file
>- Industry Standard Definitions of SMBIOS Table Specification v3.1.1.
>+ Industry Standard Definitions of SMBIOS Table Specification v3.2.0.
>
> Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
> (C) Copyright 2015-2017 Hewlett Packard Enterprise Development LP
>@@ -685,6 +685,7 @@ typedef enum {
> ProcessorFamilyzArchitecture = 0xCC,
> ProcessorFamilyIntelCoreI5= 0xCD,
> ProcessorFamilyIntelCoreI3= 0xCE,
>+ ProcessorFamilyIntelCoreI9= 0xCF,
> ProcessorFamilyViaC7M = 0xD2,
> ProcessorFamilyViaC7D = 0xD3,
> ProcessorFamilyViaC7 = 0xD4,
>@@ -806,7 +807,11 @@ typedef enum {
> ProcessorUpgradeSocketBGA1515 = 0x35,
> ProcessorUpgradeSocketLGA3647_1 = 0x36,
> ProcessorUpgradeSocketSP3 = 0x37,
>- ProcessorUpgradeSocketSP3r2 = 0x38
>+ ProcessorUpgradeSocketSP3r2 = 0x38,
>+ ProcessorUpgradeSocketLGA2066 = 0x39,
>+ ProcessorUpgradeSocketBGA1392 = 0x3A,
>+ ProcessorUpgradeSocketBGA1510 = 0x3B,
>+ ProcessorUpgradeSocketBGA1528 = 0x3C
> } PROCESSOR_UPGRADE;
>
> ///
>@@ -1159,6 +1164,7 @@ typedef enum {
> PortConnectorTypeBNC= 0x20,
> PortConnectorType1394 = 0x21,
> PortConnectorTypeSasSata= 0x22,
>+ PortConnectorTypeUsbTypeC = 0x23,
> PortConnectorTypePC98 = 0xA0,
> PortConnectorTypePC98Hireso = 0xA1,
> PortConnectorTypePCH98 = 0xA2,
>@@ -1205,6 +1211,8 @@ typedef enum {
> PortTypeNetworkPort = 0x1F,
> PortTypeSata = 0x20,
> PortTypeSas = 0x21,
>+ PortTypeMfdp = 0x22, ///< Multi-Function Display Port
>+ PortTypeThunderbolt = 0x23,
> PortType8251Compatible= 0xA0,
> PortType8251FifoCompatible= 0xA1,
> PortTypeOther = 0xFF
>@@ -1314,10 +1322,11 @@ typedef enum {
> /// System Slots - Current Usage.
> ///
> typedef enum {
>- SlotUsageOther = 0x01,
>- SlotUsageUnknown
Re: [edk2] [PATCH V2 1/2] MdePkg SmBios.h: Add SMBIOS 3.2.0 definitions
Agree and thanks.
Star
-Original Message-
From: Bi, Dandan
Sent: Monday, August 27, 2018 9:00 AM
To: Zeng, Star ; edk2-devel@lists.01.org
Cc: Gao, Liming ; Kinney, Michael D
Subject: RE: [PATCH V2 1/2] MdePkg SmBios.h: Add SMBIOS 3.2.0 definitions
Hi Star,
One minor comment:
How about update
+ UINT8 MemoryTechnology; ///<
MEMORY_DEVICE_TECHNOLOGY
To
+ UINT8 MemoryTechnology; ///< The
enumeration value from MEMORY_DEVICE_TECHNOLOGY.
In order to keep consistent with current comments style.
With this update, Reviewed-by: Dandan Bi
Thanks,
Dandan
-Original Message-
From: Zeng, Star
Sent: Thursday, August 23, 2018 11:36 AM
To: edk2-devel@lists.01.org
Cc: Zeng, Star ; Gao, Liming ; Bi,
Dandan ; Kinney, Michael D
Subject: [PATCH V2 1/2] MdePkg SmBios.h: Add SMBIOS 3.2.0 definitions
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1099
Add SMBIOS 3.2.0 definitions according to
www.dmtf.org/sites/default/files/standards/documents/DSP0134_3.2.0.pdf.
Processor Information (Type 4):
- SMBIOSCR00163: add socket LGA2066
- SMBIOSCR00173: add Intel Core i9
- SMBIOSCR00176: add new processor sockets Port Connector Information (Type 8):
- SMBIOSCR00168: add USB Type-C
System Slots (Type 9):
- SMBIOSCR00164: add "unavailable" to current usage field
- SMBIOSCR00167: add support for PCIe bifurcation Memory Device (Type 17):
- SMBIOSCR00162: add support for NVDIMMs
- SMBIOSCR00166: extend support for NVDIMMs and add support for logical memory
type
- SMBIOSCR00172: rename "Configured Memory Clock Speed" to "Configured Memory
Speed"
- SMBIOSCR00174: add new memory technology value (Intel Persistent Memory, 3D
XPoint) IPMI Device Information (Type 38):
- SMBIOSCR00171: add SSIF
Management Controller Host Interface (Type 42)
- SMBIOSCR00175: fix structure data parsing issue
V2: Add missing update to MISC_PORT_TYPE and SMBIOS_TABLE_TYPE9.
Cc: Liming Gao
Cc: Dandan Bi
Cc: Michael D Kinney
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng
---
MdePkg/Include/IndustryStandard/SmBios.h | 155 ---
1 file changed, 120 insertions(+), 35 deletions(-)
diff --git a/MdePkg/Include/IndustryStandard/SmBios.h
b/MdePkg/Include/IndustryStandard/SmBios.h
index 5d0442873dfc..61e2f9421f97 100644
--- a/MdePkg/Include/IndustryStandard/SmBios.h
+++ b/MdePkg/Include/IndustryStandard/SmBios.h
@@ -1,5 +1,5 @@
/** @file
- Industry Standard Definitions of SMBIOS Table Specification v3.1.1.
+ Industry Standard Definitions of SMBIOS Table Specification v3.2.0.
Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
(C) Copyright 2015-2017 Hewlett Packard Enterprise Development LP @@
-685,6 +685,7 @@ typedef enum {
ProcessorFamilyzArchitecture = 0xCC,
ProcessorFamilyIntelCoreI5= 0xCD,
ProcessorFamilyIntelCoreI3= 0xCE,
+ ProcessorFamilyIntelCoreI9= 0xCF,
ProcessorFamilyViaC7M = 0xD2,
ProcessorFamilyViaC7D = 0xD3,
ProcessorFamilyViaC7 = 0xD4,
@@ -806,7 +807,11 @@ typedef enum {
ProcessorUpgradeSocketBGA1515 = 0x35,
ProcessorUpgradeSocketLGA3647_1 = 0x36,
ProcessorUpgradeSocketSP3 = 0x37,
- ProcessorUpgradeSocketSP3r2 = 0x38
+ ProcessorUpgradeSocketSP3r2 = 0x38,
+ ProcessorUpgradeSocketLGA2066 = 0x39,
+ ProcessorUpgradeSocketBGA1392 = 0x3A,
+ ProcessorUpgradeSocketBGA1510 = 0x3B,
+ ProcessorUpgradeSocketBGA1528 = 0x3C
} PROCESSOR_UPGRADE;
///
@@ -1159,6 +1164,7 @@ typedef enum {
PortConnectorTypeBNC= 0x20,
PortConnectorType1394 = 0x21,
PortConnectorTypeSasSata= 0x22,
+ PortConnectorTypeUsbTypeC = 0x23,
PortConnectorTypePC98 = 0xA0,
PortConnectorTypePC98Hireso = 0xA1,
PortConnectorTypePCH98 = 0xA2,
@@ -1205,6 +1211,8 @@ typedef enum {
PortTypeNetworkPort = 0x1F,
PortTypeSata = 0x20,
PortTypeSas = 0x21,
+ PortTypeMfdp = 0x22, ///< Multi-Function Display Port
+ PortTypeThunderbolt = 0x23,
PortType8251Compatible= 0xA0,
PortType8251FifoCompatible= 0xA1,
PortTypeOther = 0xFF
@@ -1314,10 +1322,11 @@ typedef enum {
/// System Slots - Current Usage.
///
typedef enum {
- SlotUsageOther = 0x01,
- SlotUsageUnknown = 0x02,
- SlotUsageAvailable = 0x03,
- SlotUsageInUse = 0x04
+ SlotUsageOther= 0x01,
+ SlotUsageUnknown = 0x02,
+ SlotUsageAvailable= 0x03,
+ SlotUsageInUse= 0x04,
+ SlotUsageUnavailable = 0x05
} MISC_SLOT_USAGE;
///
@@ -1350,10 +1359,21 @@ typedef struct {
UINT8 PmeSignalSupported :1;
UINT8 HotPlugDevicesSupported :1;
UINT8 SmbusSignalSupported:1;
- UINT8
Re: [edk2] [PATCH V2 1/2] MdePkg SmBios.h: Add SMBIOS 3.2.0 definitions
Hi Star,
One minor comment:
How about update
+ UINT8 MemoryTechnology; ///<
MEMORY_DEVICE_TECHNOLOGY
To
+ UINT8 MemoryTechnology; ///< The
enumeration value from MEMORY_DEVICE_TECHNOLOGY.
In order to keep consistent with current comments style.
With this update, Reviewed-by: Dandan Bi
Thanks,
Dandan
-Original Message-
From: Zeng, Star
Sent: Thursday, August 23, 2018 11:36 AM
To: edk2-devel@lists.01.org
Cc: Zeng, Star ; Gao, Liming ; Bi,
Dandan ; Kinney, Michael D
Subject: [PATCH V2 1/2] MdePkg SmBios.h: Add SMBIOS 3.2.0 definitions
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1099
Add SMBIOS 3.2.0 definitions according to
www.dmtf.org/sites/default/files/standards/documents/DSP0134_3.2.0.pdf.
Processor Information (Type 4):
- SMBIOSCR00163: add socket LGA2066
- SMBIOSCR00173: add Intel Core i9
- SMBIOSCR00176: add new processor sockets Port Connector Information (Type 8):
- SMBIOSCR00168: add USB Type-C
System Slots (Type 9):
- SMBIOSCR00164: add "unavailable" to current usage field
- SMBIOSCR00167: add support for PCIe bifurcation Memory Device (Type 17):
- SMBIOSCR00162: add support for NVDIMMs
- SMBIOSCR00166: extend support for NVDIMMs and add support for logical memory
type
- SMBIOSCR00172: rename "Configured Memory Clock Speed" to "Configured Memory
Speed"
- SMBIOSCR00174: add new memory technology value (Intel Persistent Memory, 3D
XPoint) IPMI Device Information (Type 38):
- SMBIOSCR00171: add SSIF
Management Controller Host Interface (Type 42)
- SMBIOSCR00175: fix structure data parsing issue
V2: Add missing update to MISC_PORT_TYPE and SMBIOS_TABLE_TYPE9.
Cc: Liming Gao
Cc: Dandan Bi
Cc: Michael D Kinney
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng
---
MdePkg/Include/IndustryStandard/SmBios.h | 155 ---
1 file changed, 120 insertions(+), 35 deletions(-)
diff --git a/MdePkg/Include/IndustryStandard/SmBios.h
b/MdePkg/Include/IndustryStandard/SmBios.h
index 5d0442873dfc..61e2f9421f97 100644
--- a/MdePkg/Include/IndustryStandard/SmBios.h
+++ b/MdePkg/Include/IndustryStandard/SmBios.h
@@ -1,5 +1,5 @@
/** @file
- Industry Standard Definitions of SMBIOS Table Specification v3.1.1.
+ Industry Standard Definitions of SMBIOS Table Specification v3.2.0.
Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
(C) Copyright 2015-2017 Hewlett Packard Enterprise Development LP @@
-685,6 +685,7 @@ typedef enum {
ProcessorFamilyzArchitecture = 0xCC,
ProcessorFamilyIntelCoreI5= 0xCD,
ProcessorFamilyIntelCoreI3= 0xCE,
+ ProcessorFamilyIntelCoreI9= 0xCF,
ProcessorFamilyViaC7M = 0xD2,
ProcessorFamilyViaC7D = 0xD3,
ProcessorFamilyViaC7 = 0xD4,
@@ -806,7 +807,11 @@ typedef enum {
ProcessorUpgradeSocketBGA1515 = 0x35,
ProcessorUpgradeSocketLGA3647_1 = 0x36,
ProcessorUpgradeSocketSP3 = 0x37,
- ProcessorUpgradeSocketSP3r2 = 0x38
+ ProcessorUpgradeSocketSP3r2 = 0x38,
+ ProcessorUpgradeSocketLGA2066 = 0x39,
+ ProcessorUpgradeSocketBGA1392 = 0x3A,
+ ProcessorUpgradeSocketBGA1510 = 0x3B,
+ ProcessorUpgradeSocketBGA1528 = 0x3C
} PROCESSOR_UPGRADE;
///
@@ -1159,6 +1164,7 @@ typedef enum {
PortConnectorTypeBNC= 0x20,
PortConnectorType1394 = 0x21,
PortConnectorTypeSasSata= 0x22,
+ PortConnectorTypeUsbTypeC = 0x23,
PortConnectorTypePC98 = 0xA0,
PortConnectorTypePC98Hireso = 0xA1,
PortConnectorTypePCH98 = 0xA2,
@@ -1205,6 +1211,8 @@ typedef enum {
PortTypeNetworkPort = 0x1F,
PortTypeSata = 0x20,
PortTypeSas = 0x21,
+ PortTypeMfdp = 0x22, ///< Multi-Function Display Port
+ PortTypeThunderbolt = 0x23,
PortType8251Compatible= 0xA0,
PortType8251FifoCompatible= 0xA1,
PortTypeOther = 0xFF
@@ -1314,10 +1322,11 @@ typedef enum {
/// System Slots - Current Usage.
///
typedef enum {
- SlotUsageOther = 0x01,
- SlotUsageUnknown = 0x02,
- SlotUsageAvailable = 0x03,
- SlotUsageInUse = 0x04
+ SlotUsageOther= 0x01,
+ SlotUsageUnknown = 0x02,
+ SlotUsageAvailable= 0x03,
+ SlotUsageInUse= 0x04,
+ SlotUsageUnavailable = 0x05
} MISC_SLOT_USAGE;
///
@@ -1350,10 +1359,21 @@ typedef struct {
UINT8 PmeSignalSupported :1;
UINT8 HotPlugDevicesSupported :1;
UINT8 SmbusSignalSupported:1;
- UINT8 Reserved:5; ///< Set to 0.
+ UINT8 BifurcationSupported:1;
+ UINT8 Reserved:4; ///< Set to 0.
} MISC_SLOT_CHARACTERISTICS2;
///
+/// System Slots - Peer Segment/Bus/Device/Function/Width Groups ///
+typedef
[edk2] [PATCH V2 1/2] MdePkg SmBios.h: Add SMBIOS 3.2.0 definitions
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1099
Add SMBIOS 3.2.0 definitions according to
www.dmtf.org/sites/default/files/standards/documents/DSP0134_3.2.0.pdf.
Processor Information (Type 4):
- SMBIOSCR00163: add socket LGA2066
- SMBIOSCR00173: add Intel Core i9
- SMBIOSCR00176: add new processor sockets
Port Connector Information (Type 8):
- SMBIOSCR00168: add USB Type-C
System Slots (Type 9):
- SMBIOSCR00164: add "unavailable" to current usage field
- SMBIOSCR00167: add support for PCIe bifurcation
Memory Device (Type 17):
- SMBIOSCR00162: add support for NVDIMMs
- SMBIOSCR00166: extend support for NVDIMMs and add support for logical memory
type
- SMBIOSCR00172: rename "Configured Memory Clock Speed" to "Configured Memory
Speed"
- SMBIOSCR00174: add new memory technology value (Intel Persistent Memory, 3D
XPoint)
IPMI Device Information (Type 38):
- SMBIOSCR00171: add SSIF
Management Controller Host Interface (Type 42)
- SMBIOSCR00175: fix structure data parsing issue
V2: Add missing update to MISC_PORT_TYPE and SMBIOS_TABLE_TYPE9.
Cc: Liming Gao
Cc: Dandan Bi
Cc: Michael D Kinney
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng
---
MdePkg/Include/IndustryStandard/SmBios.h | 155 ---
1 file changed, 120 insertions(+), 35 deletions(-)
diff --git a/MdePkg/Include/IndustryStandard/SmBios.h
b/MdePkg/Include/IndustryStandard/SmBios.h
index 5d0442873dfc..61e2f9421f97 100644
--- a/MdePkg/Include/IndustryStandard/SmBios.h
+++ b/MdePkg/Include/IndustryStandard/SmBios.h
@@ -1,5 +1,5 @@
/** @file
- Industry Standard Definitions of SMBIOS Table Specification v3.1.1.
+ Industry Standard Definitions of SMBIOS Table Specification v3.2.0.
Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
(C) Copyright 2015-2017 Hewlett Packard Enterprise Development LP
@@ -685,6 +685,7 @@ typedef enum {
ProcessorFamilyzArchitecture = 0xCC,
ProcessorFamilyIntelCoreI5= 0xCD,
ProcessorFamilyIntelCoreI3= 0xCE,
+ ProcessorFamilyIntelCoreI9= 0xCF,
ProcessorFamilyViaC7M = 0xD2,
ProcessorFamilyViaC7D = 0xD3,
ProcessorFamilyViaC7 = 0xD4,
@@ -806,7 +807,11 @@ typedef enum {
ProcessorUpgradeSocketBGA1515 = 0x35,
ProcessorUpgradeSocketLGA3647_1 = 0x36,
ProcessorUpgradeSocketSP3 = 0x37,
- ProcessorUpgradeSocketSP3r2 = 0x38
+ ProcessorUpgradeSocketSP3r2 = 0x38,
+ ProcessorUpgradeSocketLGA2066 = 0x39,
+ ProcessorUpgradeSocketBGA1392 = 0x3A,
+ ProcessorUpgradeSocketBGA1510 = 0x3B,
+ ProcessorUpgradeSocketBGA1528 = 0x3C
} PROCESSOR_UPGRADE;
///
@@ -1159,6 +1164,7 @@ typedef enum {
PortConnectorTypeBNC= 0x20,
PortConnectorType1394 = 0x21,
PortConnectorTypeSasSata= 0x22,
+ PortConnectorTypeUsbTypeC = 0x23,
PortConnectorTypePC98 = 0xA0,
PortConnectorTypePC98Hireso = 0xA1,
PortConnectorTypePCH98 = 0xA2,
@@ -1205,6 +1211,8 @@ typedef enum {
PortTypeNetworkPort = 0x1F,
PortTypeSata = 0x20,
PortTypeSas = 0x21,
+ PortTypeMfdp = 0x22, ///< Multi-Function Display Port
+ PortTypeThunderbolt = 0x23,
PortType8251Compatible= 0xA0,
PortType8251FifoCompatible= 0xA1,
PortTypeOther = 0xFF
@@ -1314,10 +1322,11 @@ typedef enum {
/// System Slots - Current Usage.
///
typedef enum {
- SlotUsageOther = 0x01,
- SlotUsageUnknown = 0x02,
- SlotUsageAvailable = 0x03,
- SlotUsageInUse = 0x04
+ SlotUsageOther= 0x01,
+ SlotUsageUnknown = 0x02,
+ SlotUsageAvailable= 0x03,
+ SlotUsageInUse= 0x04,
+ SlotUsageUnavailable = 0x05
} MISC_SLOT_USAGE;
///
@@ -1350,10 +1359,21 @@ typedef struct {
UINT8 PmeSignalSupported :1;
UINT8 HotPlugDevicesSupported :1;
UINT8 SmbusSignalSupported:1;
- UINT8 Reserved:5; ///< Set to 0.
+ UINT8 BifurcationSupported:1;
+ UINT8 Reserved:4; ///< Set to 0.
} MISC_SLOT_CHARACTERISTICS2;
///
+/// System Slots - Peer Segment/Bus/Device/Function/Width Groups
+///
+typedef struct {
+ UINT16 SegmentGroupNum;
+ UINT8 BusNum;
+ UINT8 DevFuncNum;
+ UINT8 DataBusWidth;
+} MISC_SLOT_PEER_GROUP;
+
+///
/// System Slots (Type 9)
///
/// The information in this structure defines the attributes of a system slot.
@@ -1376,6 +1396,12 @@ typedef struct {
UINT16 SegmentGroupNum;
UINT8 BusNum;
UINT8 DevFuncNum;
+ //
+ // Add for smbios 3.2
+ //
+ UINT8 DataBusWidth;
+ UINT8 PeerGroupingCount;
+
