From: xingjiang tang <tangxingji...@huawei.com>
Implementation OemGetCpuFreq() to get cpu frequency from cpld to
encapsulate project difference, for some projects don't support
get cpu frequency by this way.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang <ming.hu...@linaro.org>
---
Platform/Hisilicon/D06/Include/Library/CpldD06.h | 4 ++++
Silicon/Hisilicon/Include/Library/OemMiscLib.h | 2 ++
Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c | 16
++++++++++++++++
3 files changed, 22 insertions(+)
diff --git a/Platform/Hisilicon/D06/Include/Library/CpldD06.h
b/Platform/Hisilicon/D06/Include/Library/CpldD06.h
index ec9b49f4e70d..8eb333de529c 100644
--- a/Platform/Hisilicon/D06/Include/Library/CpldD06.h
+++ b/Platform/Hisilicon/D06/Include/Library/CpldD06.h
@@ -36,4 +36,8 @@
#define CPLD_X8_X8_X8_BOARD_ID 0x92
#define CPLD_X16_X8_BOARD_ID 0x93
+#define CPLD_CLOCK_FLAG 0xFD
+#define CPLD_BOM_VER_FLAG 0x0B
+#define CPLD_BOARD_REVISION_4TH 0x4
+
#endif /* __CPLDD06_H__ */
diff --git a/Silicon/Hisilicon/Include/Library/OemMiscLib.h
b/Silicon/Hisilicon/Include/Library/OemMiscLib.h
index 86ea6a1b3deb..dfac87d635d9 100644
--- a/Silicon/Hisilicon/Include/Library/OemMiscLib.h
+++ b/Silicon/Hisilicon/Include/Library/OemMiscLib.h
@@ -53,4 +53,6 @@ BOOLEAN OemIsNeedDisableExpanderBuffer(VOID);
extern EFI_STRING_ID gDimmToDevLocator[MAX_SOCKET][MAX_CHANNEL][MAX_DIMM];
EFI_HII_HANDLE EFIAPI OemGetPackages ();
+UINTN OemGetCpuFreq (UINT8 Socket);
+
#endif
diff --git a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c
b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c
index 2a9db46d1ff9..624fa33d2e14 100644
--- a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c
+++ b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c
@@ -207,3 +207,19 @@ OemIsNeedDisableExpanderBuffer (
{
return TRUE;
}
+
+UINTN OemGetCpuFreq (UINT8 Socket)
+{
+ UINT8 BoardRevision;
+
+ BoardRevision = MmioRead8 (CPLD_BASE_ADDRESS + CPLD_BOM_VER_FLAG);
+
+ // Board revision 4 and higher run at 2.5GHz
+ // Earlier revisions run at 2GHz
+ if (BoardRevision >= CPLD_BOARD_REVISION_4TH) {
+ return 2500000000;
+ } else {
+ return 2000000000;
+ }
+}
+
--
2.9.5
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