Re: [edk2] [PATCH v2 01/10] UefiCpuPkg/SmmCpuFeaturesLib: Remove .S files for IA32 and X64 arch
Reviewed-by: Eric Dong > -Original Message- > From: Zhang, Shenglei > Sent: Tuesday, March 19, 2019 2:59 PM > To: edk2-devel@lists.01.org > Cc: Dong, Eric ; Ni, Ray > Subject: [PATCH v2 01/10] UefiCpuPkg/SmmCpuFeaturesLib: Remove .S files > for IA32 and X64 arch > > .nasm file has been added for X86 arch. .S assembly code is not required any > more. > https://bugzilla.tianocore.org/show_bug.cgi?id=1594 > > Cc: Eric Dong > Cc: Ray Ni > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Shenglei Zhang > --- > .../Library/SmmCpuFeaturesLib/Ia32/SmiEntry.S | 278 - > .../SmmCpuFeaturesLib/Ia32/SmiException.S | 174 --- > .../SmmCpuFeaturesLibStm.inf | 6 - > .../Library/SmmCpuFeaturesLib/X64/SmiEntry.S | 282 -- > .../SmmCpuFeaturesLib/X64/SmiException.S | 178 --- > 5 files changed, 918 deletions(-) > delete mode 100644 > UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiEntry.S > delete mode 100644 > UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiException.S > delete mode 100644 > UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiEntry.S > delete mode 100644 > UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiException.S > > diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiEntry.S > b/UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiEntry.S > deleted file mode 100644 > index 4c0f8c8933..00 > --- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiEntry.S > +++ /dev/null > @@ -1,278 +0,0 @@ > -#-- > -# > -# Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved. -# > This program and the accompanying materials -# are licensed and made > available under the terms and conditions of the BSD License -# which > accompanies this distribution. The full text of the license may be found at > -# > http://opensource.org/licenses/bsd-license.php. > -# > -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, > EITHER EXPRESS OR IMPLIED. > -# > -# Module Name: > -# > -# SmiEntry.S > -# > -# Abstract: > -# > -# Code template of the SMI handler for a particular processor > -# > -#-- > - > -ASM_GLOBAL ASM_PFX(gcStmSmiHandlerTemplate) -ASM_GLOBAL > ASM_PFX(gcStmSmiHandlerSize) -ASM_GLOBAL > ASM_PFX(gcStmSmiHandlerOffset) -ASM_GLOBAL ASM_PFX(gStmSmiCr3) - > ASM_GLOBAL ASM_PFX(gStmSmiStack) -ASM_GLOBAL > ASM_PFX(gStmSmbase) -ASM_GLOBAL ASM_PFX(gStmXdSupported) - > ASM_GLOBAL ASM_PFX(FeaturePcdGet (PcdCpuSmmStackGuard)) - > ASM_GLOBAL ASM_PFX(gStmSmiHandlerIdtr) > - > -.equMSR_IA32_MISC_ENABLE, 0x1A0 > -.equMSR_EFER, 0xc080 > -.equMSR_EFER_XD, 0x800 > - > -# > -# Constants relating to TXT_PROCESSOR_SMM_DESCRIPTOR -# > -.equDSC_OFFSET, 0xfb00 > -.equDSC_GDTPTR, 0x48 > -.equDSC_GDTSIZ, 0x50 > -.equDSC_CS, 0x14 > -.equDSC_DS, 0x16 > -.equDSC_SS, 0x18 > -.equDSC_OTHERSEG, 0x1A > - > -.equPROTECT_MODE_CS, 0x08 > -.equPROTECT_MODE_DS, 0x20 > -.equTSS_SEGMENT, 0x40 > - > -.text > -ASM_PFX(gcStmSmiHandlerTemplate): > - > -_StmSmiEntryPoint: > -.byte 0xbb # mov bx, imm16 > -.word _StmGdtDesc - _StmSmiEntryPoint + 0x8000 > -.byte 0x2e,0xa1 # mov ax, cs:[offset16] > -.word DSC_OFFSET + DSC_GDTSIZ > -decl%eax > -movl%eax, %cs:(%edi)# mov cs:[bx], ax > -.byte 0x66,0x2e,0xa1# mov eax, cs:[offset16] > -.word DSC_OFFSET + DSC_GDTPTR > -movw%ax, %cs:2(%edi) > -movw%ax, %bp# ebp = GDT base > -.byte 0x66 > -lgdt%cs:(%edi) > -# Patch ProtectedMode Segment > -.byte 0xb8# mov ax, imm16 > -.word PROTECT_MODE_CS # set AX for segment directly > -movl%eax, %cs:-2(%edi) # mov cs:[bx - 2], ax > -# Patch ProtectedMode entry > -.byte 0x66, 0xbf# mov edi, SMBASE > -ASM_PFX(gStmSmbase): .space 4 > -.byte 0x67 > -lea ((Start32bit - _StmSmiEntryPoint) + 0x8000)(%edi), %ax > -movw %ax, %cs:-6(%edi) > -movl%cr0, %ebx > -.byte 0x66 > -andl$0x9ffafff3, %ebx > -.byte 0x66 > -orl $0x23, %ebx > -movl%ebx, %cr0 > -.byte 0x66,0xea > -.space 4 > -.space 2 > -_StmGdtDesc: .space 4 > -.space 2 > - > -Start32bit: > -movw$PROTECT_MODE_DS, %ax > -movl%eax,%ds > -movl%eax,%es > -movl%eax,%fs > -movl%eax,%gs > -movl%eax,%ss > -.byte 0xbc # mov esp, imm32 > -ASM_PFX(gStmSmiStack): .space 4 > -movl$ASM_PFX(gStmSmiHandlerIdtr), %eax > -lidt
[edk2] [PATCH v2 01/10] UefiCpuPkg/SmmCpuFeaturesLib: Remove .S files for IA32 and X64 arch
.nasm file has been added for X86 arch. .S assembly code is not required any more. https://bugzilla.tianocore.org/show_bug.cgi?id=1594 Cc: Eric Dong Cc: Ray Ni Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Shenglei Zhang --- .../Library/SmmCpuFeaturesLib/Ia32/SmiEntry.S | 278 - .../SmmCpuFeaturesLib/Ia32/SmiException.S | 174 --- .../SmmCpuFeaturesLibStm.inf | 6 - .../Library/SmmCpuFeaturesLib/X64/SmiEntry.S | 282 -- .../SmmCpuFeaturesLib/X64/SmiException.S | 178 --- 5 files changed, 918 deletions(-) delete mode 100644 UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiEntry.S delete mode 100644 UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiException.S delete mode 100644 UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiEntry.S delete mode 100644 UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiException.S diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiEntry.S b/UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiEntry.S deleted file mode 100644 index 4c0f8c8933..00 --- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiEntry.S +++ /dev/null @@ -1,278 +0,0 @@ -#-- -# -# Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved. -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php. -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -# Module Name: -# -# SmiEntry.S -# -# Abstract: -# -# Code template of the SMI handler for a particular processor -# -#-- - -ASM_GLOBAL ASM_PFX(gcStmSmiHandlerTemplate) -ASM_GLOBAL ASM_PFX(gcStmSmiHandlerSize) -ASM_GLOBAL ASM_PFX(gcStmSmiHandlerOffset) -ASM_GLOBAL ASM_PFX(gStmSmiCr3) -ASM_GLOBAL ASM_PFX(gStmSmiStack) -ASM_GLOBAL ASM_PFX(gStmSmbase) -ASM_GLOBAL ASM_PFX(gStmXdSupported) -ASM_GLOBAL ASM_PFX(FeaturePcdGet (PcdCpuSmmStackGuard)) -ASM_GLOBAL ASM_PFX(gStmSmiHandlerIdtr) - -.equMSR_IA32_MISC_ENABLE, 0x1A0 -.equMSR_EFER, 0xc080 -.equMSR_EFER_XD, 0x800 - -# -# Constants relating to TXT_PROCESSOR_SMM_DESCRIPTOR -# -.equDSC_OFFSET, 0xfb00 -.equDSC_GDTPTR, 0x48 -.equDSC_GDTSIZ, 0x50 -.equDSC_CS, 0x14 -.equDSC_DS, 0x16 -.equDSC_SS, 0x18 -.equDSC_OTHERSEG, 0x1A - -.equPROTECT_MODE_CS, 0x08 -.equPROTECT_MODE_DS, 0x20 -.equTSS_SEGMENT, 0x40 - -.text -ASM_PFX(gcStmSmiHandlerTemplate): - -_StmSmiEntryPoint: -.byte 0xbb # mov bx, imm16 -.word _StmGdtDesc - _StmSmiEntryPoint + 0x8000 -.byte 0x2e,0xa1 # mov ax, cs:[offset16] -.word DSC_OFFSET + DSC_GDTSIZ -decl%eax -movl%eax, %cs:(%edi)# mov cs:[bx], ax -.byte 0x66,0x2e,0xa1# mov eax, cs:[offset16] -.word DSC_OFFSET + DSC_GDTPTR -movw%ax, %cs:2(%edi) -movw%ax, %bp# ebp = GDT base -.byte 0x66 -lgdt%cs:(%edi) -# Patch ProtectedMode Segment -.byte 0xb8# mov ax, imm16 -.word PROTECT_MODE_CS # set AX for segment directly -movl%eax, %cs:-2(%edi) # mov cs:[bx - 2], ax -# Patch ProtectedMode entry -.byte 0x66, 0xbf# mov edi, SMBASE -ASM_PFX(gStmSmbase): .space 4 -.byte 0x67 -lea ((Start32bit - _StmSmiEntryPoint) + 0x8000)(%edi), %ax -movw %ax, %cs:-6(%edi) -movl%cr0, %ebx -.byte 0x66 -andl$0x9ffafff3, %ebx -.byte 0x66 -orl $0x23, %ebx -movl%ebx, %cr0 -.byte 0x66,0xea -.space 4 -.space 2 -_StmGdtDesc: .space 4 -.space 2 - -Start32bit: -movw$PROTECT_MODE_DS, %ax -movl%eax,%ds -movl%eax,%es -movl%eax,%fs -movl%eax,%gs -movl%eax,%ss -.byte 0xbc # mov esp, imm32 -ASM_PFX(gStmSmiStack): .space 4 -movl$ASM_PFX(gStmSmiHandlerIdtr), %eax -lidt(%eax) -jmp ProtFlatMode - -ProtFlatMode: -.byte 0xb8 # mov eax, imm32 -ASM_PFX(gStmSmiCr3): .space 4 -movl%eax, %cr3 -# -# Need to test for CR4 specific bit support -# -movl$1, %eax -cpuid # use CPUID to determine if specific CR4 bits are supported -xorl%eax, %eax # Clear EAX -testl $BIT2, %edx# Check for DE capabilities -jz L8 -orl $BIT3, %eax -L8: -testl $
