The PiSmmCpuDxeSmm driver depends on the ACPI_CPU_DATA structure, from a
platform- and CPU-specific driver, in order to support S3. The address of
this structure is communicated through the dynamic PCD
PcdCpuS3DataAddress.

The data and control flows are as follows (CpuMpDxe stands for the
original Quark_EDKII_v1.1.0/IA32FamilyCpuBasePkg/CpuMpDxe/ driver, from
which CpuS3DataDxe is being extracted):

          CpuMpDxe            S3ResumePei      PiSmmCpuDxeSmm
          (DXE_DRIVER)        (PEIM)           (DXE_SMM_DRIVER)
          ------------------- ---------------- ---------------------------
normal    collects data                        installs
boot          |                                EFI_SMM_CONFIGUR...PROTOCOL
              |                                in PiCpuSmmEntry()
              v                                     |
          SmmConfi...Notify() <---------------------+
              |
              v
          saves data into
          ACPI_CPU_DATA in
          AcpiNVS memory,
          sets
          PcdCpuS3DataAddress
          in SaveCpuS3Data()
              |
SMM ready     +------------------------------> SmmReadyToLockEv...Notify()
to lock                                             |
                                                    v
                                               gets PcdCpuS3DataAddress,
                                               copies ACPI_CPU_DATA from
                                               AcpiNVS to SMRAM
                                               (mAcpiCpuData)

runtime

S3
suspend

S3                            transfers
resume                        control to
                              PiSmmCpuDxeSmm
                              via
                              SmmS3Res...Point
                                      |
                                      +------> SmmRestoreCpu() and its
                                               callees use mAcpiCpuData
                                               from SMRAM

Since CpuMpDxe is very complex and covers much more functionality, we're
going to gradually import only the above feature. This patch pulls in the
basic skeleton of the driver.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <ler...@redhat.com>
---

Notes:
    v3:
    - don't add the driver to the DSC/FDF files just yet; a patch from
      Paolo will enable this driver for X64 as well -- later in the series.
    
    v2:
    - PcdCpuS3DataAddress comes from "UefiCpuPkg/UefiCpuPkg.dec" now
    - adapt the commit message to the fact that Mike added PiSmmCpuDxeSmm
      to UefiCpuPkg

 OvmfPkg/QuarkPort/CpuS3DataDxe/CpuS3DataDxe.inf  |  85 +++++++++++
 OvmfPkg/QuarkPort/CpuS3DataDxe/Cpu.h             |  57 ++++++++
 OvmfPkg/QuarkPort/CpuS3DataDxe/MpCommon.h        |  67 +++++++++
 OvmfPkg/QuarkPort/CpuS3DataDxe/MpService.h       |  49 +++++++
 OvmfPkg/QuarkPort/CpuS3DataDxe/MpCommon.c        |  76 ++++++++++
 OvmfPkg/QuarkPort/CpuS3DataDxe/ProcessorConfig.c | 147 ++++++++++++++++++++
 6 files changed, 481 insertions(+)

diff --git a/OvmfPkg/QuarkPort/CpuS3DataDxe/CpuS3DataDxe.inf 
b/OvmfPkg/QuarkPort/CpuS3DataDxe/CpuS3DataDxe.inf
new file mode 100644
index 0000000..efb71d4
--- /dev/null
+++ b/OvmfPkg/QuarkPort/CpuS3DataDxe/CpuS3DataDxe.inf
@@ -0,0 +1,85 @@
+## @file
+#
+# DXE driver that populates ACPI_CPU_DATA for PiSmmCpuDxeSmm.
+#
+# Based on Quark_EDKII_v1.1.0/IA32FamilyCpuBasePkg/CpuMpDxe.
+#
+# Copyright (C) 2015, Red Hat, Inc.
+# Copyright (c) 2013-2015 Intel Corporation.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# * Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# * Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in
+# the documentation and/or other materials provided with the
+# distribution.
+# * Neither the name of Intel Corporation nor the names of its
+# contributors may be used to endorse or promote products derived
+# from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+##
+
+[Defines]
+  INF_VERSION                    = 0x00010005
+  BASE_NAME                      = CpuS3DataDxe
+  FILE_GUID                      = B16CB1D2-8583-43BB-9F2C-27D8E2528F71
+  MODULE_TYPE                    = DXE_DRIVER
+  VERSION_STRING                 = 1.0
+  ENTRY_POINT                    = CpuS3DataInitialize
+
+# The following information is for reference only and not required by the build
+# tools.
+#
+#  VALID_ARCHITECTURES           = IA32 X64
+
+[Sources]
+  ProcessorConfig.c
+  MpService.h
+  MpCommon.h
+  MpCommon.c
+  Cpu.h
+
+[Sources.Ia32]
+
+[Packages]
+  MdePkg/MdePkg.dec
+  UefiCpuPkg/UefiCpuPkg.dec
+
+[LibraryClasses]
+  UefiBootServicesTableLib
+  UefiDriverEntryPoint
+  BaseMemoryLib
+  UefiLib
+  DebugLib
+  BaseLib
+
+[Guids]
+
+[Protocols]
+  gEfiSmmConfigurationProtocolGuid              # PROTOCOL ALWAYS_CONSUMED
+
+[FeaturePcd]
+
+[FixedPcd]
+
+[Pcd]
+  gUefiCpuPkgTokenSpaceGuid.PcdCpuS3DataAddress
+
+[Depex]
+  TRUE
diff --git a/OvmfPkg/QuarkPort/CpuS3DataDxe/Cpu.h 
b/OvmfPkg/QuarkPort/CpuS3DataDxe/Cpu.h
new file mode 100644
index 0000000..ca4816b
--- /dev/null
+++ b/OvmfPkg/QuarkPort/CpuS3DataDxe/Cpu.h
@@ -0,0 +1,57 @@
+/** @file
+
+  Include file for CPU DXE Module
+
+  Copyright (C) 2015, Red Hat, Inc.
+  Copyright (c) 2013-2015 Intel Corporation.
+
+  Redistribution and use in source and binary forms, with or without
+  modification, are permitted provided that the following conditions
+  are met:
+
+  * Redistributions of source code must retain the above copyright
+  notice, this list of conditions and the following disclaimer.
+  * Redistributions in binary form must reproduce the above copyright
+  notice, this list of conditions and the following disclaimer in
+  the documentation and/or other materials provided with the
+  distribution.
+  * Neither the name of Intel Corporation nor the names of its
+  contributors may be used to endorse or promote products derived
+  from this software without specific prior written permission.
+
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+  Module Name:  Cpu.h
+
+**/
+
+#ifndef _CPU_DXE_H_
+#define _CPU_DXE_H_
+
+#include "MpCommon.h"
+
+/**
+  Prepare ACPI NVS memory below 4G memory for use of S3 resume.
+  
+  This function allocates ACPI NVS memory below 4G memory for use of S3 resume,
+  and saves data into the memory region.
+
+  @param  Context   The Context save the info.
+  
+**/
+VOID
+SaveCpuS3Data (
+  VOID    *Context
+  );
+
+#endif
diff --git a/OvmfPkg/QuarkPort/CpuS3DataDxe/MpCommon.h 
b/OvmfPkg/QuarkPort/CpuS3DataDxe/MpCommon.h
new file mode 100644
index 0000000..ec8a4a1
--- /dev/null
+++ b/OvmfPkg/QuarkPort/CpuS3DataDxe/MpCommon.h
@@ -0,0 +1,67 @@
+/** @file
+
+  Include files of common functions for CPU DXE module.
+
+  Copyright (C) 2015, Red Hat, Inc.
+  Copyright (c) 2013-2015 Intel Corporation.
+
+  Redistribution and use in source and binary forms, with or without
+  modification, are permitted provided that the following conditions
+  are met:
+
+  * Redistributions of source code must retain the above copyright
+  notice, this list of conditions and the following disclaimer.
+  * Redistributions in binary form must reproduce the above copyright
+  notice, this list of conditions and the following disclaimer in
+  the documentation and/or other materials provided with the
+  distribution.
+  * Neither the name of Intel Corporation nor the names of its
+  contributors may be used to endorse or promote products derived
+  from this software without specific prior written permission.
+
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+  Module Name:  MpCommon.h
+
+**/
+
+#ifndef _MP_COMMON_H_
+#define _MP_COMMON_H_
+
+#include <Library/BaseLib.h>
+
+#include <AcpiCpuData.h>
+
+#include <Protocol/SmmConfiguration.h>
+
+#include <Library/DebugLib.h>
+#include <Library/UefiLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+
+/**
+  Allocate EfiACPIMemoryNVS below 4G memory address.
+
+  This function allocates EfiACPIMemoryNVS below 4G memory address.
+
+  @param  Size         Size of memory to allocate.
+  
+  @return Allocated address for output.
+
+**/
+VOID*
+AllocateAcpiNvsMemoryBelow4G (
+  IN   UINTN   Size
+  );
+
+#endif
diff --git a/OvmfPkg/QuarkPort/CpuS3DataDxe/MpService.h 
b/OvmfPkg/QuarkPort/CpuS3DataDxe/MpService.h
new file mode 100644
index 0000000..52861b9
--- /dev/null
+++ b/OvmfPkg/QuarkPort/CpuS3DataDxe/MpService.h
@@ -0,0 +1,49 @@
+/** @file
+
+  Include file for MP Services Protocol
+
+  Copyright (C) 2015, Red Hat, Inc.
+  Copyright (c) 2013-2015 Intel Corporation.
+
+  Redistribution and use in source and binary forms, with or without
+  modification, are permitted provided that the following conditions
+  are met:
+
+  * Redistributions of source code must retain the above copyright
+  notice, this list of conditions and the following disclaimer.
+  * Redistributions in binary form must reproduce the above copyright
+  notice, this list of conditions and the following disclaimer in
+  the documentation and/or other materials provided with the
+  distribution.
+  * Neither the name of Intel Corporation nor the names of its
+  contributors may be used to endorse or promote products derived
+  from this software without specific prior written permission.
+
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+  Module Name:  MpService.h
+
+**/
+
+#ifndef _MP_SERVICE_H_
+#define _MP_SERVICE_H_
+
+#include "MpCommon.h"
+
+typedef struct {
+  ACPI_CPU_DATA              AcpiCpuData;
+  IA32_DESCRIPTOR            GdtrProfile;
+  IA32_DESCRIPTOR            IdtrProfile;
+} MP_CPU_SAVED_DATA;
+
+#endif
diff --git a/OvmfPkg/QuarkPort/CpuS3DataDxe/MpCommon.c 
b/OvmfPkg/QuarkPort/CpuS3DataDxe/MpCommon.c
new file mode 100644
index 0000000..6f6ddb9
--- /dev/null
+++ b/OvmfPkg/QuarkPort/CpuS3DataDxe/MpCommon.c
@@ -0,0 +1,76 @@
+/** @file
+
+  Common functions for CPU DXE module.
+
+  Copyright (C) 2015, Red Hat, Inc.
+  Copyright (c) 2013-2015 Intel Corporation.
+
+  Redistribution and use in source and binary forms, with or without
+  modification, are permitted provided that the following conditions
+  are met:
+
+  * Redistributions of source code must retain the above copyright
+  notice, this list of conditions and the following disclaimer.
+  * Redistributions in binary form must reproduce the above copyright
+  notice, this list of conditions and the following disclaimer in
+  the documentation and/or other materials provided with the
+  distribution.
+  * Neither the name of Intel Corporation nor the names of its
+  contributors may be used to endorse or promote products derived
+  from this software without specific prior written permission.
+
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+  Module Name:  MpCommon.c
+
+**/
+
+#include "MpService.h"
+
+/**
+  Allocate EfiACPIMemoryNVS below 4G memory address.
+
+  This function allocates EfiACPIMemoryNVS below 4G memory address.
+
+  @param  Size         Size of memory to allocate.
+
+  @return Allocated address for output.
+
+**/
+VOID*
+AllocateAcpiNvsMemoryBelow4G (
+  IN   UINTN   Size
+  )
+{
+  UINTN                 Pages;
+  EFI_PHYSICAL_ADDRESS  Address;
+  EFI_STATUS            Status;
+  VOID*                 Buffer;
+
+  Pages = EFI_SIZE_TO_PAGES (Size);
+  Address = 0xffffffff;
+
+  Status  = gBS->AllocatePages (
+                   AllocateMaxAddress,
+                   EfiACPIMemoryNVS,
+                   Pages,
+                   &Address
+                   );
+  ASSERT_EFI_ERROR (Status);
+
+  Buffer = (VOID *) (UINTN) Address;
+  ZeroMem (Buffer, Size);
+
+  return Buffer;
+}
+
diff --git a/OvmfPkg/QuarkPort/CpuS3DataDxe/ProcessorConfig.c 
b/OvmfPkg/QuarkPort/CpuS3DataDxe/ProcessorConfig.c
new file mode 100644
index 0000000..2b5c319
--- /dev/null
+++ b/OvmfPkg/QuarkPort/CpuS3DataDxe/ProcessorConfig.c
@@ -0,0 +1,147 @@
+/** @file
+  Code for processor configuration.
+
+  Copyright (C) 2015, Red Hat, Inc.
+  Copyright (c) 2013-2015 Intel Corporation.
+
+  Redistribution and use in source and binary forms, with or without
+  modification, are permitted provided that the following conditions
+  are met:
+
+  * Redistributions of source code must retain the above copyright
+  notice, this list of conditions and the following disclaimer.
+  * Redistributions in binary form must reproduce the above copyright
+  notice, this list of conditions and the following disclaimer in
+  the documentation and/or other materials provided with the
+  distribution.
+  * Neither the name of Intel Corporation nor the names of its
+  contributors may be used to endorse or promote products derived
+  from this software without specific prior written permission.
+
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+  Module Name:  ProcessorConfig.c
+
+**/
+
+#include "MpService.h"
+#include "Cpu.h"
+
+ACPI_CPU_DATA                       *mAcpiCpuData;
+EFI_EVENT                           mSmmConfigurationNotificationEvent;
+EFI_HANDLE                          mImageHandle;
+
+/**
+  Event notification that is fired every time a gEfiSmmConfigurationProtocol
+  installs.
+
+  This function configures all logical processors with three-phase
+  architecture.
+
+  @param  Event                 The Event that is being processed, not used.
+  @param  Context               Event Context, not used.
+
+**/
+VOID
+EFIAPI
+SmmConfigurationEventNotify (
+  IN EFI_EVENT  Event,
+  IN VOID       *Context
+  )
+{
+  EFI_STATUS    Status;
+  EFI_SMM_CONFIGURATION_PROTOCOL  *SmmConfiguration;
+
+  //
+  // Make sure this notification is for this handler
+  //
+  Status = gBS->LocateProtocol (&gEfiSmmConfigurationProtocolGuid, NULL,
+                  (VOID **)&SmmConfiguration);
+  if (EFI_ERROR (Status)) {
+    return;
+  }
+
+  //
+  // Save CPU S3 data
+  //
+  SaveCpuS3Data (mImageHandle);
+}
+
+/**
+  Entrypoint of CpuS3DataDxe module.
+  
+  This function is the entrypoint of CpuS3DataDxe module.
+  It populates ACPI_CPU_DATA for PiSmmCpuDxeSmm.
+
+  @param  ImageHandle   The firmware allocated handle for the EFI image.
+  @param  SystemTable   A pointer to the EFI System Table.
+  
+  @retval EFI_SUCCESS   The entrypoint always returns EFI_SUCCESS.
+
+**/
+EFI_STATUS
+EFIAPI
+CpuS3DataInitialize (
+  IN EFI_HANDLE                            ImageHandle,
+  IN EFI_SYSTEM_TABLE                      *SystemTable
+  )
+{
+  VOID        *Registration;
+
+  mImageHandle = ImageHandle;
+
+  //
+  // Install notification callback on SMM Configuration Protocol
+  //
+  mSmmConfigurationNotificationEvent = EfiCreateProtocolNotifyEvent (
+                                         &gEfiSmmConfigurationProtocolGuid,
+                                         TPL_CALLBACK,
+                                         SmmConfigurationEventNotify,
+                                         NULL,
+                                         &Registration
+                                         );
+
+  return EFI_SUCCESS;
+}
+
+/**
+  Prepare ACPI NVS memory below 4G memory for use of S3 resume.
+  
+  This function allocates ACPI NVS memory below 4G memory for use of S3 resume,
+  and saves data into the memory region.
+
+  @param  Context   The Context save the info.
+
+**/
+VOID
+SaveCpuS3Data (
+  VOID    *Context
+  )
+{
+  MP_CPU_SAVED_DATA       *MpCpuSavedData;
+
+  //
+  // Allocate ACPI NVS memory below 4G memory for use of S3 resume.
+  //
+  MpCpuSavedData = AllocateAcpiNvsMemoryBelow4G (sizeof (MP_CPU_SAVED_DATA));
+
+  //
+  // Set the value for CPU data
+  //
+  mAcpiCpuData                 = &(MpCpuSavedData->AcpiCpuData);
+
+  //
+  // Set the base address of CPU S3 data to PcdCpuS3DataAddress
+  //
+  PcdSet64 (PcdCpuS3DataAddress, (UINT64)(UINTN)mAcpiCpuData); 
+}
-- 
1.8.3.1


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