Re: [edk2] [Patch v2 06/40] UefiCpuPkg/MpInitLib: Add AP assembly code and MP_CPU_EXCHANGE_INFO

2016-07-21 Thread Mudusuru, Giri P 
Reviewed-by: Giri P Mudusuru 

1) fix typo NumApsExecutingLoction to NumApsExecutingLocation
2) add space after ; and before comment lines 172 & 173 in MpFuncs.nasm

Thanks,
-Giri

> -Original Message-
> From: Fan, Jeff
> Sent: Thursday, July 21, 2016 8:14 PM
> To: edk2-devel@lists.01.org
> Cc: Kinney, Michael D ; Tian, Feng
> ; Mudusuru, Giri P ; Laszlo
> Ersek 
> Subject: [Patch v2 06/40] UefiCpuPkg/MpInitLib: Add AP assembly code and
> MP_CPU_EXCHANGE_INFO
> 
> Add assembly code for AP reset vector and the definition of
> MP_CPU_EXCHANGE_INFO
> that are used to exchange the data between C code and assembly code when AP
> wake
> up.
> 
> Cc: Michael Kinney 
> Cc: Feng Tian 
> Cc: Giri P Mudusuru 
> Cc: Laszlo Ersek 
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Jeff Fan 
> ---
>  UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf  |   8 ++
>  UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc|  37 +
>  UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm | 170
> +++
>  UefiCpuPkg/Library/MpInitLib/MpLib.h   |  24 
>  UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf  |   8 ++
>  UefiCpuPkg/Library/MpInitLib/X64/MpEqu.inc |  39 ++
>  UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm  | 178
> +
>  7 files changed, 464 insertions(+)
>  create mode 100644 UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc
>  create mode 100644 UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
>  create mode 100644 UefiCpuPkg/Library/MpInitLib/X64/MpEqu.inc
>  create mode 100644 UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm
> 
> diff --git a/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
> b/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
> index 1f131c0..e9a2725 100644
> --- a/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
> +++ b/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
> @@ -27,6 +27,14 @@
>  #  VALID_ARCHITECTURES   = IA32 X64
>  #
> 
> +[Sources.IA32]
> +  Ia32/MpEqu.inc
> +  Ia32/MpFuncs.nasm
> +
> +[Sources.X64]
> +  X64/MpEqu.inc
> +  X64/MpFuncs.nasm
> +
>  [Sources.common]
>DxeMpLib.c
>MpLib.c
> diff --git a/UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc
> b/UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc
> new file mode 100644
> index 000..f460f7a
> --- /dev/null
> +++ b/UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc
> @@ -0,0 +1,37 @@
> +;--
>  ;
> +; Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.
> +; This program and the accompanying materials
> +; are licensed and made available under the terms and conditions of the BSD
> License
> +; which accompanies this distribution.  The full text of the license may be 
> found
> at
> +; http://opensource.org/licenses/bsd-license.php.
> +;
> +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS"
> BASIS,
> +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER
> EXPRESS OR IMPLIED.
> +;
> +; Module Name:
> +;
> +;   MpEqu.inc
> +;
> +; Abstract:
> +;
> +;   This is the equates file for Multiple Processor support
> +;
> +;---
> +
> +VacantFlagequ00h
> +NotVacantFlag equ0ffh
> +
> +LockLocation  equ(RendezvousFunnelProcEnd -
> RendezvousFunnelProcStart)
> +StackStartAddressLocation equLockLocation + 04h
> +StackSizeLocation equLockLocation + 08h
> +ApProcedureLocation   equLockLocation + 0Ch
> +GdtrLocation  equLockLocation + 10h
> +IdtrLocation  equLockLocation + 16h
> +BufferStartLocation   equLockLocation + 1Ch
> +ModeOffsetLocationequLockLocation + 20h
> +NumApsExecutingLoctionequLockLocation + 24h
> +CodeSegmentLocation   equLockLocation + 28h
> +DataSegmentLocation   equLockLocation + 2Ch
> +EnableExecuteDisableLocation  equLockLocation + 30h
> +Cr3Location   equLockLocation + 3Ch
> +
> diff --git a/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
> b/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
> new file mode 100644
> index 000..338c9a2
> --- /dev/null
> +++ b/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
> @@ -0,0 +1,170 @@
> +;--
>  ;
> +; Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.
> +; This program and the accompanying materials
> +; are licensed and made available under the terms and conditions of the BSD
> License
> +; which accompanies this distribution.  The full text of

[edk2] [Patch v2 06/40] UefiCpuPkg/MpInitLib: Add AP assembly code and MP_CPU_EXCHANGE_INFO

2016-07-21 Thread Jeff Fan 
Add assembly code for AP reset vector and the definition of MP_CPU_EXCHANGE_INFO
that are used to exchange the data between C code and assembly code when AP wake
up.

Cc: Michael Kinney 
Cc: Feng Tian 
Cc: Giri P Mudusuru 
Cc: Laszlo Ersek 
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan 
---
 UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf  |   8 ++
 UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc|  37 +
 UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm | 170 +++
 UefiCpuPkg/Library/MpInitLib/MpLib.h   |  24 
 UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf  |   8 ++
 UefiCpuPkg/Library/MpInitLib/X64/MpEqu.inc |  39 ++
 UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm  | 178 +
 7 files changed, 464 insertions(+)
 create mode 100644 UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc
 create mode 100644 UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
 create mode 100644 UefiCpuPkg/Library/MpInitLib/X64/MpEqu.inc
 create mode 100644 UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm

diff --git a/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf 
b/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
index 1f131c0..e9a2725 100644
--- a/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
+++ b/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
@@ -27,6 +27,14 @@
 #  VALID_ARCHITECTURES   = IA32 X64
 #
 
+[Sources.IA32]
+  Ia32/MpEqu.inc
+  Ia32/MpFuncs.nasm
+
+[Sources.X64]
+  X64/MpEqu.inc
+  X64/MpFuncs.nasm
+
 [Sources.common]
   DxeMpLib.c
   MpLib.c
diff --git a/UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc 
b/UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc
new file mode 100644
index 000..f460f7a
--- /dev/null
+++ b/UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc
@@ -0,0 +1,37 @@
+;--
 ;
+; Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD 
License
+; which accompanies this distribution.  The full text of the license may be 
found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+;   MpEqu.inc
+;
+; Abstract:
+;
+;   This is the equates file for Multiple Processor support
+;
+;---
+
+VacantFlagequ00h
+NotVacantFlag equ0ffh
+
+LockLocation  equ(RendezvousFunnelProcEnd - 
RendezvousFunnelProcStart)
+StackStartAddressLocation equLockLocation + 04h
+StackSizeLocation equLockLocation + 08h
+ApProcedureLocation   equLockLocation + 0Ch
+GdtrLocation  equLockLocation + 10h
+IdtrLocation  equLockLocation + 16h
+BufferStartLocation   equLockLocation + 1Ch
+ModeOffsetLocationequLockLocation + 20h
+NumApsExecutingLoctionequLockLocation + 24h
+CodeSegmentLocation   equLockLocation + 28h
+DataSegmentLocation   equLockLocation + 2Ch
+EnableExecuteDisableLocation  equLockLocation + 30h
+Cr3Location   equLockLocation + 3Ch
+
diff --git a/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm 
b/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
new file mode 100644
index 000..338c9a2
--- /dev/null
+++ b/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
@@ -0,0 +1,170 @@
+;--
 ;
+; Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD 
License
+; which accompanies this distribution.  The full text of the license may be 
found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+;   MpFuncs.nasm
+;
+; Abstract:
+;
+;   This is the assembly code for MP support
+;
+;---
+
+%include "MpEqu.inc"
+extern ASM_PFX(InitializeFloatingPointUnits)
+
+SECTION .text
+
+;-
+;RendezvousFunnelProc  procedure follows. All APs execute their procedure. This
+;procedure serializes all the AP processors through an Init sequence. It must 
be
+;noted that APs arrive here very raw...ie: real