[SI-LIST] : RE: Charge moving from decoupling capacitors
Barry, The current can flow from the cap, but it will get to the IC at the wrong time. Regards, George george_t...@dell.com -Original Message- From: Barry Ma [mailto:barry...@altavista.com] Sent: Tuesday, May 23, 2000 10:22 AM To: george_t...@exchange.dell.com Cc: si-l...@silab.eng.sun.com; emc-p...@ieee.org Subject: RE: Charge moving from decoupling capacitors George, I am impressed by your attitude to pursue the correctness, and glad to discuss with you further on “How does a decoupling capacitor support an IC?” Here is my two cents worth. The decap supplies necessary charge to the IC during Tr through a transmission line. As you mentioned before: “The current is an impulse function, although the voltage waveform is a step function.” This impulse function, actually a bell-like function on Tr, happens every time period T when the IC gate switches from low to high. The corresponding frequency spectrum contains lots of frequencies. There must be some frequencies making the transmission line a 1/4, 3/4, ... wavelength. It is hard for me to be convinced that currents of those frequencies cannot flow from the decap to the IC. ... Pleas correct me if misunderstood. Thanks. Regards, Barry Ma b...@anritsu.com On Mon, 22 May 2000, george_t...@dell.com wrote: Barry, I need to make a correction. I was rushing to lunch on Thursday, so I did not read over what I wrote. Here is the correction for the 2nd comment below: At 1/4 wavelength, the charges are 180 degrees out of phase, so they are working against the IC current draw. 1/8 wavelength (90 degrees out of phase) is what I consider to be acceptable. Regards, George Tang george_t...@dell.com ___ Why pay when you don't have to? Get AltaVista Free Internet Access now! http://jump.altavista.com/freeaccess4.go ___ --- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Jim Bacher: jim_bac...@mail.monarch.com Michael Garretson:pstc_ad...@garretson.org For policy questions, send mail to: Richard Nute: ri...@ieee.org To unsubscribe from si-list or si-list-digest: send e-mail to majord...@silab.eng.sun.com. In the BODY of message put: UNSUBSCRIBE si-list or UNSUBSCRIBE si-list-digest, for more help, put HELP. si-list archives are accessible at http://www.qsl.net/wb6tpu
[SI-LIST] : RE: Charge moving from decoupling capacitors
Barry, I need to make a correction. I was rushing to lunch on Thursday, so I did not read over what I wrote. Here is the correction for the 2nd comment below: At 1/4 wavelength, the charges are 180 degrees out of phase, so they are working against the IC current draw. 1/8 wavelength (90 degrees out of phase) is what I consider to be acceptable. Regards, George Tang george_t...@dell.com -Original Message- From: Tang, George Sent: Thursday, May 18, 2000 12:31 PM To: 'Barry Ma'; Tang, George Cc: si-l...@silab.eng.sun.com; emc-p...@ieee.org Subject: RE: Charge moving from decoupling capacitors Barry, Thanks for the comments. Here are my comments: Ok, you put caps at a certain distance away from the IC because you only want them to work at 100 MHz. But that distance turns out to be the 1/4 wave distance at 400 MHz, and you placed enough caps at the 1/4 wave distance to cause board resonance. Now what? Do you tell the caps not to work at 400 MHz because it's not their frequency? For your 2nd comment: I used the words loosely define for that reason. If you are interested in high frequency decoupling and instantaneous current, you really want to have all your charges moving in phase. At 1/4 wavelength, the charges are 90 degrees out of phase, so they will not do much for your instantaneous current. 1/8 wavelength is what I consider to be acceptable. You can certainly pick a different number. Regards, George Tang george_t...@dell.com -Original Message- From: Barry Ma [mailto:barry...@altavista.com] Sent: Thursday, May 18, 2000 10:50 AM To: george_t...@exchange.dell.com Cc: si-l...@silab.eng.sun.com; emc-p...@ieee.org Subject: RE: Charge moving from decoupling capacitors George, Thanks for your long input. I'd like to make some comments below. - On Wed, 17 May 2000, george_t...@dell.com wrote: Large parallel plates behave as transmission lines. A quarter wavelength transmission line with a short at the end has infinite impedance, so capacitors placed 1/4 wavelength away are bad. That’s why decaps work on low frequency portion. Let’s set 100 MHz and below for decaps to cover. The wavelength at 100 MHz is 3 meters. A quarter of it is 75 cm. It’s long enough to ordinary PCB size. (The cap is directly connected to pwr/gnd planes.) This means that we can loosely define the largest usable board area capacitance as 1/8 wavelength radius of copper surrounding the IC power pin. Charges stored on the planes further than 1/8 wavelength away are not very usable due to the time delay. At 500MHz in FR4, 1/8 wavelength is 1.5 inches. Is such a board capacitor good enough for your IC? George, I beg for differentials. How did you jump from capacitors placed 1/4 wavelength away are bad to the largest usable board area capacitance as 1/8 wavelength radius? Can I use the same token to infer from caps placed one wavelength away are good to the largest usable board area capacitance is within 1/2 wavelength radius? And so, and so on. Regards, Barry Ma b...@anritsu.com ___ Why pay when you don't have to? Get AltaVista Free Internet Access now! http://jump.altavista.com/freeaccess4.go ___ To unsubscribe from si-list or si-list-digest: send e-mail to majord...@silab.eng.sun.com. In the BODY of message put: UNSUBSCRIBE si-list or UNSUBSCRIBE si-list-digest, for more help, put HELP. si-list archives are accessible at http://www.qsl.net/wb6tpu
[SI-LIST] : RE: Charge moving from decoupling capacitors
Barry, Thanks for the comments. Here are my comments: Ok, you put caps at a certain distance away from the IC because you only want them to work at 100 MHz. But that distance turns out to be the 1/4 wave distance at 400 MHz, and you placed enough caps at the 1/4 wave distance to cause board resonance. Now what? Do you tell the caps not to work at 400 MHz because it's not their frequency? For your 2nd comment: I used the words loosely define for that reason. If you are interested in high frequency decoupling and instantaneous current, you really want to have all your charges moving in phase. At 1/4 wavelength, the charges are 90 degrees out of phase, so they will not do much for your instantaneous current. 1/8 wavelength is what I consider to be acceptable. You can certainly pick a different number. Regards, George Tang george_t...@dell.com -Original Message- From: Barry Ma [mailto:barry...@altavista.com] Sent: Thursday, May 18, 2000 10:50 AM To: george_t...@exchange.dell.com Cc: si-l...@silab.eng.sun.com; emc-p...@ieee.org Subject: RE: Charge moving from decoupling capacitors George, Thanks for your long input. I'd like to make some comments below. - On Wed, 17 May 2000, george_t...@dell.com wrote: Large parallel plates behave as transmission lines. A quarter wavelength transmission line with a short at the end has infinite impedance, so capacitors placed 1/4 wavelength away are bad. That’s why decaps work on low frequency portion. Let’s set 100 MHz and below for decaps to cover. The wavelength at 100 MHz is 3 meters. A quarter of it is 75 cm. It’s long enough to ordinary PCB size. (The cap is directly connected to pwr/gnd planes.) This means that we can loosely define the largest usable board area capacitance as 1/8 wavelength radius of copper surrounding the IC power pin. Charges stored on the planes further than 1/8 wavelength away are not very usable due to the time delay. At 500MHz in FR4, 1/8 wavelength is 1.5 inches. Is such a board capacitor good enough for your IC? George, I beg for differentials. How did you jump from capacitors placed 1/4 wavelength away are bad to the largest usable board area capacitance as 1/8 wavelength radius? Can I use the same token to infer from caps placed one wavelength away are good to the largest usable board area capacitance is within 1/2 wavelength radius? And so, and so on. Regards, Barry Ma b...@anritsu.com ___ Why pay when you don't have to? Get AltaVista Free Internet Access now! http://jump.altavista.com/freeaccess4.go ___ To unsubscribe from si-list or si-list-digest: send e-mail to majord...@silab.eng.sun.com. In the BODY of message put: UNSUBSCRIBE si-list or UNSUBSCRIBE si-list-digest, for more help, put HELP. si-list archives are accessible at http://www.qsl.net/wb6tpu
[SI-LIST] : RE: Charge moving from decoupling capacitors
Barry, This is true on most boards. But that is because the caps are tied to the planes through vias and lead traces, which are inductive. Also, the caps are further away from the IC power pins than the planes. This does not mean that the cap by itself cannot work at 1 GHz. If you have a 50 mil trace above a gnd plane terminated to a cap without using vias or other lead traces and measure VSWR and reflections from the cap, you will see that the cap works well at 1 GHz and beyond. You must solder the cap to the gnd plane and to the 50 mil trace directly. Regards, George Tang -Original Message- From: Barry Ma [mailto:barry...@altavista.com] Sent: Wednesday, May 17, 2000 9:16 AM To: si-l...@silab.eng.sun.com; EMC-PSTC Cc: wei...@atdial.net Subject: Re: Charge moving from decoupling capacitors Steve, Thanks a lot for the very nice hierarchy description below. If there's a 10 mil or less spacing between pwr and gnd planes, the plane cap is available. The plane cap and the decaps are complementary in whole frequency range. Plane cap takes care of high end, and decaps cover low portion. Then the location of decaps are not critical. And then decaps can be shared by other chips, according to the excellent research conducted by EMC lab at UMR. Please allow me to modify a bit your description as follows. The capacitance inside the device supports the chip first, but usually not enough. Charge from the planes also supports the chip and replenishes the device capacitance, Decaps replenish the plane on low frequency portion, while plane cap responds itself on HF end, Bulk capacitors replenish decaps and plane cap, The voltage regulator replenishes the bulk capacitors. Please correct me. Thanks. Regards, Barry b...@anritsu.com - From: sweir wei...@atdial.net, on 5/11/00 9:28 PM: The capacitance inside the device supports the chip, Charge from the planes replenishes the device capacitance, HF capacitors on the board replenish the planes, Bulk capacitors replenish the HF capacitors, The voltage regulator replenishes the bulk capacitors. [edited by bm] ___ Why pay when you don't have to? Get AltaVista Free Internet Access now! http://jump.altavista.com/freeaccess4.go ___ --- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Jim Bacher: jim_bac...@mail.monarch.com Michael Garretson:pstc_ad...@garretson.org For policy questions, send mail to: Richard Nute: ri...@ieee.org To unsubscribe from si-list or si-list-digest: send e-mail to majord...@silab.eng.sun.com. In the BODY of message put: UNSUBSCRIBE si-list or UNSUBSCRIBE si-list-digest, for more help, put HELP. si-list archives are accessible at http://www.qsl.net/wb6tpu
[SI-LIST] : RE: Charge moving from decoupling capacitors
You ask an open question, so the open answer to that is it depends. It depends on how much current the IC is drawing, what frequency and rise time it has, what type of load the IC output drivers are driving, how much noise on the power plane the other ICs on the same board can tolerate . . . . You are looking for a solution that will work in every case, but you will find that there are problems or exceptions to every solution. A capacitor stores charges and supplies current to ICs when needed. By that definition, the charges on the capacitor must move in phase from each other. For parallel plates to behave as a good capacitor, their dimensions should be much smaller than a wavelength so the charges on the plates will move in phase. Large parallel plates behave as transmission lines. A quarter wavelength transmission line with a short at the end has infinite impedance, so capacitors placed 1/4 wavelength away are bad. This means that we can loosely define the largest usable board area capacitance as 1/8 wavelength radius of copper surrounding the IC power pin. Charges stored on the planes further than 1/8 wavelength away are not very usable due to the time delay. At 500MHz in FR4, 1/8 wavelength is 1.5 inches. Is such a board capacitor good enough for your IC? It might be if you have a CMOS IC driving another CMOS IC less than 2 inches away, so the load on the output of the 1st IC is mainly the CMOS gate capacitance at the input of the 2nd IC at the end of the 2 inch transmission line. During switching, the 2nd IC draws current from the output of the 1st IC for the 1st 200 or 300 ps to charge up the input gate capacitance on the 2nd IC. The current is an impulse function, although the voltage waveform is a step function. If these ICs are small and uses little power, the board capacitance might be enough to supply the impulse current for the 1st IC. If the load on the transmission line is a termination resistor, the current draw will be a step function, and the board capacitance alone may not be good enough. But here is an exception. You have a board that uses only CMOS devices, and the largest IC is a 500 MHz processor that consumes 50W of power at 2.5v, so it switches 20A of current at 500 MHz. It is a CMOS device, so its current draws are mostly impulse functions. Would the board capacitance be good enough for this 20A switching current? Probably not. Making the pwr plane larger will not help, but using more layers in parallel will help. You might have to use 4, 8, or 16 pwr/gnd layer pairs in parallel for this board, the more layers the better. But wait!! Isn't that what a multilayer ceramic capacitor is? It has many pwr/gnd layers in parallel . . . . Hmm, if we could only take advantage of that . . . I'm thinking that if you have to use a 50W, 500MHz processor, and your boss tells you that you cannot have 8 pwr/gnd layers on your board, you or someone will probably find a way to make the ceramic capacitor work effectively beyond 1 GHz!! Another question you might ask is that do I really want to dump the 20A switching noise directly into the pwr/gnd planes and create pwr/gnd bounce and board resonance to interfere with all the ICs on the board, not to mention EMI problems? Regards, George Tang -Original Message- From: Barry Ma [mailto:barry...@altavista.com] Sent: Monday, May 15, 2000 1:33 PM To: george_t...@exchange.dell.com; si-l...@silab.eng.sun.com Cc: emc-p...@ieee.org Subject: RE: Charge moving from decoupling capacitors Thanks a lot for your inputs. All responses to my second question are only concerned with the inductance due to “long” distance between chip and decap. Nobody seems to agree imposing another constrain to the distance. My question was “Do we really have to limit the distance letting the charge have enough time to move from the cap to the chip during the rise time interval? I doubt it.” But I really read an article implying this extra concern. George, you wrote: This is true if you have only DC current. For AC, you may have water in the pipe but no water out of the faucet if the faucet is switching out of phase from the water in the pipe. Thank you for reminding me of Frequency Domain analysis. Yes, I should have described and analyzed a transient problem (charge travel during Tr) in both TD and FD, and then correlate the results. Let me have a try this time: It is generally acknowledged that decaps and plane cap are complementary (supposing a 10 mil or less spacing between pwr and gnd planes). Decaps cover low end of frequency range, while the plane cap takes care of high frequencies. Thus the interplane cap would play more and more important role in high-speed PCB design, as the speed gets faster and faster. On the other hand, nobody objects closer distances from decaps to the chip, if possible. . When a chip drains necessary charges from pwr/gnd planes during Tr, decaps would supply charges to pwr and gnd
