Re: [FFmpeg-devel] [PATCH 1/3] ffbuild: Refine MIPS handling
> 2020年5月31日 下午3:59，Shiyou Yin 写道：
>
>> -Original Message-
>> From: ffmpeg-devel-boun...@ffmpeg.org
>> <mailto:ffmpeg-devel-boun...@ffmpeg.org>
>> [mailto:ffmpeg-devel-boun...@ffmpeg.org
>> <mailto:ffmpeg-devel-boun...@ffmpeg.org>] On Behalf Of
>> Shiyou Yin
>> Sent: Sunday, May 31, 2020 11:33 AM
>> To: 'FFmpeg development discussions and patches'
>> Cc: yinshi...@loongson.cn <mailto:yinshi...@loongson.cn>
>> Subject: Re: [FFmpeg-devel] [PATCH 1/3] ffbuild: Refine MIPS handling
>>
>>> -Original Message-
>>> From: ffmpeg-devel-boun...@ffmpeg.org
>>> [mailto:ffmpeg-devel-boun...@ffmpeg.org] On Behalf Of
>>> Jiaxun Yang
>>> Sent: Tuesday, May 26, 2020 5:48 PM
>>> To: ffmpeg-devel@ffmpeg.org
>>> Cc: yinshi...@loongson.cn; Jiaxun Yang
>>> Subject: [FFmpeg-devel] [PATCH 1/3] ffbuild: Refine MIPS handling
>>>
>>> To enable runtime detection for MIPS, we need to refine ffbuild
>>> part to support buildding these feature together.
>>>
>>> Firstly, we fixed configure, let it probe native ability of toolchain
>>> to decide wether a feature can to be enabled, also clearly marked
>>> the conflictions between loongson2 & loongson3 and Release 6 & rest.
>>>
>>> Secondly, we compile MMI and MSA C sources with their own flags to ensure
>>> their flags won't pollute the whole program and generate illegal code.
>>>
>>> Signed-off-by: Jiaxun Yang
>>> ---
>>> configure| 179 +++
>>> ffbuild/common.mak | 10 ++-
>>> libavcodec/mips/Makefile | 3 +-
>>> 3 files changed, 117 insertions(+), 75 deletions(-)
>>>
>>> diff --git a/configure b/configure
>>> index f97cad0298..8dc3874642 100755
>>> --- a/configure
>>> +++ b/configure
>>> @@ -1113,6 +1113,26 @@ void foo(void){ __asm__ volatile($code); }
>>> EOF
>>> }
>>>
>>> +check_extra_inline_asm_flags(){
>>> +log check_extra_inline_asm_flags "$@"
>>> +name="$1"
>>> +extra=$2
>>> +code="$3"
>>> +flags=''
>>> +shift 3
>>> +while [ "$1" != "" ]; do
>>> + append flags $1
>>> + shift
>>> +done;
>>> +disable $name
>>> +cat > $TMPC <>> +void foo(void){ __asm__ volatile($code); }
>>> +EOF
>>> +log_file $TMPC
>>> +test_cmd $cc $CPPFLAGS $CFLAGS $flags "$@" $CC_C $(cc_o $TMPO) $TMPC &&
>>> +enable $name && append $extra "$flags"
>>> +}
>>> +
>>
>> Use function check_inline_asm_flags is suggested.
>
> To avoid adding '-mmsa' to the global CFLAGS, use check_inline_asm. e.g.
> enabled msa && check_inline_asm msa '"addvi.b $w0, $w1, 1"' '-mmsa'
> enabled mmi && check_inline_asm mmi '"punpcklhw $f0, $f0, $f0"'
> "-mloongson-mmi"
> enabled loongson3 && check_inline_asm loongson3 '"gsldxc1 $f0, 0($2, $3)"'
> '-mloongson-ext'
>
>>
>>> check_inline_asm_flags(){
>>>log check_inline_asm_flags "$@"
>>>name="$1"
>>> @@ -2551,7 +2571,7 @@ mips64r6_deps="mips"
>>> mipsfpu_deps="mips"
>>> mipsdsp_deps="mips"
>>> mipsdspr2_deps="mips"
>>> -mmi_deps="mips"
>>> +mmi_deps_any="loongson2 loongson3"
>>> msa_deps="mipsfpu"
>>> msa2_deps="msa"
>>>
>>> @@ -4999,29 +5019,57 @@ elif enabled bfin; then
>>>
>>> elif enabled mips; then
>>>
>>> -cpuflags="-march=$cpu"
>>> -
>>>if [ "$cpu" != "generic" ]; then
>>> -disable mips32r2
>>> -disable mips32r5
>>> -disable mips64r2
>>> -disable mips32r6
>>> -disable mips64r6
>>> -disable loongson2
>>> -disable loongson3
>>> +# DSP is disabled by deafult as they can't be detected at runtime
>>> +disable mipsdsp
>>> +disable mipsdspr2
>>> +
>>> +cpuflags="-march=$cpu"
>>>
>>>case $cpu in
>>> -24kc|24kf*|24kec|34kc|1004kc|24kef*|34kf*|1004kf*|74kc|74kf)
>>> +# General ISA levels
&g
Re: [FFmpeg-devel] [PATCH 1/3] ffbuild: Refine MIPS handling
>-Original Message-
>From: ffmpeg-devel-boun...@ffmpeg.org [mailto:ffmpeg-devel-boun...@ffmpeg.org]
>On Behalf Of
>Shiyou Yin
>Sent: Sunday, May 31, 2020 11:33 AM
>To: 'FFmpeg development discussions and patches'
>Cc: yinshi...@loongson.cn
>Subject: Re: [FFmpeg-devel] [PATCH 1/3] ffbuild: Refine MIPS handling
>
>>-Original Message-
>>From: ffmpeg-devel-boun...@ffmpeg.org
>>[mailto:ffmpeg-devel-boun...@ffmpeg.org] On Behalf Of
>>Jiaxun Yang
>>Sent: Tuesday, May 26, 2020 5:48 PM
>>To: ffmpeg-devel@ffmpeg.org
>>Cc: yinshi...@loongson.cn; Jiaxun Yang
>>Subject: [FFmpeg-devel] [PATCH 1/3] ffbuild: Refine MIPS handling
>>
>>To enable runtime detection for MIPS, we need to refine ffbuild
>>part to support buildding these feature together.
>>
>>Firstly, we fixed configure, let it probe native ability of toolchain
>>to decide wether a feature can to be enabled, also clearly marked
>>the conflictions between loongson2 & loongson3 and Release 6 & rest.
>>
>>Secondly, we compile MMI and MSA C sources with their own flags to ensure
>>their flags won't pollute the whole program and generate illegal code.
>>
>>Signed-off-by: Jiaxun Yang
>>---
>> configure| 179 +++
>> ffbuild/common.mak | 10 ++-
>> libavcodec/mips/Makefile | 3 +-
>> 3 files changed, 117 insertions(+), 75 deletions(-)
>>
>>diff --git a/configure b/configure
>>index f97cad0298..8dc3874642 100755
>>--- a/configure
>>+++ b/configure
>>@@ -1113,6 +1113,26 @@ void foo(void){ __asm__ volatile($code); }
>> EOF
>> }
>>
>>+check_extra_inline_asm_flags(){
>>+log check_extra_inline_asm_flags "$@"
>>+name="$1"
>>+extra=$2
>>+code="$3"
>>+flags=''
>>+shift 3
>>+while [ "$1" != "" ]; do
>>+ append flags $1
>>+ shift
>>+done;
>>+disable $name
>>+cat > $TMPC <>+void foo(void){ __asm__ volatile($code); }
>>+EOF
>>+log_file $TMPC
>>+test_cmd $cc $CPPFLAGS $CFLAGS $flags "$@" $CC_C $(cc_o $TMPO) $TMPC &&
>>+enable $name && append $extra "$flags"
>>+}
>>+
>
>Use function check_inline_asm_flags is suggested.
To avoid adding '-mmsa' to the global CFLAGS, use check_inline_asm. e.g.
enabled msa && check_inline_asm msa '"addvi.b $w0, $w1, 1"' '-mmsa'
enabled mmi && check_inline_asm mmi '"punpcklhw $f0, $f0, $f0"' "-mloongson-mmi"
enabled loongson3 && check_inline_asm loongson3 '"gsldxc1 $f0, 0($2, $3)"'
'-mloongson-ext'
>
>> check_inline_asm_flags(){
>> log check_inline_asm_flags "$@"
>> name="$1"
>>@@ -2551,7 +2571,7 @@ mips64r6_deps="mips"
>> mipsfpu_deps="mips"
>> mipsdsp_deps="mips"
>> mipsdspr2_deps="mips"
>>-mmi_deps="mips"
>>+mmi_deps_any="loongson2 loongson3"
>> msa_deps="mipsfpu"
>> msa2_deps="msa"
>>
>>@@ -4999,29 +5019,57 @@ elif enabled bfin; then
>>
>> elif enabled mips; then
>>
>>-cpuflags="-march=$cpu"
>>-
>> if [ "$cpu" != "generic" ]; then
>>-disable mips32r2
>>-disable mips32r5
>>-disable mips64r2
>>-disable mips32r6
>>-disable mips64r6
>>-disable loongson2
>>-disable loongson3
>>+# DSP is disabled by deafult as they can't be detected at runtime
>>+disable mipsdsp
>>+disable mipsdspr2
>>+
>>+cpuflags="-march=$cpu"
>>
>> case $cpu in
>>-24kc|24kf*|24kec|34kc|1004kc|24kef*|34kf*|1004kf*|74kc|74kf)
>>+# General ISA levels
>>+mips1|mips3)
>>+disable msa
>>+;;
>>+mips32r2)
>> enable mips32r2
>>+;;
>>+mips32r5)
>>+enable mips32r5
>>+;;
>>+mips64r2|mips64r5)
>>+enable mips64r2
>>+;;
>>+# Cores from MIPS(MTI)
>>+24kc)
>>+disable mipsfpu
>>+;;
>>+24kf*|24kec|34kc|74Kc|1004kc)
>>+disable mmi
>> disable msa
>> ;;
>>-p5600|i6400|p6600)
>>-
Re: [FFmpeg-devel] [PATCH 1/3] ffbuild: Refine MIPS handling
>-Original Message-
>From: ffmpeg-devel-boun...@ffmpeg.org [mailto:ffmpeg-devel-boun...@ffmpeg.org]
>On Behalf Of
>Jiaxun Yang
>Sent: Tuesday, May 26, 2020 5:48 PM
>To: ffmpeg-devel@ffmpeg.org
>Cc: yinshi...@loongson.cn; Jiaxun Yang
>Subject: [FFmpeg-devel] [PATCH 1/3] ffbuild: Refine MIPS handling
>
>To enable runtime detection for MIPS, we need to refine ffbuild
>part to support buildding these feature together.
>
>Firstly, we fixed configure, let it probe native ability of toolchain
>to decide wether a feature can to be enabled, also clearly marked
>the conflictions between loongson2 & loongson3 and Release 6 & rest.
>
>Secondly, we compile MMI and MSA C sources with their own flags to ensure
>their flags won't pollute the whole program and generate illegal code.
>
>Signed-off-by: Jiaxun Yang
>---
> configure| 179 +++
> ffbuild/common.mak | 10 ++-
> libavcodec/mips/Makefile | 3 +-
> 3 files changed, 117 insertions(+), 75 deletions(-)
>
>diff --git a/configure b/configure
>index f97cad0298..8dc3874642 100755
>--- a/configure
>+++ b/configure
>@@ -1113,6 +1113,26 @@ void foo(void){ __asm__ volatile($code); }
> EOF
> }
>
>+check_extra_inline_asm_flags(){
>+log check_extra_inline_asm_flags "$@"
>+name="$1"
>+extra=$2
>+code="$3"
>+flags=''
>+shift 3
>+while [ "$1" != "" ]; do
>+ append flags $1
>+ shift
>+done;
>+disable $name
>+cat > $TMPC <+void foo(void){ __asm__ volatile($code); }
>+EOF
>+log_file $TMPC
>+test_cmd $cc $CPPFLAGS $CFLAGS $flags "$@" $CC_C $(cc_o $TMPO) $TMPC &&
>+enable $name && append $extra "$flags"
>+}
>+
Use function check_inline_asm_flags is suggested.
> check_inline_asm_flags(){
> log check_inline_asm_flags "$@"
> name="$1"
>@@ -2551,7 +2571,7 @@ mips64r6_deps="mips"
> mipsfpu_deps="mips"
> mipsdsp_deps="mips"
> mipsdspr2_deps="mips"
>-mmi_deps="mips"
>+mmi_deps_any="loongson2 loongson3"
> msa_deps="mipsfpu"
> msa2_deps="msa"
>
>@@ -4999,29 +5019,57 @@ elif enabled bfin; then
>
> elif enabled mips; then
>
>-cpuflags="-march=$cpu"
>-
> if [ "$cpu" != "generic" ]; then
>-disable mips32r2
>-disable mips32r5
>-disable mips64r2
>-disable mips32r6
>-disable mips64r6
>-disable loongson2
>-disable loongson3
>+# DSP is disabled by deafult as they can't be detected at runtime
>+disable mipsdsp
>+disable mipsdspr2
>+
>+cpuflags="-march=$cpu"
>
> case $cpu in
>-24kc|24kf*|24kec|34kc|1004kc|24kef*|34kf*|1004kf*|74kc|74kf)
>+# General ISA levels
>+mips1|mips3)
>+disable msa
>+;;
>+mips32r2)
> enable mips32r2
>+;;
>+mips32r5)
>+enable mips32r5
>+;;
>+mips64r2|mips64r5)
>+enable mips64r2
>+;;
>+# Cores from MIPS(MTI)
>+24kc)
>+disable mipsfpu
>+;;
>+24kf*|24kec|34kc|74Kc|1004kc)
>+disable mmi
> disable msa
> ;;
>-p5600|i6400|p6600)
>-disable mipsdsp
>-disable mipsdspr2
>+24kef*|34kf*|1004kf*)
>+disable mmi
>+disable msa
>+enable mipsdsp
>+;;
>+p5600)
>+disable mmi
>+enable mips32r5
>+check_cflags "-mtune=p5600" && check_cflags "-msched-weight
>-mload-store-pairs
>-funroll-loops"
>+;;
>+i6400)
>+disable mmi
>+enable mips64r6
>+check_cflags "-mtune=i6400 -mabi=64" && check_cflags
>"-msched-weight
>-mload-store-pairs -funroll-loops" && check_ldflags "-mabi=64"
>+;;
>+p6600)
>+disable mmi
>+enable mips64r6
>+check_cflags "-mtune=p6600 -mabi=64" && check_cflags
>"-msched-weight
>-mload-store-pairs -funroll-loops" && check_ldflags "-mabi=64"
> ;;
>+# Cores from Loongson
> loongson*)
>-enable loongson2
>-enable loongson3
> enable local_aligned
> enable simd_align_16
> enable fast_64bit
>@@ -5029,8 +5077,6 @@ elif enabled mips; then
> enable fast_cmov
> enable fast_unaligned
> disable aligned_stack
>-disable mipsdsp
>-disable mipsdspr2
> # When gcc version less than 5.3.0, add
> -fno-expensive-optimizations flag.
> if [ $cc == gcc ]; then
> gcc_version=$(gcc -dumpversion)
>@@ -5042,62 +5088,26 @@ elif enabled mips; then
> fi
> case $cpu in
> loongson3*)
>+
Re: [FFmpeg-devel] [PATCH 1/3] ffbuild: Refine MIPS handling
>-Original Message-
>From: ffmpeg-devel-boun...@ffmpeg.org [mailto:ffmpeg-devel-boun...@ffmpeg.org]
>On Behalf Of
>Jiaxun Yang
>Sent: Tuesday, May 26, 2020 5:48 PM
>To: ffmpeg-devel@ffmpeg.org
>Cc: yinshi...@loongson.cn; Jiaxun Yang
>Subject: [FFmpeg-devel] [PATCH 1/3] ffbuild: Refine MIPS handling
>
>To enable runtime detection for MIPS, we need to refine ffbuild
>part to support buildding these feature together.
>
>Firstly, we fixed configure, let it probe native ability of toolchain
>to decide wether a feature can to be enabled, also clearly marked
>the conflictions between loongson2 & loongson3 and Release 6 & rest.
>
>Secondly, we compile MMI and MSA C sources with their own flags to ensure
>their flags won't pollute the whole program and generate illegal code.
>
>Signed-off-by: Jiaxun Yang
>---
> configure| 179 +++
> ffbuild/common.mak | 10 ++-
> libavcodec/mips/Makefile | 3 +-
> 3 files changed, 117 insertions(+), 75 deletions(-)
>
>diff --git a/configure b/configure
>index f97cad0298..8dc3874642 100755
>--- a/configure
>+++ b/configure
>@@ -1113,6 +1113,26 @@ void foo(void){ __asm__ volatile($code); }
> EOF
> }
>
>+check_extra_inline_asm_flags(){
>+log check_extra_inline_asm_flags "$@"
>+name="$1"
>+extra=$2
>+code="$3"
>+flags=''
>+shift 3
>+while [ "$1" != "" ]; do
>+ append flags $1
>+ shift
>+done;
>+disable $name
>+cat > $TMPC <+void foo(void){ __asm__ volatile($code); }
>+EOF
>+log_file $TMPC
>+test_cmd $cc $CPPFLAGS $CFLAGS $flags "$@" $CC_C $(cc_o $TMPO) $TMPC &&
>+enable $name && append $extra "$flags"
>+}
>+
> check_inline_asm_flags(){
> log check_inline_asm_flags "$@"
> name="$1"
>@@ -2551,7 +2571,7 @@ mips64r6_deps="mips"
> mipsfpu_deps="mips"
> mipsdsp_deps="mips"
> mipsdspr2_deps="mips"
>-mmi_deps="mips"
>+mmi_deps_any="loongson2 loongson3"
> msa_deps="mipsfpu"
> msa2_deps="msa"
>
>@@ -4999,29 +5019,57 @@ elif enabled bfin; then
>
> elif enabled mips; then
>
>-cpuflags="-march=$cpu"
>-
> if [ "$cpu" != "generic" ]; then
>-disable mips32r2
>-disable mips32r5
>-disable mips64r2
>-disable mips32r6
>-disable mips64r6
>-disable loongson2
>-disable loongson3
>+# DSP is disabled by deafult as they can't be detected at runtime
>+disable mipsdsp
>+disable mipsdspr2
>+
>+cpuflags="-march=$cpu"
>
> case $cpu in
>-24kc|24kf*|24kec|34kc|1004kc|24kef*|34kf*|1004kf*|74kc|74kf)
>+# General ISA levels
>+mips1|mips3)
>+disable msa
>+;;
>+mips32r2)
> enable mips32r2
>+;;
>+mips32r5)
>+enable mips32r5
>+;;
>+mips64r2|mips64r5)
>+enable mips64r2
>+;;
>+# Cores from MIPS(MTI)
>+24kc)
>+disable mipsfpu
>+;;
>+24kf*|24kec|34kc|74Kc|1004kc)
>+disable mmi
> disable msa
> ;;
>-p5600|i6400|p6600)
>-disable mipsdsp
>-disable mipsdspr2
>+24kef*|34kf*|1004kf*)
>+disable mmi
>+disable msa
>+enable mipsdsp
>+;;
>+p5600)
>+disable mmi
>+enable mips32r5
>+check_cflags "-mtune=p5600" && check_cflags "-msched-weight
>-mload-store-pairs
>-funroll-loops"
>+;;
>+i6400)
>+disable mmi
>+enable mips64r6
>+check_cflags "-mtune=i6400 -mabi=64" && check_cflags
>"-msched-weight
>-mload-store-pairs -funroll-loops" && check_ldflags "-mabi=64"
>+;;
>+p6600)
>+disable mmi
>+enable mips64r6
>+check_cflags "-mtune=p6600 -mabi=64" && check_cflags
>"-msched-weight
>-mload-store-pairs -funroll-loops" && check_ldflags "-mabi=64"
> ;;
>+# Cores from Loongson
> loongson*)
>-enable loongson2
>-enable loongson3
> enable local_aligned
> enable simd_align_16
> enable fast_64bit
>@@ -5029,8 +5077,6 @@ elif enabled mips; then
> enable fast_cmov
> enable fast_unaligned
> disable aligned_stack
>-disable mipsdsp
>-disable mipsdspr2
> # When gcc version less than 5.3.0, add
> -fno-expensive-optimizations flag.
> if [ $cc == gcc ]; then
> gcc_version=$(gcc -dumpversion)
>@@ -5042,62 +5088,26 @@ elif enabled mips; then
> fi
> case $cpu in
> loongson3*)
>+enable loongson3
>+
