Re: [flashrom] HP 8200
Hello Michael, What is your question about this log? Regards, Angel Pons Pons On Tue, Sep 18, 2018 at 9:14 AM, Michael Miller wrote: > [root@localhost ~]# flashrom -V --programmer internal > flashrom v1.0 on Linux 3.10.0-862.11.6.el7.x86_64 (x86_64) > flashrom is free software, get the source code at https://flashrom.org > > flashrom was built with libpci 3.5.1, GCC 4.8.5 20150623 (Red Hat 4.8.5-16), > little endian > Command line (3 args): flashrom -V --programmer internal > Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns). > Initializing internal programmer > No coreboot table found. > Using Internal DMI decoder. > DMI string chassis-type: "Mini Tower" > DMI string system-manufacturer: "Hewlett-Packard" > DMI string system-product-name: "HP Compaq 8200 Elite SFF PC" > DMI string system-version: "Not Specified" > DMI string baseboard-manufacturer: "Hewlett-Packard" > DMI string baseboard-product-name: "1495" > DMI string baseboard-version: "Not Specified" > W836xx enter config mode worked or we were already in config mode. W836xx > leave config mode had no effect. > Active config mode, unknown reg 0x20 ID: 1c. > Found chipset "Intel Q67" with PCI ID 8086:1c4e. > This chipset is marked as untested. If you are using an up-to-date version > of flashrom *and* were (not) able to successfully update your firmware with > it, > then please email a report to flashrom@flashrom.org including a verbose (-V) > log. > Thank you! > Enabling flash write... Root Complex Register Block address = 0xfed1c000 > GCS = 0xc25: BIOS Interface Lock-Down: enabled, Boot BIOS Straps: 0x3 (SPI) > Top Swap: not enabled > 0xfff8/0xffb8 FWH IDSEL: 0x0 > 0xfff0/0xffb0 FWH IDSEL: 0x0 > 0xffe8/0xffa8 FWH IDSEL: 0x1 > 0xffe0/0xffa0 FWH IDSEL: 0x1 > 0xffd8/0xff98 FWH IDSEL: 0x2 > 0xffd0/0xff90 FWH IDSEL: 0x2 > 0xffc8/0xff88 FWH IDSEL: 0x3 > 0xffc0/0xff80 FWH IDSEL: 0x3 > 0xff70/0xff30 FWH IDSEL: 0x4 > 0xff60/0xff20 FWH IDSEL: 0x5 > 0xff50/0xff10 FWH IDSEL: 0x6 > 0xff40/0xff00 FWH IDSEL: 0x7 > 0xfff8/0xffb8 FWH decode enabled > 0xfff0/0xffb0 FWH decode enabled > 0xffe8/0xffa8 FWH decode enabled > 0xffe0/0xffa0 FWH decode enabled > 0xffd8/0xff98 FWH decode enabled > 0xffd0/0xff90 FWH decode enabled > 0xffc8/0xff88 FWH decode enabled > 0xffc0/0xff80 FWH decode enabled > 0xff70/0xff30 FWH decode disabled > 0xff60/0xff20 FWH decode disabled > 0xff50/0xff10 FWH decode disabled > 0xff40/0xff00 FWH decode disabled > Maximum FWH chip size: 0x10 bytes > SPI Read Configuration: prefetching disabled, caching enabled, > BIOS_CNTL = 0x22: BIOS Lock Enable: enabled, BIOS Write Enable: disabled > Warning: BIOS region SMM protection is enabled! > Warning: Setting Bios Control at 0xdc from 0x22 to 0x01 failed. > New value is 0x22. > SPIBAR = 0x7fcb9274c000 + 0x3800 > 0x04: 0xe008 (HSFS) > HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=1 > Warning: SPI Configuration Lockdown activated. > Reading OPCODES... done > 0x06: 0x (HSFC) > HSFC: FGO=0, FCYCLE=0, FDBC=0, SME=0 > 0x50: 0x1a1b (FRAP) > BMWAG 0x00, BMRAG 0x00, BRWA 0x1a, BRRA 0x1b > 0x54: 0x FREG0: Warning: Flash Descriptor region > (0x-0x0fff) is read-only. > 0x58: 0x07ff0510 FREG1: BIOS region (0x0051-0x007f) is read-write. > 0x5C: 0x050f0003 FREG2: Warning: Management Engine region > (0x3000-0x0050) is locked. > 0x60: 0x00020001 FREG3: Gigabit Ethernet region (0x1000-0x2fff) is > read-write. > Not all flash regions are freely accessible by flashrom. This is most likely > due to an active ME. Please see https://flashrom.org/ME for details. > 0x74: 0x87ff07f0 PR0: Warning: 0x007f-0x007f is read-only. > Writes have been disabled for safety reasons. You can enforce write > support with the ich_spi_force programmer option, but you will most likely > harm your hardware! If you force flashrom you will get no support if > something breaks. On a few mainboards it is possible to enable write > access by setting a jumper (see its documentation or the board itself). > 0x90: 0x84 (SSFS) > SSFS: SCIP=0, FDONE=1, FCERR=0, AEL=0 > 0x91: 0xf94240 (SSFC) > SSFC: SCGO=0, ACS=0, SPOP=0, COP=4, DBC=2, SME=0, SCF=1 > 0x94: 0x0006 (PREOP) > 0x96: 0x043b (OPTYPE) > 0x98: 0x05200302 (OPMENU) > 0x9c: 0x019f (OPMENU+4) > 0xA0: 0x (BBAR) > 0xC4: 0x00802005 (LVSCC) > LVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=1 > 0xC8: 0x2005 (UVSCC) > UVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20 > 0xD0: 0x (FPB) > PROBLEMS, continuing anyway > The following protocols are supported: FWH, SPI. > Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 > 0x4017 > Probing for AMIC A25L10PT, 128 kB:
[flashrom] HP 8200
[root@localhost ~]# flashrom -V --programmer internal flashrom v1.0 on Linux 3.10.0-862.11.6.el7.x86_64 (x86_64) flashrom is free software, get the source code at https://flashrom.org flashrom was built with libpci 3.5.1, GCC 4.8.5 20150623 (Red Hat 4.8.5-16), little endian Command line (3 args): flashrom -V --programmer internal Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns). Initializing internal programmer No coreboot table found. Using Internal DMI decoder. DMI string chassis-type: "Mini Tower" DMI string system-manufacturer: "Hewlett-Packard" DMI string system-product-name: "HP Compaq 8200 Elite SFF PC" DMI string system-version: "Not Specified" DMI string baseboard-manufacturer: "Hewlett-Packard" DMI string baseboard-product-name: "1495" DMI string baseboard-version: "Not Specified" W836xx enter config mode worked or we were already in config mode. W836xx leave config mode had no effect. Active config mode, unknown reg 0x20 ID: 1c. Found chipset "Intel Q67" with PCI ID 8086:1c4e. This chipset is marked as untested. If you are using an up-to-date version of flashrom *and* were (not) able to successfully update your firmware with it, then please email a report to flashrom@flashrom.org including a verbose (-V) log. Thank you! Enabling flash write... Root Complex Register Block address = 0xfed1c000 GCS = 0xc25: BIOS Interface Lock-Down: enabled, Boot BIOS Straps: 0x3 (SPI) Top Swap: not enabled 0xfff8/0xffb8 FWH IDSEL: 0x0 0xfff0/0xffb0 FWH IDSEL: 0x0 0xffe8/0xffa8 FWH IDSEL: 0x1 0xffe0/0xffa0 FWH IDSEL: 0x1 0xffd8/0xff98 FWH IDSEL: 0x2 0xffd0/0xff90 FWH IDSEL: 0x2 0xffc8/0xff88 FWH IDSEL: 0x3 0xffc0/0xff80 FWH IDSEL: 0x3 0xff70/0xff30 FWH IDSEL: 0x4 0xff60/0xff20 FWH IDSEL: 0x5 0xff50/0xff10 FWH IDSEL: 0x6 0xff40/0xff00 FWH IDSEL: 0x7 0xfff8/0xffb8 FWH decode enabled 0xfff0/0xffb0 FWH decode enabled 0xffe8/0xffa8 FWH decode enabled 0xffe0/0xffa0 FWH decode enabled 0xffd8/0xff98 FWH decode enabled 0xffd0/0xff90 FWH decode enabled 0xffc8/0xff88 FWH decode enabled 0xffc0/0xff80 FWH decode enabled 0xff70/0xff30 FWH decode disabled 0xff60/0xff20 FWH decode disabled 0xff50/0xff10 FWH decode disabled 0xff40/0xff00 FWH decode disabled Maximum FWH chip size: 0x10 bytes SPI Read Configuration: prefetching disabled, caching enabled, BIOS_CNTL = 0x22: BIOS Lock Enable: enabled, BIOS Write Enable: disabled Warning: BIOS region SMM protection is enabled! Warning: Setting Bios Control at 0xdc from 0x22 to 0x01 failed. New value is 0x22. SPIBAR = 0x7fcb9274c000 + 0x3800 0x04: 0xe008 (HSFS) HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=1, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=1 Warning: SPI Configuration Lockdown activated. Reading OPCODES... done 0x06: 0x (HSFC) HSFC: FGO=0, FCYCLE=0, FDBC=0, SME=0 0x50: 0x1a1b (FRAP) BMWAG 0x00, BMRAG 0x00, BRWA 0x1a, BRRA 0x1b 0x54: 0x FREG0: Warning: Flash Descriptor region (0x-0x0fff) is read-only. 0x58: 0x07ff0510 FREG1: BIOS region (0x0051-0x007f) is read-write. 0x5C: 0x050f0003 FREG2: Warning: Management Engine region (0x3000-0x0050) is locked. 0x60: 0x00020001 FREG3: Gigabit Ethernet region (0x1000-0x2fff) is read-write. Not all flash regions are freely accessible by flashrom. This is most likely due to an active ME. Please see https://flashrom.org/ME for details. 0x74: 0x87ff07f0 PR0: Warning: 0x007f-0x007f is read-only. Writes have been disabled for safety reasons. You can enforce write support with the ich_spi_force programmer option, but you will most likely harm your hardware! If you force flashrom you will get no support if something breaks. On a few mainboards it is possible to enable write access by setting a jumper (see its documentation or the board itself). 0x90: 0x84 (SSFS) SSFS: SCIP=0, FDONE=1, FCERR=0, AEL=0 0x91: 0xf94240 (SSFC) SSFC: SCGO=0, ACS=0, SPOP=0, COP=4, DBC=2, SME=0, SCF=1 0x94: 0x0006 (PREOP) 0x96: 0x043b (OPTYPE) 0x98: 0x05200302 (OPMENU) 0x9c: 0x019f (OPMENU+4) 0xA0: 0x (BBAR) 0xC4: 0x00802005 (LVSCC) LVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=1 0xC8: 0x2005 (UVSCC) UVSCC: BES=0x1, WG=1, WSR=0, WEWS=0, EO=0x20 0xD0: 0x (FPB) PROBLEMS, continuing anyway The following protocols are supported: FWH, SPI. Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017 Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4017
