Re: [fpc-devel] Some thoughts on multi-line string support, and a possible syntax that I think is perfectly clean and Pascal-ish.

2019-07-18 Thread Ben Grasset
On Sat, Jul 6, 2019 at 10:03 AM Ben Grasset  wrote:

> On Sat, Jul 6, 2019 at 2:15 AM Tony via fpc-devel <
> fpc-devel@lists.freepascal.org> wrote:
>
>> On Thu, 4 Jul 2019 12:00:07 +0200
>> Marco van de Voort  wrote:
>>
>> > In conclusion:  it is a solution in search of a problem, with bad
>> > behaviour in errorhandling (when unbalanced the compiler errors on
>> > perfectly fine code in the wrong place after whatever ' closes the
>> > unbalanced ) on top of it.
>> >
>> > This is why the feature goes against the grain of Pascal IMHO.
>>
>> Well said Marco!  I have been reading this mailing list for some time
>> and have been disturbed recently-ish by how often suggestions come up
>> for "my pet feature from another language" or "a cool idea I just
>> had" (I am probably doing an injustice to some of the suggestions, but
>> often they feel deeply un-Pascal-ish - I can't define it but I know it
>> when I see it).  In these circumstances, a healthy scepticism and
>> conservatism among the development team is a good thing.
>>
>
> I think you are certainly doing injustice to a lot of things. Furthermore,
> you realize it is possible, to just, you know, make the compiler give
> better errors when necessary / desired?
>
> I intend to add something like this for unterminated multi-line strings,
> most likely once I'm done writing my tests and have submitted a formal
> patch on the bugtracker.
>

I've now actually done this, for the record:

https://bugs.freepascal.org/view.php?id=35827#c117278
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Re: [fpc-devel] Registers reloading

2019-07-18 Thread J. Gareth Moreton

Hi Marco,

That is actually one thing I've been researching myself. Currently the 
peephole optimiser doesn't have the facilities to detect if a register 
already contains a value that is being assigned to it, something I call 
the "Deep Optimizer" but is otherwise just basic data flow analysis.  I 
have been overhauling the peephole optimiser for i386 and x86-64 to be 
more efficient with fewer passes, although it's taking time to get it 
into a form that the administrators are happy to merge into the trunk, 
since it is quite a major change.


Yours sincerely,

J. Gareth "Kit" Moreton


On 18/07/2019 14:33, Marco Borsari via fpc-devel wrote:

Hi all,
does the compiler have the optimization to avoid reloading into
a register of an address (or a value) whether it is already
present?
I ask this because of this code fragment compiled with the -O4
option:

.Lj380:
# Register eax allocated
# [726] T := T-1;
subw    $1,2(%ebx)
# Register ax released
# Register edx allocated
# [727] H6 := @STK^[T];
movl    U_$GLOBALS_$$_STK,%edx
# Register eax allocated
movzwl    2(%ebx),%eax
leal    -8(%edx,%eax,8),%eax
# Register edx released
movl    %eax,-256(%ebp)
# [728] H7 := H6;
movl    %eax,-260(%ebp) <-(1)
# Register eax released
# [729] Inc(H7, 1);
addl    $8,-260(%ebp)
# Register eax allocated
# [730] H6^.I := H6^.I+H7^.I;
movl    -256(%ebp),%eax <-(2)
# Register ecx allocated
movswl    4(%eax),%ecx
movl    -260(%ebp),%eax
# Register edx allocated
movswl    4(%eax),%edx
leal    (%ecx,%edx),%eax
# Register ecx released
movw    %ax,%dx
movl    -256(%ebp),%eax <-(3)
movw    %dx,4(%eax)
# Register eax,dx released

In (1) the compiler assumes that eax has the correct
address but in (2) does not omit to reload it (eax released
too soon).
Both seem to be of the same level of the analysis complexity,
more deeper should be takes into account of (3) with the use of
a supplementar registers as si or di (they are used in other parts of 
the code).

Thank you for any response, Marco Borsari
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[fpc-devel] Registers reloading

2019-07-18 Thread Marco Borsari via fpc-devel

Hi all,
does the compiler have the optimization to avoid reloading into
a register of an address (or a value) whether it is already
present?
I ask this because of this code fragment compiled with the -O4
option:

.Lj380:
# Register eax allocated
# [726] T := T-1;
subw$1,2(%ebx)
# Register ax released
# Register edx allocated
# [727] H6 := @STK^[T];
movlU_$GLOBALS_$$_STK,%edx
# Register eax allocated
movzwl  2(%ebx),%eax
leal-8(%edx,%eax,8),%eax
# Register edx released
movl%eax,-256(%ebp)
# [728] H7 := H6;
movl%eax,-260(%ebp) <-(1)
# Register eax released
# [729] Inc(H7, 1);
addl$8,-260(%ebp)
# Register eax allocated
# [730] H6^.I := H6^.I+H7^.I;
movl-256(%ebp),%eax <-(2)
# Register ecx allocated
movswl  4(%eax),%ecx
movl-260(%ebp),%eax
# Register edx allocated
movswl  4(%eax),%edx
leal(%ecx,%edx),%eax
# Register ecx released
movw%ax,%dx
movl-256(%ebp),%eax <-(3)
movw%dx,4(%eax)
# Register eax,dx released

In (1) the compiler assumes that eax has the correct
address but in (2) does not omit to reload it (eax released
too soon).
Both seem to be of the same level of the analysis complexity,
more deeper should be takes into account of (3) with the use of
a supplementar registers as si or di (they are used in other parts of 
the code).

Thank you for any response, Marco Borsari
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