Hi everyone,
This patch introduces open-loop TX power control for the AR9280 (Merlin) and
tidies up some of the code duplication between the AR5416 and AR9285 power
control code.
If you're using an AR9280 then please, -please- test this out and get back
to me. I'd also appreciate EEPROM dumps (via ath_prom_read) so I can see
what your card has programmed in it. Doubly so if you're using an AR9280 in
5ghz mode.
If you're using a non-AR9280 chip (ie, AR5416, AR9160, AR9285), then i'd
also appreciate further testing. I'd like to make sure I haven't introduced
regressions here!
Although legacy rate TX'ing seems to work with this patch, if your AR9280
uses open-loop TX power control then the output from your card is very
likely going to be quite distorted. It's bad for you, bad for your card and
bad for your surroundings.
Besides some further code restructuring (which won't change functionality),
I'm going to take a break from making any further changes that aren't
bugfixes until the AR9285 related bugs Ian was seeing are found/fixed, along
with any and all regressions people report with the driver. This is your
opportunity to get me to find/fix performance, stability and other issues
that have crept up, so it's in the best interests of everyone (including
you!) to test this stuff as thoroughly as possible before 9.0-RELEASE comes
out.
Thanks!
Adrian
On 8 March 2011 14:59, Adrian Chadd adr...@freebsd.org wrote:
Author: adrian
Date: Tue Mar 8 06:59:59 2011
New Revision: 219393
URL: http://svn.freebsd.org/changeset/base/219393
Log:
Implement open-loop TX power control (OLC) for Merlin (AR9280) and
generally tidy up the TX power programming code.
Enforce that the TX power offset for Merlin is -5 dBm, rather than
any other value programmable in the EEPROM. This requires some
further code to be ported over from ath9k, so until that is done
and tested, fail to attach NICs whose TX power offset isn't -5
dBm.
This improves both legacy and HT transmission on my merlin board.
It allows for stable MCS TX up to MCS15.
Specifics:
* Refactor out a bunch of the TX power calibration code -
setting/obtaining the power detector / gain boundaries,
programming the PDADC
* Take the -5 dBm TX power offset into account on Merlin -
0 in the per-rate TX power register means -5 dBm, not
0 dBm
* When doing OLC
* Enforce min (0) and max (AR5416_MAX_RATE_POWER) when fiddling
with the TX power, to avoid the TX power values from wrapping
when low.
* Implement the 1 dBm cck power offset when doing OLC
* Implement temperature compensation for 2.4ghz mode when doing OLC
* Implement an AR9280 specific TX power calibration routine which
includes the OLC twiddles, leaving the earlier chipset path
(AR5416, AR9160) alone
Whilst here, use these refactored routines for the AR9285 TX power
calibration/programming code and enforce correct overflow/underflow
handling when fiddling with TX power values.
Obtained from:linux ath9k
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