I added a line of code to get some info about whats going on.
DRM_INFO(Loading radeon_cp_microcode, not the R200\n);
Do I need do a build world to install this? I remeber the radeon
modules used to be in a folder where you could just type make install to
install the them by their selves if you updated/hacked them. I don't
see a makefile in the folder so this is why I ask, and make says no
target to make.
jason wrote:
I have had problems with getting dri working in the past, and still
do, so I started going through code for my video card and related
stuff. I found that tracking current caused the line about loading
the r200 microcode for my radeon driver to go and come in my dmesg.
Right now I have 5.3beta3, I plan to stay with 5.3 release for a
while, and the line is missing. I don't beleive I have ever been able
to run with dri loaded on my nforce 2 board and a radeon 8500. But
now I can use agp instead of pci mode and run xorg. If I load dri
with agp my system now gets to the wm stage and my monitor's osd tells
me it has switched to [EMAIL PROTECTED] I get a black screen with some
colors at the top and the mouse stays functionail but my keyboard
seems to die. I check very thoroughly and there was no Xorg.0.log
made for the run when dri was loaded. I only checked for the long
once and crashed it by loading dri twice. I'll try to get a log if it
is needed. The power button is set to shutdown with acpi on, it works
half the time. Maybe this was responcable for me not finding a long
of the crash?
My question is could this be related to the wrong microcode being
loaded? I know I have a r200, its even in the Xorg.0.log and pciconf
that I have a r200. Is there anyone that has experince on this that
could give me a hint? Should I make a pr for this?
Lines 672-706 from /usr/src/sys/dev/drm/radeon_cp.c
/*
* CP control, initialization
*/
/* Load the microcode for the CP */
static void radeon_cp_load_microcode( drm_radeon_private_t *dev_priv )
{
int i;
DRM_DEBUG( \n );
radeon_do_wait_for_idle( dev_priv );
RADEON_WRITE( RADEON_CP_ME_RAM_ADDR, 0 );
if (dev_priv-is_r200)
{
DRM_INFO(Loading R200 Microcode\n);
for ( i = 0 ; i 256 ; i++ )
{
RADEON_WRITE( RADEON_CP_ME_RAM_DATAH,
R200_cp_microcode[i][1] );
RADEON_WRITE( RADEON_CP_ME_RAM_DATAL,
R200_cp_microcode[i][0] );
}
}
else
{
for ( i = 0 ; i 256 ; i++ ) {
RADEON_WRITE( RADEON_CP_ME_RAM_DATAH,
radeon_cp_microcode[i][1] );
RADEON_WRITE( RADEON_CP_ME_RAM_DATAL,
radeon_cp_microcode[i][0] );
}
}
}
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