Re: patch for topology detection of Intel CPUs

2010-09-07 Thread Andriy Gapon
on 06/09/2010 20:12 Olivier Smedts said the following:
 Here is mine : no difference before and after the patch :

Thanks!

[snip]

 The only thing I noticed is this, after the patch :
 ada1 at ahcich1 bus 0 scbus1 target 0 lun 0
 ada1: SAMSUNG HD161HJ JF100-19 ATA-7 SATA 2.x device
 ada1: 300.000MB/s transfers (SATA 2.x, UDMA6, PIO 8192bytes)
 ada1: Command Queueing enabled
 ada1: 152627MB (312581808 512 byte sectors: 16H 63S/T 16383C)
 SMP: AP CPU #1 Launched!cd0 at ahcich2 bus 0 scbus2 target 0 lun 0
 
 cd0: LITE-ON DVDRW LH-20A1S 9L08 Removable CD-ROM SCSI-0 device
 cd0: 150.000MB/s transfers (SATA 1.x, UDMA5, ATAPI 12bytes, PIO 8192bytes)
 cd0: Attempt to query device size failed: NOT READY, Medium not present
 SMP: AP CPU #3 Launched!
 SMP: AP CPU #2 Launched!
 Trying to mount root from zfs:tank/freebsd
 
 
 Before the patch, all the SMP: AP CPU #X Launched! were correctly
 displayed, with carriage returns. Yes, I use options
 PRINTF_BUFR_SIZE=128. And I don't know if that's related to the
 patch.

No, it's not related, it's a probabilistic thing.
Those Launched! messages are printed from threads running on freshly started
APs and thus are executed truly parallel to BSP.

BTW, is the above snippet from /var/log/messages or from actual console (e.g.
ttyv0)?  If it's from message, then could you please check how it looks on the
console?


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Re: patch for topology detection of Intel CPUs

2010-09-07 Thread Andriy Gapon
on 06/09/2010 21:53 Chip Camden said the following:
 FreeBSD/SMP: Multiprocessor System Detected: 4 CPUs

Thanks

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Re: patch for topology detection of Intel CPUs

2010-09-06 Thread Andriy Gapon
on 29/08/2010 12:25 Andriy Gapon said the following:
 The below patch is against sources in FreeBSD tree, it should be applied
 either to sys/amd64/amd64/mp_machdep.c or sys/i386/i386/mp_machdep.c depending
 on the desired architecture:
 http://people.freebsd.org/~avg/intel-cpu-topo.diff

I see that I am not getting as many testers as I expected, so I am going to 
commit
the patch.

You still have a short while to either objectively object to the patch or to
voluntary test it :-)
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Re: patch for topology detection of Intel CPUs

2010-09-06 Thread Jeremy Chadwick
On Mon, Sep 06, 2010 at 03:17:42PM +0300, Andriy Gapon wrote:
 on 29/08/2010 12:25 Andriy Gapon said the following:
  The below patch is against sources in FreeBSD tree, it should be applied
  either to sys/amd64/amd64/mp_machdep.c or sys/i386/i386/mp_machdep.c 
  depending
  on the desired architecture:
  http://people.freebsd.org/~avg/intel-cpu-topo.diff
 
 I see that I am not getting as many testers as I expected, so I am going to 
 commit
 the patch.
 
 You still have a short while to either objectively object to the patch or to
 voluntary test it :-)

I would gladly assist in testing this, except there doesn't appear to be
an authoritative statement that it will apply to RELENG_8; when I see
WIP, I assume -CURRENT/HEAD only.

Let me know, since all the systems I have are Intel multi-core.

-- 
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| Parodius Networking   http://www.parodius.com/ |
| UNIX Systems Administrator  Mountain View, CA, USA |
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Re: patch for topology detection of Intel CPUs

2010-09-06 Thread Andriy Gapon
on 06/09/2010 15:23 Jeremy Chadwick said the following:
 On Mon, Sep 06, 2010 at 03:17:42PM +0300, Andriy Gapon wrote:
 on 29/08/2010 12:25 Andriy Gapon said the following:
 The below patch is against sources in FreeBSD tree, it should be applied
 either to sys/amd64/amd64/mp_machdep.c or sys/i386/i386/mp_machdep.c 
 depending
 on the desired architecture:
 http://people.freebsd.org/~avg/intel-cpu-topo.diff

 I see that I am not getting as many testers as I expected, so I am going to 
 commit
 the patch.

 You still have a short while to either objectively object to the patch or to
 voluntary test it :-)
 
 I would gladly assist in testing this, except there doesn't appear to be
 an authoritative statement that it will apply to RELENG_8; when I see
 WIP, I assume -CURRENT/HEAD only.

patch -C is much better than any statement :)

 Let me know, since all the systems I have are Intel multi-core.

Yes, the patch should be applicable to stable/8 without any issues.

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Re: patch for topology detection of Intel CPUs

2010-09-06 Thread Jeremy Chadwick
On Mon, Sep 06, 2010 at 03:56:01PM +0300, Andriy Gapon wrote:
 on 06/09/2010 15:23 Jeremy Chadwick said the following:
  On Mon, Sep 06, 2010 at 03:17:42PM +0300, Andriy Gapon wrote:
  on 29/08/2010 12:25 Andriy Gapon said the following:
  The below patch is against sources in FreeBSD tree, it should be applied
  either to sys/amd64/amd64/mp_machdep.c or sys/i386/i386/mp_machdep.c 
  depending
  on the desired architecture:
  http://people.freebsd.org/~avg/intel-cpu-topo.diff
 
  I see that I am not getting as many testers as I expected, so I am going 
  to commit
  the patch.
 
  You still have a short while to either objectively object to the patch or 
  to
  voluntary test it :-)
  
  I would gladly assist in testing this, except there doesn't appear to be
  an authoritative statement that it will apply to RELENG_8; when I see
  WIP, I assume -CURRENT/HEAD only.
 
 patch -C is much better than any statement :)
 
  Let me know, since all the systems I have are Intel multi-core.
 
 Yes, the patch should be applicable to stable/8 without any issues.

Great, thanks!  I'll be testing this out on two separate systems, both
RELENG_8:

- Supermicro X7SBA + Intel C2D E8400 (stepping 10)
- Supermicro X7SBL-LN2 + Intel C2D E6600 (stepping 6)

I'll make sure to provide what the topology looks like before and after.
Is CPU-relevant dmesg output sufficient?

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| Parodius Networking   http://www.parodius.com/ |
| UNIX Systems Administrator  Mountain View, CA, USA |
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Re: patch for topology detection of Intel CPUs

2010-09-06 Thread Andriy Gapon
on 06/09/2010 16:12 Jeremy Chadwick said the following:
 Great, thanks!  I'll be testing this out on two separate systems, both
 RELENG_8:
 
 - Supermicro X7SBA + Intel C2D E8400 (stepping 10)
 - Supermicro X7SBL-LN2 + Intel C2D E6600 (stepping 6)
 
 I'll make sure to provide what the topology looks like before and after.
 Is CPU-relevant dmesg output sufficient?

If you mean something like the below, then yes.  Thanks!

CPU: Intel(R) Core(TM)2 Duo CPU E7300  @ 2.66GHz (2653.35-MHz K8-class CPU)
  Origin = GenuineIntel  Id = 0x10676  Family = 6  Model = 17  Stepping = 6

Features=0xbfebfbffFPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CLFLUSH,DTS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE
  Features2=0x8e39dSSE3,DTES64,MON,DS_CPL,EST,TM2,SSSE3,CX16,xTPR,PDCM,SSE4.1
  AMD Features=0x20100800SYSCALL,NX,LM
  AMD Features2=0x1LAHF
  TSC: P-state invariant
[snip]
FreeBSD/SMP: Multiprocessor System Detected: 2 CPUs
FreeBSD/SMP: 1 package(s) x 2 core(s)
 cpu0 (BSP): APIC ID:  0
 cpu1 (AP): APIC ID:  1


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Re: patch for topology detection of Intel CPUs

2010-09-06 Thread Chip Camden
Quoth Andriy Gapon on Monday, 06 September 2010:
 on 06/09/2010 15:23 Jeremy Chadwick said the following:
  On Mon, Sep 06, 2010 at 03:17:42PM +0300, Andriy Gapon wrote:
  on 29/08/2010 12:25 Andriy Gapon said the following:
  The below patch is against sources in FreeBSD tree, it should be applied
  either to sys/amd64/amd64/mp_machdep.c or sys/i386/i386/mp_machdep.c 
  depending
  on the desired architecture:
  http://people.freebsd.org/~avg/intel-cpu-topo.diff
 
  I see that I am not getting as many testers as I expected, so I am going 
  to commit
  the patch.
 
  You still have a short while to either objectively object to the patch or 
  to
  voluntary test it :-)
  
  I would gladly assist in testing this, except there doesn't appear to be
  an authoritative statement that it will apply to RELENG_8; when I see
  WIP, I assume -CURRENT/HEAD only.
 
 patch -C is much better than any statement :)
 
  Let me know, since all the systems I have are Intel multi-core.
 
 Yes, the patch should be applicable to stable/8 without any issues.
 
 -- 
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OK, I'll try it out too then.
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http://camdensoftware.com | http://chipstips.com| http://chipsquips.com


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Re: patch for topology detection of Intel CPUs

2010-09-06 Thread Jeremy Chadwick
On Mon, Sep 06, 2010 at 04:28:02PM +0300, Andriy Gapon wrote:
 on 06/09/2010 16:12 Jeremy Chadwick said the following:
  Great, thanks!  I'll be testing this out on two separate systems, both
  RELENG_8:
  
  - Supermicro X7SBA + Intel C2D E8400 (stepping 10)
  - Supermicro X7SBL-LN2 + Intel C2D E6600 (stepping 6)
  
  I'll make sure to provide what the topology looks like before and after.
  Is CPU-relevant dmesg output sufficient?
 
 If you mean something like the below, then yes.  Thanks!
 [...]

All done.  Good news (I think): there's no difference in the CPU-related
topology on either system with your patch, aside from kernel build date.
The topologies are still detected correctly.  In case you want them:

Supermicro X7SBA
Intel C2D E8400 (stepping 10)
===
Copyright (c) 1992-2010 The FreeBSD Project.
Copyright (c) 1979, 1980, 1983, 1986, 1988, 1989, 1991, 1992, 1993, 1994
The Regents of the University of California. All rights reserved.
FreeBSD is a registered trademark of The FreeBSD Foundation.
FreeBSD 8.1-STABLE #0: Mon Sep  6 09:06:52 PDT 2010
r...@icarus.home.lan:/usr/obj/usr/src/sys/X7SBA_RELENG_8_amd64 amd64
Timecounter i8254 frequency 1193182 Hz quality 0
CPU: Intel(R) Core(TM)2 Duo CPU E8400  @ 3.00GHz (2992.52-MHz K8-class CPU)
  Origin = GenuineIntel  Id = 0x1067a  Family = 6  Model = 17  Stepping = 10
  
Features=0xbfebfbffFPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CLFLUSH,DTS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE
  
Features2=0x408e3fdSSE3,DTES64,MON,DS_CPL,VMX,SMX,EST,TM2,SSSE3,CX16,xTPR,PDCM,SSE4.1,XSAVE
  AMD Features=0x20100800SYSCALL,NX,LM
  AMD Features2=0x1LAHF
  TSC: P-state invariant
real memory  = 4294967296 (4096 MB)
avail memory = 4112097280 (3921 MB)
ACPI APIC Table: PTLTD  APIC  
FreeBSD/SMP: Multiprocessor System Detected: 2 CPUs
FreeBSD/SMP: 1 package(s) x 2 core(s)
 cpu0 (BSP): APIC ID:  0
 cpu1 (AP): APIC ID:  1
ioapic0 Version 2.0 irqs 0-23 on motherboard
ioapic1 Version 2.0 irqs 24-47 on motherboard
kbd1 at kbdmux0
ichwd module loaded
acpi0: PTLTDXSDT on motherboard
acpi0: [ITHREAD]
acpi0: Power Button (fixed)
Timecounter ACPI-fast frequency 3579545 Hz quality 1000
acpi_timer0: 24-bit timer at 3.579545MHz port 0x1008-0x100b on acpi0
cpu0: ACPI CPU on acpi0
cpu1: ACPI CPU on acpi0



Supermicro X7SBL-LN2
Intel C2D E6600 (stepping 6)
==
Copyright (c) 1992-2010 The FreeBSD Project.
Copyright (c) 1979, 1980, 1983, 1986, 1988, 1989, 1991, 1992, 1993, 1994
The Regents of the University of California. All rights reserved.
FreeBSD is a registered trademark of The FreeBSD Foundation.
FreeBSD 8.1-STABLE #1: Mon Sep  6 07:59:49 PDT 2010
r...@gujoja.home.lan:/usr/obj/usr/src/sys/X7SBL_RELENG_8_amd64 amd64
Timecounter i8254 frequency 1193182 Hz quality 0
CPU: Intel(R) Core(TM)2 CPU  6600  @ 2.40GHz (2394.01-MHz K8-class CPU)
  Origin = GenuineIntel  Id = 0x6f6  Family = 6  Model = f  Stepping = 6
  
Features=0xbfebfbffFPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CLFLUSH,DTS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE
  Features2=0xe3bdSSE3,DTES64,MON,DS_CPL,VMX,EST,TM2,SSSE3,CX16,xTPR,PDCM
  AMD Features=0x20100800SYSCALL,NX,LM
  AMD Features2=0x1LAHF
  TSC: P-state invariant
real memory  = 8589934592 (8192 MB)
avail memory = 8261648384 (7878 MB)
ACPI APIC Table: PTLTD  APIC  
FreeBSD/SMP: Multiprocessor System Detected: 2 CPUs
FreeBSD/SMP: 1 package(s) x 2 core(s)
 cpu0 (BSP): APIC ID:  0
 cpu1 (AP): APIC ID:  1
ioapic0 Version 2.0 irqs 0-23 on motherboard
kbd1 at kbdmux0
ichwd module loaded
acpi0: PTLTDXSDT on motherboard
acpi0: [ITHREAD]
acpi0: Power Button (fixed)
Timecounter ACPI-fast frequency 3579545 Hz quality 1000
acpi_timer0: 24-bit timer at 3.579545MHz port 0x1008-0x100b on acpi0
cpu0: ACPI CPU on acpi0
cpu1: ACPI CPU on acpi0


All other systems I have are C2D and C2Q-based, but I can't easily test
on those given their production roles.  If there's a particular Intel
processor family/model you're interested in, let me know and I can dig
around to see if I have access to one.

-- 
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| Parodius Networking   http://www.parodius.com/ |
| UNIX Systems Administrator  Mountain View, CA, USA |
| Making life hard for others since 1977.  PGP: 4BD6C0CB |

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Re: patch for topology detection of Intel CPUs

2010-09-06 Thread Andriy Gapon
on 06/09/2010 19:22 Jeremy Chadwick said the following:
 On Mon, Sep 06, 2010 at 04:28:02PM +0300, Andriy Gapon wrote:
 on 06/09/2010 16:12 Jeremy Chadwick said the following:
 Great, thanks!  I'll be testing this out on two separate systems, both
 RELENG_8:

 - Supermicro X7SBA + Intel C2D E8400 (stepping 10)
 - Supermicro X7SBL-LN2 + Intel C2D E6600 (stepping 6)

 I'll make sure to provide what the topology looks like before and after.
 Is CPU-relevant dmesg output sufficient?

 If you mean something like the below, then yes.  Thanks!
 [...]
 
 All done.  Good news (I think): there's no difference in the CPU-related
 topology on either system with your patch, aside from kernel build date.
 The topologies are still detected correctly.  In case you want them:
 

Thanks a lot for the test!

[test results snipped]

 All other systems I have are C2D and C2Q-based, but I can't easily test
 on those given their production roles.  If there's a particular Intel
 processor family/model you're interested in, let me know and I can dig
 around to see if I have access to one.

No particular models in mind.
If you have systems with more complex topologies, like multiple physical 
packages
or HTT enabled, I will be interested in seeing test results for those.
Thanks again.
-- 
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Re: patch for topology detection of Intel CPUs

2010-09-06 Thread Olivier Smedts
2010/9/6 Andriy Gapon a...@freebsd.org:
 on 06/09/2010 19:22 Jeremy Chadwick said the following:
 On Mon, Sep 06, 2010 at 04:28:02PM +0300, Andriy Gapon wrote:
 on 06/09/2010 16:12 Jeremy Chadwick said the following:
 Great, thanks!  I'll be testing this out on two separate systems, both
 RELENG_8:

 - Supermicro X7SBA     + Intel C2D E8400 (stepping 10)
 - Supermicro X7SBL-LN2 + Intel C2D E6600 (stepping 6)

 I'll make sure to provide what the topology looks like before and after.
 Is CPU-relevant dmesg output sufficient?

 If you mean something like the below, then yes.  Thanks!
 [...]

 All done.  Good news (I think): there's no difference in the CPU-related
 topology on either system with your patch, aside from kernel build date.
 The topologies are still detected correctly.  In case you want them:


 Thanks a lot for the test!

Here is mine : no difference before and after the patch :
FreeBSD 8.1-STABLE #0 r212258M: Mon Sep  6 18:36:00 CEST 2010
r...@q.gid0.org:/usr/obj/usr/src/sys/QUAD amd64
Timecounter i8254 frequency 1193182 Hz quality 0
CPU: Intel(R) Core(TM)2 Quad  CPU   Q9450  @ 2.66GHz (2999.87-MHz K8-class CPU)
  Origin = GenuineIntel  Id = 0x10677  Family = 6  Model = 17  Stepping = 7
  
Features=0xbfebfbffFPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CLFLUSH,DTS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE
  
Features2=0x8e3fdSSE3,DTES64,MON,DS_CPL,VMX,SMX,EST,TM2,SSSE3,CX16,xTPR,PDCM,SSE4.1
  AMD Features=0x20100800SYSCALL,NX,LM
  AMD Features2=0x1LAHF
  TSC: P-state invariant
real memory  = 2147483648 (2048 MB)
avail memory = 2029350912 (1935 MB)
ACPI APIC Table: A_M_I_ OEMAPIC 
FreeBSD/SMP: Multiprocessor System Detected: 4 CPUs
FreeBSD/SMP: 1 package(s) x 4 core(s)
 cpu0 (BSP): APIC ID:  0
 cpu1 (AP): APIC ID:  1
 cpu2 (AP): APIC ID:  2
 cpu3 (AP): APIC ID:  3


The only thing I noticed is this, after the patch :
ada1 at ahcich1 bus 0 scbus1 target 0 lun 0
ada1: SAMSUNG HD161HJ JF100-19 ATA-7 SATA 2.x device
ada1: 300.000MB/s transfers (SATA 2.x, UDMA6, PIO 8192bytes)
ada1: Command Queueing enabled
ada1: 152627MB (312581808 512 byte sectors: 16H 63S/T 16383C)
SMP: AP CPU #1 Launched!cd0 at ahcich2 bus 0 scbus2 target 0 lun 0

cd0: LITE-ON DVDRW LH-20A1S 9L08 Removable CD-ROM SCSI-0 device
cd0: 150.000MB/s transfers (SATA 1.x, UDMA5, ATAPI 12bytes, PIO 8192bytes)
cd0: Attempt to query device size failed: NOT READY, Medium not present
SMP: AP CPU #3 Launched!
SMP: AP CPU #2 Launched!
Trying to mount root from zfs:tank/freebsd


Before the patch, all the SMP: AP CPU #X Launched! were correctly
displayed, with carriage returns. Yes, I use options
PRINTF_BUFR_SIZE=128. And I don't know if that's related to the
patch.

Cheers,
Olivier


 [test results snipped]

 All other systems I have are C2D and C2Q-based, but I can't easily test
 on those given their production roles.  If there's a particular Intel
 processor family/model you're interested in, let me know and I can dig
 around to see if I have access to one.

 No particular models in mind.
 If you have systems with more complex topologies, like multiple physical 
 packages
 or HTT enabled, I will be interested in seeing test results for those.
 Thanks again.
 --
 Andriy Gapon
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www: http://www.gid0.org    - against proprietary attachments / \

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  ceux qui comprennent le binaire,
  et ceux qui ne le comprennent pas.
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Re: patch for topology detection of Intel CPUs

2010-09-06 Thread Chip Camden
Quoth Chip Camden on Monday, 06 September 2010:
 
 OK, I'll try it out too then.

Here are the only differences before/after the patch on my system:

5c6
 FreeBSD 8.1-STABLE #50: Sun Sep  5 13:08:14 PDT 2010
---
 FreeBSD 8.1-STABLE #51: Mon Sep  6 09:10:35 PDT 2010
8c9
 CPU: Intel(R) Core(TM) i3 CPU   M 350  @ 2.27GHz (2261.01-MHz K8-class 
CPU)
---
 CPU: Intel(R) Core(TM) i3 CPU   M 350  @ 2.27GHz (2261.02-MHz K8-class 
 CPU)
125c126
 vboxdrv: fAsync=0 offMin=0x1b0 offMax=0x438
---
 vboxdrv: fAsync=0 offMin=0x1b8 offMax=0x3e4
140d140
 SMP: AP CPU #2 Launched!
141a142
 SMP: AP CPU #2 Launched!

I don't see what that last one is.  Here's the complete new topology:

CPU: Intel(R) Core(TM) i3 CPU   M 350  @ 2.27GHz (2261.02-MHz K8-class CPU)
  Origin = GenuineIntel  Id = 0x20652  Family = 6  Model = 25  Stepping = 2
  
Features=0xbfebfbffFPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CLFLUSH,DTS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE
  
Features2=0x98e3bdSSE3,DTES64,MON,DS_CPL,VMX,EST,TM2,SSSE3,CX16,xTPR,PDCM,SSE4.1,SSE4.2,POPCNT
  AMD Features=0x28100800SYSCALL,NX,RDTSCP,LM
  AMD Features2=0x1LAHF
  TSC: P-state invariant
real memory  = 4294967296 (4096 MB)
avail memory = 3886858240 (3706 MB)
ACPI APIC Table: _ASUS_ Notebook
FreeBSD/SMP: Multiprocessor System Detected: 4 CPUs
FreeBSD/SMP: 1 package(s) x 2 core(s) x 2 SMT threads
 cpu0 (BSP): APIC ID:  0
 cpu1 (AP): APIC ID:  1
 cpu2 (AP): APIC ID:  4
 cpu3 (AP): APIC ID:  5
ACPI Warning: 32/64X FACS address mismatch in FADT - 
0xBADB7F40/0xBADD1D40, using 32 (20100331/tbfadt-586)
ioapic0 Version 2.0 irqs 0-23 on motherboard

I was getting that ACPI warning before, but I have no idea what it means.

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patch for topology detection of Intel CPUs

2010-08-29 Thread Andriy Gapon

[Reposted from stable@; edited]

The below patch is against sources in FreeBSD tree, it should be applied
either to sys/amd64/amd64/mp_machdep.c or sys/i386/i386/mp_machdep.c depending
on the desired architecture:
http://people.freebsd.org/~avg/intel-cpu-topo.diff

The patch is substantially based on the Junk-uk's patch, but with some changes
and additions:
- topo_prob_0x4() is rewritten so that it does APIC ID matching against masks
as described in the Intel article.  The code still heavily depends on the
assumption of the uniform topology, it discovers number of cores in BSP package
and number of threads in BSP core and extrapolates that to global topology.
The difference with current code and Junk-uk's patch is that actual APIC ID
matching is done as opposed to deriving counts purely from max. values.

- topo_prob_0x4() is invoked for 1 = cpu_high  4 case as well as for 4 =
cpu_high  11 case as done in the current code, but unlike Junk-uk's patch.  The
code should be able to properly handle that class of CPUs and either detect
hyperthreading topology or fallback to one processor per package topology.

- added a few comments that describe uniformity assumption, plus couple other
useful things.

- changed final fallback code, so that each logical CPU is considered to be in
its own physical package as opposed to current code placing all logical CPUs as
cores of a single package.

The rest is Junk-uk's work.

Concerns:
- about my code: ilog2_round_pow2 name is ugly; looking for suggestions on a
better name or re-arranging/writing that code, so that the function is not 
needed.
- about current code: logical_cpus variable (don't confuse with cpu_logical)
doesn't seem to be consistently used; e.g. it is not set at all by
topo_probo_0xb(); also, the method of using it for setting logical_cpus_mask
doesn't seem to be reliable - BSP may be missed.

Reviews, comments and test reports are very welcome!
Please test the patch if you have any problems with how CPU topology is reported
by the current code.  Please test even if everything is OK, to avoid 
regressions.

Thanks!
-- 
Andriy Gapon

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