[Bug c/93537] gcc 9.2 takes a Segmentation Violation when attached file is compiled

[pinskia at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=93537

Andrew Pinski  changed:

   What|Removed |Added

   Keywords||needs-bisection

--- Comment #2 from Andrew Pinski  ---
I can't figure what fixed it ... But it seems to have been fixed in GCC 10.1.0.

Results for 14.0.1 20240409 (experimental) [remotes/origin/HEAD r14-9852-g18e94e04da] (GCC) testsuite on powerpc64le-unknown-linux-gnu

[Bill Seurer (POWER9 IEEE128) via Gcc-testresults]

git commit g:18e94e04dae724c61cbc13ace85fa68f2deda900
gcc-descr r14-9852-g18e94e04dae724

power9 IEEE128
Linux 6.9.0-0.rc2.20240402git026e680b0a08.24.fc41.ppc64le ppc64le
GNU Make 4.4.1

DejaGnu:
DejaGnu version 1.6.3
Expect version  5.45.4
Tcl version 8.6

64-bit

LAST_UPDATED: Tue Apr  9 04:13:38 UTC 2024 (revision r14-9852-g18e94e04da)

Native configuration is powerpc64le-unknown-linux-gnu

=== gcc tests ===


Running target unix
XPASS: gcc.dg/Wtrampolines.c standard descriptors (test for warnings, line 32)
XPASS: gcc.dg/guality/example.c   -O0  execution test
XPASS: gcc.dg/guality/example.c  -Og -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/guality.c   -O0  execution test
XPASS: gcc.dg/guality/guality.c   -O1  -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/guality.c   -O2  -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/guality.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION execution test
XPASS: gcc.dg/guality/guality.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION execution test
XPASS: gcc.dg/guality/guality.c   -O3 -g  -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/guality.c   -Os  -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/guality.c  -Og -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/inline-params.c   -O2  -DPREVENT_OPTIMIZATION  execution 
test
XPASS: gcc.dg/guality/inline-params.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION execution test
XPASS: gcc.dg/guality/inline-params.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION execution test
XPASS: gcc.dg/guality/inline-params.c   -O3 -g  -DPREVENT_OPTIMIZATION  
execution test
XPASS: gcc.dg/guality/inline-params.c   -Os  -DPREVENT_OPTIMIZATION  execution 
test
FAIL: gcc.dg/guality/loop-1.c   -O2  -DPREVENT_OPTIMIZATION  line 20 i == 1
FAIL: gcc.dg/guality/loop-1.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION line 20 i == 1
FAIL: gcc.dg/guality/loop-1.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 20 i == 1
FAIL: gcc.dg/guality/loop-1.c   -O3 -fomit-frame-pointer -funroll-loops 
-fpeel-loops -ftracer -finline-functions  -DPREVENT_OPTIMIZATION  line 20 i == 1
FAIL: gcc.dg/guality/loop-1.c   -O3 -g  -DPREVENT_OPTIMIZATION  line 20 i == 1
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 18 y == 2
FAIL: gcc.dg/guality/pr36728-3.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 16 y == 2
FAIL: gcc.dg/guality/pr36728-3.c   -O3 -g  -DPREVENT_OPTIMIZATION  line 16 y == 
2
FAIL: gcc.dg/guality/pr41353-1.c  -Og -DPREVENT_OPTIMIZATION  line 28 i == 37
FAIL: gcc.dg/guality/pr41353-1.c  -Og -DPREVENT_OPTIMIZATION  line 28 i1 == 2 * 
37
FAIL: gcc.dg/guality/pr41353-1.c  -Og -DPREVENT_OPTIMIZATION  line 28 i2 == 3 * 
37
XPASS: gcc.dg/guality/pr41353-1.c  -Og -DPREVENT_OPTIMIZATION  line 28 j == 28 
+ 37
FAIL: gcc.dg/guality/pr43051-1.c   -O1  -DPREVENT_OPTIMIZATION  line 34 c == 
[0]
FAIL: gcc.dg/guality/pr43051-1.c   -O1  -DPREVENT_OPTIMIZATION  line 39 c == 
[0]
FAIL: gcc.dg/guality/pr43051-1.c   -O2  -DPREVENT_OPTIMIZATION  line 34 c == 
[0]
FAIL: gcc.dg/guality/pr43051-1.c   -O2  -DPREVENT_OPTIMIZATION  line 39 c == 
[0]
FAIL: gcc.dg/guality/pr43051-1.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION line 34 c == [0]
FAIL: gcc.dg/guality/pr43051-1.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION line 39 c == [0]
FAIL: gcc.dg/guality/pr43051-1.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 34 c == [0]
FAIL: gcc.dg/guality/pr43051-1.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 39 c == [0]
FAIL: gcc.dg/guality/pr54200.c   -O1  -DPREVENT_OPTIMIZATION  line 20 z == 3
FAIL: gcc.dg/guality/pr54200.c   -O2  -DPREVENT_OPTIMIZATION  line 20 z == 3
FAIL: gcc.dg/guality/pr54200.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION line 20 z == 3
FAIL: gcc.dg/guality/pr54200.c   -O3 -g  -DPREVENT_OPTIMIZATION  line 20 z == 3
FAIL: gcc.dg/guality/pr54200.c   -Os  -DPREVENT_OPTIMIZATION  line 20 z == 3
FAIL: gcc.dg/guality/pr54519-1.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION line 20 y == 25
FAIL: gcc.dg/guality/pr54519-1.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION line 20 z == 6
FAIL: gcc.dg/guality/pr54519-1.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION line 23 y == 117
FAIL: gcc.dg/guality/pr54519-1.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION line 23 z == 8
FAIL: gcc.dg/guality/pr54519-1.c   -O2 -flto 

Re: [PATCH] middle-end/114604 - ranger allocates bitmap without initialized obstack

[Aldy Hernandez]

BTW, I'm not opposed to this patch.  Thank you for tracking this down,
and feel free to commit as is if y'all PMs agree it's OK.  I just
wanted to know if there's a better way going forward.  I can certainly
put it on my TODO list once stage1 opens again.

And no, there probably isn't an obstack for those classes, but I
wonder if we should have a class local one, as we do for the rest of
the classes.

Aldy

On Mon, Apr 8, 2024 at 7:47 PM Richard Biener
 wrote:
>
>
>
> > Am 08.04.2024 um 18:40 schrieb Aldy Hernandez :
> >
> > On Mon, Apr 8, 2024 at 6:29 PM Richard Biener  wrote:
> >>
> >>
> >>
>  Am 08.04.2024 um 18:09 schrieb Aldy Hernandez :
> >>>
> >>> On Mon, Apr 8, 2024 at 5:54 PM Jakub Jelinek  wrote:
> 
>  On Mon, Apr 08, 2024 at 05:40:23PM +0200, Aldy Hernandez wrote:
> >>   PR middle-end/114604
> >>   * gimple-range.cc (enable_ranger): Initialize the global
> >>   bitmap obstack.
> >>   (disable_ranger): Release it.
> >> ---
> >> gcc/gimple-range.cc | 4 
> >> 1 file changed, 4 insertions(+)
> >>
> >> diff --git a/gcc/gimple-range.cc b/gcc/gimple-range.cc
> >> index c16b776c1e3..4d3b1ce8588 100644
> >> --- a/gcc/gimple-range.cc
> >> +++ b/gcc/gimple-range.cc
> >> @@ -689,6 +689,8 @@ enable_ranger (struct function *fun, bool 
> >> use_imm_uses)
> >> {
> >>  gimple_ranger *r;
> >>
> >> +  bitmap_obstack_initialize (NULL);
> >> +
> >>  gcc_checking_assert (!fun->x_range_query);
> >>  r = new gimple_ranger (use_imm_uses);
> >>  fun->x_range_query = r;
> >> @@ -705,6 +707,8 @@ disable_ranger (struct function *fun)
> >>  gcc_checking_assert (fun->x_range_query);
> >>  delete fun->x_range_query;
> >>  fun->x_range_query = NULL;
> >> +
> >> +  bitmap_obstack_release (NULL);
> >
> > Are you not allowed to initialize/use obstacks unless
> > bitmap_obstack_initialize(NULL) is called?
> 
>  You can use it with some other obstack, just not the default one.
> 
> > If so, wouldn't it be
> > better to lazily initialize it downstream (bitmap_alloc, or whomever
> > needs it initialized)?
> 
>  No, you still need to decide where is the safe point to release it.
>  Unlike the non-default bitmap_obstack_initialize/bitmap_obstack_release,
>  the default one can nest (has associated nesting counter).  So, the above
>  patch just says that ranger starts using the default obstack in
>  enable_ranger and stops using it in disable_ranger and anything ranger
>  associated in the obstack can be freed at that point.
> >>>
> >>> I thought ranger never used the default one:
> >>>
> >>> $ grep bitmap_obstack_initialize *value* *range*
> >>> value-relation.cc:  bitmap_obstack_initialize (_bitmaps);
> >>> value-relation.cc:  bitmap_obstack_initialize (_bitmaps);
> >>> gimple-range-cache.cc:  bitmap_obstack_initialize (_bitmaps);
> >>> gimple-range-gori.cc:  bitmap_obstack_initialize (_bitmaps);
> >>> gimple-range-infer.cc:  bitmap_obstack_initialize (_bitmaps);
> >>> gimple-range-phi.cc:  bitmap_obstack_initialize (_bitmaps);
> >>>
> >>> or even:
> >>>
> >>> $ grep obstack.*NULL *value* *range*
> >>> value-range-storage.cc:obstack_free (_obstack, NULL);
> >>> value-relation.cc:  obstack_free (_chain_obstack, NULL);
> >>> value-relation.cc:  obstack_free (_chain_obstack, NULL);
> >>> gimple-range-infer.cc:  obstack_free (_list_obstack, NULL);
> >>> value-range-storage.cc:obstack_free (_obstack, NULL);
> >>>
> >>> I'm obviously missing something here.
> >>
> >> Look for BITMAP_ALLOC (NULL) in the backtrace in the PR
> >
> > Ahh!  Thanks.
> >
> > A few default obstack uses snuck in while I wasn't looking.
> >
> > $ grep BITMAP_ALLOC.*NULL *range*
> > gimple-range-cache.cc:  m_propfail = BITMAP_ALLOC (NULL);
> > gimple-range-cache.h:  inline ssa_lazy_cache () { active_p =
> > BITMAP_ALLOC (NULL); }
> > gimple-range.cc:  m_pop_list = BITMAP_ALLOC (NULL);
> >
> > I wonder if it would be cleaner to just change these to use named obstacks.
>
> I didn’t find any obvious obstack to use, but sure.  This was the easiest fix 
> ;)
>
> Richard
>
> > Andrew, is there a reason we were using the default obstack for these?
> > For reference, they are  class update_list used in the ranger cache,
> > ssa_lazy_cache, and dom_ranger.
> >
> > Aldy
> >
>

Re: [PATCH] rs6000: Replace OPTION_MASK_DIRECT_MOVE with OPTION_MASK_P8_VECTOR [PR101865]

[Kewen.Lin]

on 2024/4/9 11:20, Peter Bergner wrote:
> On 4/8/24 9:37 PM, Kewen.Lin wrote:
>> on 2024/4/8 21:21, Peter Bergner wrote:
>> I prefer to remove it completely, that is:
>>
>>> -mdirect-move
>>> -Target Undocumented Mask(DIRECT_MOVE) Var(rs6000_isa_flags) WarnRemoved
>>
>> The reason why you still kept it is to keep a historical record here?
> 
> I believe we've never completely removed an option before.  I think the

By checking the history, we did remove some options for SPE, paired single,
xilinx-fpu etc., which can be taken as gone with feature removal, but also
-maltivec={le,be} and -misel={yes,no}.

> thought was, if some software package explicitly used the option, then
> they shouldn't see an 'unrecognized command-line option' error, but
> rather either a warning that the option was removed or just silently
> ignore it.  Ie, we don't want to make a package that used to build with
> an old compiler now break its build because the option doesn't exist
> anymore.

I understand, but an argument is that no errors (even no warnings) can imply
some option still takes effect and cause some misunderstanding easily.  For
the release in which we remove the support of an option, we can still mark
it as WarnRemoved, but after a release or so, users should be aware of this
change and modify their build scripts if need, it's better to emit errors
for them to avoid the false appearance that it's still supported.

> 
>> Segher pointed out to me that this kind of option complete removal should be
>> stage 1 stuff, so let's defer to make it in a separated patch next release
>> (including some other options like mfpgpr you showed below etc.). :)
> 
> If we're going to completely remove it, then for sure, it's a stage1 thing.
> I'd like to hear Segher's thoughts on whether we should completely remove
> it or just silently ignore it.
> 
> 
> 
>> For the original patch,
>>
>>> +mno-direct-move
>>> +Target Undocumented WarnRemoved
>>
>> s/WarnRemoved/Ignore/ to match some other existing practice, there is no
>> warning now if specifying -mno-direct-move and it would be good to keep
>> the same behavior for users.
> 
> If we want to silently ignore -mdirect-move and -mno-direct-move, then we
> just need to do:
> 
> mdirect-move
> -Target Undocumented Mask(DIRECT_MOVE) Var(rs6000_isa_flags) WarnRemoved
> +Target Undocumented Ignore
> 

Since removing it completely is a stage1 thing, I prefer to keep mdirect-move
and -mno-direct-move handlings as before, WarnRemoved and Ignore separately.

> There's no need to mention -mno-direct-move at all then.  It was only in the
> case I thought we wanted to warn against it's use that I added 
> -mno-direct-move.
> 
> 

Not to mention it is fine too, just keep the handlings and defer it to stage 1. 
:)

BR,
Kewen

[Bug c/88642] Accepts ill-formed program with invalid scalar initialization syntax.

[pinskia at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88642

--- Comment #3 from Andrew Pinski  ---
So this code is quiet old. There was an error back before
r0-5028-g790e949032a94b (1993, change by RMS) and mailing lists don't exist
that far back ...

[Bug c/88642] Accepts ill-formed program with invalid scalar initialization syntax.

[pinskia at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88642

--- Comment #2 from Andrew Pinski  ---
We do warn:
: In function 'main':
:3:5: warning: braces around scalar initializer
3 | int x = { { 0 } } ;
  | ^~~

Maybe this should be a pedantic warning instead ...

  if (constructor_type != error_mark_node)
warning_init (input_location, 0, "braces around scalar initializer");

Results for 14.0.1 20240408 (experimental) [master revision gcc-14-9847-geaccdba315b] (GCC) testsuite on aarch64-unknown-linux-gnu

[ci_notify--- via Gcc-testresults]

-assembler-not tbict
FAIL: gcc.target/aarch64/sve/pred-not-gen-4.c scan-assembler-times 
tnottp[0-9]+.b, p[0-9]+/z, p[0-9]+.bn 1
FAIL: gcc.target/aarch64/sve/var_stride_2.c scan-assembler-times 
tubfiztx[0-9]+, x2, 10, 16n 1
FAIL: gcc.target/aarch64/sve/var_stride_2.c scan-assembler-times 
tubfiztx[0-9]+, x3, 10, 16n 1
FAIL: gcc.target/aarch64/sve/var_stride_4.c scan-assembler-times 
tsbfiztx[0-9]+, x2, 10, 32n 1
FAIL: gcc.target/aarch64/sve/var_stride_4.c scan-assembler-times 
tsbfiztx[0-9]+, x3, 10, 32n 1

=== gcc Summary ===

# of expected passes338437
# of unexpected failures298
# of unexpected successes   1
# of expected failures  1763
# of unresolved testcases   1
# of unsupported tests  4486
/home/tcwg-buildslave/workspace/tcwg_gnu_0/abe/builds/destdir/x86_64-pc-linux-gnu/bin/aarch64-linux-gnu-gcc
  version 14.0.1 20240408 (experimental) [master revision 
gcc-14-9847-geaccdba315b] (GCC) 

Host   is x86_64-pc-linux-gnu

=== gfortran tests ===


Running target qemu
FAIL: gfortran.dg/asan/pointer_assign_16.f90 -fsanitize=address  -O0  execution 
test
FAIL: gfortran.dg/asan/pointer_assign_16.f90 -fsanitize=address  -O1  execution 
test
FAIL: gfortran.dg/asan/pointer_assign_16.f90 -fsanitize=address  -O2  execution 
test
FAIL: gfortran.dg/asan/pointer_assign_16.f90 -fsanitize=address  -O3 
-fomit-frame-pointer -funroll-loops -fpeel-loops -ftracer -finline-functions  
execution test
FAIL: gfortran.dg/asan/pointer_assign_16.f90 -fsanitize=address  -O3 -g  
execution test
FAIL: gfortran.dg/asan/pointer_assign_16.f90 -fsanitize=address  -Os  execution 
test
FAIL: gfortran.dg/asan/pr110415-2.f90 -fsanitize=address  -O0  execution test
FAIL: gfortran.dg/asan/pr110415-2.f90 -fsanitize=address  -O1  execution test
FAIL: gfortran.dg/asan/pr110415-2.f90 -fsanitize=address  -O2  execution test
FAIL: gfortran.dg/asan/pr110415-2.f90 -fsanitize=address  -O3 
-fomit-frame-pointer -funroll-loops -fpeel-loops -ftracer -finline-functions  
execution test
FAIL: gfortran.dg/asan/pr110415-2.f90 -fsanitize=address  -O3 -g  execution test
FAIL: gfortran.dg/asan/pr110415-2.f90 -fsanitize=address  -Os  execution test
FAIL: gfortran.dg/asan/pr110415-3.f90 -fsanitize=address  -O0  execution test
FAIL: gfortran.dg/asan/pr110415-3.f90 -fsanitize=address  -O1  execution test
FAIL: gfortran.dg/asan/pr110415-3.f90 -fsanitize=address  -O2  execution test
FAIL: gfortran.dg/asan/pr110415-3.f90 -fsanitize=address  -O3 
-fomit-frame-pointer -funroll-loops -fpeel-loops -ftracer -finline-functions  
execution test
FAIL: gfortran.dg/asan/pr110415-3.f90 -fsanitize=address  -O3 -g  execution test
FAIL: gfortran.dg/asan/pr110415-3.f90 -fsanitize=address  -Os  execution test
FAIL: gfortran.dg/matmul_15.f90   -O  execution test

=== gfortran Summary ===

# of expected passes69012
# of unexpected failures19
# of expected failures  263
# of unsupported tests  156
/home/tcwg-buildslave/workspace/tcwg_gnu_0/abe/builds/destdir/x86_64-pc-linux-gnu/bin/aarch64-linux-gnu-gfortran
  version 14.0.1 20240408 (experimental) [master revision 
gcc-14-9847-geaccdba315b] (GCC) 

Host   is x86_64-pc-linux-gnu

=== g++ tests ===


Running target qemu
FAIL: c-c++-common/asan/alloca_instruments_all_paddings.c   -O0  execution test
FAIL: c-c++-common/asan/alloca_instruments_all_paddings.c   -O1  execution test
FAIL: c-c++-common/asan/alloca_instruments_all_paddings.c   -O2  execution test
FAIL: c-c++-common/asan/alloca_instruments_all_paddings.c   -O2 -flto 
-fno-use-linker-plugin -flto-partition=none  execution test
FAIL: c-c++-common/asan/alloca_instruments_all_paddings.c   -O2 -flto 
-fuse-linker-plugin -fno-fat-lto-objects  execution test
FAIL: c-c++-common/asan/alloca_instruments_all_paddings.c   -O3 
-fomit-frame-pointer -funroll-loops -fpeel-loops -ftracer -finline-functions  
execution test
FAIL: c-c++-common/asan/alloca_instruments_all_paddings.c   -O3 -g  execution 
test
FAIL: c-c++-common/asan/alloca_instruments_all_paddings.c   -Os  execution test
FAIL: c-c++-common/asan/alloca_loop_unpoisoning.c   -O0  execution test
FAIL: c-c++-common/asan/alloca_loop_unpoisoning.c   -O1  execution test
FAIL: c-c++-common/asan/alloca_loop_unpoisoning.c   -O2  execution test
FAIL: c-c++-common/asan/alloca_loop_unpoisoning.c   -O2 -flto 
-fno-use-linker-plugin -flto-partition=none  execution test
FAIL: c-c++-common/asan/alloca_loop_unpoisoning.c   -O2 -flto 
-fuse-linker-plugin -fno-fat-lto-objects  execution test
FAIL: c-c++-common/asan/alloca_loop_unpoisoning.c   -O3 -fomit-frame-pointer 
-funroll-loops -fpeel-loops -ftracer -finline-functions  execution test
FAIL: c-c++-common/asan/alloca_loop_unpoisoning.c   -O3 -g  execution test
FAIL: c-c++-common/asan/alloca_loop_unpoisoning.c   -Os  execution test
FAIL: c-c++-common/asan/alloca_safe_access.c   -O0  exec

[gcc(refs/users/meissner/heads/work164-vpair)] Update ChangeLog.*

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:e994ae407e4dd762c46590ee49bbf691265eaa87

commit e994ae407e4dd762c46590ee49bbf691265eaa87
Author: Michael Meissner 
Date:   Tue Apr 9 01:15:05 2024 -0400

Update ChangeLog.*

Diff:
---
 gcc/ChangeLog.vpair | 350 +++-
 1 file changed, 349 insertions(+), 1 deletion(-)

diff --git a/gcc/ChangeLog.vpair b/gcc/ChangeLog.vpair
index c0c0f7095a6..3a6f5d80c0a 100644
--- a/gcc/ChangeLog.vpair
+++ b/gcc/ChangeLog.vpair
@@ -1,6 +1,354 @@
+ Branch work164-vpair, patch #305 
+
+Add vector pair optimizations.
+
+2024-03-12  Michael Meissner  
+
+gcc/
+
+   * config/rs6000/vector-pair.md (vpair_add_neg_3): New
+   combiner insn to convert vector plus/neg into a minus operation.
+   (vpair_fma__merge): Optimize multiply, add/subtract, and
+   negation into fma operations if the user specifies to create fmas.
+   (vpair_fma__merge): Likewise.
+   (vpair_fma__merge2): Likewise.
+   (vpair_nfma__merge): Likewise.
+   (vpair_nfms__merge): Likewise.
+   (vpair_nfms__merge2): Likewise.
+
+gcc/testsuite/
+
+   * gcc.target/powerpc/vector-pair-7.c: New test.
+   * gcc.target/powerpc/vector-pair-8.c: Likewise.
+   * gcc.target/powerpc/vector-pair-9.c: Likewise.
+   * gcc.target/powerpc/vector-pair-10.c: Likewise.
+   * gcc.target/powerpc/vector-pair-11.c: Likewise.
+   * gcc.target/powerpc/vector-pair-12xs.c: Likewise.
+
+ Branch work164-vpair, patch #304 
+
+Add vector pair init and splat.
+
+2024-04-09  Michael Meissner  
+
+gcc/
+
+   * config/rs6000/rs6000-builtins.def (__builtin_vpair_zero): New
+   built-in function.
+   (__builtin_vpair_f32_splat): Likewise.
+   (__builtin_vpair_f64_splat): Likewise.
+   * config/rs6000/vector-pair.md (UNSPEC_VPAIR_ZERO): New unspec.
+   (UNSPEC_VPAIR_SPLAT): Likewise.
+   (VPAIR_SPLAT_VMODE): New mode iterator.
+   (VPAIR_SPLAT_ELEMENT_TO_VMODE): New mode attribute.
+   (vpair_splat_name): Likewise.
+   (vpair_zero): New insn.
+   (vpair_splat_): New define_expand.
+   (vpair_splat__internal): New insns.
+
+gcc/testsuite/
+
+   * gcc.target/powerpc/vector-pair-5.c: New test.
+   * gcc.target/powerpc/vector-pair-6.c: Likewise.
+
+ Branch work164-vpair, patch #303 
+
+Add support for vector pair fma operations.
+
+2024-04-09  Michael Meissner  
+
+gcc/
+
+   * config/rs6000/rs6000-builtins.def (__builtin_vpair_f32_fma): New
+   built-in.
+   (__builtin_vpair_f32_fms): Likewise.
+   (__builtin_vpair_f32_nfma): Likewise.
+   (__builtin_vpair_f32_nfms): Likewise.
+   (__builtin_vpair_f64_fma): Likewise.
+   (__builtin_vpair_f64_fms): Likewise.
+   (__builtin_vpair_f64_nfma): Likewise.
+   * config/rs6000/rs6000/rs6000-proto.h (enum vpair_split_fma): New
+   enumeration.
+   (vpair_split_fma): New declaration.
+   * config/rs6000/rs6000.cc (vpair_split_fma): New function to split
+   vector pair FMA operations.
+   * config/rs6000/vector-pair.md (UNSPEC_VPAIR_FMA): New unspec.
+   (vpair_stdname): Add UNSPEC_VPAIR_FMA.
+   (VPAIR_OP): Likewise.
+   (vpair_fma_4): New insns.
+   (vpair_fms_4): Likewise.
+   (vpair_nfma_4): Likewise.
+   (vpair_nfms_4): Likewise.
+   * doc/extend.texi (PowerPC Vector Pair Built-in Functions): Document new
+   vector pair fma built-in functions.
+
+gcc/testsuite/
+
+   * gcc.target/powerpc/vector-pair-3.c: New test.
+   * gcc.target/powerpc/vector-pair-4.c: Likewise.
+
+ Branch work164-vpair, patch #302 
+
+Add support for vector pair unary and binary operations.
+
+2024-04-09  Michael Meissner  
+
+gcc/
+
+   * config/rs6000/rs6000-builtins.def (__builtin_vpair_*): Add new
+   built-in functions for vector pair support.
+   * config/rs6000/rs6000-protos.h (enum vpair_split_unary): New
+   enumeration.
+   (vpair_split_unary): New declaration.
+   (vpair_split_binary): Likewise.
+   * config/rs6000/rs6000.cc (vpair_split_unary): New function to split
+   vector pair operations.
+   (vpair_split_binary): Likewise.
+   * config/rs6000/rs6000.md (toplevel): Include vector-pair.md.
+   * config/rs6000/t-rs6000 (MD_INCLUDES): Add vector-pair.md.
+   * config/rs6000/vector-pair.md: New file.
+   * doc/extend.texi (PowerPC Vector Pair Built-in Functions): Add
+   documentation for the new vector pair built-in functions.
+
+gcc/testsuite/
+
+   * gcc.target/powerpc/vector-pair-1.c: New test.
+   * gcc.target/powerpc/vector-pair-2.c: Likewise.
+
+ Branch work164-vpair, patch #301 
+
+Peter's patches for subreg support.
+
+2024-03-12  Peter Bergner  
+
+gcc/
+
+   PR target/109116
+   * gcc/config/rs6000/rs6000.cc 

[gcc(refs/users/meissner/heads/work164-vpair)] Add vector pair optimizations.

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:f66efd9225badd375ff92f1e57397efc2877

commit f66efd9225badd375ff92f1e57397efc2877
Author: Michael Meissner 
Date:   Tue Apr 9 01:13:59 2024 -0400

Add vector pair optimizations.

2024-03-12  Michael Meissner  

gcc/

* config/rs6000/vector-pair.md (vpair_add_neg_3): 
New
combiner insn to convert vector plus/neg into a minus operation.
(vpair_fma__merge): Optimize multiply, 
add/subtract, and
negation into fma operations if the user specifies to create fmas.
(vpair_fma__merge): Likewise.
(vpair_fma__merge2): Likewise.
(vpair_nfma__merge): Likewise.
(vpair_nfms__merge): Likewise.
(vpair_nfms__merge2): Likewise.

gcc/testsuite/

* gcc.target/powerpc/vector-pair-7.c: New test.
* gcc.target/powerpc/vector-pair-8.c: Likewise.
* gcc.target/powerpc/vector-pair-9.c: Likewise.
* gcc.target/powerpc/vector-pair-10.c: Likewise.
* gcc.target/powerpc/vector-pair-11.c: Likewise.
* gcc.target/powerpc/vector-pair-12xs.c: Likewise.

Diff:
---
 gcc/config/rs6000/vector-pair.md  | 224 ++
 gcc/testsuite/gcc.target/powerpc/vector-pair-10.c |  61 ++
 gcc/testsuite/gcc.target/powerpc/vector-pair-11.c |  65 +++
 gcc/testsuite/gcc.target/powerpc/vector-pair-12.c |  65 +++
 gcc/testsuite/gcc.target/powerpc/vector-pair-7.c  |  18 ++
 gcc/testsuite/gcc.target/powerpc/vector-pair-8.c  |  18 ++
 gcc/testsuite/gcc.target/powerpc/vector-pair-9.c  |  61 ++
 7 files changed, 512 insertions(+)

diff --git a/gcc/config/rs6000/vector-pair.md b/gcc/config/rs6000/vector-pair.md
index 39b419c6814..7a81acbdc05 100644
--- a/gcc/config/rs6000/vector-pair.md
+++ b/gcc/config/rs6000/vector-pair.md
@@ -261,6 +261,31 @@
(set (attr "type") (if_then_else (match_test " == DIV")
(const_string "")
(const_string "")))])
+
+;; Optimize vector pair add of a negative value into a subtract.
+(define_insn_and_split "*vpair_add_neg_3"
+  [(set (match_operand:OO 0 "vsx_register_operand" "=wa")
+   (unspec:OO
+[(match_operand:OO 1 "vsx_register_operand" "wa")
+ (unspec:OO
+  [(match_operand:OO 2 "vsx_register_operand" "wa")
+   (const_int VPAIR_FP_ELEMENT)]
+  UNSPEC_VPAIR_NEG)
+ (const_int VPAIR_FP_ELEMENT)]
+VPAIR_FP_BINARY))]
+  "TARGET_MMA"
+  "#"
+  "&& 1"
+  [(set (match_dup 0)
+   (unspec:OO
+[(match_dup 1)
+ (match_dup 2)
+ (const_int VPAIR_FP_ELEMENT)]
+UNSPEC_VPAIR_MINUS))]
+{
+}
+  [(set_attr "length" "8")
+   (set_attr "type" "")])
 
 ;; Vector pair fused-multiply (FMA) operations.  The last argument in the
 ;; UNSPEC is a CONST_INT which identifies what the scalar element is.
@@ -354,3 +379,202 @@
 }
   [(set_attr "length" "8")
(set_attr "type" "")])
+
+;; Optimize vector pair multiply and vector pair add into vector pair fma,
+;; providing the compiler would do this optimization for scalar and vectors.
+;; Unlike most of the define_insn_and_splits, this can be done before register
+;; allocation.
+(define_insn_and_split "*vpair_fma__merge"
+  [(set (match_operand:OO 0 "vsx_register_operand" "=wa,wa")
+   (unspec:OO
+[(unspec:OO
+  [(match_operand:OO 1 "vsx_register_operand" "%wa,wa")
+   (match_operand:OO 2 "vsx_register_operand" "wa,0")
+   (const_int VPAIR_FP_ELEMENT)]
+  UNSPEC_VPAIR_MULT)
+ (match_operand:OO 3 "vsx_register_operand" "0,wa")
+ (const_int VPAIR_FP_ELEMENT)]
+UNSPEC_VPAIR_PLUS))]
+  "TARGET_MMA && flag_fp_contract_mode == FP_CONTRACT_FAST"
+  "#"
+  "&& 1"
+  [(set (match_dup 0)
+   (unspec:OO
+[(match_dup 1)
+ (match_dup 2)
+ (match_dup 3)
+ (const_int VPAIR_FP_ELEMENT)]
+UNSPEC_VPAIR_FMA))]
+{
+}
+  [(set_attr "length" "8")
+   (set_attr "type" "")])
+
+;; Merge multiply and subtract.
+(define_insn_and_split "*vpair_fma__merge"
+  [(set (match_operand:OO 0 "vsx_register_operand" "=wa,wa")
+   (unspec:OO
+[(unspec:OO
+  [(match_operand:OO 1 "vsx_register_operand" "%wa,wa")
+   (match_operand:OO 2 "vsx_register_operand" "wa,0")
+   (const_int VPAIR_FP_ELEMENT)]
+  UNSPEC_VPAIR_MULT)
+ (match_operand:OO 3 "vsx_register_operand" "0,wa")
+ (const_int VPAIR_FP_ELEMENT)]
+UNSPEC_VPAIR_MINUS))]
+  "TARGET_MMA && flag_fp_contract_mode == FP_CONTRACT_FAST"
+  "#"
+  "&& 1"
+  [(set (match_dup 0)
+   (unspec:OO
+[(match_dup 1)
+ (match_dup 2)
+ (unspec:OO
+  [(match_dup 3)
+   (const_int VPAIR_FP_ELEMENT)]
+  UNSPEC_VPAIR_NEG)
+ (const_int VPAIR_FP_ELEMENT)]
+UNSPEC_VPAIR_FMA))]
+{
+}
+  [(set_attr "length" "8")
+   (set_attr "type" 

[gcc(refs/users/meissner/heads/work164-vpair)] Add vector pair init and splat.

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:aa0d0f245a6d4a763b754944463a9c1800394e35

commit aa0d0f245a6d4a763b754944463a9c1800394e35
Author: Michael Meissner 
Date:   Tue Apr 9 01:08:44 2024 -0400

Add vector pair init and splat.

2024-04-09  Michael Meissner  

gcc/

* config/rs6000/rs6000-builtins.def (__builtin_vpair_zero): New
built-in function.
(__builtin_vpair_f32_splat): Likewise.
(__builtin_vpair_f64_splat): Likewise.
* config/rs6000/vector-pair.md (UNSPEC_VPAIR_ZERO): New unspec.
(UNSPEC_VPAIR_SPLAT): Likewise.
(VPAIR_SPLAT_VMODE): New mode iterator.
(VPAIR_SPLAT_ELEMENT_TO_VMODE): New mode attribute.
(vpair_splat_name): Likewise.
(vpair_zero): New insn.
(vpair_splat_): New define_expand.
(vpair_splat__internal): New insns.

gcc/testsuite/

* gcc.target/powerpc/vector-pair-5.c: New test.
* gcc.target/powerpc/vector-pair-6.c: Likewise.

Diff:
---
 gcc/config/rs6000/rs6000-builtins.def|  10 +++
 gcc/config/rs6000/vector-pair.md | 102 ++-
 gcc/doc/extend.texi  |   9 ++
 gcc/testsuite/gcc.target/powerpc/vector-pair-5.c |  56 +
 gcc/testsuite/gcc.target/powerpc/vector-pair-6.c |  56 +
 5 files changed, 232 insertions(+), 1 deletion(-)

diff --git a/gcc/config/rs6000/rs6000-builtins.def 
b/gcc/config/rs6000/rs6000-builtins.def
index 4362cbb8fc7..b757a8630ff 100644
--- a/gcc/config/rs6000/rs6000-builtins.def
+++ b/gcc/config/rs6000/rs6000-builtins.def
@@ -4132,6 +4132,10 @@
   void __builtin_vsx_stxvp (v256, unsigned long, const v256 *);
 STXVP nothing {mma,pair}
 
+;; Vector pair built-in functions.
+  v256 __builtin_vpair_zero ();
+VPAIR_ZERO vpair_zero {mma}
+
 ;; Vector pair built-in functions with float elements
   v256 __builtin_vpair_f32_abs (v256);
 VPAIR_F32_ABS vpair_abs_v8sf2 {mma}
@@ -4169,6 +4173,9 @@
   v256 __builtin_vpair_f32_nfms (v256, v256, v256);
 VPAIR_F32_NFMS vpair_nfms_v8sf4 {mma}
 
+  v256 __builtin_vpair_f32_splat (float);
+VPAIR_F32_SPLAT vpair_splat_v8sf {mma}
+
   v256 __builtin_vpair_f32_sub (v256, v256);
 VPAIR_F32_SUB vpair_sub_v8sf3 {mma}
 
@@ -4209,5 +4216,8 @@
   v256 __builtin_vpair_f64_nfms (v256, v256, v256);
 VPAIR_F64_NFMS vpair_nfms_v4df4 {mma}
 
+  v256 __builtin_vpair_f64_splat (double);
+VPAIR_F64_SPLAT vpair_splat_v4df {mma}
+
   v256 __builtin_vpair_f64_sub (v256, v256);
 VPAIR_F64_SUB vpair_sub_v4df3 {mma}
diff --git a/gcc/config/rs6000/vector-pair.md b/gcc/config/rs6000/vector-pair.md
index 73ae46e6d40..39b419c6814 100644
--- a/gcc/config/rs6000/vector-pair.md
+++ b/gcc/config/rs6000/vector-pair.md
@@ -38,7 +38,9 @@
UNSPEC_VPAIR_NEG
UNSPEC_VPAIR_PLUS
UNSPEC_VPAIR_SMAX
-   UNSPEC_VPAIR_SMIN])
+   UNSPEC_VPAIR_SMIN
+   UNSPEC_VPAIR_ZERO
+   UNSPEC_VPAIR_SPLAT])
 
 ;; Vector pair element ID that defines the scaler element within the vector 
pair.
 (define_c_enum "vpair_element"
@@ -98,6 +100,104 @@
 ;; Map the scalar element ID into the appropriate insn type for divide.
 (define_int_attr vpair_divtype [(VPAIR_ELEMENT_FLOAT  "vecfdiv")
(VPAIR_ELEMENT_DOUBLE "vecdiv")])
+
+;; Mode iterator for the vector modes that we provide splat operations for.
+(define_mode_iterator VPAIR_SPLAT_VMODE [V4SF V2DF])
+
+;; Map element mode to 128-bit vector mode for splat operations
+(define_mode_attr VPAIR_SPLAT_ELEMENT_TO_VMODE [(SF "V4SF")
+   (DF "V2DF")])
+
+;; Map either element mode or vector mode into the name for the splat insn.
+(define_mode_attr vpair_splat_name [(SF   "v8sf")
+   (DF   "v4df")
+   (V4SF "v8sf")
+   (V2DF "v4df")])
+
+;; Initialize a vector pair to 0
+(define_insn_and_split "vpair_zero"
+  [(set (match_operand:OO 0 "vsx_register_operand" "=wa")
+   (unspec:OO [(const_int 0)] UNSPEC_VPAIR_ZERO))]
+  "TARGET_MMA"
+  "#"
+  "&& reload_completed"
+  [(set (match_dup 1) (match_dup 3))
+   (set (match_dup 2) (match_dup 3))]
+{
+  rtx op0 = operands[0];
+
+  operands[1] = simplify_gen_subreg (V2DFmode, op0, OOmode, 0);
+  operands[2] = simplify_gen_subreg (V2DFmode, op0, OOmode, 16);
+  operands[3] = CONST0_RTX (V2DFmode);
+}
+  [(set_attr "length" "8")
+   (set_attr "type" "vecperm")])
+
+;; Create a vector pair with a value splat'ed (duplicated) to all of the
+;; elements.
+(define_expand "vpair_splat_"
+  [(use (match_operand:OO 0 "vsx_register_operand"))
+   (use (match_operand:SFDF 1 "input_operand"))]
+  "TARGET_MMA"
+{
+  rtx op0 = operands[0];
+  rtx op1 = operands[1];
+  machine_mode element_mode = mode;
+
+  if (op1 == CONST0_RTX (element_mode))
+{
+  emit_insn (gen_vpair_zero (op0));
+  DONE;
+}
+
+  machine_mode vector_mode = mode;

[gcc(refs/users/meissner/heads/work164-vpair)] Add support for vector pair fma operations.

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:dd2a7e91bc7f77c9bf37472daf343a6a22d977a0

commit dd2a7e91bc7f77c9bf37472daf343a6a22d977a0
Author: Michael Meissner 
Date:   Tue Apr 9 01:00:03 2024 -0400

Add support for vector pair fma operations.

2024-04-09  Michael Meissner  

gcc/

* config/rs6000/rs6000-builtins.def (__builtin_vpair_f32_fma): New
built-in.
(__builtin_vpair_f32_fms): Likewise.
(__builtin_vpair_f32_nfma): Likewise.
(__builtin_vpair_f32_nfms): Likewise.
(__builtin_vpair_f64_fma): Likewise.
(__builtin_vpair_f64_fms): Likewise.
(__builtin_vpair_f64_nfma): Likewise.
* config/rs6000/rs6000/rs6000-proto.h (enum vpair_split_fma): New
enumeration.
(vpair_split_fma): New declaration.
* config/rs6000/rs6000.cc (vpair_split_fma): New function to split
vector pair FMA operations.
* config/rs6000/vector-pair.md (UNSPEC_VPAIR_FMA): New unspec.
(vpair_stdname): Add UNSPEC_VPAIR_FMA.
(VPAIR_OP): Likewise.
(vpair_fma_4): New insns.
(vpair_fms_4): Likewise.
(vpair_nfma_4): Likewise.
(vpair_nfms_4): Likewise.
* doc/extend.texi (PowerPC Vector Pair Built-in Functions): 
Document new
vector pair fma built-in functions.

gcc/testsuite/

* gcc.target/powerpc/vector-pair-3.c: New test.
* gcc.target/powerpc/vector-pair-4.c: Likewise.

Diff:
---
 gcc/config/rs6000/rs6000-builtins.def| 24 ++
 gcc/config/rs6000/rs6000-protos.h| 13 
 gcc/config/rs6000/rs6000.cc  | 71 ++
 gcc/config/rs6000/vector-pair.md | 96 
 gcc/doc/extend.texi  | 25 ++
 gcc/testsuite/gcc.target/powerpc/vector-pair-3.c | 57 ++
 gcc/testsuite/gcc.target/powerpc/vector-pair-4.c | 57 ++
 7 files changed, 343 insertions(+)

diff --git a/gcc/config/rs6000/rs6000-builtins.def 
b/gcc/config/rs6000/rs6000-builtins.def
index 83e7206e989..4362cbb8fc7 100644
--- a/gcc/config/rs6000/rs6000-builtins.def
+++ b/gcc/config/rs6000/rs6000-builtins.def
@@ -4142,6 +4142,12 @@
   v256 __builtin_vpair_f32_div (v256, v256);
 VPAIR_F32_DIV vpair_div_v8sf3 {mma}
 
+  v256 __builtin_vpair_f32_fma (v256, v256, v256);
+VPAIR_F32_FMA vpair_fma_v8sf4 {mma}
+
+  v256 __builtin_vpair_f32_fms (v256, v256, v256);
+VPAIR_F32_FMS vpair_fms_v8sf4 {mma}
+
   v256 __builtin_vpair_f32_max (v256, v256);
 VPAIR_F32_MAX vpair_smax_v8sf3 {mma}
 
@@ -4157,6 +4163,12 @@
   v256 __builtin_vpair_f32_neg (v256);
 VPAIR_F32_NEG vpair_neg_v8sf2 {mma}
 
+  v256 __builtin_vpair_f32_nfma (v256, v256, v256);
+VPAIR_F32_NFMA vpair_nfma_v8sf4 {mma}
+
+  v256 __builtin_vpair_f32_nfms (v256, v256, v256);
+VPAIR_F32_NFMS vpair_nfms_v8sf4 {mma}
+
   v256 __builtin_vpair_f32_sub (v256, v256);
 VPAIR_F32_SUB vpair_sub_v8sf3 {mma}
 
@@ -4170,6 +4182,12 @@
   v256 __builtin_vpair_f64_div (v256, v256);
 VPAIR_F64_DIV vpair_div_v4df3 {mma}
 
+  v256 __builtin_vpair_f64_fma (v256, v256, v256);
+VPAIR_F64_FMA vpair_fma_v4df4 {mma}
+
+  v256 __builtin_vpair_f64_fms (v256, v256, v256);
+VPAIR_F64_FMS vpair_fms_v4df4 {mma}
+
   v256 __builtin_vpair_f64_max (v256, v256);
 VPAIR_F64_MAX vpair_smax_v4df3 {mma}
 
@@ -4185,5 +4203,11 @@
   v256 __builtin_vpair_f64_neg (v256);
 VPAIR_F64_NEG vpair_neg_v4df2 {mma}
 
+  v256 __builtin_vpair_f64_nfma (v256, v256, v256);
+VPAIR_F64_NFMA vpair_nfma_v4df4 {mma}
+
+  v256 __builtin_vpair_f64_nfms (v256, v256, v256);
+VPAIR_F64_NFMS vpair_nfms_v4df4 {mma}
+
   v256 __builtin_vpair_f64_sub (v256, v256);
 VPAIR_F64_SUB vpair_sub_v4df3 {mma}
diff --git a/gcc/config/rs6000/rs6000-protos.h 
b/gcc/config/rs6000/rs6000-protos.h
index 4d6ecc83436..aed4081c87b 100644
--- a/gcc/config/rs6000/rs6000-protos.h
+++ b/gcc/config/rs6000/rs6000-protos.h
@@ -174,6 +174,19 @@ extern void vpair_split_unary (rtx [], machine_mode, enum 
rtx_code,
   enum vpair_split_unary);
 extern void vpair_split_binary (rtx [], machine_mode, enum rtx_code);
 
+/* When we are splitting a vector pair FMA operation into two vector 
operations, we
+   may need to modify the code generated.  This enumeration encodes the
+   different choices.  */
+
+enum vpair_split_fma {
+  VPAIR_SPLIT_FMA, /* Fused multiply-add.  */
+  VPAIR_SPLIT_FMS, /* Fused multiply-subtract.  */
+  VPAIR_SPLIT_NFMA,/* Fused negate multiply-add.  */
+  VPAIR_SPLIT_NFMS /* Fused negate multiply-subtract.  */
+};
+
+extern void vpair_split_fma (rtx [], machine_mode, enum vpair_split_fma);
+
 /* Different PowerPC instruction formats that are used by GCC.  There are
various other instruction formats used by the PowerPC hardware, but these
formats are 

[gcc(refs/users/meissner/heads/work164-vpair)] Add support for vector pair unary and binary operations.

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:473ef47c46ad9efc28bb01e376783d331596fdd4

commit 473ef47c46ad9efc28bb01e376783d331596fdd4
Author: Michael Meissner 
Date:   Tue Apr 9 00:55:10 2024 -0400

Add support for vector pair unary and binary operations.

2024-04-09  Michael Meissner  

gcc/

* config/rs6000/rs6000-builtins.def (__builtin_vpair_*): Add new
built-in functions for vector pair support.
* config/rs6000/rs6000-protos.h (enum vpair_split_unary): New
enumeration.
(vpair_split_unary): New declaration.
(vpair_split_binary): Likewise.
* config/rs6000/rs6000.cc (vpair_split_unary): New function to split
vector pair operations.
(vpair_split_binary): Likewise.
* config/rs6000/rs6000.md (toplevel): Include vector-pair.md.
* config/rs6000/t-rs6000 (MD_INCLUDES): Add vector-pair.md.
* config/rs6000/vector-pair.md: New file.
* doc/extend.texi (PowerPC Vector Pair Built-in Functions): Add
documentation for the new vector pair built-in functions.

gcc/testsuite/

* gcc.target/powerpc/vector-pair-1.c: New test.
* gcc.target/powerpc/vector-pair-2.c: Likewise.

Diff:
---
 gcc/config/rs6000/rs6000-builtins.def|  56 
 gcc/config/rs6000/rs6000-protos.h|  12 ++
 gcc/config/rs6000/rs6000.cc  |  67 ++
 gcc/config/rs6000/rs6000.md  |   1 +
 gcc/config/rs6000/t-rs6000   |   1 +
 gcc/config/rs6000/vector-pair.md | 160 +++
 gcc/doc/extend.texi  |  51 
 gcc/testsuite/gcc.target/powerpc/vector-pair-1.c |  87 
 gcc/testsuite/gcc.target/powerpc/vector-pair-2.c |  86 
 9 files changed, 521 insertions(+)

diff --git a/gcc/config/rs6000/rs6000-builtins.def 
b/gcc/config/rs6000/rs6000-builtins.def
index 3bc7fed6956..83e7206e989 100644
--- a/gcc/config/rs6000/rs6000-builtins.def
+++ b/gcc/config/rs6000/rs6000-builtins.def
@@ -4131,3 +4131,59 @@
 
   void __builtin_vsx_stxvp (v256, unsigned long, const v256 *);
 STXVP nothing {mma,pair}
+
+;; Vector pair built-in functions with float elements
+  v256 __builtin_vpair_f32_abs (v256);
+VPAIR_F32_ABS vpair_abs_v8sf2 {mma}
+
+  v256 __builtin_vpair_f32_add (v256, v256);
+VPAIR_F32_ADD vpair_add_v8sf3 {mma}
+
+  v256 __builtin_vpair_f32_div (v256, v256);
+VPAIR_F32_DIV vpair_div_v8sf3 {mma}
+
+  v256 __builtin_vpair_f32_max (v256, v256);
+VPAIR_F32_MAX vpair_smax_v8sf3 {mma}
+
+  v256 __builtin_vpair_f32_min (v256, v256);
+VPAIR_F32_MIN vpair_smin_v8sf3 {mma}
+
+  v256 __builtin_vpair_f32_mul (v256, v256);
+VPAIR_F32_MUL vpair_mul_v8sf3 {mma}
+
+  v256 __builtin_vpair_f32_nabs (v256);
+VPAIR_F32_NABS vpair_nabs_v8sf2 {mma}
+
+  v256 __builtin_vpair_f32_neg (v256);
+VPAIR_F32_NEG vpair_neg_v8sf2 {mma}
+
+  v256 __builtin_vpair_f32_sub (v256, v256);
+VPAIR_F32_SUB vpair_sub_v8sf3 {mma}
+
+;; Vector pair built-in functions with double elements
+  v256 __builtin_vpair_f64_abs (v256);
+VPAIR_F64_ABS vpair_abs_v4df2 {mma}
+
+  v256 __builtin_vpair_f64_add (v256, v256);
+VPAIR_F64_ADD vpair_add_v4df3 {mma}
+
+  v256 __builtin_vpair_f64_div (v256, v256);
+VPAIR_F64_DIV vpair_div_v4df3 {mma}
+
+  v256 __builtin_vpair_f64_max (v256, v256);
+VPAIR_F64_MAX vpair_smax_v4df3 {mma}
+
+  v256 __builtin_vpair_f64_min (v256, v256);
+VPAIR_F64_MIN vpair_smin_v4df3 {mma}
+
+  v256 __builtin_vpair_f64_mul (v256, v256);
+VPAIR_F64_MUL vpair_mul_v4df3 {mma}
+
+  v256 __builtin_vpair_f64_nabs (v256);
+VPAIR_F64_NABS vpair_nabs_v4df2 {mma}
+
+  v256 __builtin_vpair_f64_neg (v256);
+VPAIR_F64_NEG vpair_neg_v4df2 {mma}
+
+  v256 __builtin_vpair_f64_sub (v256, v256);
+VPAIR_F64_SUB vpair_sub_v4df3 {mma}
diff --git a/gcc/config/rs6000/rs6000-protos.h 
b/gcc/config/rs6000/rs6000-protos.h
index 09a57a806fa..4d6ecc83436 100644
--- a/gcc/config/rs6000/rs6000-protos.h
+++ b/gcc/config/rs6000/rs6000-protos.h
@@ -162,6 +162,18 @@ extern bool rs6000_pcrel_p (void);
 extern bool rs6000_fndecl_pcrel_p (const_tree);
 extern void rs6000_output_addr_vec_elt (FILE *, int);
 
+/* If we are splitting a vector pair unary operator into two separate vector
+   operations, we need to generate a NEG if this is NABS.  */
+
+enum vpair_split_unary {
+  VPAIR_SPLIT_NORMAL,  /* No extra processing is needed.  */
+  VPAIR_SPLIT_NEGATE   /* Wrap operation with a NEG.  */
+};
+
+extern void vpair_split_unary (rtx [], machine_mode, enum rtx_code,
+  enum vpair_split_unary);
+extern void vpair_split_binary (rtx [], machine_mode, enum rtx_code);
+
 /* Different PowerPC instruction formats that are used by GCC.  There are
various other instruction formats used by the PowerPC hardware, but these
formats are not currently 

[gcc(refs/users/meissner/heads/work164-vpair)] Peter's patches for subreg support.

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:f975eab7d1e0a30db8fb7ce8107a08be5e018d05

commit f975eab7d1e0a30db8fb7ce8107a08be5e018d05
Author: Michael Meissner 
Date:   Tue Apr 9 00:49:34 2024 -0400

Peter's patches for subreg support.

2024-03-12  Peter Bergner  

gcc/

PR target/109116
* gcc/config/rs6000/rs6000.cc (rs6000_modes_tieable_p): Make OOmode
tieable with 128-bit vector modes.

2024-01-23  Peter Bergner  

gcc/

PR target/109116
* gcc/config/rs6000/mma.md (vsx_disassemble_pair): Use SUBREG's 
instead
of UNSPEC's.
(mma_disassemble_acc): Likewise.

Diff:
---
 gcc/config/rs6000/mma.md| 50 -
 gcc/config/rs6000/rs6000.cc |  9 +---
 2 files changed, 10 insertions(+), 49 deletions(-)

diff --git a/gcc/config/rs6000/mma.md b/gcc/config/rs6000/mma.md
index 6a7d8a836db..831e646c473 100644
--- a/gcc/config/rs6000/mma.md
+++ b/gcc/config/rs6000/mma.md
@@ -405,29 +405,8 @@
(match_operand 2 "const_0_to_1_operand")]
   "TARGET_MMA"
 {
-  rtx src;
-  int regoff = INTVAL (operands[2]);
-  src = gen_rtx_UNSPEC (V16QImode,
-   gen_rtvec (2, operands[1], GEN_INT (regoff)),
-   UNSPEC_MMA_EXTRACT);
-  emit_move_insn (operands[0], src);
-  DONE;
-})
-
-(define_insn_and_split "*vsx_disassemble_pair"
-  [(set (match_operand:V16QI 0 "mma_disassemble_output_operand" "=mwa")
-   (unspec:V16QI [(match_operand:OO 1 "vsx_register_operand" "wa")
- (match_operand 2 "const_0_to_1_operand")]
- UNSPEC_MMA_EXTRACT))]
-  "TARGET_MMA
-   && vsx_register_operand (operands[1], OOmode)"
-  "#"
-  "&& reload_completed"
-  [(const_int 0)]
-{
-  int reg = REGNO (operands[1]);
-  int regoff = INTVAL (operands[2]);
-  rtx src = gen_rtx_REG (V16QImode, reg + regoff);
+  int regoff = INTVAL (operands[2]) * GET_MODE_SIZE (V16QImode);
+  rtx src = simplify_gen_subreg (V16QImode, operands[1], OOmode, regoff);
   emit_move_insn (operands[0], src);
   DONE;
 })
@@ -479,29 +458,8 @@
(match_operand 2 "const_0_to_3_operand")]
   "TARGET_MMA"
 {
-  rtx src;
-  int regoff = INTVAL (operands[2]);
-  src = gen_rtx_UNSPEC (V16QImode,
-   gen_rtvec (2, operands[1], GEN_INT (regoff)),
-   UNSPEC_MMA_EXTRACT);
-  emit_move_insn (operands[0], src);
-  DONE;
-})
-
-(define_insn_and_split "*mma_disassemble_acc"
-  [(set (match_operand:V16QI 0 "mma_disassemble_output_operand" "=mwa")
-   (unspec:V16QI [(match_operand:XO 1 "fpr_reg_operand" "d")
- (match_operand 2 "const_0_to_3_operand")]
- UNSPEC_MMA_EXTRACT))]
-  "TARGET_MMA
-   && fpr_reg_operand (operands[1], XOmode)"
-  "#"
-  "&& reload_completed"
-  [(const_int 0)]
-{
-  int reg = REGNO (operands[1]);
-  int regoff = INTVAL (operands[2]);
-  rtx src = gen_rtx_REG (V16QImode, reg + regoff);
+  int regoff = INTVAL (operands[2]) * GET_MODE_SIZE (V16QImode);
+  rtx src = simplify_gen_subreg (V16QImode, operands[1], XOmode, regoff);
   emit_move_insn (operands[0], src);
   DONE;
 })
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index da7cfa3c09e..f12eb15be1f 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -1975,9 +1975,12 @@ rs6000_hard_regno_mode_ok (unsigned int regno, 
machine_mode mode)
 static bool
 rs6000_modes_tieable_p (machine_mode mode1, machine_mode mode2)
 {
-  if (mode1 == PTImode || mode1 == OOmode || mode1 == XOmode
-  || mode2 == PTImode || mode2 == OOmode || mode2 == XOmode)
-return mode1 == mode2;
+   if (mode1 == PTImode || mode1 == OOmode || mode1 == XOmode
+   || mode2 == PTImode || mode2 == XOmode)
+ return mode1 == mode2;
+ 
+  if (mode2 == OOmode)
+return ALTIVEC_OR_VSX_VECTOR_MODE (mode1);
 
   if (ALTIVEC_OR_VSX_VECTOR_MODE (mode1))
 return ALTIVEC_OR_VSX_VECTOR_MODE (mode2);

[gcc(refs/users/meissner/heads/work164-vpair)] Power10: Add options to disable load and store vector pair.

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:a6a927f86a58862aa30bda8f609fb5641fc76810

commit a6a927f86a58862aa30bda8f609fb5641fc76810
Author: Michael Meissner 
Date:   Tue Apr 9 00:44:44 2024 -0400

Power10: Add options to disable load and store vector pair.

In working on some future patches that involve utilizing vector pair
instructions, I wanted to be able to tune my program to enable or disable 
using
the vector pair load or store operations while still keeping the other
operations on the vector pair.

This patch adds two undocumented tuning options.  The -mno-load-vector-pair
option would tell GCC to generate two load vector instructions instead of a
single load vector pair.  The -mno-store-vector-pair option would tell GCC 
to
generate two store vector instructions instead of a single store vector 
pair.

If either -mno-load-vector-pair is used, GCC will not generate the indexed
stxvpx instruction.  Similarly if -mno-store-vector-pair is used, GCC will 
not
generate the indexed lxvpx instruction.  The reason for this is to enable
splitting the {,p}lxvp or {,p}stxvp instructions after reload without 
needing a
scratch GPR register.

The default for -mcpu=power10 is that both load vector pair and store vector
pair are enabled.

I added code so that the user code can modify these settings using either a
'#pragma GCC target' directive or used __attribute__((__target__(...))) in 
the
function declaration.

I added tests for the switches, #pragma, and attribute options.

I have built this on both little endian power10 systems and big endian 
power9
systems doing the normal bootstrap and test.  There were no regressions in 
any
of the tests, and the new tests passed.  Can I check this patch into the 
master
branch?

2024-04-09  Michael Meissner  

gcc/

* config/rs6000/mma.md (movoo): Add support for 
-mno-load-vector-pair and
-mno-store-vector-pair.
* config/rs6000/rs6000-cpus.def (OTHER_POWER10_MASKS): Add support 
for
-mload-vector-pair and -mstore-vector-pair.
(POWERPC_MASKS): Likewise.
* config/rs6000/rs6000.cc (rs6000_setup_reg_addr_masks): Only allow
indexed mode for OOmode if we are generating both load vector pair 
and
store vector pair instructions.
(rs6000_option_override_internal): Add support for 
-mno-load-vector-pair
and -mno-store-vector-pair.
(rs6000_opt_masks): Likewise.
* config/rs6000/rs6000.md (isa attribute): Add lxvp and stxvp
attributes.
(enabled attribute): Likewise.
* config/rs6000/rs6000.opt (-mload-vector-pair): New option.
(-mstore-vector-pair): Likewise.

gcc/testsuite/

* gcc.target/powerpc/vector-pair-attribute.c: New test.
* gcc.target/powerpc/vector-pair-pragma.c: New test.
* gcc.target/powerpc/vector-pair-switch1.c: New test.
* gcc.target/powerpc/vector-pair-switch2.c: New test.
* gcc.target/powerpc/vector-pair-switch3.c: New test.
* gcc.target/powerpc/vector-pair-switch4.c: New test.

Diff:
---
 gcc/config/rs6000/mma.md   | 19 +---
 gcc/config/rs6000/rs6000-cpus.def  |  8 +++-
 gcc/config/rs6000/rs6000.cc| 30 +++-
 gcc/config/rs6000/rs6000.md| 10 +++-
 gcc/config/rs6000/rs6000.opt   |  8 
 .../gcc.target/powerpc/vector-pair-attribute.c | 39 +++
 .../gcc.target/powerpc/vector-pair-pragma.c| 55 ++
 .../gcc.target/powerpc/vector-pair-switch1.c   | 16 +++
 .../gcc.target/powerpc/vector-pair-switch2.c   | 17 +++
 .../gcc.target/powerpc/vector-pair-switch3.c   | 17 +++
 .../gcc.target/powerpc/vector-pair-switch4.c   | 17 +++
 11 files changed, 225 insertions(+), 11 deletions(-)

diff --git a/gcc/config/rs6000/mma.md b/gcc/config/rs6000/mma.md
index 04e2d0066df..6a7d8a836db 100644
--- a/gcc/config/rs6000/mma.md
+++ b/gcc/config/rs6000/mma.md
@@ -292,27 +292,34 @@
 gcc_assert (false);
 })
 
+;; If the user used -mno-store-vector-pair or -mno-load-vector pair, use an
+;; alternative that does not allow indexed addresses so we can split the load
+;; or store.
 (define_insn_and_split "*movoo"
-  [(set (match_operand:OO 0 "nonimmediate_operand" "=wa,ZwO,wa")
-   (match_operand:OO 1 "input_operand" "ZwO,wa,wa"))]
+  [(set (match_operand:OO 0 "nonimmediate_operand" "=wa,wa,ZwO,QwO,wa")
+   (match_operand:OO 1 "input_operand" "ZwO,QwO,wa,wa,wa"))]
   "TARGET_MMA
&& (gpc_reg_operand (operands[0], OOmode)
|| gpc_reg_operand (operands[1], OOmode))"
   "@
lxvp%X1 %x0,%1
+   #
stxvp%X0 %x1,%0
+   #
#"
   "&& reload_completed
-   && (!MEM_P (operands[0]) && !MEM_P 

[Bug c/86885] gcc erroneously allows constructor/destructor attributes on nested functions

[pinskia at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86885

Andrew Pinski  changed:

   What|Removed |Added

  Known to fail||4.1.2

--- Comment #2 from Andrew Pinski  ---
Hmm, the code does:
  if (TREE_CODE (decl) == FUNCTION_DECL
  && TREE_CODE (type) == FUNCTION_TYPE
  && decl_function_context (decl) == 0)
{

Which means this was supposed to be rejected (decl_function_context is supposed
to return if the context of a function is a function or not) but maybe we set
the DECL_CONTEXT of the function too late now.

The decl_function_context check has been there since constructor attribute
support was added by Jason in 1995 (r0-8721-g2c5f4139a91db2) . I am 90% sure
this worked at one point but I have no way to test anything earlier than 4.1.2
though.

[Bug c/86885] gcc erroneously allows constructor/destructor attributes on nested functions

[pinskia at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86885

--- Comment #1 from Andrew Pinski  ---
Created attachment 57908
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=57908=edit
testcase

[Bug middle-end/87535] multiple attribute assume_aligned interpreted inconsistently

[pinskia at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87535

Andrew Pinski  changed:

   What|Removed |Added

 Depends on||64236

--- Comment #3 from Andrew Pinski  ---
I think this is basically a dup of bug 64236.


Referenced Bugs:

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64236
[Bug 64236] [c++11] last alignas overrides stricter on a class definition

[Bug c/65007] __builtin_uaddll_overflow wrong *res declaration

[pinskia at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65007

Andrew Pinski  changed:

   What|Removed |Added

 Status|NEW |RESOLVED
   Target Milestone|--- |7.0
 Resolution|--- |FIXED

--- Comment #2 from Andrew Pinski  ---
Fixed by r7-3104-g6e395fcb44dafb for GCC 7.

[Bug c/56335] Optimization assumes __attribute__((aligned(N))) always works.

[pinskia at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=56335

Andrew Pinski  changed:

   What|Removed |Added

   See Also||https://gcc.gnu.org/bugzill
   ||a/show_bug.cgi?id=87795,
   ||https://gcc.gnu.org/bugzill
   ||a/show_bug.cgi?id=89357
 Resolution|--- |FIXED
 Status|NEW |RESOLVED
   Target Milestone|--- |9.3

--- Comment #3 from Andrew Pinski  ---
>   .comm   a,512,134217728


The linker should fail to link if it can't link to 128 MB here.

>From JSM's email:
> MAX_OFILE_ALIGNMENT (presently just a warning),

That was PR 87795 and was fixed in r9-3979-g4c7bd36194e13c .

> an object with automatic storage duration has an alignment greater than 
> MAX_STACK_ALIGNMENT

See PR 89357 which removed the constraint for C++ _Alignas as the middle-end
supports huge alignments now.

So closing as fixed for GCC 9.3.0.

[Bug c/87795] Excessive alignment permitted for functions and labels

[pinskia at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87795

Andrew Pinski  changed:

   What|Removed |Added

   Target Milestone|--- |9.0

[gcc(refs/users/meissner/heads/work164-vpair)] Revert all changes

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:9a6e5ecfb5ac36496f700ee14b6aeed59de991a4

commit 9a6e5ecfb5ac36496f700ee14b6aeed59de991a4
Author: Michael Meissner 
Date:   Tue Apr 9 00:43:54 2024 -0400

Revert all changes

Diff:
---
 gcc/config/rs6000/mma.md  | 19 ++-
 gcc/config/rs6000/rs6000-cpus.def |  8 ++--
 gcc/config/rs6000/rs6000.cc   | 30 ++
 gcc/config/rs6000/rs6000.md   | 10 +-
 gcc/config/rs6000/rs6000.opt  |  8 
 5 files changed, 11 insertions(+), 64 deletions(-)

diff --git a/gcc/config/rs6000/mma.md b/gcc/config/rs6000/mma.md
index 6a7d8a836db..04e2d0066df 100644
--- a/gcc/config/rs6000/mma.md
+++ b/gcc/config/rs6000/mma.md
@@ -292,34 +292,27 @@
 gcc_assert (false);
 })
 
-;; If the user used -mno-store-vector-pair or -mno-load-vector pair, use an
-;; alternative that does not allow indexed addresses so we can split the load
-;; or store.
 (define_insn_and_split "*movoo"
-  [(set (match_operand:OO 0 "nonimmediate_operand" "=wa,wa,ZwO,QwO,wa")
-   (match_operand:OO 1 "input_operand" "ZwO,QwO,wa,wa,wa"))]
+  [(set (match_operand:OO 0 "nonimmediate_operand" "=wa,ZwO,wa")
+   (match_operand:OO 1 "input_operand" "ZwO,wa,wa"))]
   "TARGET_MMA
&& (gpc_reg_operand (operands[0], OOmode)
|| gpc_reg_operand (operands[1], OOmode))"
   "@
lxvp%X1 %x0,%1
-   #
stxvp%X0 %x1,%0
-   #
#"
   "&& reload_completed
-   && ((MEM_P (operands[0]) && !TARGET_STORE_VECTOR_PAIR)
-   || (MEM_P (operands[1]) && !TARGET_LOAD_VECTOR_PAIR)
-   || (!MEM_P (operands[0]) && !MEM_P (operands[1])))"
+   && (!MEM_P (operands[0]) && !MEM_P (operands[1]))"
   [(const_int 0)]
 {
   rs6000_split_multireg_move (operands[0], operands[1]);
   DONE;
 }
-  [(set_attr "type" "vecload,vecload,vecstore,vecstore,veclogical")
+  [(set_attr "type" "vecload,vecstore,veclogical")
(set_attr "size" "256")
-   (set_attr "length" "*,8,*,8,8")
-   (set_attr "isa" "lxvp,*,stxvp,*,*")])
+   (set_attr "length" "*,*,8")])
+
 
 ;; Vector quad support.  XOmode can only live in FPRs.
 (define_expand "movxo"
diff --git a/gcc/config/rs6000/rs6000-cpus.def 
b/gcc/config/rs6000/rs6000-cpus.def
index 6e0b2449b18..47365534af8 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -77,12 +77,10 @@
 /* Flags that need to be turned off if -mno-power10.  */
 /* We comment out PCREL_OPT here to disable it by default because SPEC2017
performance was degraded by it.  */
-#define OTHER_POWER10_MASKS(OPTION_MASK_LOAD_VECTOR_PAIR   \
-| OPTION_MASK_MMA  \
+#define OTHER_POWER10_MASKS(OPTION_MASK_MMA\
 | OPTION_MASK_PCREL\
 /* | OPTION_MASK_PCREL_OPT */  \
-| OPTION_MASK_PREFIXED \
-| OPTION_MASK_STORE_VECTOR_PAIR)
+| OPTION_MASK_PREFIXED)
 
 #define ISA_3_1_MASKS_SERVER   (ISA_3_0_MASKS_SERVER   \
 | OPTION_MASK_POWER10  \
@@ -133,7 +131,6 @@
 | OPTION_MASK_FLOAT128_KEYWORD \
 | OPTION_MASK_FPRND\
 | OPTION_MASK_FUTURE   \
-| OPTION_MASK_LOAD_VECTOR_PAIR \
 | OPTION_MASK_POWER10  \
 | OPTION_MASK_POWER11  \
 | OPTION_MASK_P10_FUSION   \
@@ -161,7 +158,6 @@
 | OPTION_MASK_QUAD_MEMORY_ATOMIC   \
 | OPTION_MASK_RECIP_PRECISION  \
 | OPTION_MASK_SOFT_FLOAT   \
-| OPTION_MASK_STORE_VECTOR_PAIR\
 | OPTION_MASK_STRICT_ALIGN_OPTIONAL\
 | OPTION_MASK_VSX)
 
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index da7cfa3c09e..2921e72aea8 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -2722,9 +2722,7 @@ rs6000_setup_reg_addr_masks (void)
  /* Vector pairs can do both indexed and offset loads if the
 instructions are enabled, otherwise they can only do offset loads
 since it will be broken into two vector moves.  Vector quads can
-only do offset loads.  If the user restricted generation of either
-of the LXVP or STXVP instructions, do not allow indexed mode so
-that we can split the load/store.  */
+only do offset loads.  */
  else if ((addr_mask != 0) && TARGET_MMA
   && (m2 == OOmode || m2 

[gcc(refs/users/meissner/heads/work164-vpair)] Power10: Add options to disable load and store vector pair.

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:76066d95bf3f71b749084b11fc6dab1ee7cbd813

commit 76066d95bf3f71b749084b11fc6dab1ee7cbd813
Author: Michael Meissner 
Date:   Tue Apr 9 00:42:14 2024 -0400

Power10: Add options to disable load and store vector pair.

In working on some future patches that involve utilizing vector pair
instructions, I wanted to be able to tune my program to enable or disable 
using
the vector pair load or store operations while still keeping the other
operations on the vector pair.

This patch adds two undocumented tuning options.  The -mno-load-vector-pair
option would tell GCC to generate two load vector instructions instead of a
single load vector pair.  The -mno-store-vector-pair option would tell GCC 
to
generate two store vector instructions instead of a single store vector 
pair.

If either -mno-load-vector-pair is used, GCC will not generate the indexed
stxvpx instruction.  Similarly if -mno-store-vector-pair is used, GCC will 
not
generate the indexed lxvpx instruction.  The reason for this is to enable
splitting the {,p}lxvp or {,p}stxvp instructions after reload without 
needing a
scratch GPR register.

The default for -mcpu=power10 is that both load vector pair and store vector
pair are enabled.

I added code so that the user code can modify these settings using either a
'#pragma GCC target' directive or used __attribute__((__target__(...))) in 
the
function declaration.

I added tests for the switches, #pragma, and attribute options.

I have built this on both little endian power10 systems and big endian 
power9
systems doing the normal bootstrap and test.  There were no regressions in 
any
of the tests, and the new tests passed.  Can I check this patch into the 
master
branch?

2024-04-09  Michael Meissner  

gcc/

* config/rs6000/mma.md (movoo): Add support for 
-mno-load-vector-pair and
-mno-store-vector-pair.
* config/rs6000/rs6000-cpus.def (OTHER_POWER10_MASKS): Add support 
for
-mload-vector-pair and -mstore-vector-pair.
(POWERPC_MASKS): Likewise.
* config/rs6000/rs6000.cc (rs6000_setup_reg_addr_masks): Only allow
indexed mode for OOmode if we are generating both load vector pair 
and
store vector pair instructions.
(rs6000_option_override_internal): Add support for 
-mno-load-vector-pair
and -mno-store-vector-pair.
(rs6000_opt_masks): Likewise.
* config/rs6000/rs6000.md (isa attribute): Add lxvp and stxvp
attributes.
(enabled attribute): Likewise.
* config/rs6000/rs6000.opt (-mload-vector-pair): New option.
(-mstore-vector-pair): Likewise.

gcc/testsuite/

* gcc.target/powerpc/vector-pair-attribute.c: New test.
* gcc.target/powerpc/vector-pair-pragma.c: New test.
* gcc.target/powerpc/vector-pair-switch1.c: New test.
* gcc.target/powerpc/vector-pair-switch2.c: New test.
* gcc.target/powerpc/vector-pair-switch3.c: New test.
* gcc.target/powerpc/vector-pair-switch4.c: New test.

Diff:
---
 gcc/config/rs6000/mma.md  | 19 +--
 gcc/config/rs6000/rs6000-cpus.def |  8 ++--
 gcc/config/rs6000/rs6000.cc   | 30 --
 gcc/config/rs6000/rs6000.md   | 10 +-
 gcc/config/rs6000/rs6000.opt  |  8 
 5 files changed, 64 insertions(+), 11 deletions(-)

diff --git a/gcc/config/rs6000/mma.md b/gcc/config/rs6000/mma.md
index 04e2d0066df..6a7d8a836db 100644
--- a/gcc/config/rs6000/mma.md
+++ b/gcc/config/rs6000/mma.md
@@ -292,27 +292,34 @@
 gcc_assert (false);
 })
 
+;; If the user used -mno-store-vector-pair or -mno-load-vector pair, use an
+;; alternative that does not allow indexed addresses so we can split the load
+;; or store.
 (define_insn_and_split "*movoo"
-  [(set (match_operand:OO 0 "nonimmediate_operand" "=wa,ZwO,wa")
-   (match_operand:OO 1 "input_operand" "ZwO,wa,wa"))]
+  [(set (match_operand:OO 0 "nonimmediate_operand" "=wa,wa,ZwO,QwO,wa")
+   (match_operand:OO 1 "input_operand" "ZwO,QwO,wa,wa,wa"))]
   "TARGET_MMA
&& (gpc_reg_operand (operands[0], OOmode)
|| gpc_reg_operand (operands[1], OOmode))"
   "@
lxvp%X1 %x0,%1
+   #
stxvp%X0 %x1,%0
+   #
#"
   "&& reload_completed
-   && (!MEM_P (operands[0]) && !MEM_P (operands[1]))"
+   && ((MEM_P (operands[0]) && !TARGET_STORE_VECTOR_PAIR)
+   || (MEM_P (operands[1]) && !TARGET_LOAD_VECTOR_PAIR)
+   || (!MEM_P (operands[0]) && !MEM_P (operands[1])))"
   [(const_int 0)]
 {
   rs6000_split_multireg_move (operands[0], operands[1]);
   DONE;
 }
-  [(set_attr "type" "vecload,vecstore,veclogical")
+  [(set_attr "type" "vecload,vecload,vecstore,vecstore,veclogical")
(set_attr "size" "256")
-   (set_attr "length" 

[gcc(refs/users/meissner/heads/work164-bugs)] Update ChangeLog.*

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:d332fba26fbf1202b38fe1d51002abbcbdd4bcbf

commit d332fba26fbf1202b38fe1d51002abbcbdd4bcbf
Author: Michael Meissner 
Date:   Tue Apr 9 00:34:39 2024 -0400

Update ChangeLog.*

Diff:
---
 gcc/ChangeLog.bugs | 176 -
 1 file changed, 175 insertions(+), 1 deletion(-)

diff --git a/gcc/ChangeLog.bugs b/gcc/ChangeLog.bugs
index 4291f519935..9c793434348 100644
--- a/gcc/ChangeLog.bugs
+++ b/gcc/ChangeLog.bugs
@@ -1,6 +1,180 @@
+ Branch work164-bugs, patch #201 
+
+Add power10 ori/oris and xori/xoris fusion support.
+
+2024-04-09  Michael Meissner  
+
+gcc/
+
+   * config/rs6000/fusion.md: Regenerate.
+   * config/rs6000/genfusion.md (gen_wide_immediate): Add wide immediate
+   fusion patterns.
+   * config/rs6000/rs6000.md (IORXOR_OP): New code attribute.
+   (ior, xor splitter): Do not split ior/xor patterns that could be fused
+   on power10.
+
+ Branch work164-bugs, patch #200 
+
+Add power10 wide immediate fusion
+
+2024-04-09  Michael Meissner  
+
+gcc/
+
+   PR target/108018
+   * config/rs6000/rs6000.md (tocref_p10_fusion): New insn.
+   (tocref): Don't allow tocrev if tocref_p10_fusion
+   would be used.
+
+ Branch work164-bugs, patch #10 from work164 

+
+Add -mcpu=future support.
+
+This patch adds the future option to the -mcpu= and -mtune= switches.
+
+This patch treats the future like a power11 in terms of costs and reassociation
+width.
+
+This patch issues a ".machine future" to the assembly file if you use
+-mcpu=power11.
+
+This patch defines _ARCH_PWR_FUTURE if the user uses -mcpu=future.
+
+This patch allows GCC to be configured with the --with-cpu=future and
+--with-tune=future options.
+
+This patch passes -mfuture to the assembler if the user uses -mcpu=future.
+
+2024-04-08  Michael Meissner  
+
+gcc/
+
+   * config.gcc (rs6000*-*-*, powerpc*-*-*): Add support for power11.
+   * config/rs6000/aix71.h (ASM_CPU_SPEC): Add support for -mcpu=power11.
+   * config/rs6000/aix72.h (ASM_CPU_SPEC): Likewise.
+   * config/rs6000/aix73.h (ASM_CPU_SPEC): Likewise.
+   * config/rs6000/driver-rs6000.cc (asm_names): Likewise.
+   * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Define
+   _ARCH_PWR_FUTURE if -mcpu=future.
+   * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): New define.
+   (POWERPC_MASKS): Add future isa bit.
+   (power11 cpu): Add future definition.
+   * config/rs6000/rs6000-opts.h (PROCESSOR_FUTURE): Add future processor.
+   * config/rs6000/rs6000-string.cc (expand_compare_loop): Likewise.
+   * config/rs6000/rs6000-tables.opt: Regenerate.
+   * config/rs6000/rs6000.cc (rs6000_option_override_internal): Add future
+   support.
+   (rs6000_machine_from_flags): Likewise.
+   (rs6000_reassociation_width): Likewise.
+   (rs6000_adjust_cost): Likewise.
+   (rs6000_issue_rate): Likewise.
+   (rs6000_sched_reorder): Likewise.
+   (rs6000_sched_reorder2): Likewise.
+   (rs6000_register_move_cost): Likewise.
+   (rs6000_opt_masks): Likewise.
+   * config/rs6000/rs6000.h (ASM_CPU_SPEC): Likewise.
+   * config/rs6000/rs6000.md (cpu attribute): Add future.
+   * config/rs6000/rs6000.opt (-mpower11): Add internal future ISA flag.
+   * doc/invoke.texi (RS/6000 and PowerPC Options): Document -mcpu=future.
+
+ Branch work164-bugs, patch #3 from work164 

+
+Add -mcpu=power11 tests.
+
+This patch adds some simple tests for -mcpu=power11 support.  In order to run
+these tests, you need an assembler that supports the appropriate option for
+supporting the Power11 processor (-mpower11 under Linux or -mpwr11 under AIX).
+
+2024-04-08  Michael Meissner  
+
+gcc/testsuite/
+
+   * gcc.target/powerpc/power11-1.c: New test.
+   * gcc.target/powerpc/power11-2.c: Likewise.
+   * gcc.target/powerpc/power11-3.c: Likewise.
+   * lib/target-supports.exp (check_effective_target_power11_ok): Add new
+   effective target.
+
+ Branch work164-bugs, patch #2 from work164 

+
+Add -mcpu=power11 tuning support.
+
+This patch makes -mtune=power11 use the same tuning decisions as 
-mtune=power10.
+
+2024-04-08  Michael Meissner  
+
+gcc/
+
+   * config/rs6000/power10.md (all reservations): Add power11 as an
+   alternative to power10.
+
+ Branch work164-bugs, patch #1 from work164 

+
+Add -mcpu=power11 support.
+
+This patch adds the power11 option to the -mcpu= and -mtune= switches.
+
+This patch treats the power11 like a power10 in terms of costs and 
reassociation
+width.
+
+This patch issues a ".machine power11" to the assembly file if you use
+-mcpu=power11.
+
+This patch defines _ARCH_PWR11 if the user uses 

Results for 13.2.1 20240409 [releases/gcc-13 r13-8595-g3c019816c9] (GCC) testsuite on powerpc64-unknown-linux-gnu

[Bill Seurer (POWER9 BE) via Gcc-testresults]

git commit g:3c019816c9c3604d4d039e22bb1e39c14ba8ac17
gcc-descr r13-8595-g3c019816c9c360

power9 BE
Linux 6.7.9-powerpc64 ppc64
GNU Make 4.3

DejaGnu:
DejaGnu version 1.6.3
Expect version  5.45.4
Tcl version 8.6

64-bit

LAST_UPDATED: Tue Apr  9 03:19:19 UTC 2024 (revision r13-8595-g3c019816c9)

Native configuration is powerpc64-unknown-linux-gnu

=== g++ tests ===


Running target unix/-m32
FAIL: g++.dg/modules/xtreme-header-5_c.C -std=c++2a (test for excess errors)
FAIL: g++.dg/modules/xtreme-header-5_c.C -std=c++2b (test for excess errors)

=== g++ Summary for unix/-m32 ===

# of expected passes226015
# of unexpected failures2
# of expected failures  1929
# of unsupported tests  10873

Running target unix/-m64

=== g++ Summary for unix/-m64 ===

# of expected passes234959
# of expected failures  1937
# of unsupported tests  11061

=== g++ Summary ===

# of expected passes460974
# of unexpected failures2
# of expected failures  3866
# of unsupported tests  21934
/home/gccbuild/build/nightly/build-gcc-13/gcc/xg++  version 13.2.1 20240409 
[releases/gcc-13 r13-8595-g3c019816c9] (GCC) 

=== gcc tests ===


Running target unix/-m32
XPASS: gcc.dg/guality/example.c   -O0  execution test
XPASS: gcc.dg/guality/example.c   -O1  -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/example.c  -Og -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/guality.c   -O0  execution test
XPASS: gcc.dg/guality/guality.c   -O1  -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/guality.c   -O2  -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/guality.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION execution test
XPASS: gcc.dg/guality/guality.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION execution test
XPASS: gcc.dg/guality/guality.c   -O3 -g  -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/guality.c   -Os  -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/guality.c  -Og -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/inline-params.c   -O2  -DPREVENT_OPTIMIZATION  execution 
test
XPASS: gcc.dg/guality/inline-params.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION execution test
XPASS: gcc.dg/guality/inline-params.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION execution test
XPASS: gcc.dg/guality/inline-params.c   -O3 -g  -DPREVENT_OPTIMIZATION  
execution test
XPASS: gcc.dg/guality/inline-params.c   -Os  -DPREVENT_OPTIMIZATION  execution 
test
XPASS: gcc.dg/guality/ipa-sra-1.c   -O0  line 15 k == 3
XPASS: gcc.dg/guality/ipa-sra-1.c   -O1  -DPREVENT_OPTIMIZATION  line 15 k == 3
XPASS: gcc.dg/guality/ipa-sra-1.c  -Og -DPREVENT_OPTIMIZATION  line 15 k == 3
FAIL: gcc.dg/guality/loop-1.c   -O2  -DPREVENT_OPTIMIZATION  line 20 i == 1
FAIL: gcc.dg/guality/loop-1.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION line 20 i == 1
FAIL: gcc.dg/guality/loop-1.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 20 i == 1
FAIL: gcc.dg/guality/loop-1.c   -O3 -fomit-frame-pointer -funroll-loops 
-fpeel-loops -ftracer -finline-functions  -DPREVENT_OPTIMIZATION  line 20 i == 1
FAIL: gcc.dg/guality/loop-1.c   -O3 -g  -DPREVENT_OPTIMIZATION  line 20 i == 1
FAIL: gcc.dg/guality/pr36728-1.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 18 y == 2
FAIL: gcc.dg/guality/pr36728-1.c   -O3 -g  -DPREVENT_OPTIMIZATION  line 18 y == 
2
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 16 arg1 == 1
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 16 arg2 == 2
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 16 arg3 == 3
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 16 arg4 == 4
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 16 arg5 == 5
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 16 arg6 == 6
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 16 arg7 == 30
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 18 arg1 == 1
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 18 arg2 == 2
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 

[gcc(refs/users/meissner/heads/work164-bugs)] Add power10 ori/oris and xori/xoris fusion support.

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:9b813c320ee59176e3279391ef7c47ef6ea8ba3a

commit 9b813c320ee59176e3279391ef7c47ef6ea8ba3a
Author: Michael Meissner 
Date:   Tue Apr 9 00:30:46 2024 -0400

Add power10 ori/oris and xori/xoris fusion support.

2024-04-09  Michael Meissner  

gcc/

* config/rs6000/fusion.md: Regenerate.
* config/rs6000/genfusion.md (gen_wide_immediate): Add wide 
immediate
fusion patterns.
* config/rs6000/rs6000.md (IORXOR_OP): New code attribute.
(ior, xor splitter): Do not split ior/xor patterns that could be 
fused
on power10.

Diff:
---
 gcc/config/rs6000/fusion.md| 10 ++
 gcc/config/rs6000/genfusion.pl | 17 +
 gcc/config/rs6000/rs6000.md|  5 -
 3 files changed, 31 insertions(+), 1 deletion(-)

diff --git a/gcc/config/rs6000/fusion.md b/gcc/config/rs6000/fusion.md
index 4ed9ae1d69f..45819627df6 100644
--- a/gcc/config/rs6000/fusion.md
+++ b/gcc/config/rs6000/fusion.md
@@ -3055,3 +3055,13 @@
   [(set_attr "type" "fused_vector")
(set_attr "cost" "6")
(set_attr "length" "8")])
+
+;; ori_oris and xori_xoris fusion patterns generated by gen_wide_immediate
+(define_insn "*fuse_i_is"
+  [(set (match_operand:DI 0 "gpc_reg_operand" "=")
+(iorxor:DI
+  (match_operand:DI 1 "gpc_reg_operand" "r")
+  (match_operand:DI 2 "non_logical_cint_operand" "n")))]
+  "(TARGET_P10_FUSION)"
+  "i %0,%1,%w2\;is %0,%0,%v2"
+  [(set_attr "length" "8")])
diff --git a/gcc/config/rs6000/genfusion.pl b/gcc/config/rs6000/genfusion.pl
index 2271be14bfa..d059de8afc9 100755
--- a/gcc/config/rs6000/genfusion.pl
+++ b/gcc/config/rs6000/genfusion.pl
@@ -367,6 +367,23 @@ EOF
   }
 }
 
+sub gen_wide_immediate
+{
+print <<"EOF";
+
+;; ori_oris and xori_xoris fusion patterns generated by gen_wide_immediate
+(define_insn "*fuse_i_is"
+  [(set (match_operand:DI 0 "gpc_reg_operand" "=")
+(iorxor:DI
+  (match_operand:DI 1 "gpc_reg_operand" "r")
+  (match_operand:DI 2 "non_logical_cint_operand" "n")))]
+  "(TARGET_P10_FUSION)"
+  "i %0,%1,%w2\\;is %0,%0,%v2"
+  [(set_attr "length" "8")])
+EOF
+}
+
 gen_ld_cmpi_p10();
 gen_logical_addsubf();
 gen_addadd;
+gen_wide_immediate();
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 1acd34ca0ee..f626b68ebb2 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -822,6 +822,9 @@
 (SF "TARGET_P8_VECTOR")
 (DI "TARGET_POWERPC64")])
 
+;; Convert iorxor iterator into or/xor instruction
+(define_code_attr IORXOR_OP [(ior "or") (xor "xor")])
+
 (include "darwin.md")
 
 ;; Start with fixed-point load and store insns.  Here we put only the more
@@ -3933,7 +3936,7 @@
   [(set (match_operand:GPR 0 "gpc_reg_operand")
(iorxor:GPR (match_operand:GPR 1 "gpc_reg_operand")
(match_operand:GPR 2 "non_logical_cint_operand")))]
-  ""
+  "mode != DImode || !TARGET_P10_FUSION"
   [(set (match_dup 3)
(iorxor:GPR (match_dup 1)
(match_dup 4)))

[gcc(refs/users/meissner/heads/work164-bugs)] Add power10 wide immediate fusion

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:36b37616daeec9f84d6afa97a6e2d235bebe103d

commit 36b37616daeec9f84d6afa97a6e2d235bebe103d
Author: Michael Meissner 
Date:   Tue Apr 9 00:27:11 2024 -0400

Add power10 wide immediate fusion

2024-04-09  Michael Meissner  

gcc/

PR target/108018
* config/rs6000/rs6000.md (tocref_p10_fusion): New insn.
(tocref): Don't allow tocrev if tocref_p10_fusion
would be used.

Diff:
---
 gcc/config/rs6000/rs6000.md | 43 ++-
 1 file changed, 42 insertions(+), 1 deletion(-)

diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index abc809448ad..1acd34ca0ee 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -11302,13 +11302,54 @@
"TARGET_XCOFF && TARGET_CMODEL != CMODEL_SMALL"
"la %0,%2@l(%1)")
 
+;; For power10 fusion, don't split the two pieces of the TOCREF, but keep them
+;; together so the instructions will fuse in case the user is using power10
+;; fusion via -mtune=power10 but is not enabling the PC-relative support.  If
+;; we split the instructions up, the scheduler will likely split the ADDIS and
+;; ADDI instruction.
+
+(define_insn "*tocref_p10_fusion"
+  [(set (match_operand:P 0 "gpc_reg_operand" "=b")
+   (match_operand:P 1 "small_toc_ref" "R"))]
+   "TARGET_TOC && TARGET_P10_FUSION && TARGET_CMODEL != CMODEL_SMALL
+&& (TARGET_ELF || TARGET_XCOFF)
+&& legitimate_constant_pool_address_p (operands[1], QImode, false)"
+{
+  rtx op = operands[1];
+  machine_mode mode = mode;
+  rtx offset = const0_rtx;
+
+  if (GET_CODE (op) == PLUS && add_cint_operand (XEXP (op, 1), mode))
+{
+  offset = XEXP (op, 1);
+  op = XEXP (op, 0);
+}
+
+gcc_assert (GET_CODE (op) == UNSPEC && XINT (op, 1) == UNSPEC_TOCREL);
+operands[2] = XVECEXP (op, 0, 0);  /* symbol ref.  */
+operands[3] = XVECEXP (op, 0, 1);  /* register, usually r2.  */
+operands[4] = offset;
+
+if (INTVAL (offset) == 0)
+  return (TARGET_ELF
+ ? "addis %0,%3,%2@toc@ha\;addi %0,%0,%2@toc@l"
+ : "addis %0,%2@u(%3)\;la %0,%2@l(%3)");
+else
+  return (TARGET_ELF
+ ? "addis %0,%3,%2+%4@toc@ha\;addi %0,%0,%2+%4@toc@l"
+ : "addis %0,%2+%4@u(%3)\;la %0,%2+%4@l(%3)");
+}
+  [(set_attr "type" "*")
+   (set_attr "length" "8")])
+
 (define_insn_and_split "*tocref"
   [(set (match_operand:P 0 "gpc_reg_operand" "=b")
(match_operand:P 1 "small_toc_ref" "R"))]
"TARGET_TOC
+&& !(TARGET_P10_FUSION && (TARGET_ELF || TARGET_XCOFF))
 && legitimate_constant_pool_address_p (operands[1], QImode, false)"
"la %0,%a1"
-   "&& TARGET_CMODEL != CMODEL_SMALL && reload_completed"
+   "&& TARGET_CMODEL != CMODEL_SMALL && !TARGET_P10_FUSION && reload_completed"
   [(set (match_dup 0) (high:P (match_dup 1)))
(set (match_dup 0) (lo_sum:P (match_dup 0) (match_dup 1)))])

Results for 11.4.1 20240409 [releases/gcc-11 revision 8b910e5a64a:b91b9e2d98e:84d7cc1e01dabc95d54ed33ecd5d84293ca29ce2] (GCC) testsuite on powerpc64le-unknown-linux-gnu

[Bill Seurer (POWER9) via Gcc-testresults]

git commit g:84d7cc1e01dabc95d54ed33ecd5d84293ca29ce2
gcc-descr r11-11313-g84d7cc1e01dabc

power9
Linux 5.15.0-97-generic ppc64le
GNU Make 4.3

DejaGnu:
DejaGnu version 1.6.2
Expect version  5.45.4
Tcl version 8.6

64-bit

LAST_UPDATED: Tue Apr  9 03:31:20 UTC 2024 (revision 
8b910e5a64a:b91b9e2d98e:84d7cc1e01dabc95d54ed33ecd5d84293ca29ce2)

Native configuration is powerpc64le-unknown-linux-gnu

=== gcc tests ===


Running target unix
FAIL: gcc.dg/analyzer/analyzer-verbosity-2a.c (test for excess errors)
FAIL: gcc.dg/analyzer/analyzer-verbosity-3a.c (test for excess errors)
FAIL: gcc.dg/analyzer/edges-1.c (test for excess errors)
FAIL: gcc.dg/analyzer/file-1.c (test for excess errors)
FAIL: gcc.dg/analyzer/file-2.c (test for excess errors)
FAIL: gcc.dg/analyzer/file-paths-1.c (test for excess errors)
FAIL: gcc.dg/analyzer/file-pr58237.c (test for excess errors)
FAIL: gcc.dg/analyzer/pr99716-1.c (test for excess errors)
FAIL: c-c++-common/attr-retain-6.c  -Wc++-compat   (test for warnings, line 21)
FAIL: c-c++-common/attr-retain-6.c  -Wc++-compat   scan-assembler 
__libc_freeres_fn,"ax"
FAIL: c-c++-common/attr-retain-7.c  -Wc++-compat   (test for warnings, line 6)
FAIL: c-c++-common/attr-retain-7.c  -Wc++-compat   scan-assembler 
.data.foo,"awR"
FAIL: c-c++-common/attr-retain-8.c  -Wc++-compat   (test for warnings, line 5)
FAIL: c-c++-common/attr-retain-8.c  -Wc++-compat   scan-assembler .data.foo,"aw"
XPASS: gcc.dg/Wtrampolines.c standard descriptors (test for warnings, line 29)
XPASS: gcc.dg/graphite/pr69728.c scan-tree-dump graphite "loop nest optimized"
FAIL: gcc.dg/torture/float128-cmp-invalid.c   -O0  execution test
FAIL: gcc.dg/torture/float128-cmp-invalid.c   -O1  execution test
FAIL: gcc.dg/torture/float128-cmp-invalid.c   -O2  execution test
FAIL: gcc.dg/torture/float128-cmp-invalid.c   -O3 -g  execution test
FAIL: gcc.dg/torture/float128-cmp-invalid.c   -Os  execution test
FAIL: gcc.dg/torture/float128-cmp-invalid.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  execution test
FAIL: gcc.dg/torture/float128-cmp-invalid.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  execution test
FAIL: gcc.dg/torture/pr52451.c   -O0  execution test
FAIL: gcc.dg/torture/pr52451.c   -O1  execution test
FAIL: gcc.dg/torture/pr52451.c   -O2  execution test
FAIL: gcc.dg/torture/pr52451.c   -O3 -g  execution test
FAIL: gcc.dg/torture/pr52451.c   -Os  execution test
FAIL: gcc.dg/torture/pr52451.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  execution test
FAIL: gcc.dg/torture/pr52451.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  execution test
FAIL: gcc.dg/torture/pr91323.c   -O0  execution test
FAIL: gcc.dg/torture/pr91323.c   -O1  execution test
FAIL: gcc.dg/torture/pr91323.c   -O2  execution test
FAIL: gcc.dg/torture/pr91323.c   -O3 -g  execution test
FAIL: gcc.dg/torture/pr91323.c   -Os  execution test
FAIL: gcc.dg/torture/pr91323.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  execution test
FAIL: gcc.dg/torture/pr91323.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  execution test
XPASS: gcc.dg/tree-ssa/ssa-dom-cse-2.c scan-tree-dump optimized "return 28;"
UNRESOLVED: gcc.dg/vect/pr108950.c scan-tree-dump-not vect "widen_sum"
UNRESOLVED: gcc.dg/vect/pr108950.c -flto -ffat-lto-objects  scan-tree-dump-not 
vect "widen_sum"
FAIL: gcc.target/powerpc/pr56605.c scan-rtl-dump-times combine "(compare:CC 
((?:and|zero_extend):(?:DI) ((?:sub)?reg:[SD]I" 1
FAIL: gcc.target/powerpc/rlwimi-2.c scan-assembler-times (?n)^s+[a-z] 20217
FAIL: gcc.target/powerpc/rs6000-fpint.c scan-assembler-not stfiwx
XPASS: gcc.target/powerpc/ppc-fortran/ieee128-math.f90   -O  (test for excess 
errors)

=== gcc Summary ===

# of expected passes147357
# of unexpected failures38
# of unexpected successes   4
# of expected failures  916
# of unresolved testcases   2
# of unsupported tests  2763
/home/gccbuild/build/nightly/build-gcc-11/gcc/xgcc  version 11.4.1 20240409 
[releases/gcc-11 revision 
8b910e5a64a:b91b9e2d98e:84d7cc1e01dabc95d54ed33ecd5d84293ca29ce2] (GCC) 

=== gfortran tests ===


Running target unix
XPASS: gfortran.dg/large_real_kind_form_io_2.f90   -O0  execution test
XPASS: gfortran.dg/large_real_kind_form_io_2.f90   -O1  execution test
XPASS: gfortran.dg/large_real_kind_form_io_2.f90   -O2  execution test
XPASS: gfortran.dg/large_real_kind_form_io_2.f90   -O3 -fomit-frame-pointer 
-funroll-loops -fpeel-loops -ftracer -finline-functions  execution test
XPASS: gfortran.dg/large_real_kind_form_io_2.f90   -O3 -g  execution test
XPASS: gfortran.dg/large_real_kind_form_io_2.f90   -Os  execution test
FAIL: gfortran.dg/ieee/large_2.f90   -O0  execution test
FAIL: gfortran.dg/ieee/large_2.f90   -O1  execution test
FAIL: gfortran.dg/ieee/large_2.f90   -O2  execution test
FAIL: gfortran.dg/ieee/large_2.f90   -O3 -fomit-frame-pointer 

Results for 12.3.1 20240409 [remotes/origin/releases/gcc-12 r12-10316-g5f84bdad43] (GCC) testsuite on powerpc64le-unknown-linux-gnu

[Bill Seurer (POWER8) via Gcc-testresults]

git commit g:5f84bdad43d9b67d102ee9773240190db0c2e218
gcc-descr r12-10316-g5f84bdad43d9b6

power8
Linux 5.4.0-174-generic ppc64le
GNU Make 4.2.1

DejaGnu:
DejaGnu version 1.6.2
Expect version  5.45.4
Tcl version 8.6

64-bit

LAST_UPDATED: Tue Apr  9 02:52:49 UTC 2024 (revision r12-10316-g5f84bdad43)

Native configuration is powerpc64le-unknown-linux-gnu

=== gcc tests ===


Running target unix
XPASS: gcc.dg/Wtrampolines.c standard descriptors (test for warnings, line 29)
XPASS: gcc.dg/uninit-pred-7_a.c bogus warning (test for bogus messages, line 26)
XPASS: gcc.dg/guality/example.c   -O0  execution test
XPASS: gcc.dg/guality/example.c   -O1  -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/example.c  -Og -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/guality.c   -O0  execution test
XPASS: gcc.dg/guality/guality.c   -O1  -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/guality.c  -Og -DPREVENT_OPTIMIZATION  execution test
FAIL: gcc.dg/guality/inline-params-2.c   -O2  -DPREVENT_OPTIMIZATION  execution 
test
FAIL: gcc.dg/guality/inline-params-2.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION execution test
FAIL: gcc.dg/guality/inline-params-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION execution test
FAIL: gcc.dg/guality/inline-params-2.c   -O3 -g  -DPREVENT_OPTIMIZATION  
execution test
FAIL: gcc.dg/guality/inline-params-2.c   -Os  -DPREVENT_OPTIMIZATION  execution 
test
XPASS: gcc.dg/guality/ipa-sra-1.c   -O0  line 15 k == 3
XPASS: gcc.dg/guality/ipa-sra-1.c   -O1  -DPREVENT_OPTIMIZATION  line 15 k == 3
XPASS: gcc.dg/guality/ipa-sra-1.c  -Og -DPREVENT_OPTIMIZATION  line 15 k == 3
FAIL: gcc.dg/guality/loop-1.c   -O2  -DPREVENT_OPTIMIZATION  line 20 i == 1
FAIL: gcc.dg/guality/loop-1.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION line 20 i == 1
FAIL: gcc.dg/guality/loop-1.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 20 i == 1
FAIL: gcc.dg/guality/loop-1.c   -O3 -fomit-frame-pointer -funroll-loops 
-fpeel-loops -ftracer -finline-functions  -DPREVENT_OPTIMIZATION  line 20 i == 1
FAIL: gcc.dg/guality/loop-1.c   -O3 -g  -DPREVENT_OPTIMIZATION  line 20 i == 1
FAIL: gcc.dg/guality/pr36728-1.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 18 y == 2
FAIL: gcc.dg/guality/pr36728-1.c   -O3 -g  -DPREVENT_OPTIMIZATION  line 18 y == 
2
FAIL: gcc.dg/guality/pr36728-3.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 16 y == 2
FAIL: gcc.dg/guality/pr36728-3.c   -O3 -g  -DPREVENT_OPTIMIZATION  line 16 y == 
2
FAIL: gcc.dg/guality/pr41353-1.c  -Og -DPREVENT_OPTIMIZATION  line 28 i == 37
FAIL: gcc.dg/guality/pr41353-1.c  -Og -DPREVENT_OPTIMIZATION  line 28 i1 == 2 * 
37
FAIL: gcc.dg/guality/pr41353-1.c  -Og -DPREVENT_OPTIMIZATION  line 28 i2 == 3 * 
37
XPASS: gcc.dg/guality/pr41353-1.c  -Og -DPREVENT_OPTIMIZATION  line 28 j == 28 
+ 37
FAIL: gcc.dg/guality/pr41447-1.c   -O2  -DPREVENT_OPTIMIZATION  execution test
FAIL: gcc.dg/guality/pr41447-1.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION execution test
FAIL: gcc.dg/guality/pr41447-1.c   -O3 -g  -DPREVENT_OPTIMIZATION  execution 
test
FAIL: gcc.dg/guality/pr41447-1.c   -Os  -DPREVENT_OPTIMIZATION  execution test
FAIL: gcc.dg/guality/pr41616-1.c   -O2  -DPREVENT_OPTIMIZATION  execution test
FAIL: gcc.dg/guality/pr41616-1.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION execution test
FAIL: gcc.dg/guality/pr41616-1.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION execution test
FAIL: gcc.dg/guality/pr41616-1.c   -O3 -g  -DPREVENT_OPTIMIZATION  execution 
test
FAIL: gcc.dg/guality/pr43051-1.c   -O1  -DPREVENT_OPTIMIZATION  line 35 v == 1
FAIL: gcc.dg/guality/pr43051-1.c   -O1  -DPREVENT_OPTIMIZATION  line 40 v == 1
FAIL: gcc.dg/guality/pr43051-1.c   -O2  -DPREVENT_OPTIMIZATION  line 35 v == 1
FAIL: gcc.dg/guality/pr43051-1.c   -O2  -DPREVENT_OPTIMIZATION  line 40 v == 1
FAIL: gcc.dg/guality/pr43051-1.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION line 35 v == 1
FAIL: gcc.dg/guality/pr43051-1.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION line 40 v == 1
FAIL: gcc.dg/guality/pr43051-1.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 35 v == 1
FAIL: gcc.dg/guality/pr43051-1.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 40 v == 1
FAIL: gcc.dg/guality/pr43051-1.c   -O3 -fomit-frame-pointer -funroll-loops 
-fpeel-loops -ftracer -finline-functions  -DPREVENT_OPTIMIZATION  line 35 v == 1
FAIL: gcc.dg/guality/pr43051-1.c   -O3 -fomit-frame-pointer -funroll-loops 
-fpeel-loops -ftracer -finline-functions  -DPREVENT_OPTIMIZATION  line 40 v == 1

Results for 12.3.1 20240409 [releases/gcc-12 r12-10316-g5f84bdad43] (GCC) testsuite on powerpc64le-unknown-linux-gnu

[Bill Seurer (POWER9 IEEE128) via Gcc-testresults]

git commit g:5f84bdad43d9b67d102ee9773240190db0c2e218
gcc-descr r12-10316-g5f84bdad43d9b6

power9 IEEE128
Linux 6.9.0-0.rc2.20240402git026e680b0a08.24.fc41.ppc64le ppc64le
GNU Make 4.4.1

DejaGnu:
DejaGnu version 1.6.3
Expect version  5.45.4
Tcl version 8.6

64-bit

LAST_UPDATED: Tue Apr  9 03:02:15 UTC 2024 (revision r12-10316-g5f84bdad43)

Native configuration is powerpc64le-unknown-linux-gnu

=== gcc tests ===


Running target unix
FAIL: gcc.dg/analyzer/data-model-4.c (test for excess errors)
FAIL: gcc.dg/analyzer/torture/conftest-1.c   -O0  (test for excess errors)
FAIL: gcc.dg/analyzer/torture/conftest-1.c   -O1  (test for excess errors)
FAIL: gcc.dg/analyzer/torture/conftest-1.c   -O2  (test for excess errors)
FAIL: gcc.dg/analyzer/torture/conftest-1.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  (test for excess errors)
FAIL: gcc.dg/analyzer/torture/conftest-1.c   -O3 -g  (test for excess errors)
FAIL: gcc.dg/analyzer/torture/conftest-1.c   -Os  (test for excess errors)
XPASS: gcc.dg/Wtrampolines.c standard descriptors (test for warnings, line 29)
FAIL: gcc.dg/split-1.c (test for excess errors)
UNRESOLVED: gcc.dg/split-1.c compilation failed to produce executable
FAIL: gcc.dg/split-2.c (test for excess errors)
UNRESOLVED: gcc.dg/split-2.c compilation failed to produce executable
FAIL: gcc.dg/split-3.c (test for excess errors)
UNRESOLVED: gcc.dg/split-3.c compilation failed to produce executable
FAIL: gcc.dg/split-4.c (test for excess errors)
UNRESOLVED: gcc.dg/split-4.c compilation failed to produce executable
FAIL: gcc.dg/split-5.c (test for excess errors)
UNRESOLVED: gcc.dg/split-5.c compilation failed to produce executable
FAIL: gcc.dg/split-6.c (test for excess errors)
UNRESOLVED: gcc.dg/split-6.c compilation failed to produce executable
FAIL: gcc.dg/split-7.c (test for excess errors)
UNRESOLVED: gcc.dg/split-7.c compilation failed to produce executable
FAIL: gcc.dg/split-8.c (test for excess errors)
UNRESOLVED: gcc.dg/split-8.c compilation failed to produce executable
XPASS: gcc.dg/uninit-pred-7_a.c bogus warning (test for bogus messages, line 26)
FAIL: gcc.dg/torture/float128-cmp-invalid.c   -O0  execution test
FAIL: gcc.dg/torture/float128-cmp-invalid.c   -O1  execution test
FAIL: gcc.dg/torture/float128-cmp-invalid.c   -O2  execution test
FAIL: gcc.dg/torture/float128-cmp-invalid.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  execution test
FAIL: gcc.dg/torture/float128-cmp-invalid.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  execution test
FAIL: gcc.dg/torture/float128-cmp-invalid.c   -O3 -g  execution test
FAIL: gcc.dg/torture/float128-cmp-invalid.c   -Os  execution test
FAIL: gcc.dg/torture/float128-nan.c   -O0  execution test
FAIL: gcc.dg/torture/float128-nan.c   -O1  execution test
FAIL: gcc.dg/torture/float128-nan.c   -O2  execution test
FAIL: gcc.dg/torture/float128-nan.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  execution test
FAIL: gcc.dg/torture/float128-nan.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  execution test
FAIL: gcc.dg/torture/float128-nan.c   -O3 -g  execution test
FAIL: gcc.dg/torture/float128-nan.c   -Os  execution test
FAIL: gcc.dg/torture/pr52451.c   -O0  execution test
FAIL: gcc.dg/torture/pr52451.c   -O1  execution test
FAIL: gcc.dg/torture/pr52451.c   -O2  execution test
FAIL: gcc.dg/torture/pr52451.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  execution test
FAIL: gcc.dg/torture/pr52451.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  execution test
FAIL: gcc.dg/torture/pr52451.c   -O3 -g  execution test
FAIL: gcc.dg/torture/pr52451.c   -Os  execution test
FAIL: gcc.dg/torture/pr91323.c   -O0  execution test
FAIL: gcc.dg/torture/pr91323.c   -O1  execution test
FAIL: gcc.dg/torture/pr91323.c   -O2  execution test
FAIL: gcc.dg/torture/pr91323.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  execution test
FAIL: gcc.dg/torture/pr91323.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  execution test
FAIL: gcc.dg/torture/pr91323.c   -O3 -g  execution test
FAIL: gcc.dg/torture/pr91323.c   -Os  execution test
FAIL: gcc.dg/tree-prof/split-1.c compilation,  -fprofile-generate 
-D_PROFILE_GENERATE
UNRESOLVED: gcc.dg/tree-prof/split-1.c compilation,  -fprofile-use 
-D_PROFILE_USE
UNRESOLVED: gcc.dg/tree-prof/split-1.c execution,-fprofile-generate 
-D_PROFILE_GENERATE
UNRESOLVED: gcc.dg/tree-prof/split-1.c execution,-fprofile-use 
-D_PROFILE_USE
XPASS: gcc.dg/tree-ssa/ssa-dom-cse-2.c scan-tree-dump optimized "return 28;"
FAIL: gcc.target/powerpc/nan128-1.c execution test
FAIL: gcc.target/powerpc/pr105334.c (test for excess errors)
FAIL: gcc.target/powerpc/pr56605.c scan-rtl-dump-times combine "(compare:CC 
((?:and|zero_extend):(?:[SD]I) ((?:sub)?reg:[SD]I" 1
FAIL: gcc.target/powerpc/rlwimi-2.c scan-assembler-times (?n)^s+[a-z] 20217
FAIL: gcc.target/powerpc/rs6000-fpint.c scan-assembler-not stfiwx

Results for 14.0.1 20240405 (experimental) [master r14-9797-g5192e72e7e1fe6] (GCC) testsuite on riscv64-suse-linux-gnu

[Andreas Schwab via Gcc-testresults]

LAST_UPDATED: Fri Apr  5 00:39:54 UTC 2024 (revision r14-9797-g5192e72e7e1fe6)

=== acats tests ===

=== acats Summary ===
# of expected passes2328
# of unexpected failures0
Native configuration is riscv64-suse-linux-gnu

=== g++ tests ===


Running target unix
WARNING: c-c++-common/asan/pr59063-2.c   -O0  (test for excess errors) program 
timed out.
FAIL: c-c++-common/asan/pr59063-2.c   -O0  (test for excess errors)
FAIL: c-c++-common/asan/pr59063-2.c   -O0  execution test
WARNING: c-c++-common/asan/pr59063-2.c   -O1  (test for excess errors) program 
timed out.
FAIL: c-c++-common/asan/pr59063-2.c   -O1  (test for excess errors)
FAIL: c-c++-common/asan/pr59063-2.c   -O1  execution test
WARNING: c-c++-common/asan/pr59063-2.c   -O2  (test for excess errors) program 
timed out.
FAIL: c-c++-common/asan/pr59063-2.c   -O2  (test for excess errors)
FAIL: c-c++-common/asan/pr59063-2.c   -O2  execution test
WARNING: c-c++-common/asan/pr59063-2.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  (test for excess errors) program timed out.
FAIL: c-c++-common/asan/pr59063-2.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  (test for excess errors)
FAIL: c-c++-common/asan/pr59063-2.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  execution test
WARNING: c-c++-common/asan/pr59063-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  (test for excess errors) program timed out.
FAIL: c-c++-common/asan/pr59063-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  (test for excess errors)
FAIL: c-c++-common/asan/pr59063-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  execution test
WARNING: c-c++-common/asan/pr59063-2.c   -O3 -g  (test for excess errors) 
program timed out.
FAIL: c-c++-common/asan/pr59063-2.c   -O3 -g  (test for excess errors)
FAIL: c-c++-common/asan/pr59063-2.c   -O3 -g  execution test
WARNING: c-c++-common/asan/pr59063-2.c   -Os  (test for excess errors) program 
timed out.
FAIL: c-c++-common/asan/pr59063-2.c   -Os  (test for excess errors)
FAIL: c-c++-common/asan/pr59063-2.c   -Os  execution test
FAIL: c-c++-common/spec-barrier-1.c  -std=gnu++14 (test for excess errors)
FAIL: c-c++-common/spec-barrier-1.c  -std=gnu++17 (test for excess errors)
FAIL: c-c++-common/spec-barrier-1.c  -std=gnu++20 (test for excess errors)
FAIL: c-c++-common/spec-barrier-1.c  -std=gnu++98 (test for excess errors)
FAIL: g++.dg/guality/pr55665.C   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  line 23 p == 40
WARNING: g++.dg/modules/pr99023_b.X -std=c++2a  dg-regexp 6 was found: 
"[^\\n]*: note: include '[^\\n]*[/]initializer_list' translated to 
import\\n" program timed out.
WARNING: g++.dg/modules/pr99023_b.X -std=c++2b  dg-regexp 6 was found: 
"[^\\n]*: note: include '[^\\n]*[/]initializer_list' translated to 
import\\n" program timed out.
FAIL: g++.dg/modules/xtreme-header-2_a.H -std=c++17 (test for excess errors)
FAIL: g++.dg/modules/xtreme-header-2_a.H -std=c++2a (test for excess errors)
FAIL: g++.dg/modules/xtreme-header-2_a.H -std=c++2b (test for excess errors)
FAIL: g++.dg/modules/xtreme-header-2_a.H module-cmi  
(gcm.cache/\$srcdir/g++.dg/modules/xtreme-header-2_a.H.gcm)
FAIL: g++.dg/modules/xtreme-header-2_a.H module-cmi  
(gcm.cache/\$srcdir/g++.dg/modules/xtreme-header-2_a.H.gcm)
FAIL: g++.dg/modules/xtreme-header-2_a.H module-cmi  
(gcm.cache/\$srcdir/g++.dg/modules/xtreme-header-2_a.H.gcm)
FAIL: g++.dg/modules/xtreme-header-2_b.C -std=c++17 (test for excess errors)
FAIL: g++.dg/modules/xtreme-header-2_b.C -std=c++2a (test for excess errors)
FAIL: g++.dg/modules/xtreme-header-2_b.C -std=c++2b (test for excess errors)
FAIL: g++.dg/modules/xtreme-header-2_c.C -std=c++17 (test for excess errors)
FAIL: g++.dg/modules/xtreme-header-2_c.C -std=c++2a (test for excess errors)
FAIL: g++.dg/modules/xtreme-header-2_c.C -std=c++2b (test for excess errors)
FAIL: g++.dg/modules/xtreme-header_a.H -std=c++17 (test for excess errors)
FAIL: g++.dg/modules/xtreme-header_a.H -std=c++2a (test for excess errors)
FAIL: g++.dg/modules/xtreme-header_a.H -std=c++2b (test for excess errors)
FAIL: g++.dg/modules/xtreme-header_a.H module-cmi  
(gcm.cache/\$srcdir/g++.dg/modules/xtreme-header_a.H.gcm)
FAIL: g++.dg/modules/xtreme-header_a.H module-cmi  
(gcm.cache/\$srcdir/g++.dg/modules/xtreme-header_a.H.gcm)
FAIL: g++.dg/modules/xtreme-header_a.H module-cmi  
(gcm.cache/\$srcdir/g++.dg/modules/xtreme-header_a.H.gcm)
FAIL: g++.dg/modules/xtreme-header_b.C -std=c++17 (test for excess errors)
FAIL: g++.dg/modules/xtreme-header_b.C -std=c++2a (test for excess errors)
FAIL: g++.dg/modules/xtreme-header_b.C -std=c++2b (test for excess errors)
FAIL: g++.dg/vect/pr84556.cc  -std=c++14 execution test
FAIL: g++.dg/vect/pr84556.cc  -std=c++17 execution test
FAIL: g++.dg/vect/pr84556.cc  -std=c++20 execution test
FAIL: g++.dg/vect/pr95401.cc  -std=c++14 (test for excess errors)
FAIL: g++.dg/vect/pr95401.cc  -std=c++17 

Re: [PATCH/RFC] On the use of -funreachable-traps to deal with PR 109627

[Jeff Law]

On 4/8/24 5:04 PM, Iain Sandoe wrote:

Hi

PR 109627 is about functions that have had their bodies completely elided, but 
still have the wrappers for EH frames (either .cfi_xxx or LFSxx/LFExx).

These are causing issues for some linkers because such functions result in FDEs 
with a 0 code extent.

The simplest representation of this is (from PR109527)

void foo () { __builtin_unreachable (); }
With the possibility of sounding like a broken record, I think 
__builtin_unreachable is fundamentally flawed.   It generates no code 
and just lets the program continue if ever "reached".  This is a 
security risk and (IMHO) just plain silly.  We're in a situation that is 
never supposed to happen, so continuing to execute code is just asking 
for problems.


If it were up to me, I'd have __builtin_unreachable emit a trap or 
similar construct that should (in general) halt execution.


Jeff

[gcc(refs/users/meissner/heads/work164-dmf)] Update ChangeLog.*

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:dd2213d6a6c95bd6ba7cdc2a5da4fd44ed57f1e4

commit dd2213d6a6c95bd6ba7cdc2a5da4fd44ed57f1e4
Author: Michael Meissner 
Date:   Tue Apr 9 00:00:15 2024 -0400

Update ChangeLog.*

Diff:
---
 gcc/ChangeLog.dmf | 464 ++
 1 file changed, 464 insertions(+)

diff --git a/gcc/ChangeLog.dmf b/gcc/ChangeLog.dmf
index 7182dca56a7..4017ffe6242 100644
--- a/gcc/ChangeLog.dmf
+++ b/gcc/ChangeLog.dmf
@@ -1,3 +1,467 @@
+ Branch work164-dmf, patch #122 
+
+Add xvrlw support.
+
+2024-04-08  Michael Meissner  
+
+gcc/
+
+   * config/rs6000/altivec.md (xvrlw): New insn.
+   * config/rs6000/rs6000.h (TARGET_XVRLW): New macro.
+
+gcc/testsuite/
+
+   * gcc.target/powerpc/xvrlw.c: New test.
+
+ Branch work164-dmf, patch #121 
+
+Add paddis support.
+
+2024-03-22  Michael Meissner  
+
+gcc/
+
+   * config/rs6000/constraints.md (eU): New constraint.
+   (eV): Likewise.
+   * config/rs6000/predicates.md (paddis_operand): New predicate.
+   (paddis_paddi_operand): Likewise.
+   (add_operand): Add paddis support.
+   * config/rs6000/rs6000.cc (num_insns_constant_gpr): Add paddis support.
+   (num_insns_constant_multi): Likewise.
+   (print_operand): Add %B for paddis support.
+   * config/rs6000/rs6000.h (TARGET_PADDIS): New macro.
+   (SIGNED_INTEGER_32BIT_P): Likewise.
+   * config/rs6000/rs6000.md (isa attribute): Add paddis support.
+   (enabled attribute); Likewise.
+   (add3): Likewise.
+   (adddi3 splitter): New splitter for paddis.
+   (movdi_internal64): Add paddis support.
+   (movdi splitter): New splitter for paddis.
+
+gcc/testsuite/
+
+   * gcc.target/powerpc/paddis.c: New test.
+
+ Branch work164-dmf, patch #120 
+
+Add -mcpu=future2
+
+2024-04-08  Michael Meissner  
+
+gcc/
+
+   * config/rs6000/aix71.h (ASM_CPU_SPEC): Add support for -mcpu=future2.
+   * config/rs6000/aix72.h (ASM_CPU_SPEC): Likewise.
+   * config/rs6000/aix73.h (ASM_CPU_SPEC): Likewise.
+   * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Define
+   _ARCH_PWR_FUTURE2 if -mcpu=future.
+   * config/rs6000/rs6000-cpus.def (ISA_FUTURE2_MASKS_SERVER): New macro.
+   (POWERPC_MASKS): Add support for -mcpu=future2.
+   (future2 processor): Likewise.
+   * config/rs6000/rs6000-tables.opt: Regenerate
+   * config/rs6000/rs6000.h (ASM_CPU_SPEC): Add support for -mcpu=future2.
+   * config/rs6000/rs6000.opt (-mfuture2): New internal option.
+
+gcc/testsuite/
+
+   * lib/target-supports.exp (check_effective_target_powerpc_future2_ok):
+   New effective target test.
+
+ Branch work164-dmf, patch #111 
+
+Add saturating subtract built-ins.
+
+This patch adds support for a saturating subtract built-in function that may be
+added to a future PowerPC processor.  Note, if it is added, the name of the
+built-in function may change before GCC 13 is released.  If the name changes,
+we will submit a patch changing the name.
+
+I also added support for providing dense math built-in functions, even though
+at present, we have not added any new built-in functions for dense math.  It is
+likely we will want to add new dense math built-in functions as the dense math
+support is fleshed out.
+
+The patches have been tested on both little and big endian systems.  Can I 
check
+it into the master branch?
+
+2024-04-08   Michael Meissner  
+
+gcc/
+
+   * config/rs6000/rs6000-builtin.cc (rs6000_invalid_builtin): Add support
+   for flagging invalid use of future built-in functions.
+   (rs6000_builtin_is_supported): Add support for future built-in
+   functions.
+   * config/rs6000/rs6000-builtins.def (__builtin_saturate_subtract32): New
+   built-in function for -mcpu=future.
+   (__builtin_saturate_subtract64): Likewise.
+   * config/rs6000/rs6000-gen-builtins.cc (enum bif_stanza): Add stanzas
+   for -mcpu=future built-ins.
+   (stanza_map): Likewise.
+   (enable_string): Likewise.
+   (struct attrinfo): Likewise.
+   (parse_bif_attrs): Likewise.
+   (write_decls): Likewise.
+   * config/rs6000/rs6000.md (sat_sub3): Add saturating subtract
+   built-in insn declarations.
+   (sat_sub3_dot): Likewise.
+   (sat_sub3_dot2): Likewise.
+   * doc/extend.texi (Future PowerPC built-ins): New section.
+
+gcc/testsuite/
+
+   * gcc.target/powerpc/subfus-1.c: New test.
+   * gcc.target/powerpc/subfus-2.c: Likewise.
+
+ Branch work164-dmf, patch #110 
+
+Support load/store vector with right length.
+
+This patch adds support for new instructions that may be added to the PowerPC
+architecture in the future to enhance the load and store vector with length
+instructions.
+
+The current instructions 

Results for 14.0.1 20240408 (experimental) [master r14-9841-g1e3312a25a7] (GCC) testsuite on s390x-ibm-linux-gnu arch14

[stefansf--- via Gcc-testresults]

LAST_UPDATED: Mon Apr  8 17:05:13 UTC 2024 (revision r14-9841-g1e3312a25a7)

=== acats tests ===
FAIL:   cb1010a

=== acats Summary ===
# of expected passes2327
# of unexpected failures1
Native configuration is s390x-ibm-linux-gnu arch14

=== gcc tests ===


Running target unix/-m31
FAIL: gcc.c-torture/execute/920501-4.c   -O1  execution test
FAIL: gcc.c-torture/execute/920501-4.c   -O2  execution test
FAIL: gcc.c-torture/execute/920501-4.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  execution test
FAIL: gcc.c-torture/execute/920501-4.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  execution test
FAIL: gcc.c-torture/execute/920501-4.c   -O3 -g  execution test
FAIL: gcc.c-torture/execute/920501-4.c   -Os  execution test
FAIL: gcc.c-torture/execute/920501-5.c   -O1  execution test
FAIL: gcc.c-torture/execute/920501-5.c   -O2  execution test
FAIL: gcc.c-torture/execute/920501-5.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  execution test
FAIL: gcc.c-torture/execute/920501-5.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  execution test
FAIL: gcc.c-torture/execute/920501-5.c   -O3 -g  execution test
FAIL: gcc.c-torture/execute/920501-5.c   -Os  execution test
FAIL: gcc.c-torture/execute/920721-4.c   -O2  execution test
FAIL: gcc.c-torture/execute/920721-4.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  execution test
FAIL: gcc.c-torture/execute/920721-4.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  execution test
FAIL: gcc.c-torture/execute/920721-4.c   -O3 -fomit-frame-pointer 
-funroll-loops -fpeel-loops -ftracer -finline-functions  execution test
FAIL: gcc.c-torture/execute/920721-4.c   -O3 -g  execution test
FAIL: gcc.c-torture/execute/920721-4.c   -Os  execution test
FAIL: gcc.dg/analyzer/pr94688.c (test for excess errors)
FAIL: gcc.dg/analyzer/pr95152-5.c (test for excess errors)
FAIL: c-c++-common/asan/pointer-compare-1.c   -O0  output pattern test
FAIL: c-c++-common/asan/pointer-compare-1.c   -O1  output pattern test
FAIL: c-c++-common/asan/pointer-compare-1.c   -O2  output pattern test
FAIL: c-c++-common/asan/pointer-compare-1.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  output pattern test
FAIL: c-c++-common/asan/pointer-compare-1.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  output pattern test
FAIL: c-c++-common/asan/pointer-compare-1.c   -O3 -g  output pattern test
FAIL: c-c++-common/asan/pointer-compare-1.c   -Os  output pattern test
FAIL: c-c++-common/asan/pointer-subtract-3.c   -O0  execution test
FAIL: c-c++-common/asan/pointer-subtract-3.c   -O1  execution test
FAIL: c-c++-common/asan/pointer-subtract-3.c   -O2  execution test
FAIL: c-c++-common/asan/pointer-subtract-3.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  execution test
FAIL: c-c++-common/asan/pointer-subtract-3.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  execution test
FAIL: c-c++-common/asan/pointer-subtract-3.c   -O3 -g  execution test
FAIL: c-c++-common/asan/pointer-subtract-3.c   -Os  execution test
FAIL: c-c++-common/asan/pr64820.c   -O0  output pattern test
FAIL: c-c++-common/asan/pr64820.c   -O1  output pattern test
FAIL: c-c++-common/asan/pr64820.c   -O2  output pattern test
FAIL: c-c++-common/asan/pr64820.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  output pattern test
FAIL: c-c++-common/asan/pr64820.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  output pattern test
FAIL: c-c++-common/asan/pr64820.c   -O3 -g  output pattern test
FAIL: c-c++-common/asan/pr64820.c   -Os  output pattern test
FAIL: c-c++-common/asan/use-after-return-1.c   -O0  output pattern test
FAIL: c-c++-common/asan/use-after-return-1.c   -O1  output pattern test
FAIL: c-c++-common/asan/use-after-return-1.c   -O2  output pattern test
FAIL: c-c++-common/asan/use-after-return-1.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  output pattern test
FAIL: c-c++-common/asan/use-after-return-1.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  output pattern test
FAIL: c-c++-common/asan/use-after-return-1.c   -O3 -g  output pattern test
FAIL: c-c++-common/asan/use-after-return-1.c   -Os  output pattern test
FAIL: c-c++-common/vector-subscript-4.c  -Wc++-compat   scan-tree-dump-not 
optimized "vector"
FAIL: gcc.dg/auto-init-uninit-17.c unconditional (test for warnings, line 14)
FAIL: gcc.dg/gcc-have-sync-compare-and-swap.c (test for excess errors)
FAIL: gcc.dg/loop-9.c scan-rtl-dump loop2_invariant "Decided"
FAIL: gcc.dg/loop-9.c scan-rtl-dump loop2_invariant "without introducing a new 
temporary register"
FAIL: gcc.dg/lower-subreg-1.c scan-rtl-dump subreg1 "Splitting reg"
FAIL: gcc.dg/sms-compare-debug-1.c (test for excess errors)
FAIL: gcc.dg/store_merging_5.c scan-tree-dump-times store-merging "MEM 
 [.*]" 1
FAIL: gcc.dg/uninit-17.c unconditional (test for warnings, line 14)
FAIL: c-c++-common/goacc/firstprivate-mappings-1.c 

[gcc(refs/users/meissner/heads/work164-dmf)] Update ChangeLog.*

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:49632a09712aad4bde818f869b02faadade8e1da

commit 49632a09712aad4bde818f869b02faadade8e1da
Author: Michael Meissner 
Date:   Mon Apr 8 23:57:17 2024 -0400

Update ChangeLog.*

Diff:
---
 gcc/ChangeLog.dmf | 161 +-
 1 file changed, 160 insertions(+), 1 deletion(-)

diff --git a/gcc/ChangeLog.dmf b/gcc/ChangeLog.dmf
index dfdbcd4a4b4..7182dca56a7 100644
--- a/gcc/ChangeLog.dmf
+++ b/gcc/ChangeLog.dmf
@@ -1,6 +1,165 @@
+ Branch work164-dmf, patch #11 from work164 

+
+Add -mcpu=future tuning support.
+
+This patch makes -mtune=future use the same tuning decision as -mtune=power11.
+
+2024-04-08  Michael Meissner  
+
+gcc/
+
+   * config/rs6000/power10.md (all reservations): Add future as an
+   alterntive to power10 and power11.
+
+ Branch work164-dmf, patch #10 from work164 

+
+Add -mcpu=future support.
+
+This patch adds the future option to the -mcpu= and -mtune= switches.
+
+This patch treats the future like a power11 in terms of costs and reassociation
+width.
+
+This patch issues a ".machine future" to the assembly file if you use
+-mcpu=power11.
+
+This patch defines _ARCH_PWR_FUTURE if the user uses -mcpu=future.
+
+This patch allows GCC to be configured with the --with-cpu=future and
+--with-tune=future options.
+
+This patch passes -mfuture to the assembler if the user uses -mcpu=future.
+
+2024-04-08  Michael Meissner  
+
+gcc/
+
+   * config.gcc (rs6000*-*-*, powerpc*-*-*): Add support for power11.
+   * config/rs6000/aix71.h (ASM_CPU_SPEC): Add support for -mcpu=power11.
+   * config/rs6000/aix72.h (ASM_CPU_SPEC): Likewise.
+   * config/rs6000/aix73.h (ASM_CPU_SPEC): Likewise.
+   * config/rs6000/driver-rs6000.cc (asm_names): Likewise.
+   * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Define
+   _ARCH_PWR_FUTURE if -mcpu=future.
+   * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): New define.
+   (POWERPC_MASKS): Add future isa bit.
+   (power11 cpu): Add future definition.
+   * config/rs6000/rs6000-opts.h (PROCESSOR_FUTURE): Add future processor.
+   * config/rs6000/rs6000-string.cc (expand_compare_loop): Likewise.
+   * config/rs6000/rs6000-tables.opt: Regenerate.
+   * config/rs6000/rs6000.cc (rs6000_option_override_internal): Add future
+   support.
+   (rs6000_machine_from_flags): Likewise.
+   (rs6000_reassociation_width): Likewise.
+   (rs6000_adjust_cost): Likewise.
+   (rs6000_issue_rate): Likewise.
+   (rs6000_sched_reorder): Likewise.
+   (rs6000_sched_reorder2): Likewise.
+   (rs6000_register_move_cost): Likewise.
+   (rs6000_opt_masks): Likewise.
+   * config/rs6000/rs6000.h (ASM_CPU_SPEC): Likewise.
+   * config/rs6000/rs6000.md (cpu attribute): Add future.
+   * config/rs6000/rs6000.opt (-mpower11): Add internal future ISA flag.
+   * doc/invoke.texi (RS/6000 and PowerPC Options): Document -mcpu=future.
+
+ Branch work164-dmf, patch #3 from work164 

+
+Add -mcpu=power11 tests.
+
+This patch adds some simple tests for -mcpu=power11 support.  In order to run
+these tests, you need an assembler that supports the appropriate option for
+supporting the Power11 processor (-mpower11 under Linux or -mpwr11 under AIX).
+
+2024-04-08  Michael Meissner  
+
+gcc/testsuite/
+
+   * gcc.target/powerpc/power11-1.c: New test.
+   * gcc.target/powerpc/power11-2.c: Likewise.
+   * gcc.target/powerpc/power11-3.c: Likewise.
+   * lib/target-supports.exp (check_effective_target_power11_ok): Add new
+   effective target.
+
+ Branch work164-dmf, patch #2 from work164 

+
+Add -mcpu=power11 tuning support.
+
+This patch makes -mtune=power11 use the same tuning decisions as 
-mtune=power10.
+
+2024-04-08  Michael Meissner  
+
+gcc/
+
+   * config/rs6000/power10.md (all reservations): Add power11 as an
+   alternative to power10.
+
+ Branch work164-dmf, patch #1 from work164 

+
+Add -mcpu=power11 support.
+
+This patch adds the power11 option to the -mcpu= and -mtune= switches.
+
+This patch treats the power11 like a power10 in terms of costs and 
reassociation
+width.
+
+This patch issues a ".machine power11" to the assembly file if you use
+-mcpu=power11.
+
+This patch defines _ARCH_PWR11 if the user uses -mcpu=power11.
+
+This patch allows GCC to be configured with the --with-cpu=power11 and
+--with-tune=power11 options.
+
+This patch passes -mpwr11 to the assembler if the user uses -mcpu=power11.
+
+This patch adds support for using "power11" in the __builtin_cpu_is built-in
+function.
+
+2024-04-08  Michael Meissner  
+
+gcc/
+
+   * config.gcc (rs6000*-*-*, powerpc*-*-*): Add support for power11.
+   * config/rs6000/aix71.h (ASM_CPU_SPEC): Add support 

Results for 14.0.1 20240409 (experimental) [master revision gcc-14-9852-g18e94e04dae] (GCC) testsuite on armv8l-unknown-linux-gnueabihf

[ci_notify--- via Gcc-testresults]

# From https://ci.linaro.org/job/tcwg_gcc_check--master-arm-build/1949/:
LAST_UPDATED: 2024-04-09T03:30:27+00:00 (master revision 
gcc-14-9852-g18e94e04dae) armv8l-unknown-linux-gnueabihf

Native configuration is armv8l-unknown-linux-gnueabihf

=== libatomic tests ===


Running target tcwg-local

=== libatomic Summary ===

# of expected passes44
# of unsupported tests  5
=== libgomp tests ===


Running target tcwg-local
XPASS: libgomp.c/alloc-pinned-1.c execution test
XPASS: libgomp.c/alloc-pinned-2.c execution test

=== libgomp Summary ===

# of expected passes16105
# of unexpected successes   2
# of expected failures  284
# of unsupported tests  700
=== libitm tests ===


Running target tcwg-local

=== libitm Summary ===

# of expected passes44
# of expected failures  3
# of unsupported tests  1
=== libstdc++ tests ===


Running target tcwg-local
FAIL: 19_diagnostics/stacktrace/current.cc  -std=gnu++23 execution test
FAIL: 19_diagnostics/stacktrace/current.cc  -std=gnu++26 execution test
FAIL: 19_diagnostics/stacktrace/entry.cc  -std=gnu++23 execution test
FAIL: 19_diagnostics/stacktrace/entry.cc  -std=gnu++26 execution test
FAIL: 19_diagnostics/stacktrace/output.cc  -std=gnu++23 execution test
FAIL: 19_diagnostics/stacktrace/output.cc  -std=gnu++26 execution test
FAIL: 19_diagnostics/stacktrace/stacktrace.cc  -std=gnu++23 execution test
FAIL: 19_diagnostics/stacktrace/stacktrace.cc  -std=gnu++26 execution test
FAIL: 29_atomics/atomic/compare_exchange_padding.cc  -std=gnu++20 execution test
FAIL: 29_atomics/atomic/compare_exchange_padding.cc  -std=gnu++26 execution test

=== libstdc++ Summary ===

# of expected passes18273
# of unexpected failures10
# of expected failures  126
# of unsupported tests  767
=== gcc tests ===


Running target tcwg-local
XPASS: gcc.dg/Wstringop-overflow-47.c pr97027 (test for warnings, line 72)
XPASS: gcc.dg/Wstringop-overflow-47.c pr97027 (test for warnings, line 77)
XPASS: gcc.dg/Wstringop-overflow-47.c pr97027 note (test for warnings, line 68)
FAIL: gcc.dg/fold-copysign-1.c scan-tree-dump-times cddce1 "= ABS_EXPR" 1
FAIL: gcc.dg/fold-copysign-1.c scan-tree-dump-times cddce1 "__builtin_copysign" 
1
FAIL: gcc.dg/pr55152-2.c scan-tree-dump-times optimized ".COPYSIGN" 1
FAIL: gcc.dg/pr55152-2.c scan-tree-dump-times optimized "ABS_EXPR" 1
XPASS: gcc.dg/guality/example.c   -O0  execution test
XPASS: gcc.dg/guality/example.c  -Og -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/guality.c   -O0  execution test
XPASS: gcc.dg/guality/guality.c   -O1  -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/guality.c   -O2  -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/guality.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION execution test
XPASS: gcc.dg/guality/guality.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION execution test
XPASS: gcc.dg/guality/guality.c   -O3 -g  -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/guality.c   -Os  -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/guality.c  -Og -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/inline-params.c   -O2  -DPREVENT_OPTIMIZATION  execution 
test
XPASS: gcc.dg/guality/inline-params.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION execution test
XPASS: gcc.dg/guality/inline-params.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION execution test
XPASS: gcc.dg/guality/inline-params.c   -O3 -g  -DPREVENT_OPTIMIZATION  
execution test
XPASS: gcc.dg/guality/inline-params.c   -Os  -DPREVENT_OPTIMIZATION  execution 
test
FAIL: gcc.dg/guality/loop-1.c   -O3 -fomit-frame-pointer -funroll-loops 
-fpeel-loops -ftracer -finline-functions  -DPREVENT_OPTIMIZATION  line 20 i == 1
FAIL: gcc.dg/guality/pr36728-2.c   -O2  -DPREVENT_OPTIMIZATION  line 16 arg5 == 
5
FAIL: gcc.dg/guality/pr36728-2.c   -O2  -DPREVENT_OPTIMIZATION  line 18 arg5 == 
5
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION line 16 arg5 == 5
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION line 18 arg5 == 5
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 16 arg1 == 1
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 16 arg2 == 2
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 16 arg3 == 3
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  

[gcc(refs/users/meissner/heads/work164-dmf)] Add paddis support.

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:a111516557ce455bbcade91f94299af03c9f3bb4

commit a111516557ce455bbcade91f94299af03c9f3bb4
Author: Michael Meissner 
Date:   Mon Apr 8 23:46:29 2024 -0400

Add paddis support.

2024-03-22  Michael Meissner  

gcc/

* config/rs6000/constraints.md (eU): New constraint.
(eV): Likewise.
* config/rs6000/predicates.md (paddis_operand): New predicate.
(paddis_paddi_operand): Likewise.
(add_operand): Add paddis support.
* config/rs6000/rs6000.cc (num_insns_constant_gpr): Add paddis 
support.
(num_insns_constant_multi): Likewise.
(print_operand): Add %B for paddis support.
* config/rs6000/rs6000.h (TARGET_PADDIS): New macro.
(SIGNED_INTEGER_32BIT_P): Likewise.
* config/rs6000/rs6000.md (isa attribute): Add paddis support.
(enabled attribute); Likewise.
(add3): Likewise.
(adddi3 splitter): New splitter for paddis.
(movdi_internal64): Add paddis support.
(movdi splitter): New splitter for paddis.

gcc/testsuite/

* gcc.target/powerpc/paddis.c: New test.

Diff:
---
 gcc/config/rs6000/constraints.md  | 10 
 gcc/config/rs6000/predicates.md   | 52 -
 gcc/config/rs6000/rs6000.cc   | 25 
 gcc/config/rs6000/rs6000.h|  4 ++
 gcc/config/rs6000/rs6000.md   | 96 ++-
 gcc/testsuite/gcc.target/powerpc/paddis.c | 24 
 6 files changed, 197 insertions(+), 14 deletions(-)

diff --git a/gcc/config/rs6000/constraints.md b/gcc/config/rs6000/constraints.md
index 277a30a8245..4d8d21fd6bb 100644
--- a/gcc/config/rs6000/constraints.md
+++ b/gcc/config/rs6000/constraints.md
@@ -222,6 +222,16 @@
   "An IEEE 128-bit constant that can be loaded into VSX registers."
   (match_operand 0 "easy_vector_constant_ieee128"))
 
+(define_constraint "eU"
+  "@internal integer constant that can be loaded with paddis"
+  (and (match_code "const_int")
+   (match_operand 0 "paddis_operand")))
+
+(define_constraint "eV"
+  "@internal integer constant that can be loaded with paddis + paddi"
+  (and (match_code "const_int")
+   (match_operand 0 "paddis_paddi_operand")))
+
 ;; Floating-point constraints.  These two are defined so that insn
 ;; length attributes can be calculated exactly.
 
diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md
index b325000690b..0b7c0bf4b0f 100644
--- a/gcc/config/rs6000/predicates.md
+++ b/gcc/config/rs6000/predicates.md
@@ -369,6 +369,53 @@
   return SIGNED_INTEGER_34BIT_P (INTVAL (op));
 })
 
+;; Return 1 if op is a 64-bit constant that uses the paddis instruction
+(define_predicate "paddis_operand"
+  (match_code "const_int")
+{
+  if (!TARGET_PADDIS && TARGET_POWERPC64)
+return 0;
+
+  /* If addi, addis, or paddi can handle the number, don't return true.  */
+  HOST_WIDE_INT value = INTVAL (op);
+  if (SIGNED_INTEGER_34BIT_P (value))
+return false;
+
+  /* If the number is too large for padds, return false.  */
+  if (!SIGNED_INTEGER_32BIT_P (value >> 32))
+return false;
+
+  /* If the bottom 32-bits are non-zero, paddis can't handle it.  */
+  if ((value & HOST_WIDE_INT_C(0x)) != 0)
+return false;
+
+  return true;
+})
+
+;; Return 1 if op is a 64-bit constant that needs the paddis instruction and an
+;; addi/addis/paddi instruction combination.
+(define_predicate "paddis_paddi_operand"
+  (match_code "const_int")
+{
+  if (!TARGET_PADDIS && TARGET_POWERPC64)
+return 0;
+
+  /* If addi, addis, or paddi can handle the number, don't return true.  */
+  HOST_WIDE_INT value = INTVAL (op);
+  if (SIGNED_INTEGER_34BIT_P (value))
+return false;
+
+  /* If the number is too large for padds, return false.  */
+  if (!SIGNED_INTEGER_32BIT_P (value >> 32))
+return false;
+
+  /* If the bottom 32-bits are zero, we can use paddis alone to handle it.  */
+  if ((value & HOST_WIDE_INT_C(0x)) == 0)
+return false;
+
+  return true;
+})
+
 ;; Return 1 if op is a register that is not special.
 ;; Disallow (SUBREG:SF (REG:SI)) and (SUBREG:SI (REG:SF)) on VSX systems where
 ;; you need to be careful in moving a SFmode to SImode and vice versa due to
@@ -1050,7 +1097,10 @@
   (if_then_else (match_code "const_int")
 (match_test "satisfies_constraint_I (op)
 || satisfies_constraint_L (op)
-|| satisfies_constraint_eI (op)")
+|| satisfies_constraint_eI (op)
+|| satisfies_constraint_eU (op)
+|| satisfies_constraint_eV (op)")
+
 (match_operand 0 "gpc_reg_operand")))
 
 ;; Return 1 if the operand is either a non-special register, or 0, or -1.
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 42e9fa1dc56..963c42df3d7 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ 

[gcc(refs/users/meissner/heads/work164-dmf)] Add xvrlw support.

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:6f6c28cb2beae8629e4177e160cd1b2b01e72fb1

commit 6f6c28cb2beae8629e4177e160cd1b2b01e72fb1
Author: Michael Meissner 
Date:   Mon Apr 8 23:52:39 2024 -0400

Add xvrlw support.

2024-04-08  Michael Meissner  

gcc/

* config/rs6000/altivec.md (xvrlw): New insn.
* config/rs6000/rs6000.h (TARGET_XVRLW): New macro.

gcc/testsuite/

* gcc.target/powerpc/xvrlw.c: New test.

Diff:
---
 gcc/config/rs6000/altivec.md | 14 +
 gcc/config/rs6000/rs6000.h   |  3 +++
 gcc/testsuite/gcc.target/powerpc/xvrlw.c | 34 
 3 files changed, 51 insertions(+)

diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md
index 4d4c94ff0a0..fd3397b16f6 100644
--- a/gcc/config/rs6000/altivec.md
+++ b/gcc/config/rs6000/altivec.md
@@ -1883,6 +1883,20 @@
 }
   [(set_attr "type" "vecperm")])
 
+;; -mcpu=future2 adds a vector rotate left word variant.  There is no vector
+;; byte/half-word/double-word/quad-word rotate left.  This insn occurs before
+;; altivec_vrl and will match for -mcpu=future, while other cpus will
+;; match the generic insn.
+(define_insn "*xvrlw"
+  [(set (match_operand:V4SI 0 "register_operand" "=v,wa")
+   (rotate:V4SI (match_operand:V4SI 1 "register_operand" "v,wa")
+(match_operand:V4SI 2 "register_operand" "v,wa")))]
+  "TARGET_XVRLW"
+  "@
+   vrlw %0,%1,%2
+   xvrlw %x0,%x1,%x2"
+  [(set_attr "type" "vecsimple")])
+
 (define_insn "altivec_vrl"
   [(set (match_operand:VI2 0 "register_operand" "=v")
 (rotate:VI2 (match_operand:VI2 1 "register_operand" "v")
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index 37afa67f184..f52e0474e48 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -577,6 +577,9 @@ extern int rs6000_vector_align[];
 /* Whether we have PADDIS support.  */
 #define TARGET_PADDIS  TARGET_FUTURE2
 
+/* Whether we have XVRLW support.  */
+#define TARGET_XVRLW   TARGET_FUTURE2
+
 /* Whether the various reciprocal divide/square root estimate instructions
exist, and whether we should automatically generate code for the instruction
by default.  */
diff --git a/gcc/testsuite/gcc.target/powerpc/xvrlw.c 
b/gcc/testsuite/gcc.target/powerpc/xvrlw.c
new file mode 100644
index 000..846f2e337c5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/xvrlw.c
@@ -0,0 +1,34 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_future2_ok } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-options "-mdejagnu-cpu=future2 -O2" } */
+
+/* Test whether the xvrl (vector word rotate left using VSX registers insead of
+   Altivec registers is generated.  */
+
+#include 
+
+typedef vector unsigned int  v4si_t;
+
+v4si_t
+rotl_v4si_scalar (v4si_t x, unsigned long n)
+{
+  __asm__ (" # %x0" : "+f" (x));
+  return (x << n) | (x >> (32 - n));
+}
+
+v4si_t
+rotr_v4si_scalar (v4si_t x, unsigned long n)
+{
+  __asm__ (" # %x0" : "+f" (x));
+  return (x >> n) | (x << (32 - n));
+}
+
+v4si_t
+rotl_v4si_vector (v4si_t x, v4si_t y)
+{
+  __asm__ (" # %x0" : "+f" (x));
+  return vec_rl (x, y);
+}
+
+/* { dg-final { scan-assembler-times {\mxvrl\M} 3  } } */

[gcc(refs/users/meissner/heads/work164-dmf)] Add -mcpu=future2

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:08dd6bc886f7d7a42332d19c66f47c735676dc11

commit 08dd6bc886f7d7a42332d19c66f47c735676dc11
Author: Michael Meissner 
Date:   Mon Apr 8 23:40:42 2024 -0400

Add -mcpu=future2

2024-04-08  Michael Meissner  

gcc/

* config/rs6000/aix71.h (ASM_CPU_SPEC): Add support for 
-mcpu=future2.
* config/rs6000/aix72.h (ASM_CPU_SPEC): Likewise.
* config/rs6000/aix73.h (ASM_CPU_SPEC): Likewise.
* config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Define
_ARCH_PWR_FUTURE2 if -mcpu=future.
* config/rs6000/rs6000-cpus.def (ISA_FUTURE2_MASKS_SERVER): New 
macro.
(POWERPC_MASKS): Add support for -mcpu=future2.
(future2 processor): Likewise.
* config/rs6000/rs6000-tables.opt: Regenerate
* config/rs6000/rs6000.h (ASM_CPU_SPEC): Add support for 
-mcpu=future2.
* config/rs6000/rs6000.opt (-mfuture2): New internal option.

gcc/testsuite/

* lib/target-supports.exp 
(check_effective_target_powerpc_future2_ok):
New effective target test.

Diff:
---
 gcc/config/rs6000/aix71.h |  1 +
 gcc/config/rs6000/aix72.h |  1 +
 gcc/config/rs6000/aix73.h |  1 +
 gcc/config/rs6000/rs6000-c.cc |  2 ++
 gcc/config/rs6000/rs6000-cpus.def |  5 +
 gcc/config/rs6000/rs6000-tables.opt   |  3 +++
 gcc/config/rs6000/rs6000.cc   |  1 +
 gcc/config/rs6000/rs6000.h|  1 +
 gcc/config/rs6000/rs6000.opt  |  4 
 gcc/testsuite/lib/target-supports.exp | 13 +
 10 files changed, 32 insertions(+)

diff --git a/gcc/config/rs6000/aix71.h b/gcc/config/rs6000/aix71.h
index 570ddcc451d..34bbad65dbe 100644
--- a/gcc/config/rs6000/aix71.h
+++ b/gcc/config/rs6000/aix71.h
@@ -79,6 +79,7 @@ do {  
\
 #undef ASM_CPU_SPEC
 #define ASM_CPU_SPEC \
 "%{mcpu=native: %(asm_cpu_native); \
+  mcpu=future2: -mfuture; \
   mcpu=future: -mfuture; \
   mcpu=power11: -mpwr11; \
   mcpu=power10: -mpwr10; \
diff --git a/gcc/config/rs6000/aix72.h b/gcc/config/rs6000/aix72.h
index 242ca94bd06..f5e66084553 100644
--- a/gcc/config/rs6000/aix72.h
+++ b/gcc/config/rs6000/aix72.h
@@ -79,6 +79,7 @@ do {  
\
 #undef ASM_CPU_SPEC
 #define ASM_CPU_SPEC \
 "%{mcpu=native: %(asm_cpu_native); \
+  mcpu=future2: -mfuture; \
   mcpu=future: -mfuture; \
   mcpu=power11: -mpwr11; \
   mcpu=power10: -mpwr10; \
diff --git a/gcc/config/rs6000/aix73.h b/gcc/config/rs6000/aix73.h
index 2bd6b4bb3c4..1140f0f6098 100644
--- a/gcc/config/rs6000/aix73.h
+++ b/gcc/config/rs6000/aix73.h
@@ -79,6 +79,7 @@ do {  
\
 #undef ASM_CPU_SPEC
 #define ASM_CPU_SPEC \
 "%{mcpu=native: %(asm_cpu_native); \
+  mcpu=future2: -mfuture; \
   mcpu=future: -mfuture; \
   mcpu=power11: -mpwr11; \
   mcpu=power10: -mpwr10; \
diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc
index acd44058876..f0461e5817a 100644
--- a/gcc/config/rs6000/rs6000-c.cc
+++ b/gcc/config/rs6000/rs6000-c.cc
@@ -451,6 +451,8 @@ rs6000_target_modify_macros (bool define_p, HOST_WIDE_INT 
flags)
 rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR11");
   if ((flags & OPTION_MASK_FUTURE) != 0)
 rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR_FUTURE");
+  if ((flags & OPTION_MASK_FUTURE2) != 0)
+rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR_FUTURE2");
   if ((flags & OPTION_MASK_SOFT_FLOAT) != 0)
 rs6000_define_or_undefine_macro (define_p, "_SOFT_FLOAT");
   if ((flags & OPTION_MASK_RECIP_PRECISION) != 0)
diff --git a/gcc/config/rs6000/rs6000-cpus.def 
b/gcc/config/rs6000/rs6000-cpus.def
index 4ddba142e44..fee97c96197 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -93,6 +93,9 @@
 | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR\
 | OPTION_MASK_FUTURE)
 
+#define ISA_FUTURE2_MASKS_SERVER (ISA_FUTURE_MASKS_SERVER  \
+ | OPTION_MASK_FUTURE2)
+
 /* Flags that need to be turned off if -mno-vsx.  */
 #define OTHER_VSX_VECTOR_MASKS (OPTION_MASK_EFFICIENT_UNALIGNED_VSX\
 | OPTION_MASK_FLOAT128_KEYWORD \
@@ -133,6 +136,7 @@
 | OPTION_MASK_FLOAT128_KEYWORD \
 | OPTION_MASK_FPRND\
 | OPTION_MASK_FUTURE   \
+| OPTION_MASK_FUTURE2  \
 | OPTION_MASK_POWER10  \
 | OPTION_MASK_POWER11  \
 | OPTION_MASK_P10_FUSION   \
@@ -269,3 

[Bug tree-optimization/58806] New attribute for functions that access memory only through their arguments

[pinskia at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=58806

Andrew Pinski  changed:

   What|Removed |Added

 Ever confirmed|0   |1
 Status|UNCONFIRMED |NEW
   Last reconfirmed||2024-04-09
   Keywords||missed-optimization

--- Comment #6 from Andrew Pinski  ---
I thought there was a way already to do this. But nope.

C/C++ results under Intel SDE for 14.0.1 20240409 (experimental) [native/master r14-9849-g600bf396799] (GCC) testsuite on x86_64-pc-linux-gnu

[H. J. Lu via Gcc-testresults]

LAST_UPDATED: Tue Apr  9 01:40:05 UTC 2024 (revision r14-9849-g600bf396799)

Native configuration is x86_64-pc-linux-gnu

=== gcc tests ===


Running target sde
FAIL: gcc.target/i386/apx-ndd-tls-1b.c scan-assembler-times addq[ 
\\t]+%r[a-z0-9]+, a@gottpoff(%rip), %r[a-z0-9]+ 1
FAIL: gcc.target/i386/avx-loadu2-m128-1.c scan-assembler \\tvinsertf128\\t
FAIL: gcc.target/i386/avx-loadu2-m128d-1.c scan-assembler \\tvinsertf128\\t
FAIL: gcc.target/i386/avx-loadu2-m128i-1.c scan-assembler \\tvinsert[fi]128\\t
FAIL: gcc.target/i386/avx-storeu2-m128-1.c scan-assembler \\tvextractf128\\t
FAIL: gcc.target/i386/avx-storeu2-m128d-1.c scan-assembler \\tvextractf128\\t
FAIL: gcc.target/i386/avx-storeu2-m128i-1.c scan-assembler \\tvextract[if]128\\t
FAIL: gcc.target/i386/avx2-vbroadcastss_ps256-1.c scan-assembler vbroadcastss[ 
t]+[^\\n]*%xmm[0-9]
FAIL: gcc.target/i386/avx2-vextracti128-1.c scan-assembler vextracti128[ 
t]+[^\\n]*%ymm[0-9]
FAIL: gcc.target/i386/avx2-vinserti128-1.c scan-assembler vinserti128[ 
t]+[^\\n]
FAIL: gcc.target/i386/avx2-vpand-1.c scan-assembler vpand[ 
t]+[^\\n]*%ymm[0-9]
FAIL: gcc.target/i386/avx2-vpand-3.c scan-assembler-times vpand[ 
t]+[^\\n]*%ymm[0-9] 1
FAIL: gcc.target/i386/avx2-vpandn-1.c scan-assembler vpandn[ 
t]+[^\\n]*%ymm[0-9]
FAIL: gcc.target/i386/avx2-vpor-1.c scan-assembler vpor[ t]+[^\\n]*%ymm[0-9]
FAIL: gcc.target/i386/avx2-vpxor-1.c scan-assembler vpxor[ 
t]+[^\\n]*%ymm[0-9]
FAIL: gcc.target/i386/avx256-unaligned-load-1.c scan-assembler vinsertf128
FAIL: gcc.target/i386/avx256-unaligned-load-2.c scan-assembler vinsert.128
FAIL: gcc.target/i386/avx256-unaligned-load-3.c scan-assembler 
(sse2_loadupd|vmovupd[^\\n\\r]*movv2df_internal)
FAIL: gcc.target/i386/avx256-unaligned-load-3.c scan-assembler vinsertf128
FAIL: gcc.target/i386/avx256-unaligned-store-1.c scan-assembler vextractf128
FAIL: gcc.target/i386/avx256-unaligned-store-2.c scan-assembler vextract.128
FAIL: gcc.target/i386/avx512er-vrcp28ps-4.c scan-assembler-times 
vrcp28ps[^\\n\\r]*zmm[0-9]+(?:\\n|[ t]+#) 1
FAIL: gcc.target/i386/avx512er-vrsqrt28ps-4.c scan-assembler-times 
vrsqrt28ps[^\\n\\r]*zmm[0-9]+(?:\\n|[ t]+#) 1
FAIL: gcc.target/i386/avx512er-vrsqrt28ps-6.c scan-assembler-times 
vrcp28ps[^\\n\\r]*zmm[0-9]+(?:\\n|[ t]+#) 1
FAIL: gcc.target/i386/avx512er-vrsqrt28ps-6.c scan-assembler-times 
vrsqrt28ps[^\\n\\r]*zmm[0-9]+(?:\\n|[ t]+#) 1
FAIL: gcc.target/i386/avx512f-ceil-sfix-vec-2.c scan-assembler-times 
vcvttpd2dq[^\\n]*zmm[0-9].{7}(?:\\n|[ t]+#) 2
FAIL: gcc.target/i386/avx512f-ceil-sfix-vec-2.c scan-assembler-times 
vrndscalepd[^\\n]*zmm[0-9](?:\\n|[ t]+#) 2
FAIL: gcc.target/i386/avx512f-ceil-vec-2.c scan-assembler-times 
vrndscalepd[^\\n]+zmm[0-9](?:\\n|[ t]+#) 1
FAIL: gcc.target/i386/avx512f-ceilf-sfix-vec-2.c scan-assembler-times 
vcvttps2dq[^\\n]+zmm[0-9].{7}(?:\\n|[ t]+#) 1
FAIL: gcc.target/i386/avx512f-ceilf-sfix-vec-2.c scan-assembler-times 
vrndscaleps[^\\n]+zmm[0-9](?:\\n|[ t]+#) 1
FAIL: gcc.target/i386/avx512f-ceilf-vec-2.c scan-assembler-times 
vrndscaleps[^\\n]+zmm[0-9](?:\\n|[ t]+#) 1
FAIL: gcc.target/i386/avx512f-floor-sfix-vec-2.c scan-assembler-times 
vcvttpd2dq[^\\n]*zmm[0-9].{7}(?:\\n|[ t]+#) 2
FAIL: gcc.target/i386/avx512f-floor-sfix-vec-2.c scan-assembler-times 
vrndscalepd[^\\n]*zmm[0-9](?:\\n|[ t]+#) 2
FAIL: gcc.target/i386/avx512f-floor-vec-2.c scan-assembler-times 
vrndscalepd[^\\n]+zmm[0-9](?:\\n|[ t]+#) 1
FAIL: gcc.target/i386/avx512f-floorf-sfix-vec-2.c scan-assembler-times 
vcvttps2dq[^\\n]+zmm[0-9].{7}(?:\\n|[ t]+#) 1
FAIL: gcc.target/i386/avx512f-floorf-sfix-vec-2.c scan-assembler-times 
vrndscaleps[^\\n]+zmm[0-9](?:\\n|[ t]+#) 1
FAIL: gcc.target/i386/avx512f-floorf-vec-2.c scan-assembler-times 
vrndscaleps[^\\n]+zmm[0-9](?:\\n|[ t]+#) 1
FAIL: gcc.target/i386/avx512f-rint-sfix-vec-2.c scan-assembler-times 
vcvtpd2dq[^\\n]+ymm[0-9](?:\\n|[ t]+#) 2
FAIL: gcc.target/i386/avx512f-rint-sfix-vec-2.c scan-assembler-times 
vinserti64x4[^\\n]+zmm[0-9](?:\\n|[ t]+#) 1
FAIL: gcc.target/i386/avx512f-rintf-sfix-vec-2.c scan-assembler-times 
vcvtps2dq[^\\n]+zmm[0-9](?:\\n|[ t]+#) 1
FAIL: gcc.target/i386/avx512f-round-sfix-vec-2.c scan-assembler-times 
vcvttpd2dq[^\\n]+zmm[0-9].{7}(?:\\n|[ t]+#) 2
FAIL: gcc.target/i386/avx512f-round-sfix-vec-2.c scan-assembler-times 
vrndscalepd[^\\n]+zmm[0-9](?:\\n|[ t]+#) 2
FAIL: gcc.target/i386/avx512f-roundf-sfix-vec-2.c scan-assembler-times 
vcvttps2dq[^\\n]+zmm[0-9].{7}(?:\\n|[ t]+#) 1
FAIL: gcc.target/i386/avx512f-roundf-sfix-vec-2.c scan-assembler-times 
vrndscaleps[^\\n]+zmm[0-9](?:\\n|[ t]+#) 1
FAIL: gcc.target/i386/avx512f-trunc-vec-2.c scan-assembler-times 
vrndscalepd[^\\n]+zmm[0-9](?:\\n|[ t]+#) 1
FAIL: gcc.target/i386/avx512f-truncf-vec-2.c scan-assembler-times 
vrndscaleps[^\\n]+zmm[0-9](?:\\n|[ t]+#) 1
FAIL: gcc.target/i386/avx512f-vec-init.c scan-assembler-times vpbroadcastb[ 

[Bug target/114639] [riscv] ICE in create_pre_exit, at mode-switching.cc:451

[pan2.li at intel dot com via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114639

--- Comment #7 from Li Pan  ---
Looks this commit from bisect acc22d56e140220e7dc6c138918cb6754b6d1c0b, will
take a look into it.

Results for 14.0.1 20240409 (experimental) [native/master r14-9849-g600bf396799] (GCC) testsuite on x86_64-pc-linux-gnu

[H. J. Lu via Gcc-testresults]

LAST_UPDATED: Tue Apr  9 01:40:05 UTC 2024 (revision r14-9849-g600bf396799)

Native configuration is x86_64-pc-linux-gnu

=== gcc tests ===


Running target unix
XPASS: gcc.dg/Wstringop-overflow-47.c pr97027 (test for warnings, line 72)
XPASS: gcc.dg/Wstringop-overflow-47.c pr97027 (test for warnings, line 77)
XPASS: gcc.dg/Wstringop-overflow-47.c pr97027 note (test for warnings, line 68)
FAIL: gcc.dg/ira-loop-pressure.c scan-rtl-dump loop2_invariant "Decided to move 
invariant"
XPASS: gcc.dg/guality/example.c   -O0  execution test
XPASS: gcc.dg/guality/example.c  -Og -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/guality.c   -O0  execution test
XPASS: gcc.dg/guality/guality.c   -O1  -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/guality.c   -O2  -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/guality.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION execution test
XPASS: gcc.dg/guality/guality.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION execution test
XPASS: gcc.dg/guality/guality.c   -O3 -g  -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/guality.c   -Os  -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/guality.c  -Og -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/inline-params.c   -O2  -DPREVENT_OPTIMIZATION  execution 
test
XPASS: gcc.dg/guality/inline-params.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION execution test
XPASS: gcc.dg/guality/inline-params.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION execution test
XPASS: gcc.dg/guality/inline-params.c   -O3 -g  -DPREVENT_OPTIMIZATION  
execution test
XPASS: gcc.dg/guality/inline-params.c   -Os  -DPREVENT_OPTIMIZATION  execution 
test
FAIL: gcc.dg/guality/loop-1.c   -O3 -fomit-frame-pointer -funroll-loops 
-fpeel-loops -ftracer -finline-functions  -DPREVENT_OPTIMIZATION  line 20 i == 1
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 16 arg1 == 1
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 16 arg2 == 2
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 16 arg3 == 3
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 16 arg4 == 4
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 16 arg5 == 5
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 16 arg6 == 6
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 16 arg7 == 30
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 18 arg1 == 1
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 18 arg2 == 2
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 18 arg3 == 3
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 18 arg4 == 4
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 18 arg5 == 5
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 18 arg6 == 6
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 18 arg7 == 30
FAIL: gcc.dg/guality/pr36728-2.c   -O3 -g  -DPREVENT_OPTIMIZATION  line 16 arg1 
== 1
FAIL: gcc.dg/guality/pr36728-2.c   -O3 -g  -DPREVENT_OPTIMIZATION  line 16 arg2 
== 2
FAIL: gcc.dg/guality/pr36728-2.c   -O3 -g  -DPREVENT_OPTIMIZATION  line 16 arg3 
== 3
FAIL: gcc.dg/guality/pr36728-2.c   -O3 -g  -DPREVENT_OPTIMIZATION  line 16 arg4 
== 4
FAIL: gcc.dg/guality/pr36728-2.c   -O3 -g  -DPREVENT_OPTIMIZATION  line 16 arg5 
== 5
FAIL: gcc.dg/guality/pr36728-2.c   -O3 -g  -DPREVENT_OPTIMIZATION  line 16 arg6 
== 6
FAIL: gcc.dg/guality/pr36728-2.c   -O3 -g  -DPREVENT_OPTIMIZATION  line 16 arg7 
== 30
FAIL: gcc.dg/guality/pr36728-2.c   -O3 -g  -DPREVENT_OPTIMIZATION  line 18 arg1 
== 1
FAIL: gcc.dg/guality/pr36728-2.c   -O3 -g  -DPREVENT_OPTIMIZATION  line 18 arg2 
== 2
FAIL: gcc.dg/guality/pr36728-2.c   -O3 -g  -DPREVENT_OPTIMIZATION  line 18 arg3 
== 3
FAIL: gcc.dg/guality/pr36728-2.c   -O3 -g  -DPREVENT_OPTIMIZATION  line 18 arg4 
== 4
FAIL: gcc.dg/guality/pr36728-2.c   -O3 -g  -DPREVENT_OPTIMIZATION  line 18 arg5 
== 5
FAIL: gcc.dg/guality/pr36728-2.c   -O3 -g  -DPREVENT_OPTIMIZATION  line 18 arg6 
== 6
FAIL: gcc.dg/guality/pr36728-2.c   -O3 -g  -DPREVENT_OPTIMIZATION  

Results for 14.0.1 20240408 (experimental) [master r14-9833-g278cad85077] (GCC) testsuite on x86_64-pc-linux-gnu

[H.J. Lu via Gcc-testresults]

ATION  line 28 i + 1 == 8
FAIL: gcc.dg/guality/pr90074.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 28 c + 1 == 2
FAIL: gcc.dg/guality/pr90074.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 28 i + 1 == 8
FAIL: gcc.dg/guality/pr90716.c   -O1  -DPREVENT_OPTIMIZATION  line 23 j + 1 == 9
FAIL: gcc.dg/guality/pr90716.c   -O2  -DPREVENT_OPTIMIZATION  line 23 j + 1 == 9
FAIL: gcc.dg/guality/pr90716.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION line 23 j + 1 == 9
FAIL: gcc.dg/guality/pr90716.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 23 j + 1 == 9
FAIL: gcc.dg/guality/pr90716.c   -Os  -DPREVENT_OPTIMIZATION  line 23 j + 1 == 9
FAIL: gcc.dg/guality/sra-1.c   -O2  -DPREVENT_OPTIMIZATION  line 43 a.j == 14
FAIL: gcc.dg/guality/sra-1.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION line 43 a.j == 14
FAIL: gcc.dg/guality/sra-1.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 21 a.i == 4
FAIL: gcc.dg/guality/sra-1.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 21 a.j == 14
FAIL: gcc.dg/guality/sra-1.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 32 a[0] == 4
FAIL: gcc.dg/guality/sra-1.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 32 a[1] == 14
FAIL: gcc.dg/guality/sra-1.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 43 a.i == 4
FAIL: gcc.dg/guality/sra-1.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 43 a.j == 14
FAIL: gcc.dg/guality/sra-1.c   -O3 -g  -DPREVENT_OPTIMIZATION  line 43 a.j == 14
FAIL: gcc.dg/guality/sra-1.c   -Os  -DPREVENT_OPTIMIZATION  line 43 a.j == 14
FAIL: gcc.dg/guality/sra-1.c  -Og -DPREVENT_OPTIMIZATION  line 21 a.i == 4
FAIL: gcc.dg/guality/sra-1.c  -Og -DPREVENT_OPTIMIZATION  line 21 a.j == 14
FAIL: gcc.dg/guality/sra-1.c  -Og -DPREVENT_OPTIMIZATION  line 32 a[0] == 4
FAIL: gcc.dg/guality/sra-1.c  -Og -DPREVENT_OPTIMIZATION  line 32 a[1] == 14
FAIL: gcc.dg/guality/sra-1.c  -Og -DPREVENT_OPTIMIZATION  line 43 a.i == 4
FAIL: gcc.dg/guality/sra-1.c  -Og -DPREVENT_OPTIMIZATION  line 43 a.j == 14
FAIL: gcc.dg/guality/vla-1.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 17 sizeof (a) == 6
FAIL: gcc.dg/lto/save-temps c_lto_save-temps_0.o-c_lto_save-temps_0.o link,  -O 
-flto -save-temps
FAIL: gcc.dg/torture/convert-dfp.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  (test for excess errors)
UNRESOLVED: gcc.dg/torture/convert-dfp.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  compilation failed to produce executable
XPASS: gcc.dg/tree-ssa/builtin-snprintf-6.c scan-tree-dump-times optimized 
"Function test_assign_aggregate" 1
FAIL: gcc.dg/tree-ssa/dump-6.c scan-tree-dump store-merging "MEM  
[(char *)] = "
FAIL: gcc.target/i386/bmi2-pr112526.c (test for excess errors)
FAIL: gcc.target/i386/bmi2-pr112526.c execution test
FAIL: gcc.target/i386/invariant-ternlog-1.c scan-assembler-times 
vpternlog[^nr]*(%rdx) 2
FAIL: gcc.target/i386/pr101950-2.c scan-assembler-times \\txor[ql]\\t 2
FAIL: gcc.target/i386/pr105854.c (test for excess errors)
FAIL: gcc.target/i386/pr112943.c (test for excess errors)
FAIL: gcc.target/i386/pr53533-1.c scan-assembler-times (?:addl|subl)[ \\t] 1
FAIL: gcc.target/i386/pr53533-3.c scan-assembler-times (?:addl|subl)[ \\t] 1
FAIL: gcc.target/i386/pr55583.c scan-assembler-times (?n)shld[ql]?[t 
]*\$2 2
FAIL: gcc.target/i386/pr55583.c scan-assembler-times (?n)shrd[ql]?[t 
]*\$2 4
FAIL: gcc.target/i386/pr89618-2.c scan-tree-dump vect "loop vectorized using 16 
byte vectors"
FAIL: gcc.target/i386/pr96539.c scan-assembler-not rep[^\\n\\r]*movs
FAIL: gcc.target/i386/pr97971.c  (test for errors, line 10)
FAIL: gcc.target/i386/shrink_wrap_1.c scan-rtl-dump pro_and_epilogue 
"Performing shrink-wrapping"

=== gcc Summary for unix/-mx32 ===

# of expected passes200558
# of unexpected failures154
# of unexpected successes   16
# of expected failures  1550
# of unresolved testcases   1
# of unsupported tests  3437

=== gcc Summary ===

# of expected passes601726
# of unexpected failures404
# of unexpected successes   59
# of expected failures  4657
# of unresolved testcases   1
# of unsupported tests  10828
/export/gnu/import/git/gcc-test-master-intel64/bld/gcc/xgcc  version 14.0.1 
20240408 (experimental) [master r14-9833-g278cad85077] (GCC) 

=== gfortran tests ===


Running target unix

=== gfortran Summary for unix ===

# of expected passes69927
# of expected failures  273

Regressions on master at commit r14-9833 vs commit r14-9823 on Linux/x86_64

[H.J. Lu via Gcc-regression]

Regressions on master at commit r14-9833 vs commit r14-9823 on Linux/x86_64
New failures:
FAIL: gcc.dg/lto/save-temps c_lto_save-temps_0.o-c_lto_save-temps_0.o link,  -O 
-flto -save-temps
FAIL: gcc.dg/lto/save-temps c_lto_save-temps_0.o-c_lto_save-temps_0.o link,  -O 
-flto -save-temps
FAIL: gcc.dg/torture/convert-dfp.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  (test for excess errors)

New passes:

[Bug other/57956] missing 'msgstr' section errors when building

[pinskia at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=57956

Andrew Pinski  changed:

   What|Removed |Added

   Keywords||build, documentation
   Last reconfirmed||2024-04-09
 Resolution|FIXED   |---
 Ever confirmed|0   |1
 Status|RESOLVED|ASSIGNED

--- Comment #4 from Andrew Pinski  ---
Actually It looks like it still says:
gettext version 0.14.5 (or later)
Needed to regenerate gcc.pot.


Let me update that to the same as what is required to build GCC (if
--enable-nls is used and libintl is not supported).

[gcc(refs/users/meissner/heads/work164-dmf)] Add saturating subtract built-ins.

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:6ac16950e262822264bae44d33157e440af81bf4

commit 6ac16950e262822264bae44d33157e440af81bf4
Author: Michael Meissner 
Date:   Mon Apr 8 23:34:30 2024 -0400

Add saturating subtract built-ins.

This patch adds support for a saturating subtract built-in function that 
may be
added to a future PowerPC processor.  Note, if it is added, the name of the
built-in function may change before GCC 13 is released.  If the name 
changes,
we will submit a patch changing the name.

I also added support for providing dense math built-in functions, even 
though
at present, we have not added any new built-in functions for dense math.  
It is
likely we will want to add new dense math built-in functions as the dense 
math
support is fleshed out.

The patches have been tested on both little and big endian systems.  Can I 
check
it into the master branch?

2024-04-08   Michael Meissner  

gcc/

* config/rs6000/rs6000-builtin.cc (rs6000_invalid_builtin): Add 
support
for flagging invalid use of future built-in functions.
(rs6000_builtin_is_supported): Add support for future built-in
functions.
* config/rs6000/rs6000-builtins.def 
(__builtin_saturate_subtract32): New
built-in function for -mcpu=future.
(__builtin_saturate_subtract64): Likewise.
* config/rs6000/rs6000-gen-builtins.cc (enum bif_stanza): Add 
stanzas
for -mcpu=future built-ins.
(stanza_map): Likewise.
(enable_string): Likewise.
(struct attrinfo): Likewise.
(parse_bif_attrs): Likewise.
(write_decls): Likewise.
* config/rs6000/rs6000.md (sat_sub3): Add saturating subtract
built-in insn declarations.
(sat_sub3_dot): Likewise.
(sat_sub3_dot2): Likewise.
* doc/extend.texi (Future PowerPC built-ins): New section.

gcc/testsuite/

* gcc.target/powerpc/subfus-1.c: New test.
* gcc.target/powerpc/subfus-2.c: Likewise.

Diff:
---
 gcc/config/rs6000/rs6000-builtin.cc | 17 
 gcc/config/rs6000/rs6000-builtins.def   | 10 +
 gcc/config/rs6000/rs6000-gen-builtins.cc| 35 ++---
 gcc/config/rs6000/rs6000.md | 60 +
 gcc/doc/extend.texi | 24 
 gcc/testsuite/gcc.target/powerpc/subfus-1.c | 32 +++
 gcc/testsuite/gcc.target/powerpc/subfus-2.c | 32 +++
 7 files changed, 205 insertions(+), 5 deletions(-)

diff --git a/gcc/config/rs6000/rs6000-builtin.cc 
b/gcc/config/rs6000/rs6000-builtin.cc
index 976a42a74cd..1af38698bf3 100644
--- a/gcc/config/rs6000/rs6000-builtin.cc
+++ b/gcc/config/rs6000/rs6000-builtin.cc
@@ -139,6 +139,17 @@ rs6000_invalid_builtin (enum rs6000_gen_builtins fncode)
 case ENB_MMA:
   error ("%qs requires the %qs option", name, "-mmma");
   break;
+case ENB_FUTURE:
+  error ("%qs requires the %qs option", name, "-mcpu=future");
+  break;
+case ENB_FUTURE_64:
+  error ("%qs requires the %qs option and either the %qs or %qs option",
+name, "-mcpu=future", "-m64", "-mpowerpc64");
+  break;
+case ENB_DM:
+  error ("%qs requires the %qs or %qs options", name, "-mcpu=future",
+"-mdense-math");
+  break;
 default:
 case ENB_ALWAYS:
   gcc_unreachable ();
@@ -194,6 +205,12 @@ rs6000_builtin_is_supported (enum rs6000_gen_builtins 
fncode)
   return TARGET_HTM;
 case ENB_MMA:
   return TARGET_MMA;
+case ENB_FUTURE:
+  return TARGET_FUTURE;
+case ENB_FUTURE_64:
+  return TARGET_FUTURE && TARGET_POWERPC64;
+case ENB_DM:
+  return TARGET_DENSE_MATH;
 default:
   gcc_unreachable ();
 }
diff --git a/gcc/config/rs6000/rs6000-builtins.def 
b/gcc/config/rs6000/rs6000-builtins.def
index 3bc7fed6956..437ab0e09e9 100644
--- a/gcc/config/rs6000/rs6000-builtins.def
+++ b/gcc/config/rs6000/rs6000-builtins.def
@@ -139,6 +139,8 @@
 ;   endian   Needs special handling for endianness
 ;   ibmldRestrict usage to the case when TFmode is IBM-128
 ;   ibm128   Restrict usage to the case where __ibm128 is supported or if ibmld
+;   future   Restrict usage to future instructions
+;   dm   Restrict usage to dense math
 ;
 ; Each attribute corresponds to extra processing required when
 ; the built-in is expanded.  All such special processing should
@@ -4131,3 +4133,11 @@
 
   void __builtin_vsx_stxvp (v256, unsigned long, const v256 *);
 STXVP nothing {mma,pair}
+
+[future]
+  const signed int __builtin_saturate_subtract32 (signed int, signed int);
+  SAT_SUBSI sat_subsi3 {}
+
+[future-64]
+  const signed long __builtin_saturate_subtract64 (signed long,  signed long);
+  SAT_SUBDI sat_subdi3 {}
diff --git a/gcc/config/rs6000/rs6000-gen-builtins.cc 

[gcc(refs/users/meissner/heads/work164-dmf)] Support load/store vector with right length.

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:bb0e760624b02e7f9fc22dca10925cd82efa

commit bb0e760624b02e7f9fc22dca10925cd82efa
Author: Michael Meissner 
Date:   Mon Apr 8 23:28:46 2024 -0400

Support load/store vector with right length.

This patch adds support for new instructions that may be added to the 
PowerPC
architecture in the future to enhance the load and store vector with length
instructions.

The current instructions (lxvl, lxvll, stxvl, and stxvll) are inconvient to 
use
since the count for the number of bytes must be in the top 8 bits of the GPR
register, instead of the bottom 8 bits.  This meant that code generating 
these
instructions typically had to do a shift left by 56 bits to get the count 
into
the right position.  In a future version of the PowerPC architecture, new
variants of these instructions might be added that expect the count to be in
the bottom 8 bits of the GPR register.  These patches add this support to 
GCC
if the user uses the -mcpu=future option.

I discovered that the code in rs6000-string.cc to generate ISA 3.1 
lxvl/stxvl
future lxvll/stxvll instructions would generate these instructions on 
32-bit.
However the patterns for these instructions is only done on 64-bit systems. 
 So
I added a check for 64-bit support before generating the instructions.

The patches have been tested on both little and big endian systems.  Can I 
check
it into the master branch?

2024-04-08   Michael Meissner  

gcc/

* config/rs6000/rs6000-string.cc (expand_block_move): Do not 
generate
lxvl and stxvl on 32-bit.
* config/rs6000/vsx.md (lxvl): If -mcpu=future, generate the lxvl 
with
the shift count automaticaly used in the insn.
(lxvrl): New insn for -mcpu=future.
(lxvrll): Likewise.
(stxvl): If -mcpu=future, generate the stxvl with the shift count
automaticaly used in the insn.
(stxvrl): New insn for -mcpu=future.
(stxvrll): Likewise.

gcc/testsuite/

* gcc.target/powerpc/lxvrl.c: New test.
* lib/target-supports.exp 
(check_effective_target_powerpc_future_ok):
New effective target.

Diff:
---
 gcc/config/rs6000/rs6000-string.cc   |   1 +
 gcc/config/rs6000/vsx.md | 122 +--
 gcc/testsuite/gcc.target/powerpc/lxvrl.c |  32 
 gcc/testsuite/lib/target-supports.exp|  12 +++
 4 files changed, 146 insertions(+), 21 deletions(-)

diff --git a/gcc/config/rs6000/rs6000-string.cc 
b/gcc/config/rs6000/rs6000-string.cc
index e74ccf41937..c6737e66cbe 100644
--- a/gcc/config/rs6000/rs6000-string.cc
+++ b/gcc/config/rs6000/rs6000-string.cc
@@ -2787,6 +2787,7 @@ expand_block_move (rtx operands[], bool might_overlap)
 
   if (TARGET_MMA && TARGET_BLOCK_OPS_UNALIGNED_VSX
  && TARGET_BLOCK_OPS_VECTOR_PAIR
+ && TARGET_POWERPC64
  && bytes >= 32
  && (align >= 256 || !STRICT_ALIGNMENT))
{
diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
index f135fa079bd..9520191e613 100644
--- a/gcc/config/rs6000/vsx.md
+++ b/gcc/config/rs6000/vsx.md
@@ -5629,20 +5629,32 @@
   DONE;
 })
 
-;; Load VSX Vector with Length
+;; Load VSX Vector with Length.  If we have lxvrl, we don't have to do an
+;; explicit shift left into a pseudo.
 (define_expand "lxvl"
-  [(set (match_dup 3)
-(ashift:DI (match_operand:DI 2 "register_operand")
-   (const_int 56)))
-   (set (match_operand:V16QI 0 "vsx_register_operand")
-   (unspec:V16QI
-[(match_operand:DI 1 "gpc_reg_operand")
-  (mem:V16QI (match_dup 1))
- (match_dup 3)]
-UNSPEC_LXVL))]
+  [(use (match_operand:V16QI 0 "vsx_register_operand"))
+   (use (match_operand:DI 1 "gpc_reg_operand"))
+   (use (match_operand:DI 2 "gpc_reg_operand"))]
   "TARGET_P9_VECTOR && TARGET_64BIT"
 {
-  operands[3] = gen_reg_rtx (DImode);
+  rtx shift_len = gen_rtx_ASHIFT (DImode, operands[2], GEN_INT (56));
+  rtx len;
+
+  if (TARGET_FUTURE)
+len = shift_len;
+  else
+{
+  len = gen_reg_rtx (DImode);
+  emit_insn (gen_rtx_SET (len, shift_len));
+}
+
+  rtx dest = operands[0];
+  rtx addr = operands[1];
+  rtx mem = gen_rtx_MEM (V16QImode, addr);
+  rtvec rv = gen_rtvec (3, addr, mem, len);
+  rtx lxvl = gen_rtx_UNSPEC (V16QImode, rv, UNSPEC_LXVL);
+  emit_insn (gen_rtx_SET (dest, lxvl));
+  DONE;
 })
 
 (define_insn "*lxvl"
@@ -5666,6 +5678,34 @@
   "lxvll %x0,%1,%2"
   [(set_attr "type" "vecload")])
 
+;; For lxvrl and lxvrll, use the combiner to eliminate the shift.  The
+;; define_expand for lxvl will already incorporate the shift in generating the
+;; insn.  The lxvll buitl-in function required the user to have already done
+;; the shift.  Defining lxvrll this way, will optimize cases where the user has
+;; done the shift immediately before the 

[Bug other/57956] missing 'msgstr' section errors when building

[pinskia at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=57956

Andrew Pinski  changed:

   What|Removed |Added

 Resolution|--- |FIXED
 Status|UNCONFIRMED |RESOLVED

--- Comment #3 from Andrew Pinski  ---
The page says now:
The in-tree configuration requires GNU gettext version 0.22 or later.

[Bug libstdc++/89624] HLE acquire/release bits in std::memory_order don't work with -fshort-enums or -fstrict-enums

[pinskia at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89624

--- Comment #4 from Andrew Pinski  ---
Hmm, Does this matter that much since HLE has been disabled on all cores?

Results for 14.0.1 20240409 (experimental) [remotes/origin/HEAD r14-9849-g600bf396799] (GCC) testsuite on powerpc64le-unknown-linux-gnu

[Bill Seurer (POWER9) via Gcc-testresults]

git commit g:600bf396799a022e65938de572ad1a79a951b95a
gcc-descr r14-9849-g600bf396799a02

power9
Linux 5.15.0-97-generic ppc64le
GNU Make 4.3

DejaGnu:
DejaGnu version 1.6.2
Expect version  5.45.4
Tcl version 8.6

64-bit

LAST_UPDATED: Tue Apr  9 01:55:04 UTC 2024 (revision r14-9849-g600bf396799)

Native configuration is powerpc64le-unknown-linux-gnu

=== gcc tests ===


Running target unix
XPASS: gcc.dg/Wtrampolines.c standard descriptors (test for warnings, line 32)
XPASS: gcc.dg/guality/example.c   -O0  execution test
XPASS: gcc.dg/guality/example.c  -Og -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/guality.c   -O0  execution test
XPASS: gcc.dg/guality/guality.c   -O1  -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/guality.c   -O2  -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/guality.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION execution test
XPASS: gcc.dg/guality/guality.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION execution test
XPASS: gcc.dg/guality/guality.c   -O3 -g  -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/guality.c   -Os  -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/guality.c  -Og -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/inline-params.c   -O2  -DPREVENT_OPTIMIZATION  execution 
test
XPASS: gcc.dg/guality/inline-params.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION execution test
XPASS: gcc.dg/guality/inline-params.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION execution test
XPASS: gcc.dg/guality/inline-params.c   -O3 -g  -DPREVENT_OPTIMIZATION  
execution test
XPASS: gcc.dg/guality/inline-params.c   -Os  -DPREVENT_OPTIMIZATION  execution 
test
FAIL: gcc.dg/guality/loop-1.c   -O2  -DPREVENT_OPTIMIZATION  line 20 i == 1
FAIL: gcc.dg/guality/loop-1.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION line 20 i == 1
FAIL: gcc.dg/guality/loop-1.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 20 i == 1
FAIL: gcc.dg/guality/loop-1.c   -O3 -fomit-frame-pointer -funroll-loops 
-fpeel-loops -ftracer -finline-functions  -DPREVENT_OPTIMIZATION  line 20 i == 1
FAIL: gcc.dg/guality/loop-1.c   -O3 -g  -DPREVENT_OPTIMIZATION  line 20 i == 1
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 18 y == 2
FAIL: gcc.dg/guality/pr36728-3.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 16 y == 2
FAIL: gcc.dg/guality/pr36728-3.c   -O3 -g  -DPREVENT_OPTIMIZATION  line 16 y == 
2
FAIL: gcc.dg/guality/pr41353-1.c  -Og -DPREVENT_OPTIMIZATION  line 28 i == 37
FAIL: gcc.dg/guality/pr41353-1.c  -Og -DPREVENT_OPTIMIZATION  line 28 i1 == 2 * 
37
FAIL: gcc.dg/guality/pr41353-1.c  -Og -DPREVENT_OPTIMIZATION  line 28 i2 == 3 * 
37
XPASS: gcc.dg/guality/pr41353-1.c  -Og -DPREVENT_OPTIMIZATION  line 28 j == 28 
+ 37
FAIL: gcc.dg/guality/pr43051-1.c   -O1  -DPREVENT_OPTIMIZATION  line 34 c == 
[0]
FAIL: gcc.dg/guality/pr43051-1.c   -O1  -DPREVENT_OPTIMIZATION  line 39 c == 
[0]
FAIL: gcc.dg/guality/pr43051-1.c   -O2  -DPREVENT_OPTIMIZATION  line 34 c == 
[0]
FAIL: gcc.dg/guality/pr43051-1.c   -O2  -DPREVENT_OPTIMIZATION  line 39 c == 
[0]
FAIL: gcc.dg/guality/pr43051-1.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION line 34 c == [0]
FAIL: gcc.dg/guality/pr43051-1.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION line 39 c == [0]
FAIL: gcc.dg/guality/pr43051-1.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 34 c == [0]
FAIL: gcc.dg/guality/pr43051-1.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 39 c == [0]
FAIL: gcc.dg/guality/pr54200.c   -O1  -DPREVENT_OPTIMIZATION  line 20 z == 3
FAIL: gcc.dg/guality/pr54200.c   -O2  -DPREVENT_OPTIMIZATION  line 20 z == 3
FAIL: gcc.dg/guality/pr54200.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION line 20 z == 3
FAIL: gcc.dg/guality/pr54200.c   -O3 -g  -DPREVENT_OPTIMIZATION  line 20 z == 3
FAIL: gcc.dg/guality/pr54200.c   -Os  -DPREVENT_OPTIMIZATION  line 20 z == 3
FAIL: gcc.dg/guality/pr54519-1.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION line 20 y == 25
FAIL: gcc.dg/guality/pr54519-1.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION line 20 z == 6
FAIL: gcc.dg/guality/pr54519-1.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION line 23 y == 117
FAIL: gcc.dg/guality/pr54519-1.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION line 23 z == 8
FAIL: gcc.dg/guality/pr54519-1.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  

[Bug target/55139] __atomic store does not support __ATOMIC_HLE_RELEASE

[pinskia at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=55139

Andrew Pinski  changed:

   What|Removed |Added

 Resolution|--- |FIXED
 Status|UNCONFIRMED |RESOLVED
   Target Milestone|--- |4.8.0

--- Comment #7 from Andrew Pinski  ---
Fixed a long time ago.

Re: [PATCH] rs6000: Replace OPTION_MASK_DIRECT_MOVE with OPTION_MASK_P8_VECTOR [PR101865]

[Peter Bergner]

On 4/8/24 9:37 PM, Kewen.Lin wrote:
> on 2024/4/8 21:21, Peter Bergner wrote:
> I prefer to remove it completely, that is:
> 
>> -mdirect-move
>> -Target Undocumented Mask(DIRECT_MOVE) Var(rs6000_isa_flags) WarnRemoved
> 
> The reason why you still kept it is to keep a historical record here?

I believe we've never completely removed an option before.  I think the
thought was, if some software package explicitly used the option, then
they shouldn't see an 'unrecognized command-line option' error, but
rather either a warning that the option was removed or just silently
ignore it.  Ie, we don't want to make a package that used to build with
an old compiler now break its build because the option doesn't exist
anymore.



> Segher pointed out to me that this kind of option complete removal should be
> stage 1 stuff, so let's defer to make it in a separated patch next release
> (including some other options like mfpgpr you showed below etc.). :)

If we're going to completely remove it, then for sure, it's a stage1 thing.
I'd like to hear Segher's thoughts on whether we should completely remove
it or just silently ignore it.



> For the original patch,
> 
>> +mno-direct-move
>> +Target Undocumented WarnRemoved
> 
> s/WarnRemoved/Ignore/ to match some other existing practice, there is no
> warning now if specifying -mno-direct-move and it would be good to keep
> the same behavior for users.

If we want to silently ignore -mdirect-move and -mno-direct-move, then we
just need to do:

mdirect-move
-Target Undocumented Mask(DIRECT_MOVE) Var(rs6000_isa_flags) WarnRemoved
+Target Undocumented Ignore

There's no need to mention -mno-direct-move at all then.  It was only in the
case I thought we wanted to warn against it's use that I added -mno-direct-move.



>> That said, it's not what we've done with
>> other options, but maybe those just need to be changed too?
> 
> Yes, I think they need to be changed too (next release).

If that's the consensus with Segher, sure, we can plan on that in stage1.

Peter

Results for 14.0.1 20240409 (experimental) [master r14-9849-g600bf39679] (GCC) testsuite on powerpc64-unknown-linux-gnu

[Bill Seurer (POWER9 BE) via Gcc-testresults]

git commit g:600bf396799a022e65938de572ad1a79a951b95a
gcc-descr r14-9849-g600bf396799a02

power9 BE
Linux 6.7.9-powerpc64 ppc64
GNU Make 4.3

DejaGnu:
DejaGnu version 1.6.3
Expect version  5.45.4
Tcl version 8.6

64-bit

LAST_UPDATED: Tue Apr  9 01:46:28 UTC 2024 (revision r14-9849-g600bf39679)

Native configuration is powerpc64-unknown-linux-gnu

=== g++ tests ===


Running target unix/-m32

=== g++ Summary for unix/-m32 ===

# of expected passes250459
# of expected failures  2618
# of unsupported tests  11478

Running target unix/-m64

=== g++ Summary for unix/-m64 ===

# of expected passes259472
# of expected failures  2623
# of unsupported tests  11651

=== g++ Summary ===

# of expected passes509931
# of expected failures  5241
# of unsupported tests  23129
/home/gccbuild/build/nightly/build-gcc-trunk/gcc/xg++  version 14.0.1 20240409 
(experimental) [master r14-9849-g600bf39679] (GCC) 

=== gcc tests ===


Running target unix/-m32
FAIL: gcc.dg/debug/btf/btf-datasec-3.c scan-assembler-times bts_type 3
FAIL: gcc.dg/debug/btf/btf-datasec-3.c scan-assembler-times bts_type: 
(BTF_KIND_VAR 'test_bss2') 1
FAIL: gcc.dg/debug/btf/btf-datasec-3.c scan-assembler-times bts_type: 
(BTF_KIND_VAR 'test_data2') 1
XPASS: gcc.dg/guality/example.c   -O0  execution test
XPASS: gcc.dg/guality/example.c  -Og -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/guality.c   -O0  execution test
XPASS: gcc.dg/guality/guality.c   -O1  -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/guality.c   -O2  -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/guality.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION execution test
XPASS: gcc.dg/guality/guality.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION execution test
XPASS: gcc.dg/guality/guality.c   -O3 -g  -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/guality.c   -Os  -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/guality.c  -Og -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/inline-params.c   -O2  -DPREVENT_OPTIMIZATION  execution 
test
XPASS: gcc.dg/guality/inline-params.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION execution test
XPASS: gcc.dg/guality/inline-params.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION execution test
XPASS: gcc.dg/guality/inline-params.c   -O3 -g  -DPREVENT_OPTIMIZATION  
execution test
XPASS: gcc.dg/guality/inline-params.c   -Os  -DPREVENT_OPTIMIZATION  execution 
test
FAIL: gcc.dg/guality/loop-1.c   -O2  -DPREVENT_OPTIMIZATION  line 20 i == 1
FAIL: gcc.dg/guality/loop-1.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION line 20 i == 1
FAIL: gcc.dg/guality/loop-1.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 20 i == 1
FAIL: gcc.dg/guality/loop-1.c   -O3 -fomit-frame-pointer -funroll-loops 
-fpeel-loops -ftracer -finline-functions  -DPREVENT_OPTIMIZATION  line 20 i == 1
FAIL: gcc.dg/guality/loop-1.c   -O3 -g  -DPREVENT_OPTIMIZATION  line 20 i == 1
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 16 arg1 == 1
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 16 arg2 == 2
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 16 arg3 == 3
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 16 arg4 == 4
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 16 arg5 == 5
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 16 arg6 == 6
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 16 arg7 == 30
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 18 arg1 == 1
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 18 arg2 == 2
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 18 arg3 == 3
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 18 arg4 == 4
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 18 arg5 == 5
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  

Re: [PATCH] c++: Keep DECL_SAVED_TREE of destructor instantiations in modules [PR104040]

[Jason Merrill]

On 4/4/24 07:27, Nathaniel Shead wrote:

On Wed, Apr 03, 2024 at 11:18:01AM -0400, Jason Merrill wrote:

On 4/2/24 20:57, Nathaniel Shead wrote:

On Tue, Apr 02, 2024 at 01:18:17PM -0400, Jason Merrill wrote:

On 3/28/24 23:21, Nathaniel Shead wrote:

- && !(modules_p () && DECL_DECLARED_INLINE_P (fn)))
+ && !(modules_p ()
+  && (DECL_DECLARED_INLINE_P (fn)
+  || DECL_TEMPLATE_INSTANTIATION (fn


How about using vague_linkage_p?



Right, of course.  How about this?
Bootstrapped and regtested on x86_64-pc-linux-gnu, OK for trunk?

-- >8 --

A template instantiation still needs to have its DECL_SAVED_TREE so that
its definition is emitted into the CMI. This way it can be emitted in
the object file of any importers that use it, in case it doesn't end up
getting emitted in this TU.

PR c++/104040

gcc/cp/ChangeLog:

* semantics.cc (expand_or_defer_fn_1): Keep DECL_SAVED_TREE for
all vague linkage functions.

gcc/testsuite/ChangeLog:

* g++.dg/modules/pr104040_a.C: New test.
* g++.dg/modules/pr104040_b.C: New test.

Signed-off-by: Nathaniel Shead 
Reviewed-by: Jason Merrill 
---
   gcc/cp/semantics.cc   |  5 +++--
   gcc/testsuite/g++.dg/modules/pr104040_a.C | 14 ++
   gcc/testsuite/g++.dg/modules/pr104040_b.C |  8 
   3 files changed, 25 insertions(+), 2 deletions(-)
   create mode 100644 gcc/testsuite/g++.dg/modules/pr104040_a.C
   create mode 100644 gcc/testsuite/g++.dg/modules/pr104040_b.C

diff --git a/gcc/cp/semantics.cc b/gcc/cp/semantics.cc
index adb1ba48d29..03800a20b26 100644
--- a/gcc/cp/semantics.cc
+++ b/gcc/cp/semantics.cc
@@ -5033,9 +5033,10 @@ expand_or_defer_fn_1 (tree fn)
 /* We don't want to process FN again, so pretend we've written
 it out, even though we haven't.  */
 TREE_ASM_WRITTEN (fn) = 1;
-  /* If this is a constexpr function, keep DECL_SAVED_TREE.  */
+  /* If this is a constexpr function, or the body might need to be
+exported from a module CMI, keep DECL_SAVED_TREE.  */
 if (!DECL_DECLARED_CONSTEXPR_P (fn)
- && !(modules_p () && DECL_DECLARED_INLINE_P (fn)))
+ && !(modules_p () && vague_linkage_p (fn)))


Also, how about module_maybe_has_cmi_p?  OK with that change.


Using 'module_maybe_has_cmi_p' doesn't seem to work.  This is for two
reasons, one of them fixable and one of them not (easily):

- It seems that header modules don't count for 'module_maybe_has_cmi_p';
   I didn't notice this initially, and maybe they should for the
   no-linkage decls too?


I think so; they could similarly be referred to by an importer.


 But even accounting for this,

- For some reason only clearing it if the module might have a CMI causes
   crashes in importers for some testcases.  I'm not 100% sure why yet,
   but I suspect it might be some duplicate-decls thing where the type
   inconsistently has DECL_SAVED_TREE applied, since this is also called
   on streamed-in declarations.


Clearing if the module might have a CMI sounds backwards, I'd expect 
that to be the case where we want to leave it alone.  Is that the 
problem, or just a typo?



Out of interest, what was the reason that it was cleared at all in the
first place?  I wasn't able to find anything with git blame; is it just
for performance reasons in avoiding excess lowering later?


That change goes back to the LTO merge, I believe it was to reduce 
unnecessary LTO streaming.


But now that I think about it some more, I don't see why handling 
modules specially here is necessary at all; the point of this code is 
that after we build the destructor clones, the DECL_SAVED_TREE of the 
cloned function is no longer useful.  Why would modules care about the 
maybe-in-charge function?


Jason

[Linaro-TCWG-CI] gcc-14-9841-g1e3312a25a7: FAIL: 3 regressions on arm

[ci_notify--- via Gcc-regression]

Dear contributor, our automatic CI has detected problems related to your 
patch(es).  Please find some details below.  If you have any questions, please 
follow up on linaro-toolch...@lists.linaro.org mailing list, Libera's 
#linaro-tcwg channel, or ping your favourite Linaro toolchain developer on the 
usual project channel.

We appreciate that it might be difficult to find the necessary logs or 
reproduce the issue locally. If you can't get what you need from our CI within 
minutes, let us know and we will be happy to help.

We track this report status in https://linaro.atlassian.net/browse/GNU-1191 , 
please let us know if you are looking at the problem and/or when you have a fix.

In gcc_check master-arm after:

  | commit gcc-14-9841-g1e3312a25a7
  | Author: Martin Jambor 
  | Date:   Mon Apr 8 18:53:23 2024 +0200
  | 
  | ICF: Make ICF and SRA agree on padding
  | 
  | PR 113359 shows that (at least with -fno-strict-aliasing) ICF can
  | unify two functions which copy an aggregate type of the same size but
  | then SRA, through its total scalarization, can copy the aggregate by
  | pieces, skipping paddding, but the padding was not the same in the two
  | original functions that ICF unified.
  | ... 51 lines of the commit log omitted.

FAIL: 3 regressions

regressions.sum:
=== gcc tests ===

Running gcc:gcc.dg/lto/lto.exp ...
FAIL: gcc-dg-lto-pr113359-2-01.exe scan-wpa-ipa-dump icf "Semantic equality 
hit:geta/.*getb/"
FAIL: gcc.dg/lto/pr113359-2 c_lto_pr113359-2_0.o assemble, -O2 -flto 
-fno-strict-aliasing -fno-ipa-cp  --disable-tree-esra -fdump-ipa-icf-details
FAIL: gcc.dg/lto/pr113359-2 c_lto_pr113359-2_0.o-c_lto_pr113359-2_1.o execute 
-O2 -flto -fno-strict-aliasing -fno-ipa-cp  --disable-tree-esra 
-fdump-ipa-icf-details


You can find the failure logs in *.log.1.xz files in
 - 
https://ci.linaro.org/job/tcwg_gcc_check--master-arm-build/1948/artifact/artifacts/00-sumfiles/
The full lists of regressions and progressions as well as configure and make 
commands are in
 - 
https://ci.linaro.org/job/tcwg_gcc_check--master-arm-build/1948/artifact/artifacts/notify/
The list of [ignored] baseline and flaky failures are in
 - 
https://ci.linaro.org/job/tcwg_gcc_check--master-arm-build/1948/artifact/artifacts/sumfiles/xfails.xfail

The configuration of this build is:
CI config tcwg_gcc_check master-arm

-8<--8<--8<--
The information below can be used to reproduce a debug environment:

Current build   : 
https://ci.linaro.org/job/tcwg_gcc_check--master-arm-build/1948/artifact/artifacts
Reference build : 
https://ci.linaro.org/job/tcwg_gcc_check--master-arm-build/1947/artifact/artifacts

Reproduce last good and first bad builds: 
https://git-us.linaro.org/toolchain/ci/interesting-commits.git/plain/gcc/sha1/1e3312a25a7b34d6e3f549273e1674c7114e4408/tcwg_gcc_check/master-arm/reproduction_instructions.txt

Full commit : 
https://github.com/gcc-mirror/gcc/commit/1e3312a25a7b34d6e3f549273e1674c7114e4408

List of configurations that regressed due to this commit :
* tcwg_gcc_check
** master-arm
*** FAIL: 3 regressions
*** 
https://git-us.linaro.org/toolchain/ci/interesting-commits.git/plain/gcc/sha1/1e3312a25a7b34d6e3f549273e1674c7114e4408/tcwg_gcc_check/master-arm/details.txt
*** 
https://ci.linaro.org/job/tcwg_gcc_check--master-arm-build/1948/artifact/artifacts

☠ Buildbot (Sourceware): gcc-autoregen - failed 'git diff ...' (failure) (master)

[builder--- via Gcc-testresults]

A failed build has been detected on builder gcc-autoregen while building gcc.

Full details are available at:
https://builder.sourceware.org/buildbot/#/builders/269/builds/4210

Build state: failed 'git diff ...' (failure)
Revision: 18e94e04dae724c61cbc13ace85fa68f2deda900
Worker: bb1-1
Build Reason: (unknown)
Blamelist: GCC Administrator , Gaius Mulley 
, H.J. Lu , Jonathan Wakely 
, Joseph Myers , Kewen Lin 
, Martin Jambor , Richard Sandiford 
, Tatsuyuki Ishi , Thomas 
Schwinge , Tobias Burnus , Uros 
Bizjak 

Steps:

- 0: worker_preparation ( success )

- 1: git checkout ( success )
Logs:
- stdio: 
https://builder.sourceware.org/buildbot/#/builders/269/builds/4210/steps/1/logs/stdio

- 2: autoregen.py ( success )
Logs:
- stdio: 
https://builder.sourceware.org/buildbot/#/builders/269/builds/4210/steps/2/logs/stdio

- 3: git diff ( success )
Logs:
- stdio: 
https://builder.sourceware.org/buildbot/#/builders/269/builds/4210/steps/3/logs/stdio

- 4: mkdir objdir ( success )
Logs:
- stdio: 
https://builder.sourceware.org/buildbot/#/builders/269/builds/4210/steps/4/logs/stdio

- 5: configure ( success )
Logs:
- stdio: 
https://builder.sourceware.org/buildbot/#/builders/269/builds/4210/steps/5/logs/stdio

- 6: make html ( warnings )
Logs:
- stdio: 
https://builder.sourceware.org/buildbot/#/builders/269/builds/4210/steps/6/logs/stdio
- warnings (67): 
https://builder.sourceware.org/buildbot/#/builders/269/builds/4210/steps/6/logs/warnings__67_

- 7: make regenerate-opt-urls ( success )
Logs:
- stdio: 
https://builder.sourceware.org/buildbot/#/builders/269/builds/4210/steps/7/logs/stdio

- 8: git diff_1 ( failure )
Logs:
- stdio: 
https://builder.sourceware.org/buildbot/#/builders/269/builds/4210/steps/8/logs/stdio

Re: [PATCH] i386: Fix aes/vaes patterns [PR114576]

[Hongtao Liu]

On Thu, Apr 4, 2024 at 4:42 PM Jakub Jelinek  wrote:
>
> On Wed, Apr 19, 2023 at 02:40:59AM +, Jiang, Haochen via Gcc-patches 
> wrote:
> > > >  (define_insn "aesenc"
> > > > -  [(set (match_operand:V2DI 0 "register_operand" "=x,x")
> > > > -   (unspec:V2DI [(match_operand:V2DI 1 "register_operand" "0,x")
> > > > -  (match_operand:V2DI 2 "vector_operand" "xBm,xm")]
> > > > +  [(set (match_operand:V2DI 0 "register_operand" "=x,x,v")
> > > > +   (unspec:V2DI [(match_operand:V2DI 1 "register_operand" "0,x,v")
> > > > +  (match_operand:V2DI 2 "vector_operand"
> > > > + "xBm,xm,vm")]
> > > >   UNSPEC_AESENC))]
> > > > -  "TARGET_AES"
> > > > +  "TARGET_AES || (TARGET_VAES && TARGET_AVX512VL)"
> > > >"@
> > > > aesenc\t{%2, %0|%0, %2}
> > > > +   vaesenc\t{%2, %1, %0|%0, %1, %2}
> > > > vaesenc\t{%2, %1, %0|%0, %1, %2}"
> > > > -  [(set_attr "isa" "noavx,avx")
> > > > +  [(set_attr "isa" "noavx,aes,avx512vl")
> > > Shouldn't it be vaes_avx512vl and then remove " || (TARGET_VAES &&
> > > TARGET_AVX512VL)" from condition.
> >
> > Since VAES should not imply AES, we need that "|| (TARGET_VAES &&
> > TARGET_AVX512VL)"
> >
> > And there is no need to add vaes_avx512vl since the last alternative will 
> > only
> > be hit when there is no aes. When there is no aes, the pattern will need 
> > vaes
> > and avx512vl both or we could not use this pattern. avx512vl here is just 
> > like
> > a placeholder.
>
> As the following testcase shows, the above change was incorrect.
>
> Using aes isa for the second alternative is obviously wrong, aes is enabled
> whenever -maes is, regardless of -mavx or -mno-avx, so the above change
> means that for -maes -mno-avx RA can choose, either it matches the first
> alternative with the dup operand, or it matches the second one (but that
> is of course wrong because vaesenc VEX encoded insn needs AES & AVX CPUID).
>
> The big question is if "Since VAES should not imply AES" is the case or not.
> Looking around at what LLVM does on godbolt, seems since clang 6 which added
> -mvaes support -mvaes there implies -maes, but GCC treats those two
> independent.
>
> Now, if we'd take the LLVM path of making -mvaes imply -maes and -mno-aes
> imply -mno-vaes, then we should probably just revert the above patch and
> tweak common/config/i386/ to do the implications (+ add the testcase from
> this patch).
>
> If we keep the current behavior, where AES and VAES are completely
> independent extensions, then we need to do more changes as the following
> patch attempts to do.
> We should use the aesenc etc. insns for noavx as before, we know at that
> point that TARGET_AES must be true because (TARGET_VAES && TARGET_AVX512VL)
> won't be true when !TARGET_AVX - TARGET_AVX512VL implies TARGET_AVX.
> For the second alternative, i.e. the AVX AES VEX encoded case, the patch
> uses aes_avx isa which requires both.  Now, for the third one we can't
> use avx512vl isa attribute, because one could compile with
> -maes -mavx512vl -mno-vaes and in that case we want VEX encoded vaesenc
> which can't use %xmm16+ (nor EGPRs), so we need vaes_avx512vl isa to
> ensure it is enabled only for -mvaes -mavx512vl.  And there is another
> problem, with -mno-aes -mvaes -mavx512vl we could emit VEX encoded vaesenc
> which requires AES and AVX ISAs rather than the VAES and AVX512VL which
> are enabled.  So the patch uses the {evex} prefix for those cases.
> And similarly for the vaes*_ instructions, if they aren't 128-bit
> or use %xmm16+ registers, the current case is fine, but if they are 128-bit
> and use only %xmm0-15 registers, assembler would again emit VEX encoded insn
> which needs AES & AVX CPUID, rather than the EVEX encoded ones which need
> VAES & AVX512VL CPUIDs.
> Still, I wonder if -mvaes shouldn't imply at least -mavx512f and
> -mno-avx512f shouldn't imply -mno-vaes, because otherwise can't see how
> it could use 512-bit registers (this part not done in the patch).
>
> The following patch has been successfully bootstrapped/regtested on
> x86_64-linux and i686-linux.
>
> 2024-04-04  Jakub Jelinek  
>
> PR target/114576
> * config/i386/i386.md (isa): Remove aes, add aes_avx, vaes_avx512vl.
> (enabled): Remove aes isa check, add aes_avx and vaes_avx512vl.
> * config/i386/sse.md (aesenc, aesenclast, aesdec, aesdeclast): Add
> 4th alternative, emit {evex} prefix for the third one, use
> noavx,aes_avx,vaes_avx512vl,vaes_avx512vl isa attribute, use jm
> rather than m constraint on the 2nd and 3rd alternative input.
> (vaesdec_, vaesdeclast_, vaesenc_,
> vaesenclast_): Add second alternative with x instead of v
> and jm instead of m.
>
> * gcc.target/i386/aes-pr114576.c: New test.
>
> --- gcc/config/i386/i386.md.jj  2024-03-18 22:15:43.165839479 +0100
> +++ gcc/config/i386/i386.md 2024-04-04 00:48:46.575511556 +0200
> @@ -568,13 +568,14 @@ 

Results for 13.2.1 20240409 [releases/gcc-13 r13-8595-g3c019816c9] (GCC) testsuite on powerpc64le-unknown-linux-gnu

[Bill Seurer (POWER9 IEEE128) via Gcc-testresults]

git commit g:3c019816c9c3604d4d039e22bb1e39c14ba8ac17
gcc-descr r13-8595-g3c019816c9c360

power9 IEEE128
Linux 6.9.0-0.rc2.20240402git026e680b0a08.24.fc41.ppc64le ppc64le
GNU Make 4.4.1

DejaGnu:
DejaGnu version 1.6.3
Expect version  5.45.4
Tcl version 8.6

64-bit

LAST_UPDATED: Tue Apr  9 01:53:17 UTC 2024 (revision r13-8595-g3c019816c9)

Native configuration is powerpc64le-unknown-linux-gnu

=== gcc tests ===


Running target unix
FAIL: gcc.dg/analyzer/data-model-4.c (test for excess errors)
FAIL: gcc.dg/analyzer/torture/conftest-1.c   -O0  (test for excess errors)
FAIL: gcc.dg/analyzer/torture/conftest-1.c   -O1  (test for excess errors)
FAIL: gcc.dg/analyzer/torture/conftest-1.c   -O2  (test for excess errors)
FAIL: gcc.dg/analyzer/torture/conftest-1.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  (test for excess errors)
FAIL: gcc.dg/analyzer/torture/conftest-1.c   -O3 -g  (test for excess errors)
FAIL: gcc.dg/analyzer/torture/conftest-1.c   -Os  (test for excess errors)
XPASS: gcc.dg/Wtrampolines.c standard descriptors (test for warnings, line 29)
FAIL: gcc.dg/torture/float128-cmp-invalid.c   -O0  execution test
FAIL: gcc.dg/torture/float128-cmp-invalid.c   -O1  execution test
FAIL: gcc.dg/torture/float128-cmp-invalid.c   -O2  execution test
FAIL: gcc.dg/torture/float128-cmp-invalid.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  execution test
FAIL: gcc.dg/torture/float128-cmp-invalid.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  execution test
FAIL: gcc.dg/torture/float128-cmp-invalid.c   -O3 -g  execution test
FAIL: gcc.dg/torture/float128-cmp-invalid.c   -Os  execution test
FAIL: gcc.dg/torture/pr52451.c   -O0  execution test
FAIL: gcc.dg/torture/pr52451.c   -O1  execution test
FAIL: gcc.dg/torture/pr52451.c   -O2  execution test
FAIL: gcc.dg/torture/pr52451.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  execution test
FAIL: gcc.dg/torture/pr52451.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  execution test
FAIL: gcc.dg/torture/pr52451.c   -O3 -g  execution test
FAIL: gcc.dg/torture/pr52451.c   -Os  execution test
FAIL: gcc.dg/torture/pr91323.c   -O0  execution test
FAIL: gcc.dg/torture/pr91323.c   -O1  execution test
FAIL: gcc.dg/torture/pr91323.c   -O2  execution test
FAIL: gcc.dg/torture/pr91323.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  execution test
FAIL: gcc.dg/torture/pr91323.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  execution test
FAIL: gcc.dg/torture/pr91323.c   -O3 -g  execution test
FAIL: gcc.dg/torture/pr91323.c   -Os  execution test
XPASS: gcc.dg/tree-ssa/ssa-dom-cse-2.c scan-tree-dump optimized "return 28;"
FAIL: gcc.target/powerpc/pr105334.c (test for excess errors)
FAIL: gcc.target/powerpc/rlwimi-2.c scan-assembler-times (?n)^s+[a-z] 20217
FAIL: gcc.target/powerpc/rs6000-fpint.c scan-assembler-not stfiwx
XPASS: gcc.target/powerpc/ppc-fortran/ieee128-math.f90   -O  (test for excess 
errors)

=== gcc Summary ===

# of expected passes165759
# of unexpected failures31
# of unexpected successes   3
# of expected failures  1481
# of unsupported tests  2973
/home/gccbuild/build/nightly/build-gcc-13/gcc/xgcc  version 13.2.1 20240409 
[releases/gcc-13 r13-8595-g3c019816c9] (GCC) 

=== gfortran tests ===


Running target unix
XPASS: gfortran.dg/default_format_2.f90   -O0  execution test
XPASS: gfortran.dg/default_format_2.f90   -O1  execution test
XPASS: gfortran.dg/default_format_2.f90   -O2  execution test
XPASS: gfortran.dg/default_format_2.f90   -O3 -fomit-frame-pointer 
-funroll-loops -fpeel-loops -ftracer -finline-functions  execution test
XPASS: gfortran.dg/default_format_2.f90   -O3 -g  execution test
XPASS: gfortran.dg/default_format_2.f90   -Os  execution test
XPASS: gfortran.dg/default_format_denormal_2.f90   -O0  execution test
XPASS: gfortran.dg/default_format_denormal_2.f90   -O1  execution test
XPASS: gfortran.dg/default_format_denormal_2.f90   -O2  execution test
XPASS: gfortran.dg/default_format_denormal_2.f90   -O3 -fomit-frame-pointer 
-funroll-loops -fpeel-loops -ftracer -finline-functions  execution test
XPASS: gfortran.dg/default_format_denormal_2.f90   -O3 -g  execution test
XPASS: gfortran.dg/default_format_denormal_2.f90   -Os  execution test
XPASS: gfortran.dg/large_real_kind_form_io_2.f90   -O0  execution test
XPASS: gfortran.dg/large_real_kind_form_io_2.f90   -O1  execution test
XPASS: gfortran.dg/large_real_kind_form_io_2.f90   -O2  execution test
XPASS: gfortran.dg/large_real_kind_form_io_2.f90   -O3 -fomit-frame-pointer 
-funroll-loops -fpeel-loops -ftracer -finline-functions  execution test
XPASS: gfortran.dg/large_real_kind_form_io_2.f90   -O3 -g  execution test
XPASS: gfortran.dg/large_real_kind_form_io_2.f90   -Os  execution test

=== gfortran Summary ===

# of expected passes68166
# of unexpected successes   18
# 

[Bug target/112980] 64-bit powerpc ELFv2 does not allow nops to be generated before function global entry point

[linkw at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112980

--- Comment #13 from Kewen Lin  ---
(In reply to Giuliano Belinassi from comment #12)
> With your patch we have:
> 
> > .LPFE0:
> > ...
> Which seems what is expected.

Hi Giuliano, thanks for your time on testing it!  Could you kindly help to
explain a bit on why "In such way we can't use the this space to place a
trampoline to the new function"? Is it due to inefficient code like needing
more branches?

global entry:
  [b localentry]
L1:
  [patched code]

localentry:
  [b L1]

Or some other reason which makes it unused at all?

[gcc(refs/users/meissner/heads/work164-dmf)] PowerPC: Add support for 1, 024 bit DMR registers.

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:4174abc0dd30ebbb2feaf03f229b5c991c0c7b97

commit 4174abc0dd30ebbb2feaf03f229b5c991c0c7b97
Author: Michael Meissner 
Date:   Mon Apr 8 23:01:07 2024 -0400

PowerPC: Add support for 1,024 bit DMR registers.

This patch is a prelimianry patch to add the full 1,024 bit dense math 
register
(DMRs) for -mcpu=future.  The MMA 512-bit accumulators map onto the top of 
the
DMR register.

This patch only adds the new 1,024 bit register support.  It does not add
support for any instructions that need 1,024 bit registers instead of 512 
bit
registers.

I used the new mode 'TDOmode' to be the opaque mode used for 1,024 bit
registers.  The 'wD' constraint added in previous patches is used for these
registers.  I added support to do load and store of DMRs via the VSX 
registers,
since there are no load/store dense math instructions.  I added the new 
keyword
'__dmr' to create 1,024 bit types that can be loaded into DMRs.  At 
present, I
don't have aliases for __dmr512 and __dmr1024 that we've discussed 
internally.

The patches have been tested on both little and big endian systems.  Can I 
check
it into the master branch?

2024-04-08   Michael Meissner  

gcc/

* config/rs6000/mma.md (UNSPEC_DM_INSERT512_UPPER): New unspec.
(UNSPEC_DM_INSERT512_LOWER): Likewise.
(UNSPEC_DM_EXTRACT512): Likewise.
(UNSPEC_DMR_RELOAD_FROM_MEMORY): Likewise.
(UNSPEC_DMR_RELOAD_TO_MEMORY): Likewise.
(movtdo): New define_expand and define_insn_and_split to implement 
1,024
bit DMR registers.
(movtdo_insert512_upper): New insn.
(movtdo_insert512_lower): Likewise.
(movtdo_extract512): Likewise.
(reload_dmr_from_memory): Likewise.
(reload_dmr_to_memory): Likewise.
* config/rs6000/rs6000-builtin.cc (rs6000_type_string): Add DMR
support.
(rs6000_init_builtins): Add support for __dmr keyword.
* config/rs6000/rs6000-call.cc (rs6000_return_in_memory): Add 
support
for TDOmode.
(rs6000_function_arg): Likewise.
* config/rs6000/rs6000-modes.def (TDOmode): New mode.
* config/rs6000/rs6000.cc (rs6000_hard_regno_nregs_internal): Add
support for TDOmode.
(rs6000_hard_regno_mode_ok_uncached): Likewise.
(rs6000_hard_regno_mode_ok): Likewise.
(rs6000_modes_tieable_p): Likewise.
(rs6000_debug_reg_global): Likewise.
(rs6000_setup_reg_addr_masks): Likewise.
(rs6000_init_hard_regno_mode_ok): Add support for TDOmode.  Setup 
reload
hooks for DMR mode.
(reg_offset_addressing_ok_p): Add support for TDOmode.
(rs6000_emit_move): Likewise.
(rs6000_secondary_reload_simple_move): Likewise.
(rs6000_preferred_reload_class): Likewise.
(rs6000_secondary_reload_class): Likewise.
(rs6000_mangle_type): Add mangling for __dmr type.
(rs6000_dmr_register_move_cost): Add support for TDOmode.
(rs6000_split_multireg_move): Likewise.
(rs6000_invalid_conversion): Likewise.
* config/rs6000/rs6000.h (VECTOR_ALIGNMENT_P): Add TDOmode.
(enum rs6000_builtin_type_index): Add DMR type nodes.
(dmr_type_node): Likewise.
(ptr_dmr_type_node): Likewise.

gcc/testsuite/

* gcc.target/powerpc/dm-1024bit.c: New test.

Diff:
---
 gcc/config/rs6000/mma.md  | 154 ++
 gcc/config/rs6000/rs6000-builtin.cc   |  17 +++
 gcc/config/rs6000/rs6000-call.cc  |  10 +-
 gcc/config/rs6000/rs6000-modes.def|   4 +
 gcc/config/rs6000/rs6000.cc   | 101 -
 gcc/config/rs6000/rs6000.h|   6 +-
 gcc/testsuite/gcc.target/powerpc/dm-1024bit.c |  63 +++
 7 files changed, 321 insertions(+), 34 deletions(-)

diff --git a/gcc/config/rs6000/mma.md b/gcc/config/rs6000/mma.md
index 2e04eb653fa..8461499e1c3 100644
--- a/gcc/config/rs6000/mma.md
+++ b/gcc/config/rs6000/mma.md
@@ -92,6 +92,11 @@
UNSPEC_MMA_XXMFACC
UNSPEC_MMA_XXMTACC
UNSPEC_MMA_DMSETDMRZ
+   UNSPEC_DM_INSERT512_UPPER
+   UNSPEC_DM_INSERT512_LOWER
+   UNSPEC_DM_EXTRACT512
+   UNSPEC_DMR_RELOAD_FROM_MEMORY
+   UNSPEC_DMR_RELOAD_TO_MEMORY
   ])
 
 (define_c_enum "unspecv"
@@ -793,3 +798,152 @@
 }
   [(set_attr "type" "mma")
(set_attr "prefixed" "yes")])
+
+;; TDOmode (__dmr keyword for 1,024 bit registers).
+(define_expand "movtdo"
+  [(set (match_operand:TDO 0 "nonimmediate_operand")
+   (match_operand:TDO 1 "input_operand"))]
+  "TARGET_MMA_DENSE_MATH"
+{
+  rs6000_emit_move (operands[0], operands[1], TDOmode);
+  DONE;
+})
+
+(define_insn_and_split "*movtdo"
+  [(set (match_operand:TDO 0 

[gcc(refs/users/meissner/heads/work164-dmf)] Add dense math test for new instruction names.

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:97bf659e44a71e0f35a82dc7454b9d8eaf60cd81

commit 97bf659e44a71e0f35a82dc7454b9d8eaf60cd81
Author: Michael Meissner 
Date:   Mon Apr 8 22:17:17 2024 -0400

Add dense math test for new instruction names.

2024-04-08   Michael Meissner  

gcc/testsuite/

* gcc.target/powerpc/dm-double-test.c: New test.
* lib/target-supports.exp (check_effective_target_ppc_dmr_ok): New
target test.

Diff:
---
 gcc/testsuite/gcc.target/powerpc/dm-double-test.c | 194 ++
 gcc/testsuite/lib/target-supports.exp |  23 +++
 2 files changed, 217 insertions(+)

diff --git a/gcc/testsuite/gcc.target/powerpc/dm-double-test.c 
b/gcc/testsuite/gcc.target/powerpc/dm-double-test.c
new file mode 100644
index 000..66c19779585
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dm-double-test.c
@@ -0,0 +1,194 @@
+/* Test derived from mma-double-1.c, modified for dense math.  */
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_dense_math_ok } */
+/* { dg-options "-mdejagnu-cpu=future -O2" } */
+
+#include 
+#include 
+#include 
+
+typedef unsigned char vec_t __attribute__ ((vector_size (16)));
+typedef double v4sf_t __attribute__ ((vector_size (16)));
+#define SAVE_ACC(ACC, ldc, J)  \
+ __builtin_mma_disassemble_acc (result, ACC); \
+ rowC = (v4sf_t *) [0*ldc+J]; \
+  rowC[0] += result[0]; \
+  rowC = (v4sf_t *) [1*ldc+J]; \
+  rowC[0] += result[1]; \
+  rowC = (v4sf_t *) [2*ldc+J]; \
+  rowC[0] += result[2]; \
+  rowC = (v4sf_t *) [3*ldc+J]; \
+ rowC[0] += result[3];
+
+void
+DM (int m, int n, int k, double *A, double *B, double *C)
+{
+  __vector_quad acc0, acc1, acc2, acc3, acc4, acc5, acc6, acc7;
+  v4sf_t result[4];
+  v4sf_t *rowC;
+  for (int l = 0; l < n; l += 4)
+{
+  double *CO;
+  double *AO;
+  AO = A;
+  CO = C;
+  C += m * 4;
+  for (int j = 0; j < m; j += 16)
+   {
+ double *BO = B;
+ __builtin_mma_xxsetaccz ();
+ __builtin_mma_xxsetaccz ();
+ __builtin_mma_xxsetaccz ();
+ __builtin_mma_xxsetaccz ();
+ __builtin_mma_xxsetaccz ();
+ __builtin_mma_xxsetaccz ();
+ __builtin_mma_xxsetaccz ();
+ __builtin_mma_xxsetaccz ();
+ unsigned long i;
+
+ for (i = 0; i < k; i++)
+   {
+ vec_t *rowA = (vec_t *) & AO[i * 16];
+ __vector_pair rowB;
+ vec_t *rb = (vec_t *) & BO[i * 4];
+ __builtin_mma_assemble_pair (, rb[1], rb[0]);
+ __builtin_mma_xvf64gerpp (, rowB, rowA[0]);
+ __builtin_mma_xvf64gerpp (, rowB, rowA[1]);
+ __builtin_mma_xvf64gerpp (, rowB, rowA[2]);
+ __builtin_mma_xvf64gerpp (, rowB, rowA[3]);
+ __builtin_mma_xvf64gerpp (, rowB, rowA[4]);
+ __builtin_mma_xvf64gerpp (, rowB, rowA[5]);
+ __builtin_mma_xvf64gerpp (, rowB, rowA[6]);
+ __builtin_mma_xvf64gerpp (, rowB, rowA[7]);
+   }
+ SAVE_ACC (, m, 0);
+ SAVE_ACC (, m, 4);
+ SAVE_ACC (, m, 2);
+ SAVE_ACC (, m, 6);
+ SAVE_ACC (, m, 8);
+ SAVE_ACC (, m, 12);
+ SAVE_ACC (, m, 10);
+ SAVE_ACC (, m, 14);
+ AO += k * 16;
+ BO += k * 4;
+ CO += 16;
+   }
+  B += k * 4;
+}
+}
+
+void
+init (double *matrix, int row, int column)
+{
+  for (int j = 0; j < column; j++)
+{
+  for (int i = 0; i < row; i++)
+   {
+ matrix[j * row + i] = (i * 16 + 2 + j) / 0.123;
+   }
+}
+}
+
+void
+init0 (double *matrix, double *matrix1, int row, int column)
+{
+  for (int j = 0; j < column; j++)
+for (int i = 0; i < row; i++)
+  matrix[j * row + i] = matrix1[j * row + i] = 0;
+}
+
+
+void
+print (const char *name, const double *matrix, int row, int column)
+{
+  printf ("Matrix %s has %d rows and %d columns:\n", name, row, column);
+  for (int i = 0; i < row; i++)
+{
+  for (int j = 0; j < column; j++)
+   {
+ printf ("%f ", matrix[j * row + i]);
+   }
+  printf ("\n");
+}
+  printf ("\n");
+}
+
+int
+main (int argc, char *argv[])
+{
+  int rowsA, colsB, common;
+  int i, j, k;
+  int ret = 0;
+
+  for (int t = 16; t <= 128; t += 16)
+{
+  for (int t1 = 4; t1 <= 16; t1 += 4)
+   {
+ rowsA = t;
+ colsB = t1;
+ common = 1;
+ /* printf ("Running test for rows = %d,cols = %d\n", t, t1); */
+ double A[rowsA * common];
+ double B[common * colsB];
+ double C[rowsA * colsB];
+ double D[rowsA * colsB];
+
+
+ init (A, rowsA, common);
+ init (B, common, colsB);
+ init0 (C, D, rowsA, colsB);
+ DM (rowsA, colsB, common, A, B, C);
+
+ for (i = 0; i < colsB; i++)
+   {
+ for (j = 0; j < rowsA; j++)
+   {
+ D[i * 

[gcc(refs/users/meissner/heads/work164-dmf)] PowerPC: Switch to dense math names for all MMA operations.

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:5ebe63826f25ac7416e399f4216f86a41695da89

commit 5ebe63826f25ac7416e399f4216f86a41695da89
Author: Michael Meissner 
Date:   Mon Apr 8 22:15:44 2024 -0400

PowerPC: Switch to dense math names for all MMA operations.

This patch changes the assembler instruction names for MMA instructions from
the original name used in power10 to the new name when used with the dense 
math
system.  I.e. xvf64gerpp becomes dmxvf64gerpp.  The assembler will emit the
same bits for either spelling.

For the non-prefixed MMA instructions, we add a 'dm' prefix in front of the
instruction.  However, the prefixed instructions have a 'pm' prefix, and we 
add
the 'dm' prefix afterwards.  To prevent having two sets of parallel int
attributes, we remove the "pm" prefix from the instruction string in the
attributes, and add it later, both in the insn name and in the output 
template.

2024-04-08   Michael Meissner  

gcc/

* config/rs6000/mma.md (vvi4i4i8): Change the instruction to not 
have a
"pm" prefix.
(avvi4i4i8): Likewise.
(vvi4i4i2): Likewise.
(avvi4i4i2): Likewise.
(vvi4i4): Likewise.
(avvi4i4): Likewise.
(pvi4i2): Likewise.
(apvi4i2): Likewise.
(vvi4i4i4): Likewise.
(avvi4i4i4): Likewise.
(mma_): Add support for running on DMF systems, generating the 
dense
math instruction and using the dense math accumulators.
(mma_): Likewise.
(mma_): Likewise.
(mma_): Likewise.
(mma_pm): Add support for running on DMF systems, 
generating
the dense math instruction and using the dense math accumulators.
Rename the insn with a 'pm' prefix and add either 'pm' or 'pmdm'
prefixes based on whether we have the original MMA specification or 
if
we have dense math support.
(mma_pm): Likewise.
(mma_pm): Likewise.
(mma_pm): Likewise.
(mma_pm): Likewise.
(mma_pm): Likewise.
(mma_pm): Likewise.
(mma_pm): Likewise.

Diff:
---
 gcc/config/rs6000/mma.md | 157 +++
 1 file changed, 104 insertions(+), 53 deletions(-)

diff --git a/gcc/config/rs6000/mma.md b/gcc/config/rs6000/mma.md
index ae6e7e9695b..2e04eb653fa 100644
--- a/gcc/config/rs6000/mma.md
+++ b/gcc/config/rs6000/mma.md
@@ -225,44 +225,47 @@
 (UNSPEC_MMA_XVF64GERNP "xvf64gernp")
 (UNSPEC_MMA_XVF64GERNN "xvf64gernn")])
 
-(define_int_attr vvi4i4i8  [(UNSPEC_MMA_PMXVI4GER8 "pmxvi4ger8")])
+;; The "pm" prefix is not in these expansions, so that we can generate
+;; pmdmxvi4ger8 on systems with dense math registers and xvi4ger8 on systems
+;; without dense math registers.
+(define_int_attr vvi4i4i8  [(UNSPEC_MMA_PMXVI4GER8 "xvi4ger8")])
 
-(define_int_attr avvi4i4i8 [(UNSPEC_MMA_PMXVI4GER8PP   
"pmxvi4ger8pp")])
+(define_int_attr avvi4i4i8 [(UNSPEC_MMA_PMXVI4GER8PP   "xvi4ger8pp")])
 
-(define_int_attr vvi4i4i2  [(UNSPEC_MMA_PMXVI16GER2"pmxvi16ger2")
-(UNSPEC_MMA_PMXVI16GER2S   "pmxvi16ger2s")
-(UNSPEC_MMA_PMXVF16GER2"pmxvf16ger2")
-(UNSPEC_MMA_PMXVBF16GER2   
"pmxvbf16ger2")])
+(define_int_attr vvi4i4i2  [(UNSPEC_MMA_PMXVI16GER2"xvi16ger2")
+(UNSPEC_MMA_PMXVI16GER2S   "xvi16ger2s")
+(UNSPEC_MMA_PMXVF16GER2"xvf16ger2")
+(UNSPEC_MMA_PMXVBF16GER2   "xvbf16ger2")])
 
-(define_int_attr avvi4i4i2 [(UNSPEC_MMA_PMXVI16GER2PP  "pmxvi16ger2pp")
-(UNSPEC_MMA_PMXVI16GER2SPP 
"pmxvi16ger2spp")
-(UNSPEC_MMA_PMXVF16GER2PP  "pmxvf16ger2pp")
-(UNSPEC_MMA_PMXVF16GER2PN  "pmxvf16ger2pn")
-(UNSPEC_MMA_PMXVF16GER2NP  "pmxvf16ger2np")
-(UNSPEC_MMA_PMXVF16GER2NN  "pmxvf16ger2nn")
-(UNSPEC_MMA_PMXVBF16GER2PP 
"pmxvbf16ger2pp")
-(UNSPEC_MMA_PMXVBF16GER2PN 
"pmxvbf16ger2pn")
-(UNSPEC_MMA_PMXVBF16GER2NP 
"pmxvbf16ger2np")
-(UNSPEC_MMA_PMXVBF16GER2NN 
"pmxvbf16ger2nn")])
+(define_int_attr avvi4i4i2 [(UNSPEC_MMA_PMXVI16GER2PP  "xvi16ger2pp")
+(UNSPEC_MMA_PMXVI16GER2SPP "xvi16ger2spp")
+(UNSPEC_MMA_PMXVF16GER2PP  "xvf16ger2pp")
+(UNSPEC_MMA_PMXVF16GER2PN  "xvf16ger2pn")

[gcc(refs/users/meissner/heads/work164-dmf)] Add support for dense math registers.

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:236e981f23100b440dc60543935d43d310ddf324

commit 236e981f23100b440dc60543935d43d310ddf324
Author: Michael Meissner 
Date:   Mon Apr 8 22:10:53 2024 -0400

Add support for dense math registers.

The MMA subsystem added the notion of accumulator registers as an optional
feature of ISA 3.1 (power10).  In ISA 3.1, these accumulators overlapped 
with
the VSX registers 0..31, but logically the accumulator registers were 
separate
from the FPR registers.  In ISA 3.1, it was anticipated that in future 
systems,
the accumulator registers may no overlap with the FPR registers.  This patch
adds the support for dense math registers as separate registers.

This particular patch does not change the MMA support to use the 
accumulators
within the dense math registers.  This patch just adds the basic support for
having separate DMRs.  The next patch will switch the MMA support to use the
accumulators if -mcpu=future is used.

For testing purposes, I added an undocumented option '-mdense-math' to 
enable
or disable the dense math support.

This patch adds a new constraint (wD).  If MMA is selected but dense math is
not selected (i.e. -mcpu=power10), the wD constraint will allow access to
accumulators that overlap with VSX registers 0..31.  If both MMA and dense 
math
are selected (i.e. -mcpu=future), the wD constraint will only allow dense 
math
registers.

This patch modifies the existing %A output modifier.  If MMA is selected but
dense math is not selected, then %A output modifier converts the VSX 
register
number to the accumulator number, by dividing it by 4.  If both MMA and 
dense
math are selected, then %A will map the separate DMR registers into 0..7.

The intention is that user code using extended asm can be modified to run on
both MMA without dense math and MMA with dense math:

1)  If possible, don't use extended asm, but instead use the MMA 
built-in
functions;

2)  If you do need to write extended asm, change the d constraints
targetting accumulators should now use wD;

3)  Only use the built-in zero, assemble and disassemble functions 
create
move data between vector quad types and dense math accumulators.
I.e. do not use the xxmfacc, xxmtacc, and xxsetaccz directly in the
extended asm code.  The reason is these instructions assume there 
is a
1-to-1 correspondence between 4 adjacent FPR registers and an
accumulator that overlaps with those instructions.  With 
accumulators
now being separate registers, there no longer is a 1-to-1
correspondence.

It is possible that the mangling for DMRs and the GDB register numbers may
produce other changes in the future.

2024-04-08   Michael Meissner  

* config/rs6000/mma.md (UNSPEC_MMA_DMSETDMRZ): New unspec.
(movxo): Add comments about dense math registers.
(movxo_nodm): Rename from movxo and restrict the usage to machines
without dense math registers.
(movxo_dm): New insn for movxo support for machines with dense math
registers.
(mma_): Restrict usage to machines without dense math 
registers.
(mma_xxsetaccz): Add a define_expand wrapper, and add support for 
dense
math registers.
(mma_dmsetaccz): New insn.
* config/rs6000/predicates.md (dmr_operand): New predicate.
(accumulator_operand): Add support for dense math registers.
* config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_mma_builtin): 
Do
not issue a de-prime instruction when disassembling a vector quad 
on a
system with dense math registers.
* config/rs6000/rs6000-c.cc (rs6000_define_or_undefine_macro): 
Define
__DENSE_MATH__ if we have dense math registers.
* config/rs6000/rs6000.cc (enum rs6000_reg_type): Add DMR_REG_TYPE.
(enum rs6000_reload_reg_type): Add RELOAD_REG_DMR.
(LAST_RELOAD_REG_CLASS): Add support for DMR registers and the wD
constraint.
(reload_reg_map): Likewise.
(rs6000_reg_names): Likewise.
(alt_reg_names): Likewise.
(rs6000_hard_regno_nregs_internal): Likewise.
(rs6000_hard_regno_mode_ok_uncached): Likewise.
(rs6000_debug_reg_global): Likewise.
(rs6000_setup_reg_addr_masks): Likewise.
(rs6000_init_hard_regno_mode_ok): Likewise.
(rs6000_secondary_reload_memory): Add support for DMR registers.
(rs6000_secondary_reload_simple_move): Likewise.
(rs6000_preferred_reload_class): Likewise.
(rs6000_secondary_reload_class): Likewise.
(print_operand): Make %A handle both FPRs and DMRs.
  

[gcc(refs/users/meissner/heads/work164-dmf)] Add wD constraint.

[Michael Meissner via Gcc-cvs]

https://gcc.gnu.org/g:ddcfc9baba6d56ded3bd877409614d494803f26f

commit ddcfc9baba6d56ded3bd877409614d494803f26f
Author: Michael Meissner 
Date:   Mon Apr 8 21:34:32 2024 -0400

Add wD constraint.

This patch adds a new constraint ('wD') that matches the accumulator 
registers
that overlap with VSX registers 0..31 on power10.  Future patches will add 
the
support for a separate accumulator register class that will be used when the
support for dense math registes is added.

2024-04-08   Michael Meissner  

* config/rs6000/constraints.md (wD): New constraint.
* config/rs6000/mma.md (mma_): Prepare for alternate 
accumulator
registers.  Use wD constraint instead of 'd' constraint.  Use
accumulator_operand instead of fpr_reg_operand.
(mma_): Likewise.
(mma_): Likewise.
(mma_): Likewise.
(mma_): Likewise.
(mma_): Likewise.
(mma_): Likewise.
(mma_): Likewise.
(mma_): Likewise.
(mma_): Likewise.
(mma_): Likewise.
(mma_): Likewise.
(mma_): Likewise.
(mma_"
-  [(set (match_operand:XO 0 "fpr_reg_operand" "=")
-   (unspec:XO [(match_operand:XO 1 "fpr_reg_operand" "0")]
+  [(set (match_operand:XO 0 "accumulator_operand" "=")
+   (unspec:XO [(match_operand:XO 1 "accumulator_operand" "0")]
MMA_ACC))]
   "TARGET_MMA"
   " %A0"
@@ -523,7 +523,7 @@
   [(set_attr "type" "mma")])
 
 (define_insn "mma_"
-  [(set (match_operand:XO 0 "fpr_reg_operand" "=,")
+  [(set (match_operand:XO 0 "accumulator_operand" "=,")
(unspec:XO [(match_operand:V16QI 1 "vsx_register_operand" "v,?wa")
(match_operand:V16QI 2 "vsx_register_operand" "v,?wa")]
MMA_VV))]
@@ -532,8 +532,8 @@
   [(set_attr "type" "mma")])
 
 (define_insn "mma_"
-  [(set (match_operand:XO 0 "fpr_reg_operand" "=,")
-   (unspec:XO [(match_operand:XO 1 "fpr_reg_operand" "0,0")
+  [(set (match_operand:XO 0 "accumulator_operand" "=,")
+   (unspec:XO [(match_operand:XO 1 "accumulator_operand" "0,0")
(match_operand:V16QI 2 "vsx_register_operand" "v,?wa")
(match_operand:V16QI 3 "vsx_register_operand" "v,?wa")]
MMA_AVV))]
@@ -542,7 +542,7 @@
   [(set_attr "type" "mma")])
 
 (define_insn "mma_"
-  [(set (match_operand:XO 0 "fpr_reg_operand" "=,")
+  [(set (match_operand:XO 0 "accumulator_operand" "=,")
(unspec:XO [(match_operand:OO 1 "vsx_register_operand" "v,?wa")
(match_operand:V16QI 2 "vsx_register_operand" "v,?wa")]
MMA_PV))]
@@ -551,8 +551,8 @@
   [(set_attr "type" "mma")])
 
 (define_insn "mma_"
-  [(set (match_operand:XO 0 "fpr_reg_operand" "=,")
-   (unspec:XO [(match_operand:XO 1 "fpr_reg_operand" "0,0")
+  [(set (match_operand:XO 0 "accumulator_operand" "=,")
+   (unspec:XO [(match_operand:XO 1 "accumulator_operand" "0,0")
(match_operand:OO 2 "vsx_register_operand" "v,?wa")
(match_operand:V16QI 3 "vsx_register_operand" "v,?wa")]
MMA_APV))]
@@ -561,7 +561,7 @@
   [(set_attr "type" "mma")])
 
 (define_insn "mma_"
-  [(set (match_operand:XO 0 "fpr_reg_operand" "=,")
+  [(set (match_operand:XO 0 "accumulator_operand" "=,")
(unspec:XO [(match_operand:V16QI 1 "vsx_register_operand" "v,?wa")
(match_operand:V16QI 2 "vsx_register_operand" "v,?wa")
(match_operand:SI 3 "const_0_to_15_operand" "n,n")
@@ -574,8 +574,8 @@
(set_attr "prefixed" "yes")])
 
 (define_insn "mma_"
-  [(set (match_operand:XO 0 "fpr_reg_operand" "=,")
-   (unspec:XO [(match_operand:XO 1 "fpr_reg_operand" "0,0")
+  [(set (match_operand:XO 0 "accumulator_operand" "=,")
+   (unspec:XO [(match_operand:XO 1 "accumulator_operand" "0,0")
(match_operand:V16QI 2 "vsx_register_operand" "v,?wa")
(match_operand:V16QI 3 "vsx_register_operand" "v,?wa")
(match_operand:SI 4 "const_0_to_15_operand" "n,n")
@@ -588,7 +588,7 @@
(set_attr "prefixed" "yes")])
 
 (define_insn "mma_"
-  [(set (match_operand:XO 0 "fpr_reg_operand" "=,")
+  [(set (match_operand:XO 0 "accumulator_operand" "=,")
(unspec:XO [(match_operand:V16QI 1 "vsx_register_operand" "v,?wa")
(match_operand:V16QI 2 "vsx_register_operand" "v,?wa")
(match_operand:SI 3 "const_0_to_15_operand" "n,n")
@@ -601,8 +601,8 @@
(set_attr "prefixed" "yes")])
 
 (define_insn "mma_"
-  [(set (match_operand:XO 0 "fpr_reg_operand" "=,")
-   (unspec:XO [(match_operand:XO 1 "fpr_reg_operand" "0,0")
+  [(set (match_operand:XO 0 "accumulator_operand" "=,")
+   (unspec:XO [(match_operand:XO 1 "accumulator_operand" "0,0")
(match_operand:V16QI 2 "vsx_register_operand" "v,?wa")

[Bug target/55966] __atomic_fetch_* generate wrong code for HLE

[pinskia at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=55966

Andrew Pinski  changed:

   What|Removed |Added

 Resolution|--- |WONTFIX
 Status|UNCONFIRMED |RESOLVED

--- Comment #10 from Andrew Pinski  ---
Dropping __ATOMIC_HLE_ACQUIRE/__ATOMIC_HLE_RELEASE is always ok thing to do, it
is only there for a hint anyways. So closing as won't fix as Intel also disable
HLE on almost all cores anyways:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=c2955f270a84762343000f103e0640d29c7a96f3

Regressions on master at commit r14-9847 vs commit r14-9833 on Linux/i686

[H.J. Lu via Gcc-regression]

Regressions on master at commit r14-9847 vs commit r14-9833 on Linux/i686
New failures:
FAIL: gcc-dg-lto-pr113359-2-01.exe scan-wpa-ipa-dump icf "Semantic equality 
hit:geta/.*getb/"
FAIL: gcc.dg/lto/pr113359-2 c_lto_pr113359-2_0.o assemble, -O2 -flto 
-fno-strict-aliasing -fno-ipa-cp  --disable-tree-esra -fdump-ipa-icf-details 
FAIL: gcc.dg/lto/pr113359-2 c_lto_pr113359-2_0.o-c_lto_pr113359-2_1.o execute 
-O2 -flto -fno-strict-aliasing -fno-ipa-cp  --disable-tree-esra 
-fdump-ipa-icf-details 

New passes:

Results for 14.0.1 20240408 (experimental) [master r14-9847-geaccdba315b] (GCC) testsuite on i686-pc-linux-gnu

[H.J. Lu via Gcc-testresults]

ution 
test
XPASS: gcc.dg/vect/vect-reduc-in-order-1.c execution test
XPASS: gcc.dg/vect/vect-reduc-in-order-2.c -flto -ffat-lto-objects execution 
test
XPASS: gcc.dg/vect/vect-reduc-in-order-2.c execution test
XPASS: gcc.dg/vect/vect-reduc-in-order-3.c -flto -ffat-lto-objects execution 
test
XPASS: gcc.dg/vect/vect-reduc-in-order-3.c execution test
XPASS: gcc.dg/vect/vect-reduc-in-order-4.c -flto -ffat-lto-objects execution 
test
XPASS: gcc.dg/vect/vect-reduc-in-order-4.c execution test
FAIL: gcc.dg/vect/vect-simd-clone-16e.c scan-tree-dump-times vect "[nr] 
[^n]* = foo.simdclone" 4
FAIL: gcc.dg/vect/vect-simd-clone-16f.c scan-tree-dump-times vect "[nr] 
[^n]* = foo.simdclone" 2
FAIL: gcc.dg/vect/vect-simd-clone-17e.c scan-tree-dump-times vect "[nr] 
[^n]* = foo.simdclone" 4
FAIL: gcc.dg/vect/vect-simd-clone-17f.c scan-tree-dump-times vect "[nr] 
[^n]* = foo.simdclone" 2
FAIL: gcc.dg/vect/vect-simd-clone-18e.c scan-tree-dump-times vect "[nr] 
[^n]* = foo.simdclone" 4
FAIL: gcc.dg/vect/vect-simd-clone-18f.c scan-tree-dump-times vect "[nr] 
[^n]* = foo.simdclone" 2

=== gcc Summary ===

# of expected passes197242
# of unexpected failures128
# of unexpected successes   27
# of expected failures  1556
# of unsupported tests      4122
/export/gnu/import/git/gcc-test-master-ia32/bld/gcc/xgcc  version 14.0.1 
20240408 (experimental) [master r14-9847-geaccdba315b] (GCC) 

=== gfortran tests ===


Running target unix

=== gfortran Summary ===

# of expected passes69599
# of expected failures  275
# of unsupported tests  224
/export/gnu/import/git/gcc-test-master-ia32/bld/gcc/gfortran  version 14.0.1 
20240408 (experimental) [master r14-9847-geaccdba315b] (GCC) 

=== g++ tests ===


Running target unix
FAIL: g++.dg/guality/pr55665.C   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  line 23 p == 40

=== g++ Summary ===

# of expected passes260379
# of unexpected failures1
# of expected failures  2753
# of unsupported tests  10996
/export/gnu/import/git/gcc-test-master-ia32/bld/gcc/xg++  version 14.0.1 
20240408 (experimental) [master r14-9847-geaccdba315b] (GCC) 

=== objc tests ===


Running target unix

=== objc Summary ===

# of expected passes2840
# of expected failures  6
# of unsupported tests  70
/export/gnu/import/git/gcc-test-master-ia32/bld/gcc/xgcc  version 14.0.1 
20240408 (experimental) [master r14-9847-geaccdba315b] (GCC) 

=== libatomic tests ===


Running target unix

=== libatomic Summary ===

# of expected passes44
# of unsupported tests  5
=== libgomp tests ===


Running target unix

=== libgomp Summary ===

# of expected passes16303
# of expected failures  285
# of unsupported tests  635
=== libitm tests ===


Running target unix

=== libitm Summary ===

# of expected passes44
# of expected failures  3
# of unsupported tests  1
=== libstdc++ tests ===


Running target unix
UNRESOLVED: libstdc++-prettyprinters/debug.cc compilation failed to produce 
executable
UNRESOLVED: libstdc++-prettyprinters/debug_cxx11.cc compilation failed to 
produce executable

=== libstdc++ Summary ===

# of expected passes19228
# of expected failures  126
# of unresolved testcases   2
# of unsupported tests  380

Compiler version: 14.0.1 20240408 (experimental) [master r14-9847-geaccdba315b] 
(GCC) 
Platform: i686-pc-linux-gnu
configure flags: --enable-clocale=gnu --with-system-zlib --enable-shared 
--enable-cet --with-demangler-in-ld --enable-libmpx --prefix=/usr/gcc-14.0.1 
i686-linux --with-fpmath=sse

Results for 14.0.1 20240408 (experimental) [master-ia32 r14-9847-geaccdba315b] (GCC) testsuite on i686-pc-linux-gnu

[H.J. Lu via Gcc-testresults]

 execution test
XPASS: gcc.dg/vect/vect-reduc-in-order-3.c -flto -ffat-lto-objects execution 
test
XPASS: gcc.dg/vect/vect-reduc-in-order-3.c execution test
XPASS: gcc.dg/vect/vect-reduc-in-order-4.c -flto -ffat-lto-objects execution 
test
XPASS: gcc.dg/vect/vect-reduc-in-order-4.c execution test

=== gcc Summary ===

# of expected passes197292
# of unexpected failures120
# of unexpected successes   27
# of expected failures  1556
# of unsupported tests  4107
/export/gnu/import/git/gcc-test-master-ia32/bld/gcc/xgcc  version 14.0.1 
20240408 (experimental) [master-ia32 r14-9847-geaccdba315b] (GCC) 

=== gfortran tests ===


Running target unix

=== gfortran Summary ===

# of expected passes69599
# of expected failures  275
# of unsupported tests  224
/export/gnu/import/git/gcc-test-master-ia32/bld/gcc/gfortran  version 14.0.1 
20240408 (experimental) [master-ia32 r14-9847-geaccdba315b] (GCC) 

=== g++ tests ===


Running target unix
FAIL: g++.dg/guality/pr55665.C   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  line 23 p == 40

=== g++ Summary ===

# of expected passes260383
# of unexpected failures1
# of expected failures  2753
# of unsupported tests  10994
/export/gnu/import/git/gcc-test-master-ia32/bld/gcc/xg++  version 14.0.1 
20240408 (experimental) [master-ia32 r14-9847-geaccdba315b] (GCC) 

=== objc tests ===


Running target unix

=== objc Summary ===

# of expected passes2840
# of expected failures  6
# of unsupported tests  70
/export/gnu/import/git/gcc-test-master-ia32/bld/gcc/xgcc  version 14.0.1 
20240408 (experimental) [master-ia32 r14-9847-geaccdba315b] (GCC) 

=== libatomic tests ===


Running target unix

=== libatomic Summary ===

# of expected passes44
# of unsupported tests  5
=== libgomp tests ===


Running target unix

=== libgomp Summary ===

# of expected passes16337
# of expected failures  285
# of unsupported tests  621
=== libitm tests ===


Running target unix

=== libitm Summary ===

# of expected passes44
# of expected failures  3
# of unsupported tests  1
=== libstdc++ tests ===


Running target unix
UNRESOLVED: libstdc++-prettyprinters/debug.cc compilation failed to produce 
executable
UNRESOLVED: libstdc++-prettyprinters/debug_cxx11.cc compilation failed to 
produce executable

=== libstdc++ Summary ===

# of expected passes19228
# of expected failures  126
# of unresolved testcases   2
# of unsupported tests  380

Compiler version: 14.0.1 20240408 (experimental) [master-ia32 
r14-9847-geaccdba315b] (GCC) 
Platform: i686-pc-linux-gnu
configure flags: --enable-clocale=gnu --with-system-zlib --enable-shared 
--enable-cet --with-demangler-in-ld --enable-libmpx --prefix=/usr/gcc-14.0.1 
i686-linux --with-fpmath=sse

Regressions on master at commit r14-9847 vs commit r14-9833 on Linux/i686

[H.J. Lu via Gcc-regression]

Regressions on master at commit r14-9847 vs commit r14-9833 on Linux/i686
New failures:
FAIL: gcc-dg-lto-pr113359-2-01.exe scan-wpa-ipa-dump icf "Semantic equality 
hit:geta/.*getb/"
FAIL: gcc.dg/lto/pr113359-2 c_lto_pr113359-2_0.o assemble, -O2 -flto 
-fno-strict-aliasing -fno-ipa-cp  --disable-tree-esra -fdump-ipa-icf-details 
FAIL: gcc.dg/lto/pr113359-2 c_lto_pr113359-2_0.o-c_lto_pr113359-2_1.o execute 
-O2 -flto -fno-strict-aliasing -fno-ipa-cp  --disable-tree-esra 
-fdump-ipa-icf-details 

New passes:

Results for 14.0.1 20240409 (experimental) [remotes/origin/HEAD r14-9848-g45532e3a92] (GCC) testsuite on powerpc64le-unknown-linux-gnu

[Bill Seurer (POWER8) via Gcc-testresults]

git commit g:45532e3a929d2893b3efd26beefb1162e50cb51b
gcc-descr r14-9848-g45532e3a929d28

power8
Linux 5.4.0-174-generic ppc64le
GNU Make 4.2.1

DejaGnu:
DejaGnu version 1.6.2
Expect version  5.45.4
Tcl version 8.6

64-bit

LAST_UPDATED: Tue Apr  9 00:47:28 UTC 2024 (revision r14-9848-g45532e3a92)

Native configuration is powerpc64le-unknown-linux-gnu

=== gcc tests ===


Running target unix
XPASS: gcc.dg/Wtrampolines.c standard descriptors (test for warnings, line 32)
XPASS: gcc.dg/guality/example.c   -O0  execution test
XPASS: gcc.dg/guality/example.c  -Og -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/guality.c   -O0  execution test
XPASS: gcc.dg/guality/guality.c   -O1  -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/guality.c   -O2  -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/guality.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION execution test
XPASS: gcc.dg/guality/guality.c   -O3 -g  -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/guality.c  -Og -DPREVENT_OPTIMIZATION  execution test
FAIL: gcc.dg/guality/inline-params-2.c   -O2  -DPREVENT_OPTIMIZATION  execution 
test
FAIL: gcc.dg/guality/inline-params-2.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION execution test
FAIL: gcc.dg/guality/inline-params-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION execution test
FAIL: gcc.dg/guality/inline-params-2.c   -O3 -g  -DPREVENT_OPTIMIZATION  
execution test
FAIL: gcc.dg/guality/inline-params-2.c   -Os  -DPREVENT_OPTIMIZATION  execution 
test
FAIL: gcc.dg/guality/loop-1.c   -O2  -DPREVENT_OPTIMIZATION  line 20 i == 1
FAIL: gcc.dg/guality/loop-1.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION line 20 i == 1
FAIL: gcc.dg/guality/loop-1.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 20 i == 1
FAIL: gcc.dg/guality/loop-1.c   -O3 -fomit-frame-pointer -funroll-loops 
-fpeel-loops -ftracer -finline-functions  -DPREVENT_OPTIMIZATION  line 20 i == 1
FAIL: gcc.dg/guality/loop-1.c   -O3 -g  -DPREVENT_OPTIMIZATION  line 20 i == 1
FAIL: gcc.dg/guality/pr36728-1.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 18 *x == (char) 25
FAIL: gcc.dg/guality/pr36728-3.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 16 y == 2
FAIL: gcc.dg/guality/pr36728-3.c   -O3 -g  -DPREVENT_OPTIMIZATION  line 16 y == 
2
FAIL: gcc.dg/guality/pr41353-1.c  -Og -DPREVENT_OPTIMIZATION  line 28 i == 37
FAIL: gcc.dg/guality/pr41353-1.c  -Og -DPREVENT_OPTIMIZATION  line 28 i1 == 2 * 
37
FAIL: gcc.dg/guality/pr41353-1.c  -Og -DPREVENT_OPTIMIZATION  line 28 i2 == 3 * 
37
XPASS: gcc.dg/guality/pr41353-1.c  -Og -DPREVENT_OPTIMIZATION  line 28 j == 28 
+ 37
FAIL: gcc.dg/guality/pr41447-1.c   -O2  -DPREVENT_OPTIMIZATION  execution test
FAIL: gcc.dg/guality/pr41447-1.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION execution test
FAIL: gcc.dg/guality/pr41447-1.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION execution test
FAIL: gcc.dg/guality/pr41447-1.c   -O3 -g  -DPREVENT_OPTIMIZATION  execution 
test
FAIL: gcc.dg/guality/pr41447-1.c   -Os  -DPREVENT_OPTIMIZATION  execution test
FAIL: gcc.dg/guality/pr41616-1.c   -O2  -DPREVENT_OPTIMIZATION  execution test
FAIL: gcc.dg/guality/pr41616-1.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION execution test
FAIL: gcc.dg/guality/pr41616-1.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION execution test
FAIL: gcc.dg/guality/pr41616-1.c   -O3 -g  -DPREVENT_OPTIMIZATION  execution 
test
FAIL: gcc.dg/guality/pr43051-1.c   -O1  -DPREVENT_OPTIMIZATION  line 34 c == 
[0]
FAIL: gcc.dg/guality/pr43051-1.c   -O1  -DPREVENT_OPTIMIZATION  line 39 c == 
[0]
FAIL: gcc.dg/guality/pr43051-1.c   -O2  -DPREVENT_OPTIMIZATION  line 34 c == 
[0]
FAIL: gcc.dg/guality/pr43051-1.c   -O2  -DPREVENT_OPTIMIZATION  line 39 c == 
[0]
FAIL: gcc.dg/guality/pr43051-1.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION line 34 c == [0]
FAIL: gcc.dg/guality/pr43051-1.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION line 39 c == [0]
FAIL: gcc.dg/guality/pr43051-1.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 34 c == [0]
FAIL: gcc.dg/guality/pr43051-1.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 39 c == [0]
FAIL: gcc.dg/guality/pr54200.c   -O1  -DPREVENT_OPTIMIZATION  line 20 z == 3
FAIL: gcc.dg/guality/pr54200.c   -O2  -DPREVENT_OPTIMIZATION  line 20 z == 3
FAIL: gcc.dg/guality/pr54200.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION line 20 z == 3
FAIL: gcc.dg/guality/pr54200.c   -O3 -g  

[Bug target/55947] non constant memory models lose HLE qualifiers

[pinskia at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=55947

Andrew Pinski  changed:

   What|Removed |Added

 Status|UNCONFIRMED |RESOLVED
 Resolution|--- |INVALID

--- Comment #5 from Andrew Pinski  ---
Invalid as explained.

[Bug target/114587] -mapxf should define a macro

[cvs-commit at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114587

--- Comment #4 from GCC Commits  ---
The master branch has been updated by H.J. Lu :

https://gcc.gnu.org/g:18e94e04dae724c61cbc13ace85fa68f2deda900

commit r14-9852-g18e94e04dae724c61cbc13ace85fa68f2deda900
Author: H.J. Lu 
Date:   Mon Apr 8 18:57:49 2024 -0700

x86: Define __APX_INLINE_ASM_USE_GPR32__

Define __APX_INLINE_ASM_USE_GPR32__ for -mapx-inline-asm-use-gpr32.
When __APX_INLINE_ASM_USE_GPR32__ is defined, inline asm statements
should contain only instructions compatible with r16-r31.

gcc/

PR target/114587
* config/i386/i386-c.cc (ix86_target_macros_internal): Define
__APX_INLINE_ASM_USE_GPR32__ for -mapx-inline-asm-use-gpr32.

gcc/testsuite/

PR target/114587
* gcc.target/i386/apx-3.c: Likewise.

[gcc r14-9852] x86: Define __APX_INLINE_ASM_USE_GPR32__

[H.J. Lu via Gcc-cvs]

https://gcc.gnu.org/g:18e94e04dae724c61cbc13ace85fa68f2deda900

commit r14-9852-g18e94e04dae724c61cbc13ace85fa68f2deda900
Author: H.J. Lu 
Date:   Mon Apr 8 18:57:49 2024 -0700

x86: Define __APX_INLINE_ASM_USE_GPR32__

Define __APX_INLINE_ASM_USE_GPR32__ for -mapx-inline-asm-use-gpr32.
When __APX_INLINE_ASM_USE_GPR32__ is defined, inline asm statements
should contain only instructions compatible with r16-r31.

gcc/

PR target/114587
* config/i386/i386-c.cc (ix86_target_macros_internal): Define
__APX_INLINE_ASM_USE_GPR32__ for -mapx-inline-asm-use-gpr32.

gcc/testsuite/

PR target/114587
* gcc.target/i386/apx-3.c: Likewise.

Diff:
---
 gcc/config/i386/i386-c.cc | 2 ++
 gcc/testsuite/gcc.target/i386/apx-3.c | 6 ++
 2 files changed, 8 insertions(+)

diff --git a/gcc/config/i386/i386-c.cc b/gcc/config/i386/i386-c.cc
index 226d277676c..07f4936ba91 100644
--- a/gcc/config/i386/i386-c.cc
+++ b/gcc/config/i386/i386-c.cc
@@ -751,6 +751,8 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag,
 def_or_undef (parse_in, "__AVX10_1_512__");
   if (isa_flag2 & OPTION_MASK_ISA2_APX_F)
 def_or_undef (parse_in, "__APX_F__");
+  if (ix86_apx_inline_asm_use_gpr32)
+def_or_undef (parse_in, "__APX_INLINE_ASM_USE_GPR32__");
   if (TARGET_IAMCU)
 {
   def_or_undef (parse_in, "__iamcu");
diff --git a/gcc/testsuite/gcc.target/i386/apx-3.c 
b/gcc/testsuite/gcc.target/i386/apx-3.c
new file mode 100644
index 000..1ba4ac036fc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/apx-3.c
@@ -0,0 +1,6 @@
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-mapx-inline-asm-use-gpr32" } */
+
+#ifndef __APX_INLINE_ASM_USE_GPR32__
+# error __APX_INLINE_ASM_USE_GPR32__ not defined
+#endif

Re: Question about constructing vector types in GIMPLE pass

[Hanke Zhang via Gcc]

Hi Marc,

Thanks for your reply.

I want to create a new type similar to this one `(const __m256i_u *
{ref-all})` indeed. And I try to create it via these calls:

tree type = build_vector_type_for_mode (intDI_type_node, V4DImode);
tree type_p = build_pointer_type_for_mode(type, VOIDmode, true);

But when I print the `type_p`, it shows `vector(4) long int *
{ref-all}`. So I'm confused if they are the same type or can be
transferred to each other.

And I'm stucked with another problem that, I want to call
`__builtin_ia32_pmovmskb256` in the GIMPLE pass. But I found that this
function is defined in `config/i386/i386-builtins.h`. And when I try
to include this header file, the error will occur during the
compilation. If you know any way to solve this problem, I would be
very grateful. :)

Thanks
Hanke Zhang

Marc Glisse  于2024年4月9日周二 03:01写道：
>
> On Mon, 8 Apr 2024, Hanke Zhang via Gcc wrote:
>
> > Hi,
> > I've been working on strengthening auto-vectorization on intel CPUs
> > recently. I tried to do it in the GIMPLE pass. And I noticed that some
> > vector types in the GIMPLE code are confusing to me. The example code
> > is here:
> >
> > _1 = MEM[(const __m256i_u * {ref-all})_2];
> >
> > I wondered how I could construct or get the type `(const __m256i_u *
> > {ref-all})` in the GIMPLE pass.
> >
> > If you have any ideas that can help me. I'll be so grateful! :)
>
> I am not sure what you are asking exactly. If you already have access to
> such a MEM_REF, then the doc tells you where to look for this type:
>
> "The first operand is the pointer being dereferenced; it will always have
> pointer or reference type.  The second operand is a pointer constant
> serving as constant offset applied to the pointer being dereferenced
> with its type specifying the type to be used for type-based alias
> analysis.
> The type of the node specifies the alignment of the access."
>
> If you want to create a new type similar to this one, you can build it
> with various tools:
>
> build_vector_type or build_vector_type_for_mode
> build_pointer_type_for_mode(*, VOIDmode, true) to build a pointer that can 
> alias anything
> build_qualified_type to add const (probably useless)
> build_aligned_type to specify that it is unaligned
>
> --
> Marc Glisse

[Bug target/56009] Nested global destruction semantics not working (mingw)

[pinskia at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=56009

Andrew Pinski  changed:

   What|Removed |Added

   See Also||https://gcc.gnu.org/bugzill
   ||a/show_bug.cgi?id=2474

--- Comment #4 from Andrew Pinski  ---
(In reply to Andrew Pinski from comment #3)
> This is IIRC the whole atexit vs __cxa_atexit issue.

Which is PR 2474 .

Re: [PATCH] rs6000: Replace OPTION_MASK_DIRECT_MOVE with OPTION_MASK_P8_VECTOR [PR101865]

[Kewen.Lin]

Hi Peter,

on 2024/4/8 21:21, Peter Bergner wrote:
> On 4/8/24 3:55 AM, Kewen.Lin wrote:
>> on 2024/4/6 06:28, Peter Bergner wrote:
>>> +mno-direct-move
>>> +Target Undocumented WarnRemoved
>>> +
>>>  mdirect-move
>>> -Target Undocumented Mask(DIRECT_MOVE) Var(rs6000_isa_flags) WarnRemoved
>>> +Target Undocumented WarnRemoved
>>
>> When reviewing my previous patch to "neuter option -mpower{8,9}-vector",
>> Segher mentioned that we don't need to keep such option warning all the
>> time and can drop it like in a release later as users should be aware of
>> this information then, I agreed and considering that patch disabling
>> -m[no-]direct-move was r8-7845-g57f108f5a1e1b2, I think we can just remove
>> m[no-]direct-move here?  What do you think?
> 
> 
> I'm fine with that if that is what we want.  So something like the following?
> 
> +;; This option existed in the past, but now is always silently ignored.
> mdirect-move
> -Target Undocumented Mask(DIRECT_MOVE) Var(rs6000_isa_flags) WarnRemoved
> +Target Undocumented Ignore

I prefer to remove it completely, that is:

> -mdirect-move
> -Target Undocumented Mask(DIRECT_MOVE) Var(rs6000_isa_flags) WarnRemoved

The reason why you still kept it is to keep a historical record here?

Segher pointed out to me that this kind of option complete removal should be
stage 1 stuff, so let's defer to make it in a separated patch next release
(including some other options like mfpgpr you showed below etc.). :)

For the original patch,

> +mno-direct-move
> +Target Undocumented WarnRemoved

s/WarnRemoved/Ignore/ to match some other existing practice, there is no
warning now if specifying -mno-direct-move and it would be good to keep
the same behavior for users.

OK for trunk and active branches with this tweaked, thanks!

> 
> 
> The above seems to silently ignore both -mdirect-move and -mno-direct-move
> which I think is what we want.  That said, it's not what we've done with
> other options, but maybe those just need to be changed too?

Yes, I think they need to be changed too (next release).

BR,
Kewen

Re: [PATCH v2] c++/modules: Track declarations imported from partitions [PR99377]

[Jason Merrill]

On 4/4/24 08:27, Nathaniel Shead wrote:

On Wed, Apr 03, 2024 at 02:16:25PM -0400, Jason Merrill wrote:

On 3/28/24 08:22, Nathaniel Shead wrote:

Bootstrapped and regtested on x86_64-pc-linux-gnu, OK for trunk?

-- >8 --

The testcase in comment 15 of the linked PR is caused because the
following assumption in depset::hash::make_dependency doesn't hold:

if (DECL_LANG_SPECIFIC (not_tmpl)
&& DECL_MODULE_IMPORT_P (not_tmpl))
  {
/* Store the module number and index in cluster/section,
   so we don't have to look them up again.  */
unsigned index = import_entity_index (decl);
module_state *from = import_entity_module (index);
/* Remap will be zero for imports from partitions, which
   we want to treat as-if declared in this TU.  */
if (from->remap)
  {
dep->cluster = index - from->entity_lwm;
dep->section = from->remap;
dep->set_flag_bit ();
  }
  }

This is because at least for template specialisations, we first see the
declaration in the header unit imported from the partition, and then the
instantiation provided by the partition itself.  This means that the
'import_entity_index' lookup doesn't report that the specialisation was
declared in the partition and thus should be considered as-if it was
part of the TU, and get exported.


I think "exported" is the wrong term here; IIUC template specializations are
not themselves exported, just the template itself.


Yes, sorry; I meant "emitted" here, in terms of whether the definition
is in the CMI (regardless of whether or not that means that importers
can name it).


But if the declaration or point of instantiation of the specialization is
within a module instantiation unit, it is reachable to any importers,
including the primary module interface unit importing the partition
interface unit.

Does this work differently if "check" is a separate module rather than a
partition?


Yes.  When in a non-partition module (say, Bar), then the instantiation
is emitted into Bar's CMI.  When a caller imports Foo, it transitively
streams in Bar as well when looking for the entity and imports its
definition from there.

However, partitions work differently.  In the testcase the instantiation
is emitted into Foo:check's CMI, but partition CMIs are only used within
that module: importers don't know that partitions exist, and only read
Foo's CMI.  And because make_dependency doesn't realise that the
instantiation came from a partition it hasn't emitted it into Foo's CMI
which means that importers don't see a definition for it at all.


To fix this, this patch allows, as a special case for installing an
entity from a partition, to overwrite the entity_map entry with the
(later) index into the partition so that this assumption holds again.


Rather than special-casing partitions, would it make sense to override a
declaration with a definition?


And so in this case I think that special-casing partitions is exactly
what needs to happen, because the special case is that it came from a
partition (rather than just it was a definition).

That said, on further reflection I don't think I like the way I did
this, since it means that for this instantiation, errors will refer to
it as belonging to Foo:check instead of pr99377-3_a.H, which seems
wrong (or at least inconsistent with existing behaviour).


Hmm, I don't think it's wrong; that's where the point of instantiation 
is, and this problem is about that same distinction.


So I think I prefer the first patch, just correcting the use of 
"exported" as discussed above.  OK with that change.


Jason

[Bug target/56009] Nested global destruction semantics not working (mingw)

[pinskia at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=56009

--- Comment #3 from Andrew Pinski  ---
This is IIRC the whole atexit vs __cxa_atexit issue.

[Bug debug/39436] g++ does not emit DW_TAG_try_block or DW_TAG_catch_block

[pinskia at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=39436

--- Comment #7 from Andrew Pinski  ---
(In reply to Andrew Pinski from comment #6)
> (In reply to Andrew Pinski from comment #5)
> > for try blocks, I do need the catch blocks so do it as the siblings.
> > For catch blocks, the child will be type that is being caught as a
> > DW_TAG_formal_parameter/DW_TAG_unspecified_parameters .
> 
> Note DW_TAG_unspecified_parameters is for the catch(...) case.
> 
> I am adding this more for my usage when I am coding this up to make sure I
> understand how this works.

for the VAR_DECL of the catch, I think I should be able to use
gen_formal_parameter_die.

This means the block structure will need to grow since I need another tree
here. Or maybe not. Since there seems like there are 2 BLOCKs here for the
catch.

[Bug testsuite/114614] New test case gcc.misc-tests/gcov-20.c from r14-9789-g08a52331803f66 fails

[linkw at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114614

Kewen Lin  changed:

   What|Removed |Added

   Target Milestone|--- |14.0
 Status|ASSIGNED|RESOLVED
 Resolution|--- |FIXED

--- Comment #3 from Kewen Lin  ---
Should be fixed on latest trunk.

Re: [PATCH] testsuite: Add profile_update_atomic check to gcov-20.c [PR114614]

[Kewen.Lin]

on 2024/4/8 18:47, Richard Biener wrote:
> On Mon, Apr 8, 2024 at 11:23 AM Kewen.Lin  wrote:
>>
>> Hi,
>>
>> As PR114614 shows, the newly added test case gcov-20.c by
>> commit r14-9789-g08a52331803f66 failed on targets which do
>> not support atomic profile update, there would be a message
>> like:
>>
>>   warning: target does not support atomic profile update,
>>single mode is selected
>>
>> Since the test case adopts -fprofile-update=atomic, it
>> requires effective target check profile_update_atomic, this
>> patch is to add the check accordingly.
>>
>> Tested well on x86_64-redhat-linux, powerpc64-linux-gnu P8/P9
>> and powerpc64le-linux-gnu P9/P10.
>>
>> Is it ok for trunk?
> 
> OK

Thanks, pushed as r14-9851.

BR,
Kewen

> 
>> BR,
>> Kewen
>> -
>> PR testsuite/114614
>>
>> gcc/testsuite/ChangeLog:
>>
>> * gcc.misc-tests/gcov-20.c: Add effective target check
>> profile_update_atomic.
>> ---
>>  gcc/testsuite/gcc.misc-tests/gcov-20.c | 1 +
>>  1 file changed, 1 insertion(+)
>>
>> diff --git a/gcc/testsuite/gcc.misc-tests/gcov-20.c 
>> b/gcc/testsuite/gcc.misc-tests/gcov-20.c
>> index 215faffc980..ca8c12aad2b 100644
>> --- a/gcc/testsuite/gcc.misc-tests/gcov-20.c
>> +++ b/gcc/testsuite/gcc.misc-tests/gcov-20.c
>> @@ -1,5 +1,6 @@
>>  /* { dg-options "-fcondition-coverage -ftest-coverage 
>> -fprofile-update=atomic" } */
>>  /* { dg-do run { target native } } */
>> +/* { dg-require-effective-target profile_update_atomic } */
>>
>>  /* Some side effect to stop branches from being pruned */
>>  int x = 0;
>> --
>> 2.43.0

Re: [PATCH] rs6000: Fix wrong align passed to build_aligned_type [PR88309]

[Kewen.Lin]

on 2024/4/8 18:47, Richard Biener wrote:
> On Mon, Apr 8, 2024 at 11:22 AM Kewen.Lin  wrote:
>>
>> Hi,
>>
>> As the comments in PR88309 show, there are two oversights
>> in rs6000_gimple_fold_builtin that pass align in bytes to
>> build_aligned_type but which actually requires align in
>> bits, it causes unexpected ICE or hanging in function
>> is_miss_rate_acceptable due to zero align_unit value.
>>
>> This patch is to fix them by converting bytes to bits, add
>> an assertion on positive align_unit value and notes function
>> build_aligned_type requires align measured in bits in its
>> function comment.
>>
>> Bootstrapped and regtested on x86_64-redhat-linux,
>> powerpc64-linux-gnu P8/P9 and powerpc64le-linux-gnu P9 and P10.
>>
>> Is it (the generic part code change) ok for trunk?
> 
> OK

Thanks, pushed as r14-9850, is it also ok to backport after burn-in time?

BR,
Kewen

> 
>> BR,
>> Kewen
>> -
>> PR target/88309
>>
>> Co-authored-by: Andrew Pinski 
>>
>> gcc/ChangeLog:
>>
>> * config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_builtin): Fix
>> wrong align passed to function build_aligned_type.
>> * tree-ssa-loop-prefetch.cc (is_miss_rate_acceptable): Add an
>> assertion to ensure align_unit should be positive.
>> * tree.cc (build_qualified_type): Update function comments.
>>
>> gcc/testsuite/ChangeLog:
>>
>> * gcc.target/powerpc/pr88309.c: New test.
>> ---
>>  gcc/config/rs6000/rs6000-builtin.cc|  4 ++--
>>  gcc/testsuite/gcc.target/powerpc/pr88309.c | 27 ++
>>  gcc/tree-ssa-loop-prefetch.cc  |  2 ++
>>  gcc/tree.cc|  3 ++-
>>  4 files changed, 33 insertions(+), 3 deletions(-)
>>  create mode 100644 gcc/testsuite/gcc.target/powerpc/pr88309.c
>>
>> diff --git a/gcc/config/rs6000/rs6000-builtin.cc 
>> b/gcc/config/rs6000/rs6000-builtin.cc
>> index 6698274031b..e7d6204074c 100644
>> --- a/gcc/config/rs6000/rs6000-builtin.cc
>> +++ b/gcc/config/rs6000/rs6000-builtin.cc
>> @@ -1900,7 +1900,7 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi)
>> tree lhs_type = TREE_TYPE (lhs);
>> /* In GIMPLE the type of the MEM_REF specifies the alignment.  The
>>   required alignment (power) is 4 bytes regardless of data type.  */
>> -   tree align_ltype = build_aligned_type (lhs_type, 4);
>> +   tree align_ltype = build_aligned_type (lhs_type, 32);
>> /* POINTER_PLUS_EXPR wants the offset to be of type 'sizetype'.  
>> Create
>>the tree using the value from arg0.  The resulting type will match
>>the type of arg1.  */
>> @@ -1944,7 +1944,7 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi)
>> tree arg2_type = ptr_type_node;
>> /* In GIMPLE the type of the MEM_REF specifies the alignment.  The
>>required alignment (power) is 4 bytes regardless of data type.  */
>> -   tree align_stype = build_aligned_type (arg0_type, 4);
>> +   tree align_stype = build_aligned_type (arg0_type, 32);
>> /* POINTER_PLUS_EXPR wants the offset to be of type 'sizetype'.  
>> Create
>>the tree using the value from arg1.  */
>> gimple_seq stmts = NULL;
>> diff --git a/gcc/testsuite/gcc.target/powerpc/pr88309.c 
>> b/gcc/testsuite/gcc.target/powerpc/pr88309.c
>> new file mode 100644
>> index 000..c0078cf2b8c
>> --- /dev/null
>> +++ b/gcc/testsuite/gcc.target/powerpc/pr88309.c
>> @@ -0,0 +1,27 @@
>> +/* { dg-require-effective-target powerpc_vsx_ok } */
>> +/* { dg-options "-mvsx -O2 -fprefetch-loop-arrays" } */
>> +
>> +/* Verify there is no ICE or hanging.  */
>> +
>> +#include 
>> +
>> +void b(float *c, vector float a, vector float, vector float)
>> +{
>> +  vector float d;
>> +  vector char ahbc;
>> +  vec_xst(vec_perm(a, d, ahbc), 0, c);
>> +}
>> +
>> +vector float e(vector unsigned);
>> +
>> +void f() {
>> +  float *dst;
>> +  int g = 0;
>> +  for (;; g += 16) {
>> +vector unsigned m, i;
>> +vector unsigned n, j;
>> +vector unsigned k, l;
>> +b(dst + g * 3, e(m), e(n), e(k));
>> +b(dst + (g + 4) * 3, e(i), e(j), e(l));
>> +  }
>> +}
>> diff --git a/gcc/tree-ssa-loop-prefetch.cc b/gcc/tree-ssa-loop-prefetch.cc
>> index bbd98e03254..70073cc4fe4 100644
>> --- a/gcc/tree-ssa-loop-prefetch.cc
>> +++ b/gcc/tree-ssa-loop-prefetch.cc
>> @@ -739,6 +739,8 @@ is_miss_rate_acceptable (unsigned HOST_WIDE_INT 
>> cache_line_size,
>>if (delta >= (HOST_WIDE_INT) cache_line_size)
>>  return false;
>>
>> +  gcc_assert (align_unit > 0);
>> +
>>miss_positions = 0;
>>total_positions = (cache_line_size / align_unit) * distinct_iters;
>>max_allowed_miss_positions = (ACCEPTABLE_MISS_RATE * total_positions) / 
>> 1000;
>> diff --git a/gcc/tree.cc b/gcc/tree.cc
>> index f801712c9dd..6f8400e6640 100644
>> --- a/gcc/tree.cc
>> +++ b/gcc/tree.cc
>> @@ -5689,7 +5689,8 @@ build_qualified_type (tree type, int type_quals 
>> MEM_STAT_DECL)
>>return t;
>> 

[Bug debug/39436] g++ does not emit DW_TAG_try_block or DW_TAG_catch_block

[pinskia at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=39436

--- Comment #6 from Andrew Pinski  ---
(In reply to Andrew Pinski from comment #5)
> for try blocks, I do need the catch blocks so do it as the siblings.
> For catch blocks, the child will be type that is being caught as a
> DW_TAG_formal_parameter/DW_TAG_unspecified_parameters .

Note DW_TAG_unspecified_parameters is for the catch(...) case.

I am adding this more for my usage when I am coding this up to make sure I
understand how this works.

[gcc r14-9850] rs6000: Fix wrong align passed to build_aligned_type [PR88309]

[Kewen Lin via Gcc-cvs]

https://gcc.gnu.org/g:26eb5f8fd173e2425ae7505528fc426de4b7e34c

commit r14-9850-g26eb5f8fd173e2425ae7505528fc426de4b7e34c
Author: Kewen Lin 
Date:   Mon Apr 8 21:01:36 2024 -0500

rs6000: Fix wrong align passed to build_aligned_type [PR88309]

As the comments in PR88309 show, there are two oversights
in rs6000_gimple_fold_builtin that pass align in bytes to
build_aligned_type but which actually requires align in
bits, it causes unexpected ICE or hanging in function
is_miss_rate_acceptable due to zero align_unit value.

This patch is to fix them by converting bytes to bits, add
an assertion on positive align_unit value and notes function
build_aligned_type requires align measured in bits in its
function comment.

PR target/88309

Co-authored-by: Andrew Pinski 

gcc/ChangeLog:

* config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_builtin): Fix
wrong align passed to function build_aligned_type.
* tree-ssa-loop-prefetch.cc (is_miss_rate_acceptable): Add an
assertion to ensure align_unit should be positive.
* tree.cc (build_qualified_type): Update function comments.

gcc/testsuite/ChangeLog:

* gcc.target/powerpc/pr88309.c: New test.

Diff:
---
 gcc/config/rs6000/rs6000-builtin.cc|  4 ++--
 gcc/testsuite/gcc.target/powerpc/pr88309.c | 27 +++
 gcc/tree-ssa-loop-prefetch.cc  |  2 ++
 gcc/tree.cc|  3 ++-
 4 files changed, 33 insertions(+), 3 deletions(-)

diff --git a/gcc/config/rs6000/rs6000-builtin.cc 
b/gcc/config/rs6000/rs6000-builtin.cc
index 6698274031b..e7d6204074c 100644
--- a/gcc/config/rs6000/rs6000-builtin.cc
+++ b/gcc/config/rs6000/rs6000-builtin.cc
@@ -1900,7 +1900,7 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi)
tree lhs_type = TREE_TYPE (lhs);
/* In GIMPLE the type of the MEM_REF specifies the alignment.  The
  required alignment (power) is 4 bytes regardless of data type.  */
-   tree align_ltype = build_aligned_type (lhs_type, 4);
+   tree align_ltype = build_aligned_type (lhs_type, 32);
/* POINTER_PLUS_EXPR wants the offset to be of type 'sizetype'.  Create
   the tree using the value from arg0.  The resulting type will match
   the type of arg1.  */
@@ -1944,7 +1944,7 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi)
tree arg2_type = ptr_type_node;
/* In GIMPLE the type of the MEM_REF specifies the alignment.  The
   required alignment (power) is 4 bytes regardless of data type.  */
-   tree align_stype = build_aligned_type (arg0_type, 4);
+   tree align_stype = build_aligned_type (arg0_type, 32);
/* POINTER_PLUS_EXPR wants the offset to be of type 'sizetype'.  Create
   the tree using the value from arg1.  */
gimple_seq stmts = NULL;
diff --git a/gcc/testsuite/gcc.target/powerpc/pr88309.c 
b/gcc/testsuite/gcc.target/powerpc/pr88309.c
new file mode 100644
index 000..c0078cf2b8c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr88309.c
@@ -0,0 +1,27 @@
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-mvsx -O2 -fprefetch-loop-arrays" } */
+
+/* Verify there is no ICE or hanging.  */
+
+#include 
+
+void b(float *c, vector float a, vector float, vector float)
+{
+  vector float d;
+  vector char ahbc;
+  vec_xst(vec_perm(a, d, ahbc), 0, c);
+}
+
+vector float e(vector unsigned);
+
+void f() {
+  float *dst;
+  int g = 0;
+  for (;; g += 16) {
+vector unsigned m, i;
+vector unsigned n, j;
+vector unsigned k, l;
+b(dst + g * 3, e(m), e(n), e(k));
+b(dst + (g + 4) * 3, e(i), e(j), e(l));
+  }
+}
diff --git a/gcc/tree-ssa-loop-prefetch.cc b/gcc/tree-ssa-loop-prefetch.cc
index bbd98e03254..70073cc4fe4 100644
--- a/gcc/tree-ssa-loop-prefetch.cc
+++ b/gcc/tree-ssa-loop-prefetch.cc
@@ -739,6 +739,8 @@ is_miss_rate_acceptable (unsigned HOST_WIDE_INT 
cache_line_size,
   if (delta >= (HOST_WIDE_INT) cache_line_size)
 return false;
 
+  gcc_assert (align_unit > 0);
+
   miss_positions = 0;
   total_positions = (cache_line_size / align_unit) * distinct_iters;
   max_allowed_miss_positions = (ACCEPTABLE_MISS_RATE * total_positions) / 1000;
diff --git a/gcc/tree.cc b/gcc/tree.cc
index f801712c9dd..787168e9255 100644
--- a/gcc/tree.cc
+++ b/gcc/tree.cc
@@ -5689,7 +5689,8 @@ build_qualified_type (tree type, int type_quals 
MEM_STAT_DECL)
   return t;
 }
 
-/* Create a variant of type T with alignment ALIGN.  */
+/* Create a variant of type T with alignment ALIGN which
+   is measured in bits.  */
 
 tree
 build_aligned_type (tree type, unsigned int align)

[gcc r14-9851] testsuite: Add profile_update_atomic check to gcov-20.c [PR114614]

[Kewen Lin via Gcc-cvs]

https://gcc.gnu.org/g:9c97de682303b81c8886ac131fcfb3b122f2f1a6

commit r14-9851-g9c97de682303b81c8886ac131fcfb3b122f2f1a6
Author: Kewen Lin 
Date:   Mon Apr 8 21:02:17 2024 -0500

testsuite: Add profile_update_atomic check to gcov-20.c [PR114614]

As PR114614 shows, the newly added test case gcov-20.c by
commit r14-9789-g08a52331803f66 failed on targets which do
not support atomic profile update, there would be a message
like:

  warning: target does not support atomic profile update,
   single mode is selected

Since the test case adopts -fprofile-update=atomic, it
requires effective target check profile_update_atomic, this
patch is to add the check accordingly.

PR testsuite/114614

gcc/testsuite/ChangeLog:

* gcc.misc-tests/gcov-20.c: Add effective target check
profile_update_atomic.

Diff:
---
 gcc/testsuite/gcc.misc-tests/gcov-20.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/gcc/testsuite/gcc.misc-tests/gcov-20.c 
b/gcc/testsuite/gcc.misc-tests/gcov-20.c
index 215faffc980..ca8c12aad2b 100644
--- a/gcc/testsuite/gcc.misc-tests/gcov-20.c
+++ b/gcc/testsuite/gcc.misc-tests/gcov-20.c
@@ -1,5 +1,6 @@
 /* { dg-options "-fcondition-coverage -ftest-coverage -fprofile-update=atomic" 
} */
 /* { dg-do run { target native } } */
+/* { dg-require-effective-target profile_update_atomic } */
 
 /* Some side effect to stop branches from being pruned */
 int x = 0;

[Bug testsuite/114614] New test case gcc.misc-tests/gcov-20.c from r14-9789-g08a52331803f66 fails

[cvs-commit at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114614

--- Comment #2 from GCC Commits  ---
The master branch has been updated by Kewen Lin :

https://gcc.gnu.org/g:9c97de682303b81c8886ac131fcfb3b122f2f1a6

commit r14-9851-g9c97de682303b81c8886ac131fcfb3b122f2f1a6
Author: Kewen Lin 
Date:   Mon Apr 8 21:02:17 2024 -0500

testsuite: Add profile_update_atomic check to gcov-20.c [PR114614]

As PR114614 shows, the newly added test case gcov-20.c by
commit r14-9789-g08a52331803f66 failed on targets which do
not support atomic profile update, there would be a message
like:

  warning: target does not support atomic profile update,
   single mode is selected

Since the test case adopts -fprofile-update=atomic, it
requires effective target check profile_update_atomic, this
patch is to add the check accordingly.

PR testsuite/114614

gcc/testsuite/ChangeLog:

* gcc.misc-tests/gcov-20.c: Add effective target check
profile_update_atomic.

[Bug target/88309] [11/12/13/14 Regression] ICE: Floating point exception (in is_miss_rate_acceptable), target assigning alignent of 4 bits(!) to vector

[cvs-commit at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88309

--- Comment #7 from GCC Commits  ---
The master branch has been updated by Kewen Lin :

https://gcc.gnu.org/g:26eb5f8fd173e2425ae7505528fc426de4b7e34c

commit r14-9850-g26eb5f8fd173e2425ae7505528fc426de4b7e34c
Author: Kewen Lin 
Date:   Mon Apr 8 21:01:36 2024 -0500

rs6000: Fix wrong align passed to build_aligned_type [PR88309]

As the comments in PR88309 show, there are two oversights
in rs6000_gimple_fold_builtin that pass align in bytes to
build_aligned_type but which actually requires align in
bits, it causes unexpected ICE or hanging in function
is_miss_rate_acceptable due to zero align_unit value.

This patch is to fix them by converting bytes to bits, add
an assertion on positive align_unit value and notes function
build_aligned_type requires align measured in bits in its
function comment.

PR target/88309

Co-authored-by: Andrew Pinski 

gcc/ChangeLog:

* config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_builtin): Fix
wrong align passed to function build_aligned_type.
* tree-ssa-loop-prefetch.cc (is_miss_rate_acceptable): Add an
assertion to ensure align_unit should be positive.
* tree.cc (build_qualified_type): Update function comments.

gcc/testsuite/ChangeLog:

* gcc.target/powerpc/pr88309.c: New test.

[Bug testsuite/114642] new test case gcc.dg/debug/btf/btf-datasec-3.c from r14-6195-gb8cf266f4ca4ff fails for 32 bits

[pinskia at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114642

--- Comment #3 from Andrew Pinski  ---
(In reply to Kewen Lin from comment #2)
> David posted a fix (see URL).

Oh yes that should fix it for MIPS and RISCV too.

[Bug debug/39436] g++ does not emit DW_TAG_try_block or DW_TAG_catch_block

[pinskia at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=39436

--- Comment #5 from Andrew Pinski  ---
for try blocks, I do need the catch blocks so do it as the siblings.
For catch blocks, the child will be type that is being caught as a
DW_TAG_formal_parameter/DW_TAG_unspecified_parameters .

Re: [PATCH v2] x86: Define __APX_INLINE_ASM_USE_GPR32__

[Hongtao Liu]

On Tue, Apr 9, 2024 at 9:58 AM H.J. Lu  wrote:
>
> Define __APX_INLINE_ASM_USE_GPR32__ for -mapx-inline-asm-use-gpr32.
> When __APX_INLINE_ASM_USE_GPR32__ is defined, inline asm statements
> should contain only instructions compatible with r16-r31.
Ok.
>
> gcc/
>
> PR target/114587
> * config/i386/i386-c.cc (ix86_target_macros_internal): Define
> __APX_INLINE_ASM_USE_GPR32__ for -mapx-inline-asm-use-gpr32.
>
> gcc/testsuite/
>
> PR target/114587
> * gcc.target/i386/apx-3.c: Likewise.
> ---
>  gcc/config/i386/i386-c.cc | 2 ++
>  gcc/testsuite/gcc.target/i386/apx-3.c | 6 ++
>  2 files changed, 8 insertions(+)
>  create mode 100644 gcc/testsuite/gcc.target/i386/apx-3.c
>
> diff --git a/gcc/config/i386/i386-c.cc b/gcc/config/i386/i386-c.cc
> index 226d277676c..07f4936ba91 100644
> --- a/gcc/config/i386/i386-c.cc
> +++ b/gcc/config/i386/i386-c.cc
> @@ -751,6 +751,8 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag,
>  def_or_undef (parse_in, "__AVX10_1_512__");
>if (isa_flag2 & OPTION_MASK_ISA2_APX_F)
>  def_or_undef (parse_in, "__APX_F__");
> +  if (ix86_apx_inline_asm_use_gpr32)
> +def_or_undef (parse_in, "__APX_INLINE_ASM_USE_GPR32__");
>if (TARGET_IAMCU)
>  {
>def_or_undef (parse_in, "__iamcu");
> diff --git a/gcc/testsuite/gcc.target/i386/apx-3.c 
> b/gcc/testsuite/gcc.target/i386/apx-3.c
> new file mode 100644
> index 000..1ba4ac036fc
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/i386/apx-3.c
> @@ -0,0 +1,6 @@
> +/* { dg-do compile { target { ! ia32 } } } */
> +/* { dg-options "-mapx-inline-asm-use-gpr32" } */
> +
> +#ifndef __APX_INLINE_ASM_USE_GPR32__
> +# error __APX_INLINE_ASM_USE_GPR32__ not defined
> +#endif
> --
> 2.44.0
>


-- 
BR,
Hongtao

[Bug testsuite/114642] new test case gcc.dg/debug/btf/btf-datasec-3.c from r14-6195-gb8cf266f4ca4ff fails for 32 bits

[linkw at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114642

Kewen Lin  changed:

   What|Removed |Added

URL||https://gcc.gnu.org/piperma
   ||il/gcc-patches/2024-April/6
   ||48994.html
 CC||linkw at gcc dot gnu.org
 Status|NEW |ASSIGNED
   Assignee|unassigned at gcc dot gnu.org  |david.faust at oracle 
dot com

--- Comment #2 from Kewen Lin  ---
David posted a fix (see URL).

[PATCH v2] x86: Define __APX_INLINE_ASM_USE_GPR32__

[H.J. Lu]

Define __APX_INLINE_ASM_USE_GPR32__ for -mapx-inline-asm-use-gpr32.
When __APX_INLINE_ASM_USE_GPR32__ is defined, inline asm statements
should contain only instructions compatible with r16-r31.

gcc/

PR target/114587
* config/i386/i386-c.cc (ix86_target_macros_internal): Define
__APX_INLINE_ASM_USE_GPR32__ for -mapx-inline-asm-use-gpr32.

gcc/testsuite/

PR target/114587
* gcc.target/i386/apx-3.c: Likewise.
---
 gcc/config/i386/i386-c.cc | 2 ++
 gcc/testsuite/gcc.target/i386/apx-3.c | 6 ++
 2 files changed, 8 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/i386/apx-3.c

diff --git a/gcc/config/i386/i386-c.cc b/gcc/config/i386/i386-c.cc
index 226d277676c..07f4936ba91 100644
--- a/gcc/config/i386/i386-c.cc
+++ b/gcc/config/i386/i386-c.cc
@@ -751,6 +751,8 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag,
 def_or_undef (parse_in, "__AVX10_1_512__");
   if (isa_flag2 & OPTION_MASK_ISA2_APX_F)
 def_or_undef (parse_in, "__APX_F__");
+  if (ix86_apx_inline_asm_use_gpr32)
+def_or_undef (parse_in, "__APX_INLINE_ASM_USE_GPR32__");
   if (TARGET_IAMCU)
 {
   def_or_undef (parse_in, "__iamcu");
diff --git a/gcc/testsuite/gcc.target/i386/apx-3.c 
b/gcc/testsuite/gcc.target/i386/apx-3.c
new file mode 100644
index 000..1ba4ac036fc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/apx-3.c
@@ -0,0 +1,6 @@
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-mapx-inline-asm-use-gpr32" } */
+
+#ifndef __APX_INLINE_ASM_USE_GPR32__
+# error __APX_INLINE_ASM_USE_GPR32__ not defined
+#endif
-- 
2.44.0

[Bug debug/39436] g++ does not emit DW_TAG_try_block or DW_TAG_catch_block

[pinskia at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=39436

--- Comment #4 from Andrew Pinski  ---
So for space, on LP64 (and LLP64) hosts, there is a free 32bits in the BLOCK
structure:
```
  tree chain;

  unsigned block_num;

  location_t locus; // unsigned
  location_t end_locus; // unsigned

  tree vars;
```

So I can at least add a 3bit field without increasing the size too.

Results for 14.0.1 20240409 (experimental) [remotes/origin/HEAD r14-9848-g45532e3a92] (GCC) testsuite on powerpc64le-unknown-linux-gnu

[Bill Seurer (POWER9 IEEE128) via Gcc-testresults]

git commit g:45532e3a929d2893b3efd26beefb1162e50cb51b
gcc-descr r14-9848-g45532e3a929d28

power9 IEEE128
Linux 6.9.0-0.rc2.20240402git026e680b0a08.24.fc41.ppc64le ppc64le
GNU Make 4.4.1

DejaGnu:
DejaGnu version 1.6.3
Expect version  5.45.4
Tcl version 8.6

64-bit

LAST_UPDATED: Tue Apr  9 00:23:19 UTC 2024 (revision r14-9848-g45532e3a92)

Native configuration is powerpc64le-unknown-linux-gnu

=== gcc tests ===


Running target unix
XPASS: gcc.dg/Wtrampolines.c standard descriptors (test for warnings, line 32)
XPASS: gcc.dg/guality/example.c   -O0  execution test
XPASS: gcc.dg/guality/example.c  -Og -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/guality.c   -O0  execution test
XPASS: gcc.dg/guality/guality.c   -O1  -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/guality.c   -O2  -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/guality.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION execution test
XPASS: gcc.dg/guality/guality.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION execution test
XPASS: gcc.dg/guality/guality.c   -O3 -g  -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/guality.c   -Os  -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/guality.c  -Og -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/inline-params.c   -O2  -DPREVENT_OPTIMIZATION  execution 
test
XPASS: gcc.dg/guality/inline-params.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION execution test
XPASS: gcc.dg/guality/inline-params.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION execution test
XPASS: gcc.dg/guality/inline-params.c   -O3 -g  -DPREVENT_OPTIMIZATION  
execution test
XPASS: gcc.dg/guality/inline-params.c   -Os  -DPREVENT_OPTIMIZATION  execution 
test
FAIL: gcc.dg/guality/loop-1.c   -O2  -DPREVENT_OPTIMIZATION  line 20 i == 1
FAIL: gcc.dg/guality/loop-1.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION line 20 i == 1
FAIL: gcc.dg/guality/loop-1.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 20 i == 1
FAIL: gcc.dg/guality/loop-1.c   -O3 -fomit-frame-pointer -funroll-loops 
-fpeel-loops -ftracer -finline-functions  -DPREVENT_OPTIMIZATION  line 20 i == 1
FAIL: gcc.dg/guality/loop-1.c   -O3 -g  -DPREVENT_OPTIMIZATION  line 20 i == 1
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 18 y == 2
FAIL: gcc.dg/guality/pr36728-3.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 16 y == 2
FAIL: gcc.dg/guality/pr36728-3.c   -O3 -g  -DPREVENT_OPTIMIZATION  line 16 y == 
2
FAIL: gcc.dg/guality/pr41353-1.c  -Og -DPREVENT_OPTIMIZATION  line 28 i == 37
FAIL: gcc.dg/guality/pr41353-1.c  -Og -DPREVENT_OPTIMIZATION  line 28 i1 == 2 * 
37
FAIL: gcc.dg/guality/pr41353-1.c  -Og -DPREVENT_OPTIMIZATION  line 28 i2 == 3 * 
37
XPASS: gcc.dg/guality/pr41353-1.c  -Og -DPREVENT_OPTIMIZATION  line 28 j == 28 
+ 37
FAIL: gcc.dg/guality/pr43051-1.c   -O1  -DPREVENT_OPTIMIZATION  line 34 c == 
[0]
FAIL: gcc.dg/guality/pr43051-1.c   -O1  -DPREVENT_OPTIMIZATION  line 39 c == 
[0]
FAIL: gcc.dg/guality/pr43051-1.c   -O2  -DPREVENT_OPTIMIZATION  line 34 c == 
[0]
FAIL: gcc.dg/guality/pr43051-1.c   -O2  -DPREVENT_OPTIMIZATION  line 39 c == 
[0]
FAIL: gcc.dg/guality/pr43051-1.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION line 34 c == [0]
FAIL: gcc.dg/guality/pr43051-1.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION line 39 c == [0]
FAIL: gcc.dg/guality/pr43051-1.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 34 c == [0]
FAIL: gcc.dg/guality/pr43051-1.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 39 c == [0]
FAIL: gcc.dg/guality/pr54200.c   -O1  -DPREVENT_OPTIMIZATION  line 20 z == 3
FAIL: gcc.dg/guality/pr54200.c   -O2  -DPREVENT_OPTIMIZATION  line 20 z == 3
FAIL: gcc.dg/guality/pr54200.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION line 20 z == 3
FAIL: gcc.dg/guality/pr54200.c   -O3 -g  -DPREVENT_OPTIMIZATION  line 20 z == 3
FAIL: gcc.dg/guality/pr54200.c   -Os  -DPREVENT_OPTIMIZATION  line 20 z == 3
FAIL: gcc.dg/guality/pr54519-1.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION line 20 y == 25
FAIL: gcc.dg/guality/pr54519-1.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION line 20 z == 6
FAIL: gcc.dg/guality/pr54519-1.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION line 23 y == 117
FAIL: gcc.dg/guality/pr54519-1.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION line 23 z == 8
FAIL: gcc.dg/guality/pr54519-1.c   -O2 -flto 

[Bug debug/39436] g++ does not emit DW_TAG_try_block or DW_TAG_catch_block

[pinskia at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=39436

Andrew Pinski  changed:

   What|Removed |Added

 Status|NEW |ASSIGNED
   Assignee|unassigned at gcc dot gnu.org  |pinskia at gcc dot 
gnu.org

--- Comment #3 from Andrew Pinski  ---
Interesting it was mentioned here:
https://gcc.gnu.org/legacy-ml/gcc/2003-12/msg00336.html

I wonder if we could mark the BLOCK as being the try block and then output
DW_TAG_try_block instead of DW_TAG_lexical_block . Likewise for catch.

Maybe I will give that a go for GCC 15. Though I might be only handle the C++
front-end. Others will need to handle other FEs.

Results for 12.3.1 20240409 [remotes/origin/releases/gcc-12 r12-10316-g5f84bdad43] (GCC) testsuite on powerpc64le-unknown-linux-gnu

[Bill Seurer (POWER9) via Gcc-testresults]

git commit g:5f84bdad43d9b67d102ee9773240190db0c2e218
gcc-descr r12-10316-g5f84bdad43d9b6

power9
Linux 5.15.0-97-generic ppc64le
GNU Make 4.3

DejaGnu:
DejaGnu version 1.6.2
Expect version  5.45.4
Tcl version 8.6

64-bit

LAST_UPDATED: Tue Apr  9 00:43:05 UTC 2024 (revision r12-10316-g5f84bdad43)

Native configuration is powerpc64le-unknown-linux-gnu

=== gcc tests ===


Running target unix
XPASS: gcc.dg/Wtrampolines.c standard descriptors (test for warnings, line 29)
XPASS: gcc.dg/uninit-pred-7_a.c bogus warning (test for bogus messages, line 26)
XPASS: gcc.dg/guality/example.c   -O0  execution test
XPASS: gcc.dg/guality/example.c   -O1  -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/example.c  -Og -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/guality.c   -O0  execution test
XPASS: gcc.dg/guality/guality.c   -O1  -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/guality.c   -Os  -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/guality.c  -Og -DPREVENT_OPTIMIZATION  execution test
XPASS: gcc.dg/guality/guality.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION execution test
FAIL: gcc.dg/guality/inline-params-2.c   -O2  -DPREVENT_OPTIMIZATION  execution 
test
FAIL: gcc.dg/guality/inline-params-2.c   -O3 -g  -DPREVENT_OPTIMIZATION  
execution test
FAIL: gcc.dg/guality/inline-params-2.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION execution test
XPASS: gcc.dg/guality/inline-params.c   -Os  -DPREVENT_OPTIMIZATION  execution 
test
XPASS: gcc.dg/guality/inline-params.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION execution test
XPASS: gcc.dg/guality/ipa-sra-1.c   -O0  line 15 k == 3
XPASS: gcc.dg/guality/ipa-sra-1.c   -O1  -DPREVENT_OPTIMIZATION  line 15 k == 3
XPASS: gcc.dg/guality/ipa-sra-1.c  -Og -DPREVENT_OPTIMIZATION  line 15 k == 3
FAIL: gcc.dg/guality/loop-1.c   -O2  -DPREVENT_OPTIMIZATION  line 20 i == 1
FAIL: gcc.dg/guality/loop-1.c   -O3 -fomit-frame-pointer -funroll-loops 
-fpeel-loops -ftracer -finline-functions  -DPREVENT_OPTIMIZATION  line 20 i == 1
FAIL: gcc.dg/guality/loop-1.c   -O3 -g  -DPREVENT_OPTIMIZATION  line 20 i == 1
FAIL: gcc.dg/guality/loop-1.c   -O2 -flto -fno-use-linker-plugin 
-flto-partition=none  -DPREVENT_OPTIMIZATION line 20 i == 1
FAIL: gcc.dg/guality/loop-1.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 20 i == 1
FAIL: gcc.dg/guality/pr36728-1.c   -O3 -g  -DPREVENT_OPTIMIZATION  line 18 y == 
2
FAIL: gcc.dg/guality/pr36728-1.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 18 y == 2
FAIL: gcc.dg/guality/pr36728-2.c   -O3 -g  -DPREVENT_OPTIMIZATION  line 16 arg1 
== 1
FAIL: gcc.dg/guality/pr36728-2.c   -O3 -g  -DPREVENT_OPTIMIZATION  line 16 arg2 
== 2
FAIL: gcc.dg/guality/pr36728-2.c   -O3 -g  -DPREVENT_OPTIMIZATION  line 16 arg3 
== 3
FAIL: gcc.dg/guality/pr36728-2.c   -O3 -g  -DPREVENT_OPTIMIZATION  line 16 arg4 
== 4
FAIL: gcc.dg/guality/pr36728-2.c   -O3 -g  -DPREVENT_OPTIMIZATION  line 16 arg5 
== 5
FAIL: gcc.dg/guality/pr36728-2.c   -O3 -g  -DPREVENT_OPTIMIZATION  line 16 arg6 
== 6
FAIL: gcc.dg/guality/pr36728-2.c   -O3 -g  -DPREVENT_OPTIMIZATION  line 16 arg7 
== 30
FAIL: gcc.dg/guality/pr36728-2.c   -O3 -g  -DPREVENT_OPTIMIZATION  line 18 arg1 
== 1
FAIL: gcc.dg/guality/pr36728-2.c   -O3 -g  -DPREVENT_OPTIMIZATION  line 18 arg2 
== 2
FAIL: gcc.dg/guality/pr36728-2.c   -O3 -g  -DPREVENT_OPTIMIZATION  line 18 arg3 
== 3
FAIL: gcc.dg/guality/pr36728-2.c   -O3 -g  -DPREVENT_OPTIMIZATION  line 18 arg4 
== 4
FAIL: gcc.dg/guality/pr36728-2.c   -O3 -g  -DPREVENT_OPTIMIZATION  line 18 arg5 
== 5
FAIL: gcc.dg/guality/pr36728-2.c   -O3 -g  -DPREVENT_OPTIMIZATION  line 18 arg6 
== 6
FAIL: gcc.dg/guality/pr36728-2.c   -O3 -g  -DPREVENT_OPTIMIZATION  line 18 arg7 
== 30
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 16 arg1 == 1
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 16 arg2 == 2
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 16 arg3 == 3
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 16 arg4 == 4
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 16 arg5 == 5
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 16 arg6 == 6
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 16 arg7 == 30
FAIL: gcc.dg/guality/pr36728-2.c   -O2 -flto -fuse-linker-plugin 
-fno-fat-lto-objects  -DPREVENT_OPTIMIZATION line 18 arg1 == 1
FAIL: gcc.dg/guality/pr36728-2.c 

[Bug debug/39436] g++ does not emit DW_TAG_try_block or DW_TAG_catch_block

[pinskia at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=39436

Andrew Pinski  changed:

   What|Removed |Added

   See Also||https://github.com/llvm/llv
   ||m-project/issues/14523

--- Comment #2 from Andrew Pinski  ---
LLVM's bug report: https://github.com/llvm/llvm-project/issues/14523 :).

[Bug debug/39436] g++ does not emit DW_TAG_try_block or DW_TAG_catch_block

[pinskia at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=39436

Andrew Pinski  changed:

   What|Removed |Added

 CC||pinskia at gcc dot gnu.org

--- Comment #1 from Andrew Pinski  ---
So I could get ICC to produce them but clang does not.

[Bug modula2/114648] compiler by default does not handle C pre-processor file and line directives

[gaius at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114648

Gaius Mulley  changed:

   What|Removed |Added

 Status|ASSIGNED|RESOLVED
 Resolution|--- |FIXED

--- Comment #6 from Gaius Mulley  ---
Closing now the patch has been applied.

[gcc r14-9849] PR modula2/114648 cc1gm2 by default does not handle C pre-processor file and line directives

[Gaius Mulley via Gcc-cvs]

https://gcc.gnu.org/g:600bf396799a022e65938de572ad1a79a951b95a

commit r14-9849-g600bf396799a022e65938de572ad1a79a951b95a
Author: Gaius Mulley 
Date:   Tue Apr 9 02:35:11 2024 +0100

PR modula2/114648 cc1gm2 by default does not handle C pre-processor file 
and line directives

This patch fixes the default behavior of cc1gm2 to the description in
the documentation.  By default cc1gm2 will allow C preprocessor
directives (they can be turned off via -fno-cpp).

gcc/m2/ChangeLog:

PR modula2/114648
* gm2-compiler/M2Options.mod (LineDirectives): Initially
set to true.

gcc/testsuite/ChangeLog:

PR modula2/114648
* gm2/cpp/default/pass/AdvParse.def: New test.
* gm2/cpp/default/pass/AdvParse.mod: New test.
* gm2/cpp/default/pass/cpp-default-pass.exp: New test.

Signed-off-by: Gaius Mulley 

Diff:
---
 gcc/m2/gm2-compiler/M2Options.mod  |  2 +-
 gcc/testsuite/gm2/cpp/default/pass/AdvParse.def|  5 +++
 gcc/testsuite/gm2/cpp/default/pass/AdvParse.mod|  8 +
 .../gm2/cpp/default/pass/cpp-default-pass.exp  | 36 ++
 4 files changed, 50 insertions(+), 1 deletion(-)

diff --git a/gcc/m2/gm2-compiler/M2Options.mod 
b/gcc/m2/gm2-compiler/M2Options.mod
index 09d62cbc732..d04cded17f0 100644
--- a/gcc/m2/gm2-compiler/M2Options.mod
+++ b/gcc/m2/gm2-compiler/M2Options.mod
@@ -1944,7 +1944,7 @@ BEGIN
ReturnChecking:= FALSE ;
CaseElseChecking  := FALSE ;
CPreProcessor := FALSE ;
-   LineDirectives:= FALSE ;
+   LineDirectives:= TRUE ;
ExtendedOpaque:= FALSE ;
UnboundedByReference  := FALSE ;
VerboseUnbounded  := FALSE ;
diff --git a/gcc/testsuite/gm2/cpp/default/pass/AdvParse.def 
b/gcc/testsuite/gm2/cpp/default/pass/AdvParse.def
new file mode 100644
index 000..391a803116f
--- /dev/null
+++ b/gcc/testsuite/gm2/cpp/default/pass/AdvParse.def
@@ -0,0 +1,5 @@
+DEFINITION MODULE AdvParse ;
+
+PROCEDURE foo ;
+
+END AdvParse.
diff --git a/gcc/testsuite/gm2/cpp/default/pass/AdvParse.mod 
b/gcc/testsuite/gm2/cpp/default/pass/AdvParse.mod
new file mode 100644
index 000..ed3727c63c6
--- /dev/null
+++ b/gcc/testsuite/gm2/cpp/default/pass/AdvParse.mod
@@ -0,0 +1,8 @@
+# 2 "AdvParse.bnf"
+IMPLEMENTATION MODULE AdvParse ;
+
+PROCEDURE foo ;
+BEGIN
+END foo ;
+
+END AdvParse.
\ No newline at end of file
diff --git a/gcc/testsuite/gm2/cpp/default/pass/cpp-default-pass.exp 
b/gcc/testsuite/gm2/cpp/default/pass/cpp-default-pass.exp
new file mode 100644
index 000..0b373cfd655
--- /dev/null
+++ b/gcc/testsuite/gm2/cpp/default/pass/cpp-default-pass.exp
@@ -0,0 +1,36 @@
+# Copyright (C) 2024 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# .
+
+# This file was written by Gaius Mulley (gaiusm...@gmail.com)
+# for GNU Modula-2.
+
+if $tracelevel then {
+strace $tracelevel
+}
+
+# load support procs
+load_lib gm2-torture.exp
+
+gm2_init_pim "${srcdir}/gm2/cpp/default/pass/"
+
+foreach testcase [lsort [glob -nocomplain $srcdir/$subdir/*.mod]] {
+# If we're only testing specific files and this isn't one of them, skip it.
+if ![runtest_file_p $runtests $testcase] then {
+   continue
+}
+
+gm2-torture $testcase
+}