[Bug tree-optimization/115220] [15 Regression] RISC-V: newlib targets ICE during sink pass triggered in verify_ssa
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115220
Jeffrey A. Law changed:
What|Removed |Added
Ever confirmed|0 |1
Status|UNCONFIRMED |NEW
CC||law at gcc dot gnu.org,
||rguenth at gcc dot gnu.org
Last reconfirmed||2024-05-25
Target|riscv |riscv,fr30
--- Comment #5 from Jeffrey A. Law ---
It's a generic problem. Almost certainly caused by the recent changes to the
sinking code.
It can be triggered (for example) on the fr30-elf port with -Os on this trivial
testcase:
extern char **environ;
static char ***p_environ =
int
_setenv_r (const char *name, const char *value)
{
register char *C;
int offset;
for (C = (*p_environ)[offset]; (*C = *name++) && *C != '='; ++C);
for (*C++ = '='; (*C++ = *value++) != 0;);
return 0;
}
[Bug rtl-optimization/115038] [14/15 regression] internal error in seh_cfa_offset with -O2 -fno-omit-frame-pointer
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115038 --- Comment #8 from Jeffrey A. Law --- Yea, I would think we want to avoid anything marked as frame related. Otherwise we have to go back and fixup the CFI nodes and such. Eric, do you want to handle the final bootstrap+regression test? Or do you want me to take it from here?
[Bug target/115142] [14 Regression] Unrecognizable insn in extract_insn, at recog.cc:2812 with -ftree-ter
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115142 --- Comment #5 from Jeffrey A. Law --- Yes, sorry. I should have removed the 15 tag.
[Bug target/115142] [14/15 Regression] Unrecognizable insn in extract_insn, at recog.cc:2812 with -ftree-ter
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115142 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P4
[Bug target/115142] [14/15 Regression] Unrecognizable insn in extract_insn, at recog.cc:2812 with -ftree-ter
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115142 Jeffrey A. Law changed: What|Removed |Added Last reconfirmed||2024-05-18 Status|UNCONFIRMED |NEW Ever confirmed|0 |1
[Bug target/115142] [14/15 Regression] Unrecognizable insn in extract_insn, at recog.cc:2812 with -ftree-ter
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115142 --- Comment #2 from Jeffrey A. Law --- So just one high level note. Nobody is ever going to do something like "-ftree-ter" without having one of the optimization levels on. It's an option combination that just doesn't make sense. But we still shouldn't trigger aborts, ICEs and such. I think this is a minor bug in the mem_shadd_or_shadd_rtx_p function. It probably should be verifying that the value being shifted is a REG. Testing a fix.
[Bug target/115123] [15 Regression] RISCV vector scan-assembler failures
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115123 Jeffrey A. Law changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed||2024-05-16 CC||law at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #1 from Jeffrey A. Law --- I'm pretty sure it's the change in sink heuristics. I backed that out yesterday as a check. So, yes, testcases need adjustment.
[Bug other/115110] [15 regression] several failures after r15-512-g9b7cad5884f21c
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115110 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org --- Comment #3 from Jeffrey A. Law --- I hate to pile on, but riscv64-linux-gnu: FAIL: gcc.dg/tree-ssa/ssa-lim-15.c scan-tree-dump lim2 "Executing store motion" I'm certainly willing to believe that perhaps we can't do this store motion without using TBAA to disambiguate certain objects. I haven't actually dug into the regression to determine if that's the case or not.
[Bug tree-optimization/92539] [11/12/13/14/15 Regression] -Warray-bounds false positive with -O3 (loop unroll?)
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92539
Jeffrey A. Law changed:
What|Removed |Added
CC||law at gcc dot gnu.org
--- Comment #12 from Jeffrey A. Law ---
Just to save it for the future. I think this patch I've got lying around
implements the idea in c#6.
diff --git a/gcc/vr-values.cc b/gcc/vr-values.cc
index 3ccb77d28be..cc753e79a8a 100644
--- a/gcc/vr-values.cc
+++ b/gcc/vr-values.cc
@@ -325,6 +325,34 @@ simplify_using_ranges::fold_cond_with_ops (enum tree_code
code,
if (res == range_false (type))
return boolean_false_node;
}
+
+ /* If we're comparing pointers and one of the pointers is
+ not a valid pointer (say [(void *)"aa" + 4B)
+ return true for EQ and false for NE. */
+ if ((code == EQ_EXPR || code == NE_EXPR)
+ && POINTER_TYPE_P (type)
+ && TREE_CODE (op1) == ADDR_EXPR
+ && TREE_CODE (TREE_OPERAND (op1, 0)) == MEM_REF)
+{
+ tree mem_ref = TREE_OPERAND (op1, 0);
+ if (TREE_CODE (TREE_OPERAND (mem_ref, 0)) == ADDR_EXPR)
+ {
+ tree addr_expr = TREE_OPERAND (mem_ref, 0);
+ if (TREE_CODE (TREE_OPERAND (addr_expr, 0)) == STRING_CST)
+ {
+ tree string = TREE_OPERAND (addr_expr, 0);
+
+ if (TREE_CODE (TREE_OPERAND (mem_ref, 1)) == INTEGER_CST)
+ {
+ HOST_WIDE_INT len = TREE_STRING_LENGTH (string);
+ HOST_WIDE_INT offset = tree_to_uhwi (TREE_OPERAND (mem_ref,
1));
+ if (offset > len)
+ return code == EQ_EXPR ? boolean_false_node :
boolean_true_node;
+ }
+ }
+ }
+}
+
return NULL;
}
[Bug rtl-optimization/115013] [15 Regression] LRA: PR114810 fix result in ICE in the RISC-V Vector
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115013 --- Comment #5 from Jeffrey A. Law --- So this seems to have fixed the RISC-V port. Thanks! I'm still seeing some problems on the PRU port though: Tests that now fail, but worked before (1 tests): pru-sim: gcc: gcc.dg/pr71478.c (test for excess errors) New tests that FAIL (1 tests): pru-sim: gcc: gcc.dg/pr71478.c (internal compiler error: in lra_split_hard_reg_for, at lra-assigns.cc:1868) New tests that PASS (1 tests): pru-sim: gcc: gcc.dg/pr113982.c (test for excess errors)
[Bug rtl-optimization/115013] [15 Regression] LRA: PR114810 fix result in ICE in the RISC-V Vector
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115013 Jeffrey A. Law changed: What|Removed |Added Status|UNCONFIRMED |NEW Ever confirmed|0 |1 Last reconfirmed||2024-05-10 --- Comment #3 from Jeffrey A. Law --- No worries Vlad. At least for my tester I've got the LRA patch reverted. So I'm getting regular test results. Thanks for diving in and for the review work on the Rivai's team on subreg tracking in the allocator.
[Bug tree-optimization/115026] [15 Regression] msp430-elf fails gcc.dg/pr66444.c with prange enabled
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115026 --- Comment #7 from Jeffrey A. Law --- So what's the magic to re-enable prange? I can do that and spin a fresh build.
[Bug tree-optimization/115009] [15 regression] AVR: ICE in alloc, at value-range-storage.cc:598
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115009 --- Comment #8 from Jeffrey A. Law --- And on msp430-elf we're getting a codegen correctness issue on msp430-elf. gcc.dg/pr66444.c fails in the simulator. The -O2 code difference looks like: *** good.s Thu May 9 20:41:37 2024 --- bad.s Thu May 9 20:41:44 2024 *** baz: *** 73,81 ; saved regs:(none) ; start of prologue ; end of prologue ! MOV.W #2062, R12 CALL#fn1 ! MOV.W #2062, R12 CALL#fn2 MOV.B #0, R12 ; start of epilogue --- 73,81 ; saved regs:(none) ; start of prologue ; end of prologue ! MOV.B #0, R12 CALL#fn1 ! MOV.B #0, R12 CALL#fn2 MOV.B #0, R12 ; start of epilogue We're mucking up the pointer that baz() passes down to fn1 and fn2 I think.
[Bug tree-optimization/115009] [15 regression] AVR: ICE in alloc, at value-range-storage.cc:598
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115009 Jeffrey A. Law changed: What|Removed |Added Target|avr |avr, rl78 --- Comment #5 from Jeffrey A. Law --- Looks like rl78 is also affected. gcc.target/rl78/test_addm3.c with -O2.
[Bug rtl-optimization/115013] [15 Regression] LRA: PR114810 fix result in ICE in the RISC-V Vector
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115013
Jeffrey A. Law changed:
What|Removed |Added
CC||law at gcc dot gnu.org
Target|RISC-V |RISC-V, pru
--- Comment #1 from Jeffrey A. Law ---
The LRA patch has also been identified as the cause of similar failures in the
PRU port (gcc.dg/pr71478.c):
/cc1 -O2 pr71478.c -quiet
pr71478.c: In function ‘foo’:
pr71478.c:19:1: error: unable to find a register to spill
19 | }
| ^
pr71478.c:19:1: error: this is the insn:
(insn 15 33 30 2 (set (reg:SI 169 [orig:163 _11 ] [163])
(mult:SI (reg:SI 171)
(reg:SI 172 [170]))) "pr71478.c":18:12 discrim 1 631 {mulsi3}
(expr_list:REG_DEAD (reg:SI 172 [170])
(expr_list:REG_DEAD (reg:SI 171)
(nil
during RTL pass: reload
pr71478.c:19:1: internal compiler error: in lra_split_hard_reg_for, at
lra-assigns.cc:1868
0x14fda20 _fatal_insn(char const*, rtx_def const*, char const*, int, char
const*)
/home/jlaw/test/gcc/gcc/rtl-error.cc:108
0x12eff3a lra_split_hard_reg_for()
/home/jlaw/test/gcc/gcc/lra-assigns.cc:1868
0x12e91fe lra(_IO_FILE*, int)
/home/jlaw/test/gcc/gcc/lra.cc:2518
0x1291c6b do_reload
/home/jlaw/test/gcc/gcc/ira.cc:5973
0x12920fa execute
/home/jlaw/test/gcc/gcc/ira.cc:6161
Please submit a full bug report, with preprocessed source (by using
-freport-bug).
Please include the complete backtrace with any bug report.
See <https://gcc.gnu.org/bugs/> for instructions.
jlaw@x11-dpi:~/test/obj/pru/gcc/gcc$
[Bug tree-optimization/115017] New: [15 Regression] Ranger ICE
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115017 Bug ID: 115017 Summary: [15 Regression] Ranger ICE Product: gcc Version: 15.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: tree-optimization Assignee: unassigned at gcc dot gnu.org Reporter: law at gcc dot gnu.org Target Milestone: --- Created attachment 58153 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=58153=edit Testcase, compile with -O2 on avr-elf Recent work in Ranger seems to be causing an ICE on the avr-elf port. Using a cross compiler for avr-elf compile the attached testcase with -O2 to trigger this abort: ../../../../..//avr-libc-2.1.0/libc/time/strftime.c: In function ‘pgm_copystring’: ../../../../..//avr-libc-2.1.0/libc/time/strftime.c:322:1: internal compiler error: in alloc, at value-range-storage.cc:598 0x77a5d2 prange_storage::alloc(vrange_internal_alloc&, prange const&) /home/jlaw/test/gcc/gcc/value-range-storage.cc:598 0x180dde6 ssa_cache::set_range(tree_node*, vrange const&) /home/jlaw/test/gcc/gcc/gimple-range-cache.cc:610 0x1814574 ranger_cache::get_global_range(vrange&, tree_node*, bool&) /home/jlaw/test/gcc/gcc/gimple-range-cache.cc:1058 0x18081f3 gimple_ranger::range_of_stmt(vrange&, gimple*, tree_node*) /home/jlaw/test/gcc/gcc/gimple-range.cc:323 0x18068de gimple_ranger::range_on_entry(vrange&, basic_block_def*, tree_node*) /home/jlaw/test/gcc/gcc/gimple-range.cc:171 0x1806ce2 gimple_ranger::range_on_exit(vrange&, basic_block_def*, tree_node*) /home/jlaw/test/gcc/gcc/gimple-range.cc:208 0x180bcfa gimple_ranger::range_on_edge(vrange&, edge_def*, tree_node*) /home/jlaw/test/gcc/gcc/gimple-range.cc:253 0x1207eab range_query::value_on_edge(edge_def*, tree_node*) /home/jlaw/test/gcc/gcc/value-query.cc:105 0x11d326f rvrp_folder::value_on_edge(edge_def*, tree_node*) /home/jlaw/test/gcc/gcc/tree-vrp.cc:990 0x10b97bb substitute_and_fold_engine::propagate_into_phi_args(basic_block_def*) /home/jlaw/test/gcc/gcc/tree-ssa-propagate.cc:746 0x10b9f43 substitute_and_fold_dom_walker::before_dom_children(basic_block_def*) /home/jlaw/test/gcc/gcc/tree-ssa-propagate.cc:954 0x17af12e dom_walker::walk(basic_block_def*) /home/jlaw/test/gcc/gcc/domwalk.cc:311 0x10b90b5 substitute_and_fold_engine::substitute_and_fold(basic_block_def*) /home/jlaw/test/gcc/gcc/tree-ssa-propagate.cc:999 0x11d077a execute_ranger_vrp(function*, bool, bool) /home/jlaw/test/gcc/gcc/tree-vrp.cc:1066
[Bug rtl-optimization/114996] [15 Regression] [RISC-V] 2->2 combination no longer occurring
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114996 --- Comment #2 from Jeffrey A. Law --- I don't care about the terminology. We have 3 insns in play. A, B and C. We try to combine A -> B which succeeded before resulting in A, B' and C and which in turn allowed a subsequent A -> C combination resulting in a final B', C' sequence, eliminating A. After the combiner patch in question no combinations are done. So, let's move past the argument on terminology and discuss the technical issue. This is something that worked in gcc-14 without the combiner patch. This is important for code generation. How do you propose we address the regression?
[Bug rtl-optimization/114996] New: [15 Regression] [RISC-V] 2->2 combination no longer occurring
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114996
Bug ID: 114996
Summary: [15 Regression] [RISC-V] 2->2 combination no longer
occurring
Product: gcc
Version: 14.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: rtl-optimization
Assignee: unassigned at gcc dot gnu.org
Reporter: law at gcc dot gnu.org
Target Milestone: ---
So this test has started failing on RISC-V after re-introduction of the change
to avoid 2->2 combinations when i2 is unchanged:
/* { dg-do compile } */
/* { dg-require-effective-target rv64 } */
/* { dg-skip-if "" { *-*-* } { "-O0" "-Og" "-Os" "-Oz" } } */
/* { dg-options "-march=rv64gc_zba" } */
typedef unsigned int uint32_t;
typedef unsigned long uint64_t;
void foo(uint32_t a, uint64_t *b_ptr, uint64_t b, uint64_t *c_ptr, uint64_t c)
{
uint64_t x = a;
*b_ptr = b + x;
*c_ptr = c + x;
}
/* { dg-final { scan-assembler-not "\\szext.w\\s" } } */
[ That's heavily reduced and twiddled a bit from a hot loop in xz IIRC. ]
The key thing to note about the test is we have a zero extension of a 32 bit
value to 64 bits. The resulting 64 bit value is used in *two* subsequent
instructions.
As we start combine this looks like:
(insn 10 7 11 2 (set (reg/v:DI 136 [ x ])
(zero_extend:DI (subreg/s/u:SI (reg/v:DI 137 [ a ]) 0))) "j.c":11:12
458 {*zero_extendsidi2_bitmanip}
(expr_list:REG_DEAD (reg/v:DI 137 [ a ])
(nil)))
(insn 11 10 12 2 (set (reg:DI 142 [ _1 ])
(plus:DI (reg/v:DI 136 [ x ])
(reg/v:DI 139 [ b ]))) "j.c":12:14 5 {adddi3}
(expr_list:REG_DEAD (reg/v:DI 139 [ b ])
(nil)))
(insn 12 11 13 2 (set (mem:DI (reg/v/f:DI 138 [ b_ptr ]) [1 *b_ptr_7(D)+0 S8
A64])
(reg:DI 142 [ _1 ])) "j.c":12:10 268 {*movdi_64bit}
(expr_list:REG_DEAD (reg:DI 142 [ _1 ])
(expr_list:REG_DEAD (reg/v/f:DI 138 [ b_ptr ])
(nil
(insn 13 12 14 2 (set (reg:DI 143 [ _2 ])
(plus:DI (reg/v:DI 136 [ x ])
(reg/v:DI 141 [ c ]))) "j.c":13:14 5 {adddi3}
(expr_list:REG_DEAD (reg/v:DI 141 [ c ])
(expr_list:REG_DEAD (reg/v:DI 136 [ x ])
(nil
(insn 14 13 0 2 (set (mem:DI (reg/v/f:DI 140 [ c_ptr ]) [1 *c_ptr_10(D)+0 S8
A64])
(reg:DI 143 [ _2 ])) "j.c":13:10 268 {*movdi_64bit}
(expr_list:REG_DEAD (reg:DI 143 [ _2 ])
(expr_list:REG_DEAD (reg/v/f:DI 140 [ c_ptr ])
(nil
Without the problematical combine change we would first combine 10->11 as a
2->2 combination. Insn 10 would remain unchanged, but insn 11 would
incorporate the zero extension (RISC-V as an instruction for this).
After combining 10->11 (reg:DI 136) will have a single use enabling a 2->1
combination 10->13.
With the problematical combiner change the 10->11 combination fails because i2
hasn't changed and the 10->13 combination fails as well. The net result is we
have an unnecessary zero extension in that loop. Proper code for that testcase
is:
add.uw a2,a0,a2
sd a2,0(a1)
add.uw a0,a0,a4
sd a0,0(a3)
With that combiner change instead we're getting:
zext.w a0,a0
add a2,a0,a2
sd a2,0(a1)
add a0,a0,a4
sd a0,0(a3)
[Bug target/114885] RISC-V: ICE of unrecog insn when graphite for both the c/c++ and fortran
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114885 Jeffrey A. Law changed: What|Removed |Added Status|NEW |RESOLVED Resolution|--- |FIXED CC||law at gcc dot gnu.org --- Comment #4 from Jeffrey A. Law --- Should be fixed on gcc-14 branch and on the trunk.
[Bug target/114506] RISC-V: expect M8 but M4 generated with dynamic LMUL
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114506 Jeffrey A. Law changed: What|Removed |Added Resolution|--- |FIXED Status|UNCONFIRMED |RESOLVED CC||law at gcc dot gnu.org --- Comment #6 from Jeffrey A. Law --- Fixed on the trunk. I would not suggest backporting to the gcc-14 tree as it does not fix a regression. I do expect we'll have a gcc-14 riscv coordination branch much like we did for gcc-13 and this patch would be included on that branch. I guess I'll likely set that up sometime in the next week or two and start cherry-picking appropriate code.
[Bug tree-optimization/114787] [14 Regression] wrong code at -O1 on x86_64-linux-gnu (the generated code hangs)
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114787 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P1 CC||law at gcc dot gnu.org
[Bug rtl-optimization/114729] RISC-V SPEC2017 507.cactu excessive spillls with -fschedule-insns
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114729 --- Comment #11 from Jeffrey A. Law --- Yup. -fsched-verbose=99 is *very* verbose. But that's the point, to see all the gory details. It can be dialed down, but I've never done so myself. What stands out to me is this: ;;| Pressure costs for ready queue ;;| pressure points GR_REGS:[29->29 at 0:94] FP_REGS:[1->1 at 0:94] I haven't had to debug pressure stuff, so I'm not as familiar with its dump format. But I'd hazard a guess the "29->29" means the insn is neutral WRT register pressure with the estimate being we need 29 GPRs before/after this insn. If we think about our GPR file, at 29 we're likely already spilling. 32 - (sp, fp, ra, x0, gp, perhaps tp as well). So maybe that points at the first two thing to verify. 1. What does the "29" actually mean. I'm guessing it means the number of GPRs estimated live at this point. But we should make sure. 2. How does the heuristic determine when to start applying pressure sensitivity? Presumably it's based on the number of registers in a particular class. But given we can't allocate sp, ra, x0, fp, gp, are we properly accounting for those limitations?
[Bug ipa/113291] [14 Regression] compilation never (?) finishes with recursive always_inline functions at -O and above since r14-2172
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113291 Jeffrey A. Law changed: What|Removed |Added Priority|P1 |P2 CC||law at gcc dot gnu.org
[Bug fortran/113956] [13/14 Regression] ice in gfc_trans_pointer_assignment, at fortran/trans-expr.cc:10524
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113956 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Priority|P3 |P4
[Bug analyzer/114677] [13/14 Regression] -Wanalyzer-fd-leak false positive writing to int * param
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114677 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P2 CC||law at gcc dot gnu.org
[Bug c++/114709] [12/13/14 Regression] Incorrect handling of inactive union member access via pointer to member in constant evaluated context
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114709 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P2 CC||law at gcc dot gnu.org
[Bug target/114741] [14 regression] aarch64 sve: unnecessary fmov for scalar int bit operations
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114741 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Priority|P3 |P2
[Bug rtl-optimization/114729] RISC-V SPEC2017 507.cactu excessive spillls with -fschedule-insns
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114729 --- Comment #8 from Jeffrey A. Law --- I didn't even notice you had that testcase attached! I haven't done a deep dive, but the first thing that jumps out is the number of instructions in the ready queue, most likely because of the addressing of objects in static storage. The highparts alone are going to take ~18 GPRs for the loop.
[Bug rtl-optimization/114729] RISC-V SPEC2017 507.cactu excessive spillls with -fschedule-insns
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114729 --- Comment #7 from Jeffrey A. Law --- Yes, there are different algorithms. I looked at them a while back when we first noticed the problems with spilling and x264. There was very little difference for specint when we varied the algorithms. I didn't look at specfp at the time IIRC.
[Bug rtl-optimization/114729] RISC-V SPEC2017 507.cactu excessive spillls with -fschedule-insns
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114729 Jeffrey A. Law changed: What|Removed |Added Last reconfirmed||2024-04-15 Status|UNCONFIRMED |NEW Ever confirmed|0 |1 CC||law at gcc dot gnu.org --- Comment #3 from Jeffrey A. Law --- Right. So what I'm most interested in are the scheduler decisions as most likely IRA/LRA are simply stuck dealing with a pathological conflict graph given the number of register available. ie, sched1 is the root cause. Given the size of the problem and the fact that we have register pressure sensitive scheduling enabled, I don't really think it's related to the issues Andrew linked or the others I've looked at in the past. But we're going to have to dive into those sched1 dumps to know for sure. Vineet, do we have this isolated enough that we know what function is most affected and presumably the most impacted blocks? If so we can probably start to debug scheduler dumps. There's a flag -fsched-verbose=N that gives a lot more low level information about the scheduler's decisions. I usually use N=99. It makes for a huge dump, but gives extremely detailed information about the scheduler's view of the world. It's going to be big enough that bugzilla might balk at attaching the file, even after compression. I'm going to go ahead and confirm given Robin's seen the same behavior on this benchmark.
[Bug tree-optimization/112723] [11/12/13/14 Regression] Missed optimization for invariants 'c+c' when c += -2147483647-1 and c is a global variable
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112723 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Priority|P3 |P2
[Bug lto/114574] [14 regression] ICE when building curl with LTO (fld_incomplete_type_of, at ipa-free-lang-data.cc:257) since r14-9763
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114574 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Priority|P3 |P2
[Bug debug/114608] [14 Regression] Undefined reference in output asm with -fipa-reference -fipa-reference-addressable -fsection-anchors -gbtf
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114608 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Status|UNCONFIRMED |RESOLVED Resolution|--- |FIXED --- Comment #4 from Jeffrey A. Law --- Should be fixed on the trunk.
[Bug target/114621] [11/12/13/14 Regression] ICE: in extract_insn, at recog.cc:2812 (unrecognizable insn) with -O -fpie and _Thread_local with large offset
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114621 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P1 CC||law at gcc dot gnu.org
[Bug c++/114634] [11/12/13/14 Regression] Crash Issue Encountered in GCC Compilation of Template Code with Aligned Attribute
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114634 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P1 CC||law at gcc dot gnu.org
[Bug libgcc/114689] [14 Regression] libgcc/config/m68k/fpgnulib.c:305: Suspicious coding ?
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114689 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P4
[Bug target/114676] [12/13/14 Regression] DSE removes assignment that is used later
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114676 Jeffrey A. Law changed: What|Removed |Added Ever confirmed|0 |1 CC||law at gcc dot gnu.org Priority|P3 |P1 Status|UNCONFIRMED |NEW Last reconfirmed||2024-04-12
[Bug target/89835] The RISC-V target uses amoswap.w for relaxed stores
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89835 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Status|NEW |RESOLVED Resolution|--- |FIXED --- Comment #5 from Jeffrey A. Law --- Fixed on the trunk and presumably the last gcc-13 point release.
[Bug libstdc++/84568] libstdc++-v3 configure checks for atomic operations fail on riscv
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84568 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Status|UNCONFIRMED |RESOLVED Resolution|--- |FIXED --- Comment #15 from Jeffrey A. Law --- Per c#13 and c#14.
[Bug target/113742] ICE: RTL check: expected elt 1 type 'i' or 'n', have 'e' (rtx set) in riscv_macro_fusion_pair_p, at config/riscv/riscv.cc:8416 with -O2 -finstrument-functions -mtune=sifive-p600-se
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113742 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Resolution|--- |FIXED Status|UNCONFIRMED |RESOLVED --- Comment #5 from Jeffrey A. Law --- Per c#4.
[Bug rtl-optimization/114415] [13 Regression] wrong code with -Oz -fno-dce -fno-forward-propagate -flive-range-shrinkage -fweb since r13-1826
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114415 --- Comment #9 from Jeffrey A. Law --- Yea. I think my first one in this space was in the mid 90s on the PA. Sigh.
[Bug rtl-optimization/114415] [13 Regression] wrong code with -Oz -fno-dce -fno-forward-propagate -flive-range-shrinkage -fweb since r13-1826
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114415 Jeffrey A. Law changed: What|Removed |Added Summary|[13/14 Regression] wrong|[13 Regression] wrong code |code with -Oz -fno-dce |with -Oz -fno-dce |-fno-forward-propagate |-fno-forward-propagate |-flive-range-shrinkage |-flive-range-shrinkage |-fweb since r13-1826|-fweb since r13-1826 --- Comment #7 from Jeffrey A. Law --- Given the problems we've generally had in this space, it's probably quite reasonable to treat modifications to the stack pointer as memory accesses. It probably would have been enough to avoid the RISC-V bug I just fixed a week or so ago.
[Bug tree-optimization/114545] [11/12/13/14 Regression] Missed optimization for CSE
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114545 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P2 CC||law at gcc dot gnu.org
[Bug tree-optimization/114559] [11/12/13/14 Regression] After function inlining some optimizations missing
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114559 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P2 CC||law at gcc dot gnu.org
[Bug target/114591] [12/13/14 Regression] register allocators introduce an extra load operation since gcc-12
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114591 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Priority|P3 |P2
[Bug tree-optimization/114511] [11/12/13/14 Regression] Missed optimization: x = -y; x = c + x + y; ==> x=c;
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114511 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Priority|P3 |P2
[Bug rtl-optimization/114515] [14 Regression] Failure to use aarch64 lane forms after PR101523
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114515 --- Comment #9 from Jeffrey A. Law --- Thanks for that info Edwin -- my tester flagged them too and mentally I'd figured it was most likely the combiner change.
[Bug c++/114393] [14 regression] over eager "invalid use of void expression" ? since r14-2170-g4cf64d9cc2faf4
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114393 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Priority|P3 |P2
[Bug target/114415] [13/14 Regression] wrong code with -Oz -fno-dce -fno-forward-propagate -flive-range-shrinkage -fweb since r13-1826
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114415 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P1 CC||law at gcc dot gnu.org
[Bug ipa/114501] [11/12/13/14 Regression] ICE during modref with LTO
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114501 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P1 CC||law at gcc dot gnu.org
[Bug middle-end/114509] [11/12/13/14 Regression] an infinite loop or ICE with openmp after errors in some cases
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114509 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P1 CC||law at gcc dot gnu.org
[Bug target/114513] [11/12/13/14 Regression] [aarch64] floating-point registers are used when GPRs are preferred
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114513 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P2 CC||law at gcc dot gnu.org
[Bug rtl-optimization/114515] [14 Regression] Failure to use aarch64 lane forms after PR101523
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114515 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P2 CC||law at gcc dot gnu.org
[Bug rtl-optimization/114522] [14 regression] gcc.target/arm/aes_xor_combine.c scan-assembler-not veor fails after r14-9692-g839bc42772ba7a
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114522 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P2 CC||law at gcc dot gnu.org
[Bug target/114510] [14 Regression] missed proping of multiply by 2 into address of load/stores
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114510 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Priority|P3 |P2
[Bug tree-optimization/95185] [11/12/13/14 Regression] Failure to optimize specific kind of sign comparison check
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95185 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P2 CC||law at gcc dot gnu.org
[Bug c++/101463] [11/12/13/14 Regression] Using a constexpr variable template specialization as default argument for non-type template parameter of reference type leads gcc to reject function call
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101463 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Priority|P3 |P2
[Bug target/102264] [11/12/13/14 Regression] extra spilling when using inline-asm and all registers
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102264 Jeffrey A. Law changed: What|Removed |Added Status|WAITING |RESOLVED Resolution|--- |INVALID --- Comment #12 from Jeffrey A. Law --- Per c#7.
[Bug middle-end/104088] [12/13/14 Regression] '-O2' (or higher) GCN offloading (only) 'libgomp.oacc-c-c++-common/vprop.c' excess errors: 'warning: writing 1 byte into a region of size 0 [-Wstringop-ov
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104088 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P2 CC||law at gcc dot gnu.org
[Bug c++/104995] [11/12/13/14 Regression] access checking for function pointer template parameters takes place at call site inside a templated (generic) lambda
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104995 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Priority|P3 |P2
[Bug target/105275] [12/13/14 regression] 525.x264_r and 538.imagick_r regressed on x86_64 at -O2 with PGO after r12-7319-g90d693bdc9d718
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105275 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Priority|P3 |P2
[Bug c++/105760] [11/12/13/14 Regression] ICE: in build_function_type, at tree.cc:7365
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105760 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P2 CC||law at gcc dot gnu.org
[Bug debug/106955] [13/14 Regression] '-fcompare-debug' failure w/ -std=c++20 -O1 -ftree-parallelize-loops=2 -fno-ipa-sra --param ggc-min-expand=55
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106955 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Priority|P3 |P2
[Bug c++/107058] [11/12/13/14 Regression] ICE in dwarf2out_die_ref_for_decl, at dwarf2out.cc:6038 since r11-5003-gd50310408f54e380
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107058 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Priority|P3 |P2
[Bug other/63426] [meta-bug] Issues found with -fsanitize=undefined
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63426 Bug 63426 depends on bug 108278, which changed state. Bug 108278 Summary: [13/14 Regression] runtime error with -O1 -Wall https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108278 What|Removed |Added Status|WAITING |RESOLVED Resolution|--- |FIXED
[Bug middle-end/108278] [13/14 Regression] runtime error with -O1 -Wall
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108278 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Status|WAITING |RESOLVED Resolution|--- |FIXED --- Comment #20 from Jeffrey A. Law --- Per c#16.
[Bug analyzer/108708] [13/14 Regression] __analyzer_dump_named_constant fails with derived values
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108708 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P4 CC||law at gcc dot gnu.org
[Bug target/113357] [14 regression] m68k-linux bootstrap failure in stage2 due to segfault compiling unwind-dw2.c since r14-4664-g04c9cf5c786b94
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113357 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P4 --- Comment #5 from Jeffrey A. Law --- So given my bootstraps (qemu) are working the most likely scenarios are either a difference in the emulators or a difference in the configure setup. The first thing I would suggest would be to put the stage2 compiler under a debugger and find out why it faulted. That might help with understanding the problem. ie, are we segfaulting because we dereferenced a NULL pointer, or perhaps faulting because we did an unaligned access, or whatever. The next thing I would suggest would be extracting the .i file and confirming you can feed that to the stage2 cc1 and see the fault. Assuming you can, then you ought to be able to do an object bisection. ie, replace .o files for the failing stage with those from a previous stage, relink, retest. It'll take a while. But this usually results in finding a single trigger file. Once that's narrowed down we can figure out the next steps.
[Bug middle-end/109990] [12/13/14 Regression] Bogus -Wuse-after-free warning after realloc
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109990 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P2
[Bug target/110273] [12/13/14 Regression] i686-w64-mingw32 with -mavx512f generates AVX instructions without stack alignment
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110273 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P2 CC||law at gcc dot gnu.org
[Bug analyzer/110285] [13/14 Regression] -Wanalyzer-infinite-recursion false positive involving floating-point values
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110285 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Priority|P3 |P2
[Bug c++/110401] [11/12/13/14 Regression] Unhelpful "goto is not a constant expression" in ill-formed pre c++20 constexpr function template
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110401 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Priority|P3 |P2
[Bug libgomp/110842] [14 Regression] Openmp loops with KIND=16 DO loops
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110842 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Priority|P3 |P4
[Bug fortran/110987] [13/14 Regression] Segmentation fault after finalization of a temporary variable
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110987 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P4 CC||law at gcc dot gnu.org
[Bug middle-end/111151] [12/13/14 Regression] Wrong code at -O0 on x86_64-pc-linux-gnu
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=51 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P1 CC||law at gcc dot gnu.org
[Bug target/111231] [12/13/14 regression] armhf: Miscompilation with -O2/-fno-exceptions level (-fno-tree-vectorize is working)
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111231 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Priority|P3 |P1
[Bug analyzer/111305] [13/14 Regression] GCC Static Analyzer -Wanalyzer-out-of-bounds false postive
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111305 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P2
[Bug middle-end/111655] [11/12/13/14 Regression] wrong code generated for __builtin_signbit and 0./0. on x86-64 -O2
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111655 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P1 CC||law at gcc dot gnu.org
[Bug rtl-optimization/112415] [14 regression] Python 3.11 miscompiled on HPPA with new RTL fold mem offset pass, since r14-4664-g04c9cf5c786b94
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112415 Jeffrey A. Law changed: What|Removed |Added Resolution|--- |FIXED Status|NEW |RESOLVED --- Comment #55 from Jeffrey A. Law --- Per c#54. If it turns out we're wrong, we can always reopen or file a new report.
[Bug tree-optimization/114374] [12/13/14 Regression] snprintf Wformat-truncation
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114374 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P2 CC||law at gcc dot gnu.org
[Bug c++/114377] [13/14 Regression] GCC crashes on an example of CTAD for alias templates
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114377 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P1 CC||law at gcc dot gnu.org
[Bug middle-end/26163] [meta-bug] missed optimization in SPEC (2k17, 2k and 2k6 and 95)
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=26163 Bug 26163 depends on bug 112697, which changed state. Bug 112697 Summary: [14 Regression] 30-40% exec time regression of 433.milc on zen2 since r14-4972-g8aa47713701b1f https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112697 What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|--- |FIXED
[Bug middle-end/112697] [14 Regression] 30-40% exec time regression of 433.milc on zen2 since r14-4972-g8aa47713701b1f
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112697 Jeffrey A. Law changed: What|Removed |Added Resolution|--- |FIXED Status|UNCONFIRMED |RESOLVED --- Comment #11 from Jeffrey A. Law --- Per c#10.
[Bug c++/114426] [14 regression] ICE when building log4cxx on arm (cxx_eval_call_expression, at cp/constexpr.cc:3242)
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114426 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Priority|P3 |P1
[Bug tree-optimization/114403] [14 regression] LLVM miscompiled with -O3 -march=znver2 -fno-vect-cost-model since r14-6822-g01f4251b8775c8
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114403 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P1 CC||law at gcc dot gnu.org
[Bug analyzer/114408] [13/14 Regression] ICE when invoking strcmp multiple times with -fsanitize=undefined -O1 -fanalyzer -flto
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114408 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Priority|P3 |P1
[Bug target/114411] [14 Regression] 12% exec time slowdown of 433.milc on aarch64
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114411 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P2 CC||law at gcc dot gnu.org
[Bug target/114412] [14 Regression] 7% slowdown of 436.cactusADM on aarch64
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114412 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P2 CC||law at gcc dot gnu.org
[Bug target/114414] [14 Regression] 15-18% exec time slowdown of 433.milc on Zen2
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114414 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Priority|P3 |P2
[Bug rtl-optimization/113390] [14 Regression] ICE: in model_update_limit_points_in_group, at haifa-sched.cc:1986 with -O2 --param=max-sched-region-insns=200 --param=max-sched-extend-regions-iters=2
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113390 --- Comment #4 from Jeffrey A. Law --- Made it a P1 simply because it was likely not RISC-V specific ICE. I don't think we're at a point where it makes sense for RISC-V to be a primary platform, though hopefully that'll change in the relatively near future.
[Bug tree-optimization/56457] Bogus warning: loop-invariant.c:786:20: error: unused variable ‘regno’ when building vax-*-*
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=56457 Jeffrey A. Law changed: What|Removed |Added Status|NEW |RESOLVED Resolution|--- |FIXED CC||law at gcc dot gnu.org --- Comment #5 from Jeffrey A. Law --- Per c#4.
[Bug c/89180] [meta-bug] bogus/missing -Wunused warnings
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89180 Bug 89180 depends on bug 56457, which changed state. Bug 56457 Summary: Bogus warning: loop-invariant.c:786:20: error: unused variable ‘regno’ when building vax-*-* https://gcc.gnu.org/bugzilla/show_bug.cgi?id=56457 What|Removed |Added Status|NEW |RESOLVED Resolution|--- |FIXED
[Bug bootstrap/44756] [meta-bug] --enable-werror-always issues
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=44756 Bug 44756 depends on bug 56457, which changed state. Bug 56457 Summary: Bogus warning: loop-invariant.c:786:20: error: unused variable ‘regno’ when building vax-*-* https://gcc.gnu.org/bugzilla/show_bug.cgi?id=56457 What|Removed |Added Status|NEW |RESOLVED Resolution|--- |FIXED
[Bug debug/112703] [13/14 Regression] -fcompare-debug failure at -O1 and above
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112703 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Priority|P3 |P2
[Bug middle-end/112710] [13/14 Regression] ICE: in write_type, at cp/mangle.cc:2226 with -fdump-go-spec=filename -flto -fno-use-linker-plugin
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112710 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P4 CC||law at gcc dot gnu.org
[Bug ipa/113359] [13/14 Regression] LTO miscompilation of ceph on aarch64
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113359 --- Comment #20 from Jeffrey A. Law --- Go right ahead. I'm mostly trying to get things in the right broad buckets. So if you've got additional information, please add it.
[Bug ipa/113359] [13/14 Regression] LTO miscompilation of ceph on aarch64
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113359 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Priority|P3 |P1
[Bug middle-end/113396] [13/14 Regression] csmith: differences from -O2 to -O3
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113396 Jeffrey A. Law changed: What|Removed |Added Priority|P3 |P1 CC||law at gcc dot gnu.org
[Bug tree-optimization/113727] [14 Regression] csmith: differences from nothing to -O1
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113727 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Priority|P3 |P1
[Bug tree-optimization/114269] [14 Regression] Multiple 3-6% exec time regressions of 434.zeusmp since r14-9193-ga0b1798042d033
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114269 Jeffrey A. Law changed: What|Removed |Added CC||law at gcc dot gnu.org Priority|P3 |P2
