[Bug rtl-optimization/113362] New: RISCV64 divide and remainder with the same operands generates two divide operations

[sh1.gccbug at tikouka dot nz via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113362

            Bug ID: 113362
           Summary: RISCV64 divide and remainder with the same operands
                    generates two divide operations
           Product: gcc
           Version: 14.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: rtl-optimization
          Assignee: unassigned at gcc dot gnu.org
          Reporter: sh1.gccbug at tikouka dot nz
  Target Milestone: ---

Input:

void fn(uint64_t out[2], uint64_t x, uint64_t y) {
    out[0] = x / y;
    out[1] = x % y;
}

Output:

fn(unsigned long*, unsigned long, unsigned long):
        divu    a5,a1,a2
        remu    a1,a1,a2
        sd      a5,0(a0)
        sd      a1,8(a0)
        ret

https://godbolt.org/z/15Tn9PqGe

The `remu` operation may be better off replaced with a multiply and subtract
like how LLVM does it.  Otherwise it may result in a redundant, slow division
operation.